Watchdog control circuit and device

Abstract

This application discloses a watchdog control circuit and a device. The watchdog control circuit includes: a watchdog circuit, a control circuit, and a processing chip; wherein, the watchdog circuit includes a watchdog chip, the control circuit is connected to the watchdog, the control circuit includes a control chip, and the processing chip is connected to the control circuit. During the startup process of the device, the processing chip is used to send a first enable signal to the control circuit to control the control chip to remain in the off state, and the control chip controls the watchdog chip to remain in the off state according to the first enable signal; after the device is started up, the processing chip is used to send a second enable signal to the control circuit to control and turn on the control chip, and the control chip controls the watchdog chip to turn on according to the second enable signal so that the watchdog circuit is in the working state. The watchdog control circuit in this application enables the watchdog to be turned on as needed and locked in the enabled state, enabling devices with complex systems to start up normally and improving the stability of device operation.

Description

Technical Field

[0001] This application relates to the field of electronic technologies, and particularly to a watchdog control circuit and device. Background Art

[0002] In related technologies, in a device provided with a watchdog circuit, the watchdog chip is turned on when powered on, and the processing chip must send a dog-feeding signal within a predetermined time; otherwise, the watchdog chip will restart the device. When the device system kernel file is large, it takes a longer time to decompress the kernel, and the time may exceed the predetermined time, resulting in the watchdog outputting a reset signal to restart the device and preventing it from starting up normally. Summary of the Invention

[0003] Embodiments of this application provide a watchdog control circuit and device.

[0004] The watchdog control circuit according to the embodiments of this application includes: a watchdog circuit, a control circuit, and a processing chip; wherein, the watchdog circuit includes a watchdog chip, the control circuit is connected to the watchdog circuit, the control circuit includes a control chip, and the processing chip is connected to the control circuit. Moreover, during the startup process of the device, the processing chip is configured to send a first enable signal to the control circuit to control the control chip to remain in a closed state, and the control chip controls the watchdog chip to remain in a closed state according to the first enable signal; after the device starts up, the processing chip is configured to send a second enable signal to the control circuit to control and turn on the control chip, and the control chip controls the watchdog chip to turn on so that the watchdog circuit is in a working state.

[0005] In the watchdog control circuit according to the embodiments of this application, the control circuit connected to the watchdog is controlled by the processing chip to be turned off, so that the control chip remains in a closed state, thereby ensuring that the watchdog circuit is in a closed state, and thus the watchdog chip does not work during the startup process of the device. Until after the device completes startup, the processing chip controls the control circuit to be turned on to turn on the control chip, and at this time the watchdog chip is enabled so that the watchdog circuit is in a working state. In this way, it is possible to avoid the situation where when the device system kernel file is large, it takes a longer time to decompress the kernel, resulting in the watchdog circuit outputting a reset signal to restart the device, and such a cycle causes the device to be unable to start up normally.

[0006] In some embodiments, the control circuit includes a locking module, and the locking module is configured to lock the watchdog circuit in a working state.

[0007] In some embodiments, the locking module includes a first transistor, a second transistor, and a third transistor. The base of the first transistor is connected to the collector of the second transistor through a first resistor. The emitter of the first transistor is connected to a power supply. The collector of the first transistor is grounded through a second resistor. The base of the second transistor is connected between the collector of the first transistor and the first resistor through a third resistor. The emitter of the second transistor is grounded. The base of the third transistor is connected to the processing chip. The emitter of the third transistor is grounded. The collector of the third transistor is connected to the collector of the second transistor.

[0008] In some embodiments, the control circuit includes a fourth resistor. One end of the fourth resistor is connected to the collector of the third transistor, and the other end is connected to the power supply.

[0009] In some embodiments, the control circuit includes a fifth resistor. One end of the fifth resistor is connected to the power supply, and the other end is connected to the RST pin of the watchdog chip.

[0010] In some embodiments, the control circuit includes a first capacitor and a sixth resistor. The first end of the first capacitor is connected to the RST pin of the watchdog chip, and the second end of the first capacitor is grounded. The first end of the sixth resistor is connected to the base of the third transistor, and the second end of the sixth resistor is grounded.

[0011] In some embodiments, the Z pin of the control chip is connected to the WDI pin of the watchdog chip.

[0012] In some embodiments, the Y pin of the control chip is electrically connected to the processing chip. The Y pin of the control chip is used to receive the watchdog feeding signal from the processing chip, and the control chip is used to output the watchdog feeding signal to the watchdog circuit.

[0013] In some embodiments, the control circuit includes a locking module. The locking module is used to lock the watchdog circuit in the working state. When the watchdog circuit does not receive the watchdog feeding signal, the RST pin of the watchdog chip outputs a reset signal to reset the processing chip. The reset signal causes the locking module to unlock the watchdog circuit, and the watchdog chip and the control chip switch from the startup state to the shutdown state according to the reset signal.

[0014] The present application provides a device. The device includes the watchdog control circuit in any of the above embodiments. The watchdog control circuit is used to monitor the operating state of the device.

[0015] Additional aspects and advantages of the present application will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present application. Description of the Drawings

[0016] The above and / or additional aspects and advantages of the present application will become apparent and be readily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0017] Figure 1 is a schematic diagram of the watchdog control circuit module in an embodiment of the present application;

[0018] Figure 2 is a schematic circuit diagram of the watchdog control circuit in an embodiment of the present application;

[0019] Figure 3 is a schematic plan view of the device in an embodiment of the present application.

[0020] Description of the Main Component Symbols:

[0021] The first transistor Q1, the second transistor Q2, the third transistor Q3, the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the first capacitor C1, the watchdog control circuit 1000, the watchdog circuit 100, the watchdog chip 11, the control circuit 200, the control chip 21, the locking module 22, the processing chip 300, the device 2000. Detailed Embodiments

[0022] The embodiments of the present application will be described in detail below. Examples of the embodiments are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary only for explaining the present application and should not be construed as limiting the present application.

[0023] In the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present application. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present application, "a plurality of" means two or more, unless otherwise specifically defined.

[0024] In the description of the present application, it should be noted that unless otherwise clearly specified and defined, the terms "mounted", "connected" and "coupled" shall be construed broadly. For example, it may be a fixed connection, a detachable connection or an integral connection; it may be a mechanical connection, an electrical connection or a connection capable of mutual communication; it may be directly connected, or indirectly connected through an intermediate medium, and it may be the communication inside two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0025] In the present application, unless otherwise clearly specified and defined, the first feature being "on" or "under" the second feature may include the direct contact between the first and second features, or may include the situation where the first and second features are not in direct contact but in contact through additional features therebetween. Moreover, the first feature being "above", "over" and "on top of" the second feature includes that the first feature is directly above and obliquely above the second feature, or merely means that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "beneath" and "underneath" the second feature includes that the first feature is directly below and obliquely below the second feature, or merely means that the horizontal height of the first feature is lower than that of the second feature.

[0026] The following disclosure provides many different embodiments or examples for implementing different structures of the present application. To simplify the disclosure of the present application, components and settings of specific examples are described below. Of course, they are only examples and are not intended to limit the present application. In addition, the present application may repeat reference numerals and / or reference letters in different examples. Such repetition is for the purpose of simplification and clarity and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and / or the use of other materials.

[0027] Please refer to Figures 1-3 , an embodiment of the present application provides a watchdog control circuit 1000. The watchdog control circuit 1000 includes: a watchdog circuit 100, a control circuit 200, and a processing chip 300; wherein, the watchdog circuit 100 includes a watchdog chip 11, the control circuit 200 is connected to the watchdog circuit 100, the control circuit 200 includes a control chip 21, and the processing chip 300 is connected to the control circuit 200.

[0028] During the startup process of the device 2000, the processing chip 300 is used to send a first enable signal to the control circuit 200 to control the control chip 21 to remain in the off state, and the control chip 21 controls the watchdog chip 11 to remain in the off state according to the first enable signal; after the device 2000 is started, the processing chip 300 is used to send a second enable signal to the control circuit 200 to control and turn on the control chip 21, and the control chip 21 controls the watchdog chip 11 to turn on so that the watchdog circuit 100 is in the working state.

[0029] In the watchdog control circuit 1000 of the embodiment of the present application, the control circuit 200 connected to the watchdog is controlled by the processing chip 300 to be turned off, so that the control chip 21 remains in the off state, thereby ensuring that the watchdog circuit 100 is in the off state, so that the watchdog chip 11 does not work during the startup process of the device 2000. Until the device 2000 completes startup, the processing chip 300 controls the control circuit 200 to be turned on to turn on the control chip 21. At this time, the watchdog chip 11 is turned on so that the watchdog circuit 100 is in the working state. In this way, it is possible to avoid that when the system kernel file of the device 2000 is large, it takes a longer time to decompress the kernel, resulting in the watchdog circuit 100 outputting a reset signal to restart the device 2000, and such a cycle causes the device 2000 to fail to start normally.

[0030] Specifically, the watchdog circuit 100 is a means to monitor the operating status of the system, and can realize the monitoring of the system operating status through a combination of software and hardware. The software running stably in the device 2000 will feed the dog after executing specific instructions. If the watchdog does not receive the dog-feeding signal from the software within a certain period, it is considered that the system has a fault, and the system will enter the interrupt handling program or force the system to reset.

[0031] However, in some devices 2000 equipped with the watchdog circuit 100, the watchdog chip 11 is turned on when the power is applied, which requires the processing chip 300 to send a dog-feeding signal within a predetermined time. Otherwise, the watchdog chip 11 will restart the device 2000. When the system kernel file of the device 2000 is large, it takes a longer time to decompress the kernel, and the time may exceed the predetermined time, resulting in the watchdog outputting a reset signal to restart the device 2000 and it cannot start normally.

[0032] In response to this, the present application provides a watchdog control circuit 1000, which enables the watchdog circuit 100 to be turned on as needed and locked in the enabled state, so that the device 2000 with a complex system can also start normally, improving the operating stability of the device 2000.

[0033] Among them, the device 2000 can be an electronic device 2000 such as a laptop computer, a desktop computer, a tablet computer, or some large industrial devices 2000, breeding devices 2000, etc., as long as the watchdog control circuit 1000 provided in the present application is applied. The watchdog circuit 100 may include a watchdog chip 11, and the model of the watchdog chip 11 may be SGM706, with a timing time of 1.6 s; the control circuit 200 may be connected to the watchdog circuit 100, and the control circuit 200 may include a control chip 21, and the model of the control chip 21 may be 74LVC1G66GV, and the control chip 21 can control the opening and closing of the watchdog chip 11.

[0034] The processing chip 300 can be connected to the control circuit 200. In this way, when the device 2000 includes a complex kernel and when the device 2000 needs to be started, during the startup process of the device 2000, the processing chip 300 can send a first enable signal to the control circuit 200. The first enable signal can be a low-level signal. Under the action of the first enable signal, the control chip 21 remains in the off state, so that the control chip 21 cannot control the watchdog chip 11 to turn on, and the watchdog circuit 100 will not work during the startup process of the device 2000.

[0035] In this way, even if the startup time of the device 2000 exceeds the timing time of the watchdog chip 11, since the watchdog chip 11 is not in the working state, the watchdog chip 11 will not send a reset signal to reset the device 2000.

[0036] After the device 2000 completes startup, the processing chip 300 can be used to send a second enabling signal to the control circuit 200, and the second enabling signal can be a high-level signal. Under the action of the second enabling signal, the control chip 21 is turned on, so that the control chip 21 can control the watchdog chip 11 to turn on. Thus, after the device 2000 completes startup, the watchdog circuit 100 starts to work and monitors the operating state of the device 2000 in real time.

[0037] Please refer to Figure 1 and Figure 2 In some embodiments, the control circuit 200 may include a locking module 22, and the locking module 22 can be used to lock the watchdog circuit 100 in the working state. In this way, the locking module 22 locks the watchdog circuit 100 in the working state, so that the watchdog chip 11 is locked in the on state, avoiding the watchdog chip 11 being turned off during the normal operation of the device 2000, resulting in the inability to monitor the operation of the device 2000.

[0038] Specifically, the locking module 22 can be formed by connecting multiple triodes and multiple resistors in cooperation. The function of the locking module 22 is that once the device 2000 system starts up and the watchdog chip 11 is turned on, it is locked in the on state and cannot be turned off, avoiding the device 2000 losing monitoring due to the watchdog circuit 100 being abnormally turned off by software.

[0039] Please refer to Figure 2 In some embodiments, the locking module 22 may include a first transistor Q1, a second transistor Q2, and a third transistor Q3. The base of the first transistor Q1 is connected to the collector of the second transistor Q2 through a first resistor R1. The emitter of the first transistor Q1 is connected to the power supply VCC. The collector of the first transistor Q1 is grounded through a second resistor R2. The base of the second transistor Q2 is connected between the collector of the first transistor Q1 and the first resistor R1 through a third resistor R3. The emitter of the second transistor Q2 is grounded. The base of the third transistor Q3 is connected to the processing chip 300. The emitter of the third transistor Q3 is grounded. The collector of the third transistor Q3 is connected to the collector of the second transistor Q2.

[0040] Specifically, the first transistor Q1 in this application can be a PNP type triode, and the second transistor Q2 and the third transistor Q3 can be NPN type triodes. The models of the first transistor Q1, the second transistor Q2, and the third transistor Q3 can all be S8550. The locking module 22 in this application can be built by the first transistor Q1, the second transistor Q2, and the third transistor Q3 according to the principle of triode self-locking.

[0041] In this embodiment, when the processing chip 300 sends a first enable signal to the control circuit 200, the first transistor Q1 and the second transistor Q2 are default in the cut-off state, and the collector of the second transistor Q2 and the collector of the third transistor Q3 remain at a high level. Since the 4th pin of the control chip 21 is connected with a pull-down resistor, the 4th pin is at a low level, and the watchdog circuit 100 is in the off state. When the processing chip 300 sends a second enable signal to the control circuit 200, that is, outputs a high level, the collector of the second transistor Q2 changes from a high level to a low level. Since the collector of the second transistor Q2 and the base of the first transistor Q1 are connected through the first resistor R1, the base of the first transistor Q1 will be pulled low. When the first transistor Q1 is a PNP type triode, the emitter of the first transistor Q1 is connected to the power supply VCC, and the base of the first transistor Q1 is at a low level, then the first transistor Q1 conducts.

[0042] Meanwhile, the collector of the third transistor Q3 remains at a high level. Since the first transistor Q1 conducts, that is Figure 2 when the WDT_SW signal in

[0043] is at a high level, the watchdog is turned on. At this time, the base of the second transistor Q2 is pulled to a high level, and the emitter of the second transistor Q2 is grounded at a low level. When the second transistor Q2 is an NPN type triode, the second transistor Q2 conducts.

[0044] Please refer to Figure 2 , in some embodiments, the control circuit 200 may include a fourth resistor R4. One end of the fourth resistor R4 may be connected to the collector of the third transistor Q3, and the other end may be connected to the power supply VCC. Thus, the fourth resistor R4 can make the collector of the second transistor Q2 and the collector of the third transistor Q3 remain at a high level when the second transistor Q2 and the third transistor Q3 do not conduct, so that the first transistor Q1 remains in the cut-off state.

[0045] Specifically, the fourth resistor R4 can be a surface mount resistor, and its size can be 10K. It can be understood that during the startup process of the device 2000, the watchdog control circuit 1000 needs to remain in the off state, that is, the first transistor Q1, the second transistor Q2, and the third transistor Q3 should be in the cut-off state. In this embodiment, the first transistor Q1 is a PNP type triode, and the second transistor Q2 and the third transistor Q3 are NPN type triodes. When the processing chip 300 sends a first enable signal to the control circuit 200, since the first enable signal is a low level, the base of the third transistor Q3 is at a low level, and the third transistor Q3 is in the cut-off state. The base of the second transistor Q2 is also at a low level, and similarly, the second transistor Q2 is in the cut-off state.

[0046] At this time, the fourth resistor R4 acts as a pull-up resistor. When the second transistor Q2 and the third transistor Q3 are not conducting, the presence of the fourth resistor R4 keeps the collectors of the second transistor Q2 and the third transistor Q3 at a high level. Thus, when the collector of the second transistor Q2 is at a high level, it will pull up the level of the base of the first transistor Q1, thereby keeping the first transistor Q1 in the cut-off state, and the watchdog circuit 100 is in the off state.

[0047] Please refer to Figure 2 , in some embodiments, the control circuit 200 includes a fifth resistor R5. One end of the fifth resistor R5 is connected to the power supply VCC, and the other end is connected to the RST pin of the watchdog chip 11.

[0048] In this way, the fifth resistor R5 can keep the RST pin of the watchdog chip 11 at a high level when the RST pin of the watchdog chip 11 does not output a low level, avoiding the reset of the processing chip 300 in the normal working state.

[0049] Specifically, it can be understood that the signal output by the RST pin (pin 7 of the watchdog chip 11) of the watchdog chip 11 is generally a low-valid reset control signal, which means that it is desired that the RST pin of the watchdog chip 11 remains at a high level and is in an invalid state in cases other than reset. Then, a fifth resistor R5 can be externally connected to the RST pin of the watchdog chip 11, and the fifth resistor R5 can be a pull-up resistor.

[0050] One end of the fifth resistor R5 is connected to the power supply VCC, and the other end of the fifth resistor R5 is connected to the RST pin, so that when the RST pin of the watchdog chip 11 does not output a low level, the RST pin of the watchdog chip 11 is kept at a high level, avoiding the reset of the processing chip 300 in the normal working state.

[0051] Please refer to Figure 2, in some embodiments, the control circuit 200 may include a first capacitor C1 and a sixth resistor R6. The first end of the first capacitor C1 may be connected to the RST pin of the watchdog chip 11, the second end of the first capacitor C1 may be grounded, the first end of the sixth resistor R6 may be connected to the base of the third transistor Q3, and the second end of the sixth resistor R6 may be grounded.

[0052] Thus, when the processing chip 300 sends a first enable signal to the control circuit 200, the sixth resistor R6 can keep the base of the third transistor Q3 at a low level, that is, the third transistor Q3 can be turned off. The first capacitor C1 can play an anti-interference role, making the operation of the control circuit 200 more stable.

[0053] Specifically, it can be seen from the figure that the first end of the sixth resistor R6 is connected to the base of the third transistor Q3, and the second end of the sixth resistor R6 is grounded, that is, the sixth resistor R6 can be a pull-down resistor. It can be understood that before the system is started up, the processing chip 300 has no signal output, and the third transistor Q3 may be mis-conducted due to the existence of leakage current, causing the watchdog chip 11 to be turned on.

[0054] Then when the control circuit 200 is in use, it is desired that the control circuit 200 should be in an invalid state after being powered on, so as to avoid the leakage current causing the third transistor Q3 to be mis-conducted and the watchdog chip 11 to be turned on when the processing chip 300 sends a first enable signal to the control circuit 200, that is, when WDT_EN has no signal output. In this way, a sixth resistor R6 can be set. When the processing chip 300 has no signal output, the sixth resistor R6 can keep the base of the third transistor Q3 at a low level, that is, the third transistor Q3 is in a cut-off state.

[0055] In addition, the RST pin of the watchdog chip 11 can be an asynchronous reset pin, that is, the RST outputting a low level can reset the processing chip 300.

[0056] Please refer to Figure 2 , in some embodiments, the Z pin of the control chip 21 may be connected to the WDI pin of the watchdog chip 11. Thus, the input of the watchdog chip 11 can be input through the Z pin of the control chip 21, so as to control whether the watchdog chip 11 outputs a reset signal or not.

[0057] Specifically, in the application of the watchdog control circuit 1000, the WDI pin of the watchdog chip 11 (pin 6 of the watchdog chip 11) can be connected to the Z pin of the control chip 21 (pin 2 of the control chip 21), and the input of the watchdog chip 11 is generally referred to as feeding the dog. After receiving the dog-feeding input, the watchdog chip 11 can clear itself; in the case of not receiving the dog-feeding input, when the watchdog chip 11 times out, it will give a reset signal to the processing chip 300 to reset it, preventing the system from crashing.

[0058] Please refer to Figure 2 , in some embodiments, the Y pin of the control chip 21 can be electrically connected to the processing chip 300. The Y pin of the control chip 21 can be used to receive the dog-feeding signal from the processing chip 300, and the control chip 21 can be used to output the dog-feeding signal to the watchdog circuit 100.

[0059] In this way, when the control chip 21 and the watchdog chip 11 are kept in the on state and the device 2000 is in the normal working state, the dog-feeding signal received from the processing chip 300 by the control chip 21 can be output to the watchdog circuit 100 to clear the watchdog, avoiding a restart when the device 2000 has not had an abnormality.

[0060] Specifically, in the application of the watchdog control circuit 1000, the WDI pin of the watchdog chip 11 can be connected to the Z pin of the control chip 21, and the Y pin of the control chip 21 (pin 1 of the control chip 21) can be electrically connected to the processing chip 300. Then the input of the watchdog chip 11 can be input from the Z pin of the control chip 21, and the input of the watchdog chip 11 is generally referred to as feeding the dog. After receiving the dog-feeding input, the watchdog chip 11 can clear itself; in the case of not receiving the dog-feeding input, when the watchdog chip 11 times out, it will give a reset signal to the processing chip 300 to reset it, preventing the system from crashing.

[0061] It can be understood from this that when the processing chip 300 is working normally, a dog-feeding signal will be output at regular intervals. The dog-feeding signal can be received by the control chip 21 through the Y pin, and then input to the WDI pin of the watchdog chip 11 through the Z pin, so that the watchdog chip 11 can receive the dog-feeding signal and clear itself. This avoids a restart when the processor chip is in the normal working state.

[0062] Please refer to Figure 2, in some embodiments, the control circuit 200 includes a locking module 22. The locking module 22 is configured to lock the watchdog circuit 100 in an operating state. When the watchdog circuit 100 does not receive a watchdog feeding signal, the RST pin of the watchdog chip 11 outputs a reset signal to reset the processing chip 300. The reset signal causes the locking module 22 to unlock the watchdog circuit 100, and the watchdog chip 11 and the control chip 21 switch from the startup state to the shutdown state according to the reset signal.

[0063] In this way, locking the watchdog circuit 100 in the operating state can continuously monitor the operating state of the device 2000. The RST pin of the watchdog chip 11 outputs a reset signal to reset the processing chip 300, so as to prevent the device 2000 from crashing when an abnormality occurs in the device 2000. At the same time, the reset signal causes the locking module 22 to unlock the watchdog circuit 100, and the watchdog chip 11 and the control chip 21 switch from the startup state to the shutdown state according to the reset signal, avoiding that the device 2000 cannot be restarted normally all the time because the RST pin of the watchdog chip 11 outputs a reset signal again due to too long startup time of the device 2000.

[0064] Specifically, after the device 2000 starts to boot, the processing chip 300 issues a first enable signal. Under the action of the first enable signal, the watchdog chip 11 and the control chip 21 are in the shutdown state. After the device 2000 completes booting, the processing chip 300 issues a second enable signal. Under the action of the second enable signal, the watchdog chip 11 and the control chip 21 are in the startup state. And at this time, under the action of the locking module 22 in the control circuit 200, the watchdog circuit 100 is locked in the operating state to continuously monitor the operating state of the device 2000.

[0065] Under the monitoring of the watchdog circuit 100, when the device 2000 has a situation such as a program running wild, in order to prevent the device 2000 from crashing, the RST pin of the watchdog chip 11 will output a reset signal to reset the processing chip 300 and restart the device 2000. At this time, the reset signal causes the locking module 22 to unlock the watchdog circuit 100. When the locking module 22 includes a first transistor Q1 and a second transistor Q2, the second transistor Q2 is in the cut-off state under the action of the reset signal, and then the first transistor Q1 is turned off, so that the watchdog chip 11 and the control chip 21 switch from the startup state to the shutdown state according to the reset signal, avoiding that the device 2000 cannot be restarted normally all the time because the RST pin of the watchdog chip 11 outputs a reset signal again due to too long startup time of the device 2000.

[0066] Please refer to Figure 2, in some embodiments, the watchdog chip 11 is also externally connected with a manual enabling circuit J1. After short-circuiting the manual enabling circuit J1, the function of the watchdog chip is turned off and it will no longer output a reset signal, which makes it more convenient to debug the device 2000.

[0067] Please refer to Figure 3 , an embodiment of the present application provides a device 2000, which includes the watchdog control circuit 1000 in any of the above embodiments. The watchdog control circuit 1000 is used to monitor the operating state of the device 2000.

[0068] Specifically, the device 2000 can be an electronic device such as a laptop computer, a desktop computer, a tablet computer, a feeder, a feeding monitoring device, etc., or some large industrial devices, breeding devices, etc., as long as the watchdog control circuit 1000 provided in the present application is applied. In this way, the watchdog circuit 100 can be turned on after the device 2000 is started, so that the watchdog chip 11 is turned on, avoiding the situation that when the system of the device 2000 is too complex, the startup time exceeds the limit and the watchdog circuit 100 issues a reset signal to restart the device 2000, resulting in the device 2000 never being able to start normally. Moreover, after the watchdog circuit 100 is turned on, it can be locked, so that the watchdog circuit 100 can always monitor the operating state of the device 2000. Once the device 2000 has a situation such as crashing, the watchdog control circuit 1000 can restart the device 2000.

[0069] In the description of this specification, the descriptions with reference to the terms "one embodiment", "certain embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0070] Although the embodiments of the present application have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and purposes of the present application. The scope of the present application is defined by the claims and their equivalents.

Claims

1. A watchdog control circuit, characterized in that, Comprising: A watchdog circuit, including a watchdog chip; A control circuit, the control circuit is connected to the watchdog circuit, and the control circuit includes a control chip; A processing chip, the processing chip is connected to the control circuit; Wherein, during the startup process of the device, the processing chip is used to send a first enable signal to the control circuit to control the control chip to remain in the off state, and the control chip controls the watchdog chip to remain in the off state according to the first enable signal; after the device is started, the processing chip is used to send a second enable signal to the control circuit to control and turn on the control chip, and the control chip controls the watchdog chip to turn on according to the second enable signal so that the watchdog circuit is in a working state; The control circuit includes a locking module, the locking module is used to lock the watchdog circuit in the working state, the locking module includes a first transistor, a second transistor and a third transistor, the base of the first transistor is connected to the collector of the second transistor through a first resistor, the emitter of the first transistor is connected to the power supply, the collector of the first transistor is grounded through a second resistor, the base of the second transistor is connected between the collector of the first transistor and the first resistor through a third resistor, the emitter of the second transistor is grounded, the base of the third transistor is connected to the processing chip, the emitter of the third transistor is grounded, and the collector of the third transistor is connected to the collector of the second transistor.

2. The watchdog control circuit according to claim 1, wherein The control circuit includes a fourth resistor, one end of the fourth resistor is connected to the collector of the third transistor, and the other end is connected to the power supply.

3. The watchdog control circuit according to claim 1, characterized in that, The control circuit includes a fifth resistor, one end of the fifth resistor is connected to the power supply, and the other end is connected to the RST pin of the watchdog chip.

4. The watchdog control circuit according to claim 1, wherein The control circuit includes a first capacitor and a sixth resistor, the first end of the first capacitor is connected to the RST pin of the watchdog chip, the second end of the first capacitor is grounded, the first end of the sixth resistor is connected to the base of the third transistor, and the second end of the sixth resistor is grounded.

5. The watchdog control circuit according to claim 1, wherein The Z pin of the control chip is connected to the WDI pin of the watchdog chip.

6. The watchdog control circuit according to claim 1, wherein The Y pin of the control chip is electrically connected to the processing chip, the Y pin of the control chip is used to receive the dog feeding signal of the processing chip, and the control chip is used to output the dog feeding signal to the watchdog circuit.

7. The watchdog control circuit according to claim 1, wherein The control circuit includes a locking module, the locking module is used to lock the watchdog circuit in the working state, in the case that the watchdog circuit does not receive the dog feeding signal, the RST pin of the watchdog chip outputs a reset signal to reset the processing chip, and the reset signal causes the locking module to unlock the watchdog circuit, and the watchdog chip and the control chip are switched from the startup state to the off state according to the reset signal.

8. A device, characterized in that, Including the watchdog control circuit according to any one of claims 1-7, the watchdog control circuit is used to monitor the operating state of the device.

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