Electrical equipment, electronic devices and their protection circuits

Abstract

The present application discloses an electrical device, an electronic device and a protection circuit thereof. The protection circuit comprises: a first input branch, which collects a drive signal for protecting the electronic device; a second input branch, which collects an input signal of the electronic device; a processing circuit, which connects the first input branch and the second input branch, to generate a corresponding control signal according to the drive signal and the input signal, wherein when the drive signal is in a first state and the input signals are all in a zero state, the control signal is in a protection release state to release the protection of the electronic device. By limiting to the protection state, when each input signal is zeroed and the drive signal is in the first state, the control signal output by the processing circuit will release the protection of the electronic device, so that the protection circuit provided by the present application can effectively avoid frequent start and stop of electronic devices caused by disturbances such as noise signals.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to an electrical device, an electronic device and a protection circuit thereof. Background Art

[0002] When designing semiconductor devices and chips, designers need to pay special attention to the design of over-current protection (OCP). Over-current conditions will cause the device to heat up sharply, which may cause the device or chip to fail, and in severe cases, it may cause the device or chip to burn out.

[0003] In practical applications, the driving signal is greatly affected by disturbances such as noise signals, so noise signals can easily cause false alarms and trigger overcurrent protection, causing the chip to stop working; when the noise signal disappears, the chip starts working again. In some periods of time, noise signals may frequently disturb the overcurrent port, causing the chip to frequently start and stop the overcurrent protection function, which will seriously shorten the service life of electronic devices such as chips. Summary of the invention

[0004] The present application mainly provides an electrical device, an electronic device and a protection circuit thereof, so as to solve the problem that the protection function of the electronic device is disturbed and the electronic device is frequently started and stopped, resulting in a shortened service life of the electronic device.

[0005] In order to solve the above technical problems, a technical solution adopted by the present application is: to provide a protection circuit for an electronic device. The protection circuit includes: a first input branch for collecting the driving signal of the electronic device; a second input branch for collecting the input signal of the electronic device; a processing circuit for connecting the first input branch and the second input branch to generate a corresponding control signal according to the driving signal and the input signal, wherein when the driving signal is in a first state and the input signals are both in a zero state, the control signal is in a protection release state to release the protection of the electronic device.

[0006] In some embodiments, the first input branch comprises:

[0007] a comparison unit, receiving and comparing the driving signal and a reference signal to determine whether the driving signal is in a first state or a second state;

[0008] The first processing unit is connected to the comparison unit to generate a corresponding first detection signal according to a comparison result between the driving signal and the reference signal.

[0009] In some embodiments, the processing circuit comprises:

[0010] a state determination unit, connected to the first input branch and the second input branch respectively to detect the state of the driving signal and the state of the input signal, thereby generating a corresponding response signal;

[0011] an output unit, connected to the state determination unit, to generate the output control signal according to the response signal;

[0012] When the state determination unit determines that the input signals are all in a zero state and the drive signal is in a first state, the response signal is in a first logic state so that the control signal output by the output unit is in a protection release state; when the state determination unit determines that any of the input signals is in a non-zero state or the drive signal is in a second state, the response signal is in a second logic state so that the control signal output by the output unit is in a protection state.

[0013] In some embodiments, the second input branch comprises:

[0014] An input unit, comprising a plurality of input terminals, wherein each input terminal of the input unit is used to receive an input signal, and the input unit is used to determine whether each of the input signals is in the zero-setting state;

[0015] The second processing unit is connected to the input unit to generate a corresponding second detection signal according to the judgment result of the input unit.

[0016] In some embodiments, the state determination unit includes:

[0017] A first NAND gate, a first input terminal of which is connected to the first input branch, and a second input terminal of which is connected to the second input branch;

[0018] The inverting module comprises an even number of inverters connected in series, wherein the input end of the first inverter in the inverting module is connected to the output end of the first NAND gate, and the output end of the last inverter in the inverting module serves as the output end of the state determination unit to generate the response signal.

[0019] In some embodiments, the input unit includes:

[0020] An OR gate, each input end of which is used to receive one of the input signals;

[0021] The second processing unit comprises:

[0022] A second NAND gate has a first input end connected to the output end of the OR gate, a second input end connected between the first NAND gate and the inverting module, and an output end serving as the output end of the second input branch to connect to the second input end of the first NAND gate.

[0023] In some embodiments, the state determination unit includes:

[0024] An AND gate, a first input terminal of which is connected to the first input branch, and a second input terminal of which is connected to the second input branch;

[0025] The inverting module comprises an odd number of inverters connected in series, wherein the input end of the first inverter in the inverting module is connected to the output end of the AND gate, and the output end of the last inverter in the inverting module serves as the output end of the state determination unit to generate the response signal.

[0026] In some embodiments, the input unit includes:

[0027] NOR gate;

[0028] The second processing unit comprises:

[0029] An OR gate, whose first input end is connected to the output end of the NOR gate, and whose second input end is connected to the inverting module, so that the signal output by the AND gate is input to the second input end of the OR gate after an even number of inversions, and whose output end serves as the output end of the second input branch to be connected to the second input end of the AND gate.

[0030] In some embodiments, the input unit further includes a protection input terminal for receiving a protection signal, wherein the protection signal is an undervoltage protection signal or an overtemperature protection signal.

[0031] In some embodiments, the output unit includes a resistor and a switch tube, the first end of the resistor is connected to the drain of the switch tube, the second end of the resistor is used to access the power supply voltage, the source of the switch tube is grounded, the output end of the output unit is set on the line connecting the resistor and the switch tube, and the gate of the switch tube is connected to the output end of the state determination unit.

[0032] In order to solve the above technical problem, another technical solution adopted by the present application is to provide an electronic device. The electronic device includes the protection circuit as described above, and the protection circuit is used to adjust the working state of the electronic device.

[0033] In order to solve the above technical problem, another technical solution adopted by the present application is to provide an electrical device. The electrical device includes the above electronic device.

[0034] The beneficial effect of the present application is that, different from the prior art, the present application discloses an electrical device, an electronic device and a protection circuit thereof. By setting a second input branch to collect input signals of the electronic device, the first input branch to collect a drive signal, and coupling the drive signal and each input signal to the processing circuit, by limiting the protection state, when each input signal is set to zero and the drive signal is in the first state, the control signal output by the processing circuit will release the protection of the electronic device, thereby effectively avoiding frequent start and stop of the electronic device due to disturbances such as noise signals, enhancing the anti-noise ability of the electronic device, and being conducive to extending the service life of the electronic device. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0036] Figure 1 It is a module schematic diagram of an embodiment of a protection circuit provided by the present application;

[0037] Figure 2 yes Figure 1 Another module schematic diagram of the protection circuit shown;

[0038] Figure 3 yes Figure 2 A schematic diagram of the circuit structure of the first embodiment of the protection circuit shown;

[0039] Figure 4 yes Figure 3 Another circuit structure diagram of the input unit in the protection current shown

[0040] Figure 5 yes Figure 2 The circuit structure diagram of the second embodiment of the protection circuit is shown. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0042] The terms "first", "second", "third" in the embodiments of the present application are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first", "second", "third" can expressly or implicitly include at least one of the features. In the description of the present application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices.

[0043] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0044] The present application provides a protection circuit 100 for an electronic device. Figure 1 to Figure 2 , Figure 1 is a module schematic diagram of an embodiment of a protection circuit provided by the present application, Figure 2 yes Figure 1 A schematic diagram of a module circuit of another embodiment of a protection circuit is shown.

[0045] The protection circuit 100 of the electronic device includes a first input branch 10, a second input branch 20 and a processing circuit 30, wherein the first input branch 10 is used to collect the driving signal of the electronic device; the second input branch 20 collects the input signal of the electronic device; the processing circuit 30 connects the first input branch 10 and the second input branch 20 to generate a corresponding control signal according to the driving signal and the input signal. When the input signals are both in a zero state and the driving signal is in a first state, the control signal is in a protection release state to release the protection of the electronic device.

[0046] In the present application, the protection circuit 100 may be an overcurrent protection circuit, an undervoltage protection circuit, an overvoltage protection circuit or an overtemperature protection circuit, and different protection functions may be realized by collecting different signals. For example, when the abnormality of the driving signal is caused by overcurrent, undervoltage, overvoltage or overtemperature, the protection circuit 100 may be activated to perform the protection function, and in the protection state, the control signal sent by the protection circuit 100 is in the protection release state only when the input signals are all in the zero state and the driving signal is in the first state, thereby releasing the protection of the electronic device.

[0047] The electronic device may be a semiconductor device, such as a chip or a printed circuit board, etc.; the electronic device may also be a device such as a logic controller, which is not specifically limited in the present application.

[0048] The driving signal may be a voltage value or a current value on a certain component of the electronic device, wherein the state when the driving signal value does not exceed the set threshold is the first state, and the state when the driving signal value exceeds the set threshold is the second state.

[0049] The input signal collected by the second input branch 20 may be a signal input to certain components in the electronic device and controlling them, for example, an input signal input to a PWM (pulse width modulation) controller and regulating it.

[0050] The control signal output by the processing circuit 30 acts on the electronic device, so that the electronic device changes from a normal working state to a protection state, or changes from a protection state to a normal working state in which the protection state is released.

[0051] Taking an electronic device including an inverter circuit, a PWM controller and an energy-consuming element as an example, the driving signal collected by its first input branch 10 can be a voltage signal generated on a resistor by flowing through the inverter circuit, the input signal can be an input signal of a PWM controller to control the PWM controller, and the control signal output by the processing circuit 30 can act on the PWM controller that regulates the inverter circuit to regulate the output signal of the PWM controller.

[0052] For example, the upper bridge arm and the lower bridge arm on the same branch in the inverter circuit are both turned on, causing the energy-consuming element to be short-circuited, and the current passing through the inverter circuit is too large. The excessive current generates an excessive voltage on the resistor, causing the collected control signal to be in the second state. At this time, the control signal output by the processing circuit 30 will suppress the output signal of the PWM controller, making the output signal all logical low levels, so as to turn off the inverter circuit, which can cause the input signal to lose control of the PWM controller, thereby protecting the electronic device.

[0053] Taking overcurrent protection as an example, when it is detected that the driving signal collected by the first input branch 10 exceeds the preset threshold, the driving signal is in the second state, and the processing circuit 30 will output a control signal to put the electronic device in the overcurrent state into a protection state, so that the electronic device stops working, avoiding the risk of damage caused by the electronic device being in the overcurrent state.

[0054] Optionally, taking undervoltage protection as an example, when it is detected that the drive signal collected by the first input branch 10 is lower than a preset threshold, the drive signal is in the second state, and the processing circuit 30 will output a control signal to put the electronic device in the undervoltage state into a protection state, so that the electronic device stops working, thereby avoiding failure of the electronic device due to being in the undervoltage state.

[0055] However, in actual applications, the collected driving signal is easily affected by disturbances such as noise signals, which can easily lead to false alarms and trigger the processing circuit 30 to output a control signal so that the electronic device is in a protection state and stops working; when the noise signal frequently fluctuates back and forth near the preset threshold, especially when the noise signal just appears, this will cause the electronic device to start and shut down frequently, which will seriously shorten the service life of the electronic device.

[0056] In the present application, a second input branch 20 is set to collect various input signals of the electronic device, and the drive signal and each input signal are coupled to the processing circuit 30. When the protection function is triggered, the control signal output by the processing circuit 30 will release the protection of the electronic device only when each input signal is set to zero and the drive signal is in the first state. This can effectively avoid frequent starting and stopping of the electronic device due to disturbances such as noise signals, enhance the anti-noise ability of the electronic device, and help extend the service life of the electronic device.

[0057] The first input branch 10 includes a comparison unit 12 and a first processing unit 14. The comparison unit 12 is used to receive and compare the driving signal and the reference signal to determine whether the driving signal is in the first state or the second state; the first processing unit 14 is connected to the comparison unit to generate a corresponding first detection signal according to the comparison result of the driving signal and the reference signal.

[0058] Optionally, the comparison unit 12 can be a comparator, whose first input terminal is used to collect the drive signal, whose second input terminal inputs the reference signal, whose output terminal is connected to the first processing unit 14, and whose output terminal is used to output a logic high level or a logic low level to indicate that the drive signal is in the second state or the first state respectively.

[0059] Specifically, the driving signal is a voltage signal, the reference signal is a reference voltage signal, and when the driving signal does not exceed the reference voltage signal, the comparator outputs a logic low level to determine that the driving signal is in the first state; when the driving signal exceeds the reference voltage signal, the comparator outputs a logic high level to determine that the driving signal is in the second state and triggers the protection function.

[0060] Optionally, the comparison unit 12 may also be a comparison circuit, and may also be integrated into an electronic device such as a semiconductor device using integrated circuit technology, for example, using a CMOS (Complementary Metal Oxide Semiconductor) process, a BJT (Bipolar Junction Transistor) process, a bulk silicon BCD (Bipolar CMOS DMOS) process or a SOI (Silicon-On-Insulator)-BCD process, etc., which will not be elaborated in the present application.

[0061] The first processing unit 14 may be an inverter element or a NOT gate logic circuit, and is used to invert the output signal of the comparison unit 12 to output the first detection signal. For example, if the comparison unit 12 outputs a logic high level, the first detection signal is a logic low level; if the comparison unit 12 outputs a logic low level, the first detection signal is a logic high level.

[0062] The second input branch 20 includes an input unit 22 and a second processing unit 24, wherein the input unit 22 includes a plurality of input terminals, wherein each input terminal of the input unit 22 is respectively used to receive an input signal, and the input unit 22 is used to determine whether each input signal is in a zero state; the second processing unit 24 is connected to the input unit 22 to generate a corresponding second detection signal according to the judgment result of the input unit 22.

[0063] The input unit 22 includes a plurality of input terminals, and the number of the input terminals can be set according to the requirements, such as 2, 3, 4 or 5 input terminals. For example, in the present embodiment, the input unit 22 includes six input terminals, and the input signals corresponding to the six input terminals are six input signals of the PWM controller. In other embodiments, the input signal can also be a three-phase control signal, etc.

[0064] In this embodiment, if all input signals are in a zero state, the input unit 22 outputs a logic low level; if there is an input signal in a non-zero state, the input unit 22 outputs a logic high level.

[0065] In other embodiments, all input signals may be in a zero state, and the input unit 22 may output a logic high level; if there is an input signal in a non-zero state, the input unit 22 may output a logic low level. This application does not impose any specific limitation on this.

[0066] The second processing unit 24 processes the output signal of the input unit 22 to generate a second detection signal. The second detection signal may be a logic high level or a logic low level.

[0067] Furthermore, the input unit 22 may also include a protection input terminal, which is used to receive a protection signal, wherein the protection signal is an undervoltage protection signal or an overtemperature protection signal, etc., so that the protection circuit 100 can provide more multiple protective functions for electronic devices, reduce the risk of damage to electronic devices caused by adverse working conditions, and help to increase the life of electronic devices.

[0068] For example, the protection signal is an undervoltage protection signal. The protection signal being in a zero state indicates that the electronic device is in a non-undervoltage state, and the protection signal being in a non-zero state indicates that the electronic device is in an undervoltage state.

[0069] The processing circuit 30 includes a state determination unit 32 and an output unit 34. The state determination unit 32 is respectively connected to the first input branch 10 and the second input branch 20 to detect the state of the driving signal and the state of the input signal, thereby generating a corresponding response signal; the output unit 34 is connected to the state determination unit 32 to generate an output control signal according to the response signal.

[0070] Among them, when the state determination unit 32 determines that all input signals are in the zero state and the drive signal is in the first state, the response signal is in the first logic, so that the control signal output by the output unit 34 is in the protection release state; when the state determination unit 32 determines that any input signal is in the non-zero state or the drive signal is in the second state, the response signal is in the second logic, so that the control signal output by the output unit 34 is in the protection state.

[0071] In this embodiment, the first logic is a logic low level, and when the control signal is in the protection release state, the control signal is a logic high level; the second logic is a logic high level, and when the control signal is in the protection state, the control signal is a logic low level.

[0072] In other embodiments, the first logic may be a logic high level, and the second logic may be a logic low level; when the control signal is in the protection release state, the control signal may be a logic low level; when the control signal is in the protection state, the control signal may be a logic high level. It only needs to be able to realize the above logic functions, and this application does not make specific limitations on this.

[0073] Specifically, in the protection state, if the drive signal is in the second state and all input signals are not in the zero state, the control signal output by the output unit 34 is in the protection state; if the drive signal is in the second state and all input signals are in the zero state, the control signal output by the output unit 34 is in the protection state; if the drive signal is in the first state and all input signals are not in the zero state, the control signal output by the output unit 34 is in the protection state; only when the drive signal is in the first state and all input signals are in the zero state, the control signal output by the output unit 34 is in the protection release state.

[0074] In this embodiment, the implemented logic truth table is as shown below:

[0075]

[0076] Among them, VIRTIP is the driving signal, UH, VH, WH, UL, VL and WL are six input signals, and F is the control signal.

[0077] Therefore, only when VIRTIP is 0 and UH, VH, WH, UL, VL and WL are all 0, F=1, that is, the protection state is released and the electronic device system starts to work normally.

[0078] The above logic implementation is for the process of releasing the protection state. After the protection state is started, in order to release the protection state, it can only be achieved when all input signals are set to zero and the drive signal is in the first state, thereby enhancing the anti-noise ability and avoiding frequent start and stop caused by disturbances such as noise.

[0079] The connection relationship and functional logic of the above protection circuit are now described with specific embodiments.

[0080] First embodiment

[0081] See also Figure 3 , Figure 3 yes Figure 2 The circuit structure diagram of the first embodiment of the protection circuit is shown. In this embodiment, the comparison unit 12 is a comparator, the first input terminal of the comparator 12 collects the driving signal VITRIP, and the second input terminal thereof inputs the reference voltage VREG. When the driving signal VITRIP does not exceed the reference voltage VREG, it is confirmed that the driving signal is in the first state, and the comparison unit 12 outputs a logic low level; if the driving signal VITRIP exceeds the reference voltage VREG, it is confirmed that the driving signal is in the second state, and the comparison unit 12 outputs a logic high level.

[0082] The first processing unit 14 is an inverter, which is used to invert the logic signal output by the comparison unit 12 so as to realize the subsequent logic function. The output end of the first processing unit 14 is connected to the state determination unit 32.

[0083] The input unit 22 includes an OR gate 220, and each input terminal of the OR gate 220 is used to receive an input signal. Specifically, the OR gate 220 includes six input terminals, which can be used to collect six input signals of devices such as a PWM controller.

[0084] Optionally, the input unit 22 may also be composed of a plurality of logic circuits to realize its logic function. For example, the input unit 22 uses logic circuits such as a NOR gate and an inverter to realize the logic function of the OR gate.

[0085] Furthermore, the input unit 22 also collects the protection signal Protect and determines whether the protection signal is in a zero state.

[0086] Optionally, the OR gate 220 has an additional input terminal to collect the protection signal.

[0087] Optional, see Figure 4 , Figure 4 yes Figure 3 Another circuit structure diagram of the input unit in the protection current is shown. The input unit 22 includes two NOR gates 222, a NAND gate 224, a NAND gate 226 and an inverter 228, wherein the two NOR gates 222 each have three input terminals and respectively collect three input signals, the output terminals of the two NOR gates 222 are respectively connected to the two input terminals of the NAND gate 224, the output terminal of the NAND gate 224 is connected to the first input terminal of the NAND gate 226, the second input terminal of the NAND gate 226 collects the protection signal Protect, the output terminal of the NAND gate 226 is connected to the input terminal of the inverter 228, and the output terminal of the inverter 228 serves as the output terminal of the input unit 22.

[0088] The input unit 22 outputs a logic low level if it confirms that all input signals are in a zero state or the protection signal is in a zero state; if all input signals are in a non-zero state and the protection signal is in a non-zero state, the input unit 22 outputs a logic high level.

[0089] In this embodiment, the state determination unit 32 includes a first NAND gate 320 and an inverting module 322, wherein the first input end of the first NAND gate 320 is connected to the output end of the first processing unit 14, and the second input end thereof is connected to the output end of the first processing unit 14; the inverting module 322 includes an even number of inverters connected in series in sequence, wherein the input end of the first inverter in the inverting module 322 is connected to the output end of the first NAND gate 320, and the output end of the last inverter in the inverting module 322 serves as the output end of the state determination unit 32, for generating a response signal input to the output unit 34.

[0090] An even number of inverters connected in series in the inversion module 322 can realize shaping of the output signal of the first NAND gate 320 , optimize the waveform curve, and improve the load carrying capacity.

[0091] The second processing unit 24 includes a second NAND gate 240, a first input end of the second NAND gate 240 is connected to the output end of the input unit 22, that is, the output end of the OR gate 220; its second input end is connected between the first NAND gate 320 and the inverting module 322, and its output end serves as the output end of the second input branch 20 to connect to the second input end of the first NAND gate 320.

[0092] The output unit 34 includes a resistor 340 and a switch tube 342, wherein the first end of the resistor 340 is connected to the drain of the switch tube 340, the second end of the resistor 340 is used to access the power supply voltage VCC, the source of the switch tube 342 is grounded GND, the output end of the output unit 34 is arranged on the line connecting the resistor 340 and the switch tube 342, and the gate of the switch tube 342 is connected to the output end of the state determination unit 32. The output unit 34 can also be other circuits with similar functions, which is not limited in the present application.

[0093] The output unit 34 outputs a logic high level VCC or a logic low level (ground GND) to adjust the protection state of the electronic device.

[0094] Therefore, when the state determination unit 32 confirms that the drive signal is in the first state and all input signals are in the zero state, the output response signal is a logic low level, so that the control signal output from the output end of the output unit 34 is a logic high level, so as to release the protection state of the electronic device; when the state determination unit 32 confirms that the drive signal is in the second state or there is a non-zero state among the input signals, the output response signal is a logic high level, so that the control signal output from the output end of the output unit 34 is a logic low level, so that the electronic device is in or remains in the protection state.

[0095] Second embodiment

[0096] See also Figure 3 and Figure 5 , Figure 5 yes Figure 2 The circuit structure diagram of the second embodiment of the protection circuit is shown in FIG. The difference between the second embodiment and the first embodiment lies in the second input branch 20 and the state determination unit 32 , and the first input branch 10 and the output unit 34 can refer to the first embodiment.

[0097] like Figure 5 As shown, in the second input branch 20, the input unit 22 includes a NOR gate 221, the second processing unit 24 includes an OR gate 242, each input end of the NOR gate 221 is used to collect each input signal, the output end of the NOR gate 221 is connected to the first input end of the OR gate 242, and the output end of the OR gate 242 serves as the output end of the second input branch 20.

[0098] The state determination unit 32 includes an AND gate 321 and an inverting module 323, wherein a first input end of the AND gate 321 is connected to an output end of the first input branch 10, and a second input end thereof is connected to an output end of the OR gate 242; the inverting module 323 includes an odd number of inverters connected in series in sequence, wherein an input end of a first inverter in the inverting module 323 is connected to an output end of the AND gate 321, and an output end of a last inverter in the inverting module 323 serves as an output end of the state determination unit 32 to generate a response signal.

[0099] In this embodiment, the inversion module 323 has three inverters connected in series, wherein the first two inverters at the head end can realize the shaping of the signal output by the AND gate 321 , and the last inverter is used for inverting the output signal to regulate the output unit 34 .

[0100] The second input of the OR gate 242 is connected to the inversion module 323 , so that the signal output by the AND gate 321 is input to the second input of the OR gate 342 after an even number of inversions, and the output of the OR gate 242 is connected to the second input of the AND gate 321 .

[0101] The logic process implemented in the second embodiment is the same as that in the first embodiment and will not be described in detail.

[0102] It should be noted that the protection circuit 100 can be implemented using a CMOS process, a BJT process, a bulk silicon BCD process or a SOI-BCD process, and integrated into an electronic device, which can be a semiconductor device or a circuit board.

[0103] Based on this, the present application also provides an electronic device, which includes the protection circuit 100 as described above, and the protection circuit 100 is used to adjust the working state of the electronic device. For example, when the drive signal is in the second state, the protection circuit 100 adjusts the electronic device to be in the protection state, and releases the protection state of the electronic device when the drive signal is in the first state and each input signal is in the zero state.

[0104] Based on this, the present application also provides an electrical device, which includes the above-mentioned electronic device. For example, the electrical device can be a rice cooker, a washing machine, an air conditioner or a refrigerator, etc. The electronic device can be used as a controller or a processor of the electrical device, and when realizing the functions of the electrical device, it can also provide more protection functions for the electrical device, which is conducive to increasing the service life of the electrical device and reducing the risk of accidents.

[0105] Different from the prior art, the present application discloses an electrical device, an electronic device and a protection circuit thereof. By setting a second input branch to collect input signals of the electronic device, a first input branch to collect a drive signal, and coupling the drive signal and each input signal to a processing circuit, by limiting the protection state, when each input signal is set to zero and the drive signal is in the first state, the control signal output by the processing circuit will release the protection of the electronic device, thereby effectively avoiding frequent start-stop of the electronic device due to disturbances such as noise signals, enhancing the anti-noise ability of the electronic device, and being conducive to extending the service life of the electronic device.

[0106] The above descriptions are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A protection circuit for an electronic device, It is characterized in that The protection circuit comprises: A first input branch, for collecting a driving signal of the electronic device; A second input branch, collecting an input signal of the electronic device; a processing circuit, connected to the first input branch and the second input branch, to generate a corresponding control signal according to the drive signal and the input signal, wherein when the drive signal is in a first state and the input signals are both in a zero state, the control signal is in a protection release state to release the protection of the electronic device; Wherein, the second input branch comprises: An input unit, comprising a plurality of input terminals, wherein each input terminal of the input unit is used to receive an input signal, and the input unit is used to determine whether each of the input signals is in the zero-setting state; The second processing unit is connected to the input unit and processes the output signal of the input unit to generate a second detection signal.

2. The protection circuit according to claim 1, It is characterized in that The first input branch comprises: a comparison unit, receiving and comparing the driving signal and a reference signal to determine whether the driving signal is in a first state or a second state; The first processing unit is connected to the comparison unit to generate a corresponding first detection signal according to a comparison result between the driving signal and the reference signal.

3. The protection circuit according to claim 1, It is characterized in that The processing circuit comprises: a state determination unit, connected to the first input branch and the second input branch respectively to detect the state of the driving signal and the state of the input signal, thereby generating a corresponding response signal; an output unit, connected to the state determination unit, to generate the control signal according to the response signal; When the state determination unit determines that the input signals are all in a zero state and the drive signal is in a first state, the response signal is in a first logic state so that the control signal output by the output unit is in a protection release state; when the state determination unit determines that any of the input signals is in a non-zero state or the drive signal is in a second state, the response signal is in a second logic state so that the control signal output by the output unit is in a protection state.

4. The protection circuit according to claim 3, It is characterized in that The state determination unit comprises: A first NAND gate, a first input terminal of which is connected to the first input branch, and a second input terminal of which is connected to the second input branch; The inverting module comprises an even number of inverters connected in series, wherein the input end of the first inverter in the inverting module is connected to the output end of the first NAND gate, and the output end of the last inverter in the inverting module serves as the output end of the state determination unit to generate the response signal.

5. The protection circuit according to claim 4, It is characterized in that The input unit comprises: An OR gate, each input end of which is used to receive one of the input signals; The second processing unit comprises: A second NAND gate has a first input end connected to the output end of the OR gate, a second input end connected between the first NAND gate and the inverting module, and an output end serving as the output end of the second input branch to connect to the second input end of the first NAND gate.

6. The protection circuit according to claim 3, It is characterized in that The state determination unit comprises: An AND gate, a first input terminal of which is connected to the first input branch, and a second input terminal of which is connected to the second input branch; The inverting module comprises an odd number of inverters connected in series, wherein the input end of the first inverter in the inverting module is connected to the output end of the AND gate, and the output end of the last inverter in the inverting module serves as the output end of the state determination unit to generate the response signal.

7. The protection circuit according to claim 6, It is characterized in that The input unit comprises: NOR gate; The second processing unit comprises: An OR gate, whose first input end is connected to the output end of the NOR gate, and whose second input end is connected to the inverting module, so that the signal output by the AND gate is input to the second input end of the OR gate after an even number of inversions, and whose output end serves as the output end of the second input branch to be connected to the second input end of the AND gate.

8. The protection circuit according to claim 3, It is characterized in that The input unit further includes a protection input terminal for receiving a protection signal, wherein the protection signal is an undervoltage protection signal or an overtemperature protection signal.

9. The protection circuit according to claim 3, It is characterized in that The output unit includes a resistor and a switch tube, the first end of the resistor is connected to the drain of the switch tube, the second end of the resistor is used to access the power supply voltage, the source of the switch tube is grounded, the output end of the output unit is set on the line connecting the resistor and the switch tube, and the gate of the switch tube is connected to the output end of the state determination unit.

10. An electronic device, It is characterized in that The electronic device comprises the protection circuit according to any one of claims 1 to 9, and the protection circuit is used to regulate the working state of the electronic device.

11. An electrical device, It is characterized in that The electrical equipment comprises the electronic device as claimed in claim 10.

Images