Display device

Abstract

A display device is disclosed. The display device includes a substrate comprising: a first thin-film transistor (TFT) including an oxide semiconductor layer; a second TFT spaced apart from the first TFT and including a polycrystalline semiconductor layer; and a storage capacitor including at least two storage electrodes. One of the at least two storage electrodes is coplanar with the gate electrodes of the first and second TFTs and formed of the same material, and the other storage electrode is coplanar with the source and drain electrodes of the first and second TFTs and formed of the same material. Therefore, lower power consumption and a larger area of ​​the substrate are achieved.

Description

[0001] This patent application is a divisional application of the patent application filed on November 28, 2017, with application number 201711215133.0 and title "Substrate for a Display Device and Display Device Including the Substrate".

[0002] Cross-references to related applications

[0003] This application claims priority to Korean Patent Application No. 10-2016-0174261, filed on December 20, 2016, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0004] This disclosure relates to a substrate for a display device and a display device including the substrate, and more specifically, to a substrate for a display device capable of achieving low power consumption and a large area, and a display device including the substrate. Background Technology

[0005] Image display devices that display various information on a screen are a core technology of the information and communication age, and are currently being developed with the aim of achieving thinner and lighter designs, better portability, and higher performance. Therefore, flat panel display devices that can reduce the weight and size of cathode ray tubes (CRTs) are attracting significant attention.

[0006] Examples of flat panel display devices include liquid crystal display (LCD) devices, plasma display panel (PDP) devices, organic light-emitting diode (OLED) devices, and electrophoretic display (ED) devices.

[0007] Flat panel display devices include thin-film transistors arranged in pixels. Low power consumption is required for applying these display devices to portable devices. However, achieving low power consumption using the technologies associated with display devices developed to date is challenging. Summary of the Invention

[0008] Therefore, this disclosure relates to a substrate for a display device that substantially eliminates one or more problems caused by limitations and disadvantages of related technologies, and a display device including the substrate.

[0009] The purpose of this disclosure is to provide a substrate for a display device that enables low power consumption and a large area, as well as a display device including the substrate.

[0010] Further advantages, objects, and features of this disclosure will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon examination of the following, or may be learned by practice of this disclosure. The objects and other advantages of this disclosure may be realized and obtained by means of the structures particularly pointed out in the written specification, its claims, and the accompanying drawings.

[0011] To achieve these objectives and other advantages, and for the purposes of this disclosure, as embodied and broadly described herein, a substrate for a display device includes: a first thin-film transistor comprising an oxide semiconductor layer; a second thin-film transistor spaced apart from the first thin-film transistor and comprising a polycrystalline semiconductor layer; and a storage capacitor comprising at least two storage electrodes. One of the at least two storage electrodes is coplanar with the gate electrodes of the first and second thin-film transistors and formed of the same material, and the other of the at least two storage electrodes is coplanar with the source and drain electrodes of the first and second thin-film transistors and formed of the same material.

[0012] The embodiment relates to a display device. The display device includes a substrate and pixels on the substrate. Each pixel includes: a first thin-film transistor (TFT) on the substrate; a storage capacitor on the substrate; and a light-emitting device electrically connected to the storage capacitor. The first TFT includes a first gate electrode, at least a first portion of an interlayer insulating film on the first gate electrode, a first gate insulating film on the first portion of the interlayer insulating film, and a first active layer formed of oxide semiconductor on the first gate insulating film. The storage capacitor includes a first storage electrode, at least a second portion of an interlayer insulating film on the first storage electrode, and a second storage electrode on the second portion of the interlayer insulating film. The second storage electrode is physically separated from the first gate insulating film.

[0013] In one embodiment, the first gate insulating film and the second storage electrode contact interlayer insulating film.

[0014] In one embodiment, the first storage electrode and the first gate electrode are in the same layer.

[0015] In one embodiment, the interlayer insulating film is formed of silicon nitride (SiNx) and the first gate insulating film is formed of silicon oxide (SiOx).

[0016] In one embodiment, the first TFT further includes a first source electrode and a first drain electrode electrically connected to the first active layer. The second storage electrode may be in the same layer as the first source electrode and the first drain electrode.

[0017] In one embodiment, the first TFT further includes a first source electrode and a first drain electrode electrically connected to the first active layer. The first source electrode or the first drain electrode may contact a side surface of the first gate insulating film.

[0018] In one embodiment, the first source electrode or the first drain electrode contacts the side surface of the first active layer.

[0019] In one embodiment, the display device further includes a second TFT on a substrate. The second TFT includes a second active layer formed of polysilicon, at least a first portion of a second gate insulating film on the second active layer, and a second gate electrode on the first portion of the second gate insulating film. The second gate electrode may be in the same layer as the first gate electrode.

[0020] In one embodiment, the first active layer is disposed above the second active layer.

[0021] In one embodiment, the display device further includes a third TFT disposed in a non-display area of ​​the substrate. The third TFT includes a third active layer formed of polycrystalline Si.

[0022] In one embodiment, the display device further includes: a gate driving unit disposed in a non-display area to drive gate lines in a display area of ​​the substrate; a data driving unit disposed in the non-display area to drive data lines in the display area; and a multiplexer for distributing data voltage from the data driving unit to the data lines. The third TFT is included in at least one of the multiplexer and the gate driving unit.

[0023] In one implementation, the first TFT is a switching TFT of the pixel, and the second TFT is a driving TFT of the pixel.

[0024] In one embodiment, the storage capacitor further includes a third storage electrode on a substrate and at least a second portion of a second insulating film on the third storage electrode.

[0025] In one embodiment, the third storage electrode is in the same layer as the second active layer.

[0026] In one embodiment, the light-emitting device includes an anode electrode, a light-emitting stack, and a cathode electrode. The anode electrode overlaps with a first TFT, a second TFT, and a storage capacitor.

[0027] In one embodiment, the light-emitting device includes an anode electrode, a light-emitting stack, and a cathode electrode. The second TFT includes a drain electrode electrically connected to the second active layer. The display device also includes a connection electrode electrically connected to the drain electrode and the anode electrode.

[0028] In one embodiment, the light-emitting device includes an anode electrode, a light-emitting stack, and a cathode electrode. The anode electrode includes a transparent conductive film and an opaque conductive film.

[0029] In one embodiment, the light-emitting device includes an anode electrode, a light-emitting stack, and a cathode electrode. The display device also includes a banklayer on at least a portion of the anode electrode. The banklayer may include a light-shielding material selected from at least one of colored pigments, organic black materials, and carbon materials.

[0030] In one embodiment, the display device further includes a color filter on the light-emitting device.

[0031] The embodiments also relate to a method of forming a display device. A first conductive layer is patterned using a first mask to form a first gate electrode of a first thin-film transistor (TFT) and a first storage electrode of a storage capacitor on a substrate. An interlayer insulating film is formed on the first gate electrode and the first storage electrode. The insulating film is patterned using a second mask to form a first gate insulating film on at least a first portion of the interlayer insulating film. An oxide semiconductor layer is patterned using the second mask to form a first active layer of the first TFT on the first gate insulating film. A second storage electrode of the storage capacitor is formed on at least a second portion of the interlayer insulating film. The second storage electrode does not contact the first gate insulating film.

[0032] In one embodiment, the first gate insulating film and the second storage electrode are in contact with the first interlayer insulating film.

[0033] In one embodiment, a third mask is used to pattern the second conductive layer to form a first source electrode and a first drain electrode of the first TFT on the first active layer. Forming the second memory electrode includes using a third mask to pattern the second conductive layer to form the second memory electrode.

[0034] In one embodiment, the interlayer insulating film is formed of silicon nitride (SiNx) and the first gate insulating film is formed of silicon oxide (SiOx).

[0035] In one embodiment, a second active layer of the second TFT is formed on a substrate. A second gate insulating film is formed on the second active layer. A second gate electrode is formed on at least a portion of the second gate insulating film. The second active layer, the second gate insulating film, and the second gate electrode may be disposed beneath the interlayer insulating film.

[0036] It should be understood that the foregoing general description and the following detailed description of the invention are exemplary and illustrative, and are intended to provide further explanation of the claimed invention. Attached Figure Description

[0037] The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings:

[0038] Figure 1 This is a cross-sectional view showing a substrate for a display device according to an embodiment of the present disclosure.

[0039] Figure 2 This is a cross-sectional view showing another exemplary substrate for a display device according to another embodiment of the present disclosure.

[0040] Figure 3 This is a block diagram illustrating a display device including a substrate for a display device according to an embodiment of the present disclosure.

[0041] Figure 4 This illustrates embodiments according to the present disclosure, including... Figure 1 A cross-sectional view of an organic light-emitting diode display device, showing a first thin-film transistor, a second thin-film transistor, and a storage capacitor.

[0042] Figure 5 This illustrates an implementation method according to the present disclosure. Figure 4 The diagram shows a plan view of the storage capacitor.

[0043] Figures 6A to 6J This is for illustrating the manufacturing process according to embodiments of the present disclosure. Figure 4 A cross-sectional view of the method for the organic light-emitting display device shown. Detailed Implementation

[0044] Preferred embodiments of the invention will now be described in detail, examples of which are illustrated in the accompanying drawings. Throughout the drawings, the same reference numerals will be used as much as possible to refer to the same or similar parts.

[0045] Figure 1 This is a cross-sectional view showing a substrate for a display device according to an embodiment of the present disclosure.

[0046] Figure 1 The substrate shown for the display device includes a first thin-film transistor 100, a second thin-film transistor 150, and a storage capacitor 140.

[0047] The first thin-film transistor 100 with a bottom gate configuration includes a first gate electrode 106, an oxide semiconductor layer 104, a first source electrode 108, and a first drain electrode 110.

[0048] like Figure 1As shown, a first gate electrode 106 is formed on a first gate insulating film 112 and may overlap with an oxide semiconductor layer 104. A first interlayer insulating film 114, a second interlayer insulating film 116, and a second gate insulating film 152 are inserted between the first gate electrode 106 and the oxide semiconductor layer 104. In this case, the first gate electrode 106 is disposed on the first gate insulating film 112 on which the second gate electrode 156 is also disposed, and is formed of the same material as the second gate electrode 156. Therefore, the first gate electrode 106 and the second gate electrode 156 can be formed by the same mask process, thus reducing the number of mask processes.

[0049] An oxide semiconductor layer 104 is formed on the second gate insulating film 152 to overlap with the first gate electrode 106, thereby forming a channel between the first source electrode 108 and the first drain electrode 110. The oxide semiconductor layer 104 is formed of an oxide comprising at least one metal selected from Zn, Cd, Ga, In, Sn, Hf, and Zr. Because the first thin-film transistor 100 including this oxide semiconductor layer 104 has the advantages of higher electron mobility and lower turn-off current compared to the second thin-film transistor 150 including the polycrystalline semiconductor layer 154, the first thin-film transistor 100 is suitable for use as a switching thin-film transistor with a short on-time but long off-time. The oxide semiconductor layer 104 can be disposed above the first gate electrode 106 to effectively ensure the stability of the device.

[0050] A second gate insulating film 152 having the same shape as the oxide semiconductor layer 104 is formed between at least a first portion of the second interlayer insulating film 116 and the oxide semiconductor layer 104. The second gate insulating film 152 can contact the second interlayer insulating film 116. Here, the second gate insulating film 152 is formed of a material with a selective etch ratio different from that of the first gate insulating film 112, the first interlayer insulating film 114, and the second interlayer insulating film 116. For example, the second gate insulating film 152 is formed of SiOx as an oxide film, and the first gate insulating film 112, the first interlayer insulating film 114, and the second interlayer insulating film 116 are formed of SiNx as a nitride film. Therefore, damage to the second interlayer insulating film 116 exposed during the dry etching process used to form the second gate insulating film 152 and the oxide semiconductor layer 104 by the dry etching gas used in the dry etching process can be prevented. Furthermore, it can prevent damage to the second gate insulating film 152 and oxide semiconductor layer 104 caused by dry etching gas during the dry etching process used to form source contact holes 164S and drain contact holes 164D that penetrate the first gate insulating film 112 and the first interlayer insulating film 114 and the second interlayer insulating film 116.

[0051] The second gate insulating film 152 is an inorganic insulating film formed of, for example, silicon oxide (SiOx), and has a lower hydrogen particle content compared to the first gate insulating film 112. Therefore, hydrogen contained in the first gate insulating film 112 and hydrogen contained in the polycrystalline semiconductor layer 154 can be prevented from diffusing into the oxide semiconductor layer 104 during the heat treatment process performed on the oxide semiconductor layer 104.

[0052] Each of the first source electrode 108 and the first drain electrode 110 may be a single layer or multiple layers formed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or their alloys, disposed on the second interlayer insulating film 116. However, the embodiments are not limited thereto. The first source electrode 108 and the first drain electrode 110 are formed facing each other, and a channel of oxide semiconductor layer 104 is inserted between the first source electrode 108 and the first drain electrode 110. At the same time, an etch stopper (not shown) may be formed on the oxide semiconductor layer 104 exposed between the first source electrode 108 and the first drain electrode 110. The etch stopper protects the oxide semiconductor layer 104 exposed between the first source electrode 108 and the first drain electrode 110 from oxygen and moisture, thereby preventing damage to the oxide semiconductor layer 104. The first source electrode 108 and the first drain electrode 110 may contact the side surface of the second gate insulating film 152 exposed by a dry etching process.

[0053] A second thin-film transistor 150 with a top-gate configuration is disposed on a substrate 101 and spaced apart from the first thin-film transistor 100. The second thin-film transistor 150 includes a polycrystalline semiconductor layer 154, a second gate electrode 156, a second source electrode 158, and a second drain electrode 160.

[0054] A polycrystalline semiconductor layer 154 is formed on a buffer layer 102 covering the substrate 101. The polycrystalline semiconductor layer 154 includes a channel region 154C, a source region 154S, and a drain region 154D. The channel region 154C overlaps with the second gate electrode 156, and a first gate insulating film 112 is inserted between the channel region 154C and the second gate electrode 156. The channel region 154C forms a channel between the second source electrode 158 and the second drain electrode 160. The source region 154S is electrically connected to the second source electrode 158 through a source contact hole 164S. The drain region 154D is electrically connected to the second drain electrode 160 through a drain contact hole 164D. Because the polycrystalline semiconductor layer 154 has high mobility, low power consumption, and high reliability, it is suitable for use as a gate drive unit and / or multiplexer (MUX) for driving gate lines.

[0055] The second gate electrode 156 overlaps with the channel region 154C of the polycrystalline semiconductor layer, and a first gate insulating film 112 is inserted between the second gate electrode 156 and the channel region 154C of the polycrystalline semiconductor layer. The second gate electrode 156 has a smaller linewidth compared to the first gate electrode 106 and the intermediate storage electrode 144. The second gate electrode 156 can be a single layer or multiple layers formed of the same material as the first gate electrode 106 (e.g., any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or alloys thereof). However, the embodiments are not limited to this. The first gate insulating film 112 is located on the polycrystalline semiconductor layer 154 and is an inorganic insulating film formed of, for example, silicon nitride (SiNx). The first gate insulating film 112 has a higher hydrogen particle content compared to the second gate insulating film 152. Hydrogen particles contained in the first gate insulating film 112 diffuse into the polycrystalline semiconductor layer 154 during the hydrogenation process, thereby filling the pores in the polycrystalline semiconductor layer 154 with hydrogen. As a result, the polycrystalline semiconductor layer 154 is stabilized, thereby preventing the degradation of the properties of the second thin-film transistor 150.

[0056] The second source electrode 158 is connected to the source region 154S of the polycrystalline semiconductor layer 154 through a source contact hole 164S that penetrates the first gate insulating film 112, the first interlayer insulating film 114, and the second interlayer insulating film 116.

[0057] The second drain electrode 160 faces the second source electrode 158 and is connected to the drain region 154D of the polycrystalline semiconductor layer 154 through a drain contact hole 164D that penetrates the first gate insulating film 112, the first interlayer insulating film 114, and the second interlayer insulating film 116. Since the second source electrode 158 and the first source electrode 108 are in the same layer and formed of the same material, and since the second drain electrode 160 and the first drain electrode 110 are in the same layer and formed of the same material, the first source electrode 108 and the second source electrode 158, as well as the first drain electrode 110 and the second drain electrode 160, can be formed simultaneously using the same mask process.

[0058] After the activation and hydrogenation processes of the polycrystalline semiconductor layer 154 of the second thin-film transistor 150, the oxide semiconductor layer 104 of the first thin-film transistor 100 is formed. That is, the oxide semiconductor layer 104 is disposed above the polycrystalline semiconductor layer 154. Therefore, the oxide semiconductor layer 104 is not exposed to the high-temperature atmosphere of the activation and hydrogenation processes of the polycrystalline semiconductor layer 154, thereby preventing damage to the oxide semiconductor layer 104 and improving reliability.

[0059] The storage capacitor 140 includes a first storage capacitor and a second storage capacitor connected in parallel.

[0060] The first storage capacitor is formed such that the lower storage electrode 142 and the intermediate storage electrode 144 overlap each other, and a first gate insulating film 112 is inserted between the lower storage electrode 142 and the intermediate storage electrode 144. The second storage capacitor is formed such that the intermediate storage electrode 144 and the upper storage electrode 146 overlap each other, and at least one of a first interlayer insulating film 114 and a second interlayer insulating film 116 is inserted between the intermediate storage electrode 144 and the upper storage electrode 146.

[0061] The lower storage electrode 142 is disposed on the buffer layer 102 and is located in the same layer as the polycrystalline semiconductor layer 154 and is formed of the same material. The intermediate storage electrode 144 is disposed on the first gate insulating film 112 and is located in the same layer as the second gate electrode 156 and is formed of the same material. The upper storage electrode 146 is disposed on the second interlayer insulating film 116 and is located in the same layer as the source electrodes 108, 158 and the drain electrodes 110, 160 and is formed of the same material. At this time, the first gate insulating film 112, the first interlayer insulating film 114 and the second interlayer insulating film 116 are formed of an inorganic insulating material such as SiOx or SiNx. At least one of the first gate insulating film 112, the first interlayer insulating film 114 and the second interlayer insulating film 116 may be formed of SiNx, which has a higher dielectric constant than SiOx. Therefore, since the intermediate storage electrode 144 overlaps with the lower storage electrode 142, and a first gate insulating film 112 formed of SiNx with a relatively high dielectric constant is inserted between the intermediate storage electrode 144 and the lower storage electrode 142, the capacitance of the first storage capacitor increases proportionally to the dielectric constant. Similarly, since the upper storage electrode 146 overlaps with the intermediate storage electrode 144, and a first interlayer insulating film 114 and a second interlayer insulating film 116 formed of SiNx with a relatively high dielectric constant are inserted between the upper storage electrode 146 and the intermediate storage electrode 144, the capacitance of the second storage capacitor increases proportionally to the dielectric constant. At this time, in order to increase the capacitance of the second storage capacitor, only the first interlayer insulating film 114 and the second interlayer insulating film 116 are inserted between the upper storage electrode 146 and the intermediate storage electrode 144. The second gate insulating film 152 above the intermediate storage electrode 144 is removed by an etching process, so that the upper storage electrode 146 is directly located on the second interlayer insulating film 116. The upper storage electrode 146 does not contact the second gate insulating film 152, but does contact the second interlayer insulating film 116. On the other hand, to further increase the capacitance of the second storage capacitor, such as... Figure 2 As shown, the second interlayer insulating film 116 can be eliminated, and only the first interlayer insulating film 114 formed of SiNx can be inserted between the upper storage electrode 146 and the middle storage electrode 144.

[0062] The substrate for a display device having the above-described structure according to this disclosure can be applied to... Figure 3 The display device shown.

[0063] Figure 3 The display device shown includes a display panel 180, a gate driving unit 182 for driving the gate lines GL of the display panel 180, and a data driving unit 184 for driving the data lines DL of the display panel 180.

[0064] Display panel 180 includes a display area AA and a non-display area NA surrounding the display area AA.

[0065] In the display area AA of the display panel 180, pixels are located at the intersection between the gate line GL and the data line DL. The pixels are arranged in a matrix. Each pixel includes at least one of a first thin-film transistor 100 and a second thin-film transistor 150 and a storage capacitor 140.

[0066] The gate driving unit 182 is disposed in the non-display area NA. The gate driving unit 182 is configured using a second thin-film transistor 150 including a polycrystalline semiconductor layer 154. At this time, the second thin-film transistor 150 of the gate driving unit 182 is formed simultaneously with the first thin-film transistor 100 and the second thin-film transistor 150 in the display area AA through the same process.

[0067] A multiplexer 186 can be arranged between the data driving unit 184 and the data line DL. The multiplexer 186 distributes the data voltage from the data driving unit 184 to the data line DL in a time-division manner, thereby reducing the number of output channels of the data driving unit 184 and thus reducing the number of data driving integrated circuits constituting the data driving unit 184. The multiplexer 186 is configured using a second thin-film transistor 150 including a polycrystalline semiconductor layer 154. At this time, the second thin-film transistor 150 of the multiplexer 186 can be directly formed on the substrate 101 for the display device together with the second thin-film transistor 150 of the gate driving unit 182 and the first thin-film transistor 100 and the second thin-film transistor 150 in the display area AA.

[0068] The above-described display device can be applied to display devices that require thin-film transistors, such as liquid crystal displays or... Figure 4 The organic light-emitting display device shown.

[0069] Figure 4 The organic light-emitting display device shown includes a first thin-film transistor 100 and a second thin-film transistor 150, a light-emitting diode 130 connected to the second thin-film transistor 150, and a storage capacitor 140.

[0070] A first thin-film transistor 100, including an oxide semiconductor layer 104, is applied to a switching transistor located in the display area AA for each pixel, and a second thin-film transistor 150, including a polycrystalline semiconductor layer 154, is applied to a driving transistor located in the display area AA for each pixel. Alternatively, the first thin-film transistor 100, including the oxide semiconductor layer 104, can be applied to a switching transistor for switching the data voltage input to each pixel located in the display area AA and to a driving transistor connected to each light-emitting diode 130.

[0071] The second thin-film transistor 150, including a polycrystalline semiconductor layer 154, is used in the driving circuit of at least one of the multiplexer 186 and the gate driving unit 182 located in the non-display area NA.

[0072] The storage capacitor 140 includes a lower storage electrode 142 disposed on a buffer layer 102 and an intermediate storage electrode 144 overlapping the lower storage electrode 142. A first gate insulating film 112 is inserted between the lower storage electrode 142 and the intermediate storage electrode 144. At this time, the lower storage electrode 142 and the polycrystalline semiconductor layer 154 are located in the same layer and formed of the same material, and the intermediate storage electrode 144 and the second gate electrode 156 are located in the same layer and formed of the same material. Figure 5 As shown, the intermediate storage electrode 144 is connected to the drain electrode 110 of either the switching transistor or the driving transistor through the first storage contact hole 148a, and the lower storage electrode 142 and the upper storage electrode 146 are connected to the drain electrode 160 of the remaining one of the switching transistor and the driving transistor through the second storage contact hole 148b.

[0073] The light-emitting diode 130 is a light-emitting device and includes an anode 132 connected to a second drain electrode 160 of a second thin-film transistor 150, at least one light-emitting stack 134 formed on the anode 132, and a cathode 136 formed on the light-emitting stack 134.

[0074] The anode 132 is connected to the pixel connection electrode 124, which is exposed through a second pixel contact hole 120 penetrating the planarization layer 128. The pixel connection electrode 124 is connected to the second drain electrode 160, which is exposed through a first pixel contact hole 122 penetrating the first protective film 118 and the second protective film 126. The anode 132 is formed as a multilayer structure comprising a transparent conductive film and an opaque conductive film with high reflectivity. The transparent conductive film is formed of a material with a relatively high work function, such as indium tin oxide (ITO) or indium zinc oxide (IZO), and the opaque conductive film is formed as a single layer or multilayer structure comprising any one of Al, Ag, Cu, Pb, Mo, and Ti or alloys thereof. For example, the anode 132 may be formed such that the transparent conductive film, the opaque conductive film, and the transparent conductive film are stacked sequentially, or that the transparent conductive film and the opaque conductive film are stacked sequentially. The anode 132 is disposed on the planarization layer 128 to overlap with the circuit area in which the switching transistor 100, the driving transistor 150 and the storage capacitor 140 are disposed, and the light-emitting area defined by the bank 138, thereby increasing the light-emitting area.

[0075] The light-emitting stack 134 is formed by stacking a hole-correlated layer, an organic light-emitting layer, and an electron-correlated layer on the anode 132 in either the order of the hole-correlated layer, the organic light-emitting layer, and the electron-correlated layer or in the reverse order. Alternatively, the light-emitting stack 134 may include a first light-emitting stack and a second light-emitting stack opposite to each other, with a charge-generating layer inserted between the first and second light-emitting stacks. In this case, the organic light-emitting layer of either the first or second light-emitting stack generates blue light, and the organic light-emitting layer of the remaining one of the first and second light-emitting stacks generates yellow-green light, thereby generating white light via the first and second light-emitting stacks. The white light generated by the light-emitting stack 134 is introduced into a color filter (not shown) arranged on the light-emitting stack 134 to achieve a color image. Alternatively, a color image can be achieved in such a way that each light-emitting stack 134 generates colored light corresponding to each sub-pixel without the need for a separate color filter. That is, the light-emitting stack 134 of the red (R) sub-pixel can generate red light, the light-emitting stack 134 of the green (G) sub-pixel can generate green light, and the light-emitting stack 134 of the blue (B) sub-pixel can generate blue light.

[0076] The dam 138 can be formed to expose the anode 132. The dam 138 can be formed of an opaque material (e.g., a black material) to prevent optical interference between adjacent sub-pixels. In this case, the dam 138 includes a light-shielding material containing at least one selected from colored pigments, organic black materials, and carbon materials.

[0077] A cathode 136 is formed on the upper and side surfaces of the light-emitting stack 134 opposite to the anode 132, and the light-emitting stack 134 is inserted between the cathode 136 and the anode 132. When the cathode 136 is applied to a top-emitting organic light-emitting display device, the cathode 136 is a transparent conductive film formed of, for example, indium tin oxide (ITO) or indium zinc oxide (IZO).

[0078] As described above, according to this disclosure, a first thin-film transistor 100 including an oxide semiconductor layer 104 is applied to the switching element of each pixel. The first thin-film transistor 100 including the oxide semiconductor layer 104 has a lower turn-off current compared to a second thin-film transistor 150 including a polycrystalline semiconductor layer 154. Therefore, this disclosure can operate in a low-speed drive mode to reduce the frame rate of still images or images with slow data update intervals, thereby reducing power consumption. Furthermore, the oxide semiconductor layer 104 of the first thin-film transistor 100 has excellent saturation characteristics, thus facilitating low-voltage operation.

[0079] Furthermore, according to this disclosure, a second thin-film transistor 150, including a polycrystalline semiconductor layer 154, is applied to the driving elements of the driving circuit for each pixel. This is because the polycrystalline semiconductor layer 154 has a higher mobility (100 cm⁻¹) compared to the oxide semiconductor layer 104. 2 With its lower power consumption and higher reliability (Vs or higher), it can be applied to gate drive unit 182 and / or multiplexer (MUX) 186.

[0080] Figures 6A to 6J It is used to explain the manufacturing process. Figure 4 A cross-sectional view of the method for the organic light-emitting display device shown.

[0081] Reference Figure 6A A buffer layer 102 is formed on the substrate 101, and a polycrystalline semiconductor layer 154 and a lower storage electrode 142 are formed on the buffer layer 102.

[0082] Specifically, an inorganic insulating material such as SiOx or SiNx is deposited on the entire surface of substrate 101, thereby forming a buffer layer 102 with a single-layer or multi-layer structure. Subsequently, an amorphous silicon thin film is formed on the substrate 101 on which the buffer layer 102 has been formed using low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD). Subsequently, a polycrystalline silicon thin film is formed by crystallizing the amorphous silicon thin film. Subsequently, a polycrystalline semiconductor layer 154 and a lower storage electrode 142 are formed by patterning the polycrystalline silicon thin film using a photolithography process and an etching process using a first mask. Subsequently, the lower storage electrode 142 (excluding the polycrystalline semiconductor layer 154) is selectively doped with impurities using a photolithography process using a second mask, thereby forming a conductive lower storage electrode 142.

[0083] Reference Figure 6B A first gate insulating film 112 is formed on a substrate 101 on which a polycrystalline semiconductor layer 154 and a lower storage electrode 142 have been formed, and a first gate electrode 106, a second gate electrode 156, and an intermediate storage electrode 144 are formed on the first gate insulating film 112.

[0084] Specifically, an inorganic insulating material such as SiOx is deposited on the entire surface of a substrate 101 on which a polycrystalline semiconductor layer 154 and a lower storage electrode 142 have already been formed, thereby forming a first gate insulating film 112. Subsequently, a first conductive layer is deposited on the entire surface of the first gate insulating film 112, and the first conductive layer is patterned using a photolithography and etching process with a third mask, thereby forming a first gate electrode 106, a second gate electrode 156, and an intermediate storage electrode 144.

[0085] Reference Figure 6C A first interlayer insulating film 114 and a second interlayer insulating film 116 are formed on a substrate 101 on which a first gate electrode 106, a second gate electrode 156 and an intermediate storage electrode 144 have been formed. A second gate insulating film 152 and an oxide semiconductor layer 104 are formed on the second interlayer insulating film 116 in the same pattern.

[0086] Specifically, an inorganic insulating material such as SiNx is deposited on the entire surface of a substrate on which a first gate electrode 106, a second gate electrode 156, and an intermediate storage electrode 144 have already been formed, thereby forming a first interlayer insulating film 114 and a second interlayer insulating film 116. Subsequently, a second gate insulating film 152 formed of an inorganic insulating material such as SiOx and an oxide semiconductor layer 104 are deposited on the entire surface of the second interlayer insulating film 116, and are simultaneously patterned using a photolithography and etching process with a fourth mask, thereby forming the second gate insulating film 152 and the oxide semiconductor layer 104 with the same pattern. For example, an insulating film can be deposited on a substrate, and an oxide semiconductor layer can be deposited on the insulating film. The oxide semiconductor layer can be patterned using a fourth mask to form the oxide semiconductor layer 104, and the insulating film can be patterned using the same fourth mask to form the second gate insulating film 152.

[0087] Reference Figure 6D Source contact hole 164S and drain contact hole 164D are formed on substrate 101 on which a second gate insulating film 152 and oxide semiconductor layer 104 have been formed.

[0088] Specifically, the first gate insulating film 112, the first interlayer insulating film 114, and the second interlayer insulating film 116 on the substrate 101, on which the second gate insulating film 152 and the oxide semiconductor layer 104 have been formed, are patterned using the photolithography and etching processes of the fifth mask, thereby forming the source contact hole 164S and the drain contact hole 164D.

[0089] Reference Figure 6E On a substrate 101 on which source contact holes 164S and drain contact holes 164D have been formed, a first source electrode 108 and a second source electrode 158, a first drain electrode 110 and a second drain electrode 160, and an upper storage electrode 146 are formed.

[0090] Specifically, a second conductive layer is deposited on the entire surface of the substrate 101 on which source contact holes 164S and drain contact holes 164D have already been formed. The second conductive layer is then patterned using a photolithography and etching process with a sixth mask, thereby forming a first source electrode 108, a second source electrode 158, a first drain electrode 110, a second drain electrode 160, and an upper storage electrode 146. Due to the patterning of the second gate insulating film 152, the upper storage electrode 146 does not contact the second gate insulating film 152, but can contact the second interlayer insulating film 116.

[0091] Reference Figure 6FA first protective film 118 and a second protective film 126 having a first pixel contact hole 122 are formed on a substrate 101 on which a first source electrode 108 and a second source electrode 158, a first drain electrode 110 and a second drain electrode 160 and an upper storage electrode 146 have been formed.

[0092] Specifically, a first protective film 118 and a second protective film 126 are sequentially formed on a substrate 101 on which a first source electrode 108 and a second source electrode 158, a first drain electrode 110 and a second drain electrode 160, and an upper storage electrode 146 have already been formed, through a deposition process. Here, the first protective film 118 and the second protective film 126 are formed of an inorganic insulating material such as SiOx or SiNx or an organic insulating material such as acrylic resin. Subsequently, the first protective film 118 and the second protective film 126 are patterned using a photolithography process and an etching process with a seventh mask, thereby forming a first pixel contact hole 122.

[0093] Reference Figure 6G A pixel connection electrode 124 is formed on a substrate 101 on which a first protective film 118 having a first pixel contact hole 122 and a second protective film 126 have been formed.

[0094] Specifically, a third conductive layer is deposited on the entire surface of a substrate 101 on which a first protective film 118 having a first pixel contact hole 122 and a second protective film 126 have been formed, and the third conductive layer is patterned by using a photolithography process and an etching process with an eighth mask, thereby forming a pixel connection electrode 124.

[0095] Reference Figure 6H A planarization layer 128 with a second pixel contact hole 120 is formed on a substrate 101 on which a pixel connection electrode 124 has been formed.

[0096] Specifically, an organic insulating material, such as acrylic resin, is deposited on the entire surface of the substrate 101 on which the pixel connection electrode 124 has been formed, thereby forming a planarization layer 128. Subsequently, the planarization layer 128 is patterned using a photolithography and etching process with a ninth mask, thereby forming a second pixel contact hole 120.

[0097] Reference Figure 6I An anode 132 is formed on a substrate 101 on which a planarization layer 128 having a second pixel contact hole 120 has been formed.

[0098] Specifically, a fourth conductive layer is deposited on the entire surface of a substrate 101 on which a planarization layer 128 having a second pixel contact hole 120 has already been formed. The fourth conductive layer includes a transparent conductive film and an opaque conductive film. Subsequently, the fourth conductive layer is patterned by photolithography and etching processes, thereby forming an anode 132.

[0099] Reference Figure 6J On a substrate 101 on which an anode 132 has been formed, a dam 138, an organic light-emitting stack 134, and a cathode 136 are sequentially formed.

[0100] Specifically, a photosensitive film is coated on the entire surface of the substrate 101 on which the anode 132 has been formed, and the photosensitive film is patterned by a photolithography process to form the embankment 138. Subsequently, by using a shadow mask deposition process, the light-emitting stack 134 and the cathode 136 are sequentially formed in the display area AA, but not in the non-display area NA.

[0101] Thus, according to this disclosure, the intermediate storage electrode 144 and the gate electrodes 106 and 156 are formed using the same single mask process, and the upper storage electrode 146, as well as the source electrodes 108, 158 and drain electrodes 110, 160, are formed using the same single mask process. Therefore, compared with the prior art, the organic light-emitting display device according to the present invention can avoid one or more mask processes, thereby simplifying the structure and its manufacturing process and improving the yield.

[0102] As is evident from the above description, by applying thin-film transistors including oxide semiconductor layers to thin-film transistors located in the display area, this disclosure can achieve lower power consumption and lower voltage operation. Furthermore, by applying thin-film transistors including polycrystalline semiconductor layers to multiplexers and gate driving units located in the non-display area, this disclosure can reduce the number of driver integrated circuits and reduce the bezel area. Additionally, according to this disclosure, one of the at least two memory electrodes is formed simultaneously with the gate electrode using the same single mask process, and the other of the at least two memory electrodes is formed simultaneously with the source and drain electrodes using the same single mask process. Therefore, compared to the prior art, the organic light-emitting display device according to this disclosure can reduce one or more mask processes, thereby simplifying the structure and its manufacturing process and improving yield.

[0103] It will be apparent to those skilled in the art that various modifications and variations can be made to the invention without departing from its spirit or scope. Therefore, this invention is intended to cover such modifications and variations as long as they fall within the scope of the appended claims and their equivalents.

[0104] This disclosure can also be configured as follows.

[0105] Example 1. A display device, comprising:

[0106] substrate;

[0107] The pixels on the substrate, the pixels comprising:

[0108] A first thin-film transistor (TFT) on the substrate, the first TFT comprising:

[0109] First gate electrode;

[0110] At least a first portion of the interlayer insulating film on the first gate electrode;

[0111] A first gate insulating film on the first portion of the interlayer insulating film; and

[0112] A first active layer formed of oxide semiconductor on the first gate insulating film.

[0113] A storage capacitor on the substrate, the storage capacitor comprising:

[0114] First storage electrode;

[0115] At least a second portion of the gate insulating film on the first storage electrode;

[0116] as well as

[0117] A second storage electrode on the second portion of the interlayer insulating film, wherein the second storage electrode is physically separated from the first gate insulating film; and a light-emitting device electrically connected to the storage capacitor.

[0118] Example 2. The display device according to Example 1, wherein the first gate insulating film and the second storage electrode are in contact with the interlayer insulating film.

[0119] Example 3. The display device according to Example 1, wherein the first storage electrode and the first gate electrode are in the same layer.

[0120] Example 4. The display device according to Example 1, wherein the interlayer insulating film is formed of silicon nitride (SiNx) and the first gate insulating film is formed of silicon oxide (SiOx).

[0121] Example 5. The display device according to Example 1, wherein the first TFT further includes a first source electrode and a first drain electrode electrically connected to the first active layer, and wherein the second storage electrode is in the same layer as the first source electrode and the first drain electrode.

[0122] Example 6. The display device according to Example 1, wherein the first TFT further includes a first source electrode and a first drain electrode electrically connected to the first active layer, and wherein the first source electrode or the first drain electrode contacts a side surface of the first gate insulating film.

[0123] Example 7. The display device according to Example 6, wherein the first source electrode or the first drain electrode contacts the side surface of the first active layer.

[0124] Example 8. The display device according to Example 1, wherein the pixel further includes a second TFT on the substrate, the second TFT comprising:

[0125] The second active layer is formed of polycrystalline silicon;

[0126] At least a first portion of the second gate insulating film on the second active layer; and

[0127] The second gate electrode on the first portion of the second gate insulating film,

[0128] The second gate electrode is in the same layer as the first gate electrode.

[0129] Example 9. The display device according to Example 8, wherein the first active layer is disposed above the second active layer.

[0130] Example 10. The display device according to Example 8 further includes a third TFT disposed in a non-display area of ​​the substrate, the third TFT including a third active layer formed of polycrystalline Si.

[0131] Example 11. The display device according to Example 10 further includes:

[0132] A gate driving unit is arranged in the non-display area to drive gate lines in the display area of ​​the substrate;

[0133] A data driving unit, disposed in the non-display area to drive data lines in the display area; and

[0134] A multiplexer for distributing the data voltage from the data drive unit to the data lines.

[0135] The third TFT is included in at least one of the multiplexer and the gate driving unit.

[0136] Example 12. The display device according to Example 8, wherein the first TFT is a switching TFT of the pixel, and wherein the second TFT is a driving TFT of the pixel.

[0137] Example 13. The display device according to Example 8, wherein the storage capacitor further includes a third storage electrode on the substrate and at least a second portion of the second insulating film on the third storage electrode.

[0138] Example 14. The display device according to Example 13, wherein the third storage electrode is in the same layer as the second active layer.

[0139] Example 15. The display device according to Example 8, wherein the light-emitting device includes an anode electrode, a light-emitting stack, and a cathode electrode, wherein the anode electrode overlaps with the first TFT, the second TFT, and the storage capacitor.

[0140] Example 16. The display device according to Example 1, wherein the light-emitting device includes an anode electrode, a light-emitting stack and a cathode electrode, wherein the second TFT includes a drain electrode electrically connected to the second active layer, and wherein the display device further includes a connection electrode electrically connected to the drain electrode and the anode electrode.

[0141] Example 17. The display device according to Example 1, wherein the light-emitting device includes an anode electrode, a light-emitting stack and a cathode electrode, and wherein the anode electrode includes a transparent conductive film and an opaque conductive film.

[0142] Example 18. The display device according to Example 1, wherein the light-emitting device includes an anode electrode, a light-emitting stack and a cathode electrode, wherein the display device further includes a dam layer on at least a portion of the anode electrode, and wherein the dam layer includes a light-shielding material selected from at least one of colored pigments, organic black materials and carbon materials.

[0143] Example 19. The display device according to Example 1 further includes a color filter on the light-emitting device.

[0144] Example 20. The display device according to Example 8, wherein the second gate electrode has a smaller linewidth compared to the first gate electrode and the first storage electrode.

Claims

1. A display device comprising: a substrate; a pixel over the substrate, the pixel comprising: a first thin film transistor (TFT) over the substrate, the first TFT comprising: a first gate electrode, at least a first portion of a first interlayer insulating film over the first gate electrode, a second interlayer insulating film over the first interlayer insulating film, and a first gate insulating film over a first portion of the second interlayer insulating film, and a second TFT over the substrate, the second TFT comprising: a second active layer formed of polycrystal silicon, a source electrode and a drain electrode, at least a first portion of a second gate insulating film over the second active layer, and a second gate electrode over the first portion of the second gate insulating film, wherein the first interlayer insulating film, the second interlayer insulating film, and the second gate insulating film are between the first gate insulating film and the second active layer; a storage capacitor over the substrate, the storage capacitor comprising: a first storage electrode, and a second storage electrode, wherein the second storage electrode is separated from the first gate insulating film.

2. The display device according to claim 1, wherein the first TFT further comprises a first active layer formed of an oxide semiconductor over the first gate insulating film.

3. The display device according to claim 1, wherein at least a second portion of the second interlayer insulating film is over the first storage electrode.

4. The display device according to claim 1, wherein the first gate insulating film and the second storage electrode contact the second interlayer insulating film.

5. The display device according to claim 1, wherein the first storage electrode is in the same layer as the second gate electrode.

6. The display device according to claim 1, wherein the first gate insulating film and the first and second interlayer insulating films are formed of an inorganic insulating material.

7. The display device of claim 6, wherein, the first gate insulating film and the first and second interlayer insulating films are formed of silicon oxide (SiOx) or silicon nitride (SiNx), and wherein at least one of the first gate insulating film and the first and second interlayer insulating films is formed of SiNx having a dielectric constant higher than SiOx.

8. The display device according to claim 2, wherein the first TFT further comprises a first source electrode and a first drain electrode electrically connected to the first active layer, and wherein the second storage electrode is in the same layer as the first source electrode and the first drain electrode.

9. The display device according to claim 2, wherein the first TFT further comprises a first source electrode and a first drain electrode electrically connected to the first active layer, and wherein the first source electrode or the first drain electrode contacts a side surface of the first gate insulating film.

10. The display device of claim 9, wherein, the first source electrode or the first drain electrode contacts a side surface of the first active layer.

11. The display device according to claim 1, wherein the second gate electrode is in the same layer as the first gate electrode.

12. The display device according to claim 2, wherein the first active layer is arranged over the second active layer.

13. The display device according to claim 1, further comprising a third TFT arranged in a non-display region of the substrate, the third TFT comprising a third active layer formed of polycrystal silicon.

14. The display device according to claim 13, further comprising: a gate driver circuit arranged in the non-display region to drive gate lines in a display region of the substrate; a data driver circuit arranged in the non-display region to drive data lines in the display region; and ​ a multiplexer for distributing a data voltage from the data driving unit to the data line, wherein the third TFT is included in at least one of the multiplexer and the gate driving unit.

15. The display device of claim 1, wherein, the first TFT is a switching TFT of the pixel, and wherein the second TFT is a driving TFT of the pixel.

16. The display device of claim 1, wherein, the storage capacitor further includes a third storage electrode on the substrate and at least a second portion of the second interlayer insulating film on the third storage electrode.

17. The display device of claim 16, wherein, the third storage electrode is in the same layer as the second active layer.

18. The display device according to claim 1, further comprising a light emitting device electrically connected to a drain electrode of the second TFT, wherein the light emitting device includes an anode electrode, a light emitting layer, and a cathode electrode, wherein the anode electrode overlaps the first TFT, the second TFT, and the storage capacitor.

19. The display device of claim 18, wherein, the anode electrode overlaps the first TFT, the second TFT, and the storage capacitor.

20. The display device according to claim 1, further comprising a light emitting device electrically connected to the storage capacitor, wherein the light emitting device includes an anode electrode, a light emitting layer, and a cathode electrode, wherein the second TFT includes a drain electrode electrically connected to the second active layer, and wherein the display device further comprises a connection electrode electrically connected to the drain electrode and the anode electrode.

21. The display device according to claim 20, further comprising a first protective film of an organic insulating material on the second TFT, and a second protective film of an organic insulating material on the first protective film, wherein the connection electrode is connected to the drain electrode through a contact hole that penetrates the first protective film and the second protective film.

22. The display device according to claim 1, further comprising a light emitting device electrically connected to the storage capacitor, wherein the light emitting device includes an anode electrode, a light emitting layer, and a cathode electrode, and wherein the anode electrode includes a transparent conductive film and an opaque conductive film.

23. The display device according to claim 1, further comprising a light emitting device electrically connected to the storage capacitor, wherein the light emitting device includes an anode electrode, a light emitting layer, and a cathode electrode, wherein the display device further comprises a bank layer on at least a portion of the anode electrode, and wherein the bank layer includes a light blocking material selected from at least one of a color pigment, an organic black material, and a carbon material.

24. The display device according to claim 1, further comprising a light emitting device electrically connected to the storage capacitor, and a color filter on the light emitting device.

25. The display device of claim 1, wherein, the second gate electrode has a smaller line width than the first gate electrode and the first storage electrode.

26. The display device of claim 1, wherein, the first gate insulating film is island-shaped.

27. A display device comprising: a substrate; a pixel on the substrate, the pixel comprising: a first thin film transistor (TFT) on the substrate, the first TFT comprising: a first gate electrode, at least a first portion of a first interlayer insulating film on the first gate electrode, a second interlayer insulating film on the first interlayer insulating film, and a second active layer on the second interlayer insulating film. a first gate insulating film over the first portion of the second interlayer insulating film, and a second TFT over the substrate, the second TFT including: a second active layer formed of polycrystal silicon, at least a first portion of a second gate insulating film over the second active layer, and a second gate electrode over the first portion of the second gate insulating film, wherein the first interlayer insulating film, the second interlayer insulating film, and the second gate insulating film are between the first gate insulating film and the second active layer; a storage capacitor over the substrate, the storage capacitor including: a first storage electrode, wherein the first storage electrode is in the same layer as the second gate electrode, and a second storage electrode, wherein the second storage electrode is separated from the first gate insulating film; a light-emitting device electrically connected to the storage capacitor, the light-emitting device including: an anode electrode, a light-emitting layer over the anode electrode, and a cathode electrode over the light-emitting layer; a connection electrode electrically connected to a drain electrode of the second TFT and the anode electrode; and a first protective film over the second TFT, wherein the connection electrode is connected to the drain electrode of the second TFT through a pixel contact hole that penetrates the first protective film.

28. A display device according to claim 27, wherein, The first protective film is formed of an organic insulating material.

29. The display device of claim 27, wherein, The first TFT further includes a first active layer formed of an oxide semiconductor over the first gate insulating film.

30. The display device of claim 27, wherein, At least a second portion of the second interlayer insulating film is over the first storage electrode.

31. The display device of claim 27, wherein, The first gate insulating film and the second storage electrode contact the second interlayer insulating film.

32. The display device of claim 27, wherein, The first gate insulating film and the first and second interlayer insulating films are formed of an inorganic insulating material.

33. The display device of claim 32, wherein, The first gate insulating film and the first and second interlayer insulating films are formed of silicon oxide SiOx or silicon nitride SiNx, and wherein at least one of the first gate insulating film and the first and second interlayer insulating films is formed of SiNx having a higher dielectric constant than SiOx.

34. The display device of claim 29, wherein, The first TFT further includes a first source electrode and a first drain electrode electrically connected to the first active layer, and wherein the second storage electrode is in the same layer as the first source electrode and the first drain electrode.

35. The display device of claim 29, wherein, The first TFT further includes a first source electrode and a first drain electrode electrically connected to the first active layer, and wherein the first source electrode or the first drain electrode contacts a side surface of the first gate insulating film.

36. A display device according to claim 35, wherein, The first source electrode or the first drain electrode contacts a side surface of the first active layer.

37. The display device of claim 27, wherein, The second gate electrode is in the same layer as the first gate electrode.

38. The display device of claim 29, wherein, The first active layer is arranged over the second active layer.

39. The display device according to claim 27, further comprising a third TFT arranged in a non-display region of the substrate, the third TFT including a third active layer formed of polycrystal silicon.

40. The display device according to claim 39, further comprising: a gate driver unit arranged in the non-display region to drive a gate line in a display region of the substrate; a data driving unit arranged in the non-display region to drive data lines in the display region; and a multiplexer to distribute data voltages from the data driving unit to the data lines, wherein the third TFT is included in at least one of the multiplexer and the gate driving unit.

41. The display device of claim 27, wherein, the first TFT is a switching TFT of the pixel, and wherein the second TFT is a driving TFT of the pixel.

42. The display device of claim 27, wherein, the storage capacitor further includes a third storage electrode on the substrate and at least a second portion of the second interlayer insulating film on the third storage electrode.

43. A display device according to claim 42, wherein, the third storage electrode is in the same layer as the second active layer.

44. The display device of claim 27, wherein, the anode electrode overlaps the first TFT, the second TFT, and the storage capacitor.

45. The display device according to claim 27, further comprising a second protective film on the first protective film, wherein the connection electrode is connected to the drain electrode of the second TFT through the pixel contact hole that also penetrates the second protective film.

46. The display device of claim 27, wherein, the anode electrode includes a transparent conductive film and an opaque conductive film.

47. The display device according to claim 27, further comprising a bank layer on at least a portion of the anode electrode, wherein, the bank layer includes a light-shielding material selected from at least one of a color pigment, an organic black material, and a carbon material.

48. The display device according to claim 27, further comprising a color filter on the light-emitting device.

49. The display device of claim 27, wherein, the first gate insulating film is in an island shape.

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