Tensor reading method and device and related product

Abstract

The embodiment of the present application provides a tensor reading method, which adds the description of the data reading step and the offset value when describing the tensor, and when receiving the tensor corresponding to the data of the same memory space with different natural semantics, the tensor under different natural semantic descriptions can be obtained by resetting the new data reading step and the offset value. The method provided by the present application does not need to copy the data of the tensor memory space when converting the natural semantics, saves the running time and the running memory, and achieves the effect of improving the operation speed and reducing the memory cost.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, and in particular to a method, apparatus, and related products for reading tensors. Background Technology

[0002] Currently, to improve computational efficiency, data is typically stored as vectors. Tensors are higher-dimensional vectors and are commonly used in deep learning. Tensor descriptors describe the relationship between the natural semantics of each dimension of the tensor and the data arrangement. Different tensors may have different natural semantics; common natural semantics include NCL, NCHW, NHWC, and NHWCD, where N is the data batch number, C is the number of channels per data point, L is the length of each channel, H is the height of each channel, W is the width of each channel, and D is the depth of each channel. In practice, to compute multiple tensors, it is necessary to unify their natural semantics. For example, if one tensor has the natural semantics of NCHW and another has the natural semantics of NHWC, to perform computations on these two tensors, their natural semantics need to be converted. Existing techniques typically involve copying the memory space data corresponding to the tensor and rearranging it according to the descriptor corresponding to the other natural semantic, generating a new tensor. However, copying data from memory incurs time overhead and consumes additional memory space.

[0003] Therefore, how to improve conversion efficiency without consuming extra memory when converting tensors to natural semantics is an urgent problem to be solved. Summary of the Invention

[0004] In order to at least partially solve the technical problems mentioned in the background art, the purpose of this application is to provide a tensor reading method, conversion method, apparatus and related products.

[0005] The objective and other objectives will be achieved through the features described in the independent claims. Further implementations are illustrated in the dependent claims, the specification, and the drawings.

[0006] In a first aspect, this application provides a method for reading a tensor, the method comprising: acquiring storage information of data in memory space, the storage information including stored data and storage order; determining a first data natural semantics of a first tensor, the first data natural semantics being used to identify the data arrangement of the first tensor; and, in the case where the data arrangement of the first tensor is inconsistent with the storage order, reading the first tensor from memory space according to the correspondence between the first data natural semantics and the stored data.

[0007] In conjunction with the first aspect, in some embodiments, when the data arrangement of the first tensor is consistent with the storage order, a first parameter is generated according to the storage order, wherein the first parameter includes a first offset value, a first data retrieval step size, and a first descriptor; the first tensor is read according to the first parameter.

[0008] In conjunction with the first aspect, in some embodiments, the first parameter further includes: a first size, a first memory space, a first data type, and a first dimension; the first descriptor is used to describe the relationship between the data arrangement of the first tensor and the first natural semantics; the first data retrieval step size is determined based on the first size and the first dimension.

[0009] In conjunction with the first aspect, in some embodiments, when the data arrangement and storage order of the first tensor are inconsistent, reading the first tensor from the memory space according to the correspondence between the natural semantics of the first data and the stored data includes: generating a first parameter according to the storage order; converting the first parameter into a second parameter according to the natural semantics of the first data, the second parameter including a second offset value, a second data retrieval step size and a second descriptor; and reading the first tensor according to the second parameter.

[0010] In conjunction with the first aspect, in some embodiments, the method further includes: determining a second data natural semantic, the second data natural semantic being used to identify the data arrangement of the second tensor; converting a second parameter into a third parameter according to the correspondence between the second data natural semantic and the first data natural semantic; converting the first tensor into the second tensor based on the third parameter, wherein the third parameter includes a third offset value, a third data retrieval step size, and a third descriptor.

[0011] In conjunction with the first aspect, in some embodiments, the second parameter further includes: a second size, a second number of dimensions, and a second data type; the third parameter further includes: a third size, a third number of dimensions, and a third data type; wherein the second data type and the third data type are consistent with the data type of the data in the memory space.

[0012] In conjunction with the first aspect, in some embodiments, the first natural semantics of data and the second natural semantics of data have the same dimension but different order; or, the first natural semantics of data and the second natural semantics of data have different dimensions.

[0013] Secondly, this application provides a tensor reading device, characterized in that the tensor reading device includes: an acquisition unit, a determination unit, and a reading unit: the acquisition unit is used to acquire storage information of data in memory space, the storage information including stored data and storage order; the determination unit is used to determine a first data natural semantics of a first tensor, the first data natural semantics being used to identify the data arrangement of the first tensor; the reading unit is used to read the first tensor from memory space according to the correspondence between the first data natural semantics and the stored data when the data arrangement of the first tensor is inconsistent with the storage order.

[0014] In conjunction with the second aspect, the tensor reading device further includes: a conversion unit; the conversion unit is used to convert the first tensor into a second tensor based on a third parameter, wherein the third parameter includes a third offset value, a third data retrieval step, and a third descriptor.

[0015] Thirdly, this embodiment of the solution provides an electronic device, characterized in that the electronic device includes a tensor reading device, which performs any possible implementation as described in the first aspect.

[0016] Fourthly, this embodiment of the solution provides a computer-readable storage medium, characterized in that the computer-readable storage medium stores instructions that, when executed on a computer, cause the computer to perform any possible implementation as described in the first aspect.

[0017] As can be seen, this application, by incorporating descriptions of the data retrieval step size and offset values ​​when describing tensors, enables the reading of tensors with different natural semantics from the same storage space. This solves the problem of needing to copy memory space data when converting tensor natural semantics, thereby reducing time overhead and additional memory space usage. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below.

[0019] Figure 1 This is a schematic diagram of an electronic device structure provided in an embodiment of the present invention;

[0020] Figure 2 This is a schematic diagram illustrating the meaning of a tensor provided in an embodiment of the present invention;

[0021] Figure 3 This is a schematic diagram of a general tensor transformation method provided in an embodiment of the present invention;

[0022] Figure 4 This is a schematic flowchart of a tensor reading method provided in an embodiment of the present invention;

[0023] Figure 5 This is a flowchart illustrating a tensor reading method provided by an embodiment of the present invention in an application scenario.

[0024] Figure 6 This is a schematic diagram illustrating the steps for generating a tensor according to an embodiment of the present invention;

[0025] Figure 7 This is a schematic diagram of a tensor conversion device provided in an embodiment of the present invention;

[0026] Figure 8 This is a schematic diagram of a combined device structure provided in an embodiment of the present invention;

[0027] Figure 9 This is a schematic diagram of a board structure provided in an embodiment of the present invention. Detailed Implementation

[0028] The technical solutions in the embodiments of this application will now be described clearly and in detail with reference to the accompanying drawings. In the description of the embodiments of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B; the word "and / or" in the text is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the description of the embodiments of this application, "multiple" refers to two or more than two.

[0029] In the following description, the terms "first" and "second" are used for descriptive purposes only and should not be construed as implying relative importance or implicitly indicating the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more. Furthermore, the terms "comprising" and "having," and any variations thereof, mentioned in the description of this application, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include other steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices. It should be noted that in the embodiments of this application, words such as "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplarily" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or designs. To be precise, the use of words such as "exemplarily" or "for example" is intended to present the relevant concepts in a specific way.

[0030] Please see Figure 1, Figure 1 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, such as... Figure 1 As shown, the electronic device includes a memory 140, an input device 120, an output device 130, and a processor 110. The electronic device may also include a communication bus, and the processor 110, input device 120, output device 130, and memory 140 can be interconnected via the bus. Optionally, the electronic device may further include an instruction storage unit, which is located adjacent to the processor 110. More optionally, the instruction storage unit is integrated with the processor 110, i.e., the instruction storage unit is an on-chip memory of the processor 110. Thus, when the processor 110 needs to execute a program in the memory 140, the electronic device first loads the program from the memory 140 into the instruction storage unit. Then, the processor 110 can access the instruction storage unit to execute the program.

[0031] When the processor 110 executes the program stored in the memory 140, it performs the following steps:

[0032] The processor 110 acquires the storage information of the data in the memory space and determines the first natural semantics of the first data of the first tensor; determines whether the data arrangement of the first tensor is consistent with the storage order; generates a first parameter according to the storage order and reads the first tensor; generates a second parameter according to the correspondence between the first natural semantics of the data and the stored data and reads the first tensor.

[0033] Furthermore, the processor 110 described above may be a Central Processing Unit (CPU), an Intelligence Processing Unit (NPU), a Graphics Processing Unit (GPU), or an Image Processing Unit; this application does not limit this to any particular processor. Depending on the processor 110, the method for determining hardware performance proposed in this application embodiment can be applied to artificial intelligence application fields such as image recognition processing, deep learning processing, computer vision processing, intelligent robot processing, and natural language processing, executing complex functional programs in the field of artificial intelligence.

[0034] This application provides a method, apparatus, and related products for reading tensors. Based on this method, different tensors can be read from the same storage space according to different natural semantics. This method incorporates the description of the data retrieval step size and offset value when describing the tensor, using the data retrieval step size, offset value, and descriptor to describe tensors with natural semantics. When converting the natural semantics, the data retrieval step size and offset value can be reset according to the new natural semantics. Finally, the tensor after converting the natural semantics can be read using the new data retrieval step size, offset value, and other basic information of the tensor. In contrast, in existing technologies, descriptors and offsets are mutually exclusive. When describing tensors containing natural semantics, the tensor's data retrieval step size and offset value are not combined with the descriptor for description. Therefore, when converting the natural semantics of a tensor, it is necessary to recopy the memory space data corresponding to the tensor, obtain the rearranged memory space data through the new natural semantics, and then obtain the converted tensor. Although this method can also achieve the conversion of tensor natural semantics, copying the tensor's memory space data incurs time overhead and increases the memory size occupied when running this operation. The tensor reading method provided by this solution uses the original tensor's memory space when converting the tensor's natural semantics. In other words, the method provided by this solution can read tensors with different natural semantics from data in the same memory space without copying the memory space, saving data copying time and additional memory usage, thereby improving the operation speed and reducing memory overhead.

[0035] The tensor reading method provided in this application can be applied to electronic devices containing memory. First, the relevant concepts of memory are introduced.

[0036] (1) Memory space

[0037] Memory space generally refers to the space in a computer's memory (physical address space) or the space allocated by the system for a user program, used to store the program and data of a running process. The data stored in memory space can be abstracted as an ordered sequence of numbers.

[0038] (2) Tensor

[0039] A tensor is a multidimensional array abstracted from memory space, with the number of elements being less than or equal to the number of elements in the memory space. The purpose of using tensors is to create higher-dimensional matrices and vectors.

[0040] (3) Data type

[0041] A data type is the data type used to store data in memory or the data type of elements within a tensor. Common data types include single-precision floating-point (float), half-precision floating-point (half), integer (int), short integer (short), character variables (char), and boolean variables (bool).

[0042] (4) Dimension (dim)

[0043] The dimension (dim) is the dimension of a tensor. If the tensor is a vector, the dimension is 1; if the tensor is a matrix, the dimension is 2; if the tensor is an array of matrices, the dimension is 3, and so on.

[0044] (5) Size

[0045] The size is used to represent the length of each dimension in a tensor. The size is represented by a one-dimensional array whose length is the same as the number of dimensions. The values ​​of the array elements are the lengths of the corresponding dimensions of the tensor. For example, if the tensor is four-dimensional (i.e., the number of dimensions is 4), the size is a one-dimensional array of length 4. The first element represents the length along the 0th dimension, the second element represents the length along the 1st dimension, and so on; each element of the array represents the length of its corresponding dimension.

[0046] (6) Offset value

[0047] The offset value is the offset of the first element of the tensor relative to the first element of the memory space.

[0048] (7) Data retrieval stride

[0049] The stride is a one-dimensional array of length 10 ...

[0050] (8) Descriptor (format)

[0051] A format descriptor describes the relationship between data arrangement and natural semantics. Common formats include NCL, NCHW, NHWC, and NCHWD, where N represents the data batch number, C represents the number of channels per data point, L represents the length of each channel, H represents the height of each channel, W represents the width of each channel, and D represents the depth of each channel. For example, images are typically represented using three-dimensional tensors because image data is often combined from multiple images in neural networks. In this case, N represents the number of images in the natural semantics. Since image pixels are represented as (R, G, B), C represents the R, G, and B channels of each pixel in the image; H is the height of the image; and W is the width of the image.

[0052] (9) Contiguous mapping

[0053] Sequential mapping describes the situation where the order of tensor elements matches the order of elements in memory. Specifically, it refers to a tensor where the elements are arranged in ascending order of dimension and ascending order of indices. If this sequence matches the ordered sequence abstracted from memory, the tensor is considered sequentially mapped. In a one-dimensional tensor, a step size of 1 indicates a sequential mapping. For tensors with more than one dimension (e.g., if the tensor has d dimensions (d>1), and the 0th dimension is the highest and the (d-1)th dimension the lowest, then the step size for the (d-1)th dimension is 1, the step size for the (d-2)th dimension is the product of the step size and length, and so on. The step size for a higher dimension is the product of the step size and length for a lower dimension. The order of tensor elements in a sequential mapping is entirely determined by its dimension and size; the step size cannot change the mapping relationship between the tensor element order and the memory element order.

[0054] To help you understand the above concepts, we will provide examples below.

[0055] like Figure 2As shown, an ordered sequence [0,1,2,3,4,5,6,7,8,9,10,11] is stored in the memory space A_storage. Based on this ordered sequence, a multidimensional array A_tensor [5,6,7,8,9,10] can be abstracted. A_tensor stores integers and its data type is int. A_tensor is one-dimensional and its dimension is equal to 1. The length of A_tensor in the one-dimensional direction is 6 and its size is [6]. The first element of A_tensor is offset by 5 elements relative to the first element of A_storage, and the offset value is equal to [5]. The data retrieval step size is equal to 1. A_tensor and A_storage are sequentially mapped. If, based on A_storage, the data type of the tensor is set to int, the dimension is equal to 1, the size is [3], the offset value is equal to [4], and the data retrieval step size is equal to 2, then a multidimensional array B_tensor [4,6,8] can be abstracted based on this memory space.

[0056] For tensors that need to describe natural semantics, because the tensor and its memory space are often sequentially mapped, data type, dimension, and size are common properties of tensors. However, the data step size and descriptor are mutually exclusive properties of tensors. That is, a tensor with a data step size attribute will not have a descriptor attribute, and vice versa. In this case, the descriptor is essentially a descriptor of the data arrangement in the memory space and the natural semantic relationship. When a four-dimensional C_tensor is a tensor that needs to describe natural semantics, a common method is to use... Figure 3 The method shown transforms the four-dimensional C_tensor into a D_tensor by performing a natural semantic dimension transformation.

[0057] S310 and processor 110 acquire data from C_tensor and its corresponding memory space C_storage.

[0058] Specifically, the processor 110 acquires the data of C_tensor and its corresponding memory space C_storage. For example, C_tensor is as follows: Figure 3 As shown in E301, where, as Figure 3 As shown in E302, the data in the memory space C_storage of C_tensor is [C0, C1, C2, C3, C4, C5, C6, C7, C8, C9, C...]. 10 C 11The data type of C_tensor is int; the number of dimensions of C_tensor is 4; the size of C_tensor is [1,3,2,2]; the natural semantics are NCHW, that is, the 0th dimension corresponds to N, the 1st dimension corresponds to C, the 2nd dimension corresponds to H, and the 3rd dimension corresponds to W. Therefore, the 0th dimension only has N=0, while the 1st dimension can be represented as C=0, C=1, and C=2, the 2nd dimension can be represented as H=0 and H=1, and the 3rd dimension can be represented as W=0 and W=1; the data offset between C_tensor and C_storage is 0. Therefore, the dimension information corresponding to each data in C_storage can be represented by the following Table 1:

[0059] Table 1

[0060] <![CDATA[C0]]> <![CDATA[C1]]> <![CDATA[C2]]> <![CDATA[C3]]> <![CDATA[C4]]> <![CDATA[C5]]> <![CDATA[C6]]> <![CDATA[C7]]> <![CDATA[C8]]> <![CDATA[C9]]> <![CDATA[C 10 ]]> <![CDATA[C 11 ]]> N 0 0 0 0 0 0 0 0 0 0 0 0 C 0 0 0 0 1 1 1 1 2 2 2 2 H 0 0 1 1 0 0 1 1 0 0 1 1 W 0 1 0 1 0 1 0 1 0 1 0 1

[0061] S320 and processor 110 arrange the data of C_storage to obtain D_storage according to the dimension transformation request.

[0062] Specifically, after receiving the dimension transformation request, processor 110 copies the data from memory space C_storage to memory space D_storage, and then rearranges the data in D_storage according to natural semantic transformation. For example... Figure 3 As shown in E302, processor 110 receives a dimension transformation request, which requires transforming the natural semantics of C_tensor from NCHW to NHWC, and changing the size of D_tensor from [1,3,2,2] to [1,2,2,3]. Therefore, the dimension information corresponding to each data in the memory space D_storage is shown in Table 2.

[0063] Table 2

[0064] <![CDATA[D0]]> <![CDATA[D1]]> <![CDATA[D2]]> <![CDATA[D3]]> <![CDATA[D4]]> <![CDATA[D5]]> <![CDATA[D6]]> <![CDATA[D7]]> <![CDATA[D8]]> <![CDATA[D9]]> <![CDATA[D 10 ]]> <![CDATA[D 11 ]]> N 0 0 0 0 0 0 0 0 0 0 0 0 H 0 0 0 0 0 0 1 1 1 1 1 1 W 0 0 0 1 1 1 0 0 0 1 1 1 C 0 1 2 0 1 2 0 1 2 0 1 2

[0065] Processor 110 searches for the corresponding memory data C_storage[C0,C1,C2,C3,C4,C5,C6,C7,C8,C9,C] based on the dimension information of C_tensor. 10 C 11 For example, the dimension information corresponding to D0 is N=0, H=0, W=0, C=0, which corresponds to C0 in Table (1); the dimension information corresponding to D1 is N=0, H=0, W=0, C=1, which corresponds to C4 according to Table 2. Similarly, rearranging C_storage according to the dimension information will yield D_storage[C0,C4,C8,C1,C5,C9,C2,C6,C] 10 C3, C7, C 11 ].

[0066] S330 and processor 110 generate D_tensor based on D_storage.

[0067] Specifically, the processor 110 generates a D_tensor based on the data arrangement of D_storage, and the D_tensor is as follows: Figure 3 As shown in E303, the data type and number of dimensions of D_tensor are the same as those of C_tensor; because the natural semantics are transformed from NCHW to NHWC, the size of D_tensor changes from [1,3,2,2] to [1,2,2,3]; the natural semantics of D_tensor is NHWC; the data offset between D_tensor and D_storage is 0.

[0068] As can be seen, the general tensor reading method describes the tensor's memory space, dimension number, data type, size, descriptor, and offset. However, performing dimensional transformation of the tensor's natural semantics based on this existing method requires copying the data from the tensor's corresponding memory space. During the copying process, the data is rearranged according to the transformed natural semantics to obtain the transformed memory space, and thus the transformed tensor. However, copying the tensor's memory space incurs time overhead and consumes additional memory.

[0069] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. To improve computational speed and reduce memory overhead, embodiments of this application provide a tensor reading method. This method incorporates descriptions of the data retrieval step size and offset values ​​when describing the tensor. When converting to natural language semantics, the data retrieval step size and offset values ​​can be reset according to the new natural language semantics. Finally, the tensor with the new natural language semantics can be obtained using the new data retrieval step size and offset values, along with the remaining basic information of the tensor. In other words, the tensor reading method provided by this solution uses the original tensor's memory space when reading tensors with different natural language semantics, saving the time spent copying memory data and the additional memory usage. The following describes the specific embodiments of the present invention with reference to the accompanying drawings. Figure 4 The implementation steps of this method are described below.

[0070] S401, Processor 110 obtains storage information of data in memory space.

[0071] Specifically, the processor 110 obtains storage information of data in the memory space of the memory 140, including the stored data and the storage order. The data type of the stored data can be float, half, int, short, char, bool, etc.; the storage order refers to the correspondence between data and physical address space. For example, data can be stored in memory space according to NCL, NCHW, NHWC, or NCHWD. It should be understood that this application does not limit the type of data stored or the type of storage order.

[0072] S402, Processor 110 determines the first data natural semantics of the first tensor.

[0073] Specifically, the processor 110 determines the first natural semantics of the first tensor, whereby the first natural semantics is used to identify the data arrangement of the first tensor. When reading data, various different tensor data can be read from an ordered sequence stored in memory space as needed. These different tensors include tensors with different dimensions and tensors with the same dimensions but different data arrangement orders. The natural semantics are used to describe the data arrangement of the tensor. Tensors of different dimensions correspond to different natural semantics, and tensors with the same dimension but different data arrangement orders also correspond to different natural semantics. For example, for a three-dimensional tensor, the corresponding natural semantics can be any combination of N and CL, while for a four-dimensional tensor, the corresponding natural semantics include any combination of N, C, H, and W, and for a five-dimensional tensor, the corresponding natural semantics are any combination of N, C, W, H, and D. Common natural semantics include NCL, NCHW, NHWC, and NCHWD. When reading the first tensor from memory space, the first natural semantics of the first tensor must first be determined, that is, the data arrangement order in the first tensor being read must be determined.

[0074] S403, the processor 110 determines whether the data arrangement of the first tensor is consistent with the storage order.

[0075] Specifically, the processor 110 determines whether the data arrangement of the first tensor is consistent with the storage order of the data stored in the memory space. For example, the memory space of the memory 140 corresponds to the data arrangement of Natural Language Meaning (NCHW), but the first data natural semantics of the first tensor may require a data arrangement with a different natural semantics than that corresponding to NCHW. Based on the determination result, if the data arrangement of the first tensor is consistent with the storage order, then the following step S4041 is executed.

[0076] S4041, Processor 110 generates the first parameter and reads the first tensor according to the storage order.

[0077] Specifically, when the data arrangement of the first tensor is consistent with the storage order, the processor 110 generates a first parameter according to the storage order. The first parameter includes a first offset value, a first data retrieval step size, a first descriptor, a first size, a first data type, and a first dimension number. The first descriptor describes the relationship between the data arrangement of the first tensor and the first natural semantics. The first data retrieval step size is determined based on the first size and the first dimension number.

[0078] After generating the first parameters, the processor 110 reads the first tensor from the memory 140 according to the first parameters. Reading the first tensor includes the following steps: reading the stored data in the memory space; reading the first data type and the first dimension of the first tensor; reading the first size and the first descriptor of the first tensor; reading the first offset value and the first data retrieval step of the first tensor. The address of the data to be read is obtained according to the first offset and the first data retrieval step, and tensor data of the first size and the first dimension are read sequentially from that data address according to the first descriptor.

[0079] Returning to step S403, if the data arrangement of the first tensor is inconsistent with the storage order, then proceed to step S4032.

[0080] S4042, Processor 110 reads the first tensor according to the correspondence between the first data natural semantics and the stored data.

[0081] Specifically, when the data arrangement of the first tensor is inconsistent with the storage order, the processor 110 generates a first parameter according to the storage order of the data stored in the storage space. For the generation of the first parameter, please refer to step S4041 above, which will not be repeated here.

[0082] The processor 110 converts the first parameter into a second parameter based on the correspondence between the first data natural semantics and the stored data. The correspondence refers to the dimensional or sequential relationship between the first data natural semantics and the storage order. That is, the first data natural semantics and the storage order can have different dimensions, or the same dimensions but different orders. The second parameter includes a second offset value, a second data retrieval step size, a second descriptor, a second size, a second data type, and a second dimension number. The second data type is the same as the first data type. The second dimension number is the same as the first dimension number. The second size, the second offset value, and the second data retrieval step size are obtained by transforming the first natural semantics through the first size, the first offset value, and the first data retrieval step size.

[0083] For example, if the difference between the natural semantics of the first data and the storage order lies in the swapping of the natural semantics of the first and second dimensions, then swapping the first and second dimensions of the first size can yield the second size; swapping the first and second dimensions of the first offset value can yield the second offset value; and swapping the first and second dimensions of the first data retrieval step can yield the second data retrieval step.

[0084] After generating the second parameters, the processor 110 reads the first tensor from the memory 140 according to the second parameters. Reading the first tensor includes the following steps: reading the memory space of the first tensor; reading the second data type and the second dimension of the first tensor; reading the second size and the second descriptor of the first tensor; reading the second offset value and the second data retrieval step size of the first tensor. The address of the data to be read is obtained based on the second offset and the second data retrieval step size. Tensor data of the second size and the second dimension are read from the memory space at that data address according to the second descriptor and the data retrieval step size.

[0085] Optionally, in some embodiments, different tensor data can be read from the memory space according to different natural language semantics. When reading different tensors, the reading method of the unknown tensor can be obtained based on the known tensor data reading method. Specifically, after reading the first tensor, the input device 120 receives a request to read the second tensor using the second data natural language semantics.

[0086] Specifically, input device 120 receives a request to read a second tensor using a second natural language semantics, which identifies the data arrangement of the second tensor. The first and second natural language semantics may have the same dimension but different order; or, the first and second natural language semantics may have different dimensions.

[0087] The processor 110 will convert the second parameter into a third parameter according to the correspondence between the second natural semantics of the data and the first natural semantics of the data, wherein the correspondence refers to the dimensional or order relationship between the first natural semantics of the data and the second natural semantics of the data.

[0088] After generating the third parameters, the processor 110 converts the first tensor into a second tensor based on these third parameters. The third parameters include a third offset, a third data retrieval step, a third descriptor, a third size, a third data type, and a third dimension. The third data type is the same as the second data type; the third dimension is the same as the second dimension; the third size, third offset, and third data retrieval step are obtained by transforming the second data using the second size, second offset, and second data retrieval step, based on the natural semantics of the second data. The address of the data to be read is obtained based on the third offset and third data retrieval step. Tensor data of the third size and third dimension is read from that data address in memory space according to the third descriptor and the data retrieval step.

[0089] In summary, this application provides a method for reading tensors by incorporating the description of the data retrieval step size and offset value. This invention innovatively uses the data retrieval step size, offset, and descriptor to describe tensors with natural semantics, making the data retrieval step size and descriptor no longer mutually exclusive properties of the tensor when describing natural semantics. Based on this method, tensors with different natural semantics can be obtained by resetting new data retrieval step sizes and offset values. The method provided by this application eliminates the need to copy tensor memory space data before converting to natural semantics, saving runtime and memory, thus improving computational speed and reducing memory overhead.

[0090] The following is combined with Figure 5 The method for reading tensors in this application will be illustrated with an example. For example... Figure 5 As shown, assuming the tensor to be read is named X_tensor, where X_tensor represents an image, the tensor X_tensor is stored in Natural Language Characteristic (NCHW) format. To facilitate subsequent data processing by the neural network, the natural language characteristic (NCHW) of X_tensor needs to be read in NHWC format. In this application scenario, as... Figure 5 As shown, the tensor reading method and the natural semantic dimension transformation based on this method provided in this application include the following steps:

[0091] Step 1: Processor 110 acquires data storage information in memory space and determines the first data natural semantics of X_tensor.

[0092] Specifically, the processor 110 obtains storage information of data in the memory space of the memory 140, including the stored data and the storage order. For example... Figure 5 As shown, the processor retrieves the storage information of the data pair from the E501's memory space. This storage information is represented by X_storage, and the data in X_storage is [X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X...]. 10 ,X 11 Furthermore, the aforementioned data is stored in memory in the order of NCHW.

[0093] Step 2: Processor 110 determines the first data natural semantics of X_tensor.

[0094] Specifically, processor 110 determines the first data natural semantics of X_tensor, where, for example, Figure 5 As shown in E503, the first data has a natural semantics of NCHW and uses X_tensor from memory space.

[0095] Step 3: The processor 110 determines whether the data arrangement of the first tensor is consistent with the storage order.

[0096] Specifically, the processor 110 determines that the data arrangement of X_tensor and the storage order are both NCHW, that is, the data arrangement of X_tensor is consistent with the storage order, and the processor 110 will execute the aforementioned step S4031.

[0097] Step 4: The processor 110 generates the first parameter according to the storage order and reads X_tensor.

[0098] Specifically, the processor 110 generates corresponding first parameters based on the natural semantics of the first data, such as... Figure 5 As shown in E505, the first parameter includes: the data in the X_tensor memory space X_storage is [X0,X1,X2,X3,X4,X5,X6,X7,X8,X9,X... 10 ,X 11 The number of dimensions X_dim of X_tensor is 4, the data type X_datatype of X_tensor is set to int32, the size X_size of X_tensor is set to [1,3,2,2], and the descriptor X_format is the relationship between natural semantic NCHW and data arrangement, that is, the 0th dimension of X_tensor corresponds to N, the 1st dimension corresponds to C, the 2nd dimension corresponds to H, and the 3rd dimension corresponds to W; the offset value is X_offset = 0; the elements of X_tensor and X_storage are sequentially mapped, that is, X[0][0][0][0] = 0, X[0][2][1][1] = 11, so the data retrieval stride X_Stride = [12,4,2,1], and the correspondence between the elements X[i][j][k][l] in X_tensor and the corresponding elements in X_storage is:

[0099] X[i][j][k][l]=X_storage[(12*i)+(4*j)+(2*k)+(1*l)] (1)

[0100] The information for each dimension of X_tensor is shown in Table 3:

[0101] Table 3

[0102] 0th dimension First dimension Second dimension The third dimension descriptor N C H W size 1 3 2 2 Data retrieval step size 12 4 2 1

[0103] After the processor 110 generates the first parameter, it will read the X_tensor from the memory 140 according to the first parameter and combine it. Figure 6 The steps for reading X_tensor are explained in detail below:

[0104] Step 4A: Set the memory space X_storage for X_tensor.

[0105] Specifically, such as Figure 6 As shown in E601, the processor 110 sets the memory space corresponding to the data of each element in X_tensor according to the obtained memory space X_storage information. For example... Figure 6 As shown in E602, the elements in X_tensor correspond to the X_storage part in the memory space.

[0106] Step 4B: Set the data type and dimension of X_tensor.

[0107] Specifically, processor 110 sets the dimension of X_tensor to 4 dimensions, and the data type of each element is the same as the data type of elements in the memory space X_storage. Elements in the memory space X_storage are 32-bit integers, i.e., int32. For example... Figure 6 As shown in E603, a three-dimensional tensor can be represented by a cube, and multiple cubes can represent a four-dimensional tensor.

[0108] Step 4C: Set the size and descriptor of X_tensor.

[0109] Specifically, the processor 110 sets the size of each dimension of the X_tensor to [1,3,2,2], and the descriptor of the X_tensor, that is, the natural semantics corresponding to each dimension are N,C,H,W. For example... Figure 6 As shown in E604, since the 0th dimension corresponds to N and the size of the 0th dimension is 1, only the 0th dimension has N=0. The 1st dimension can be represented as three sets of data: C=0, C=1, and C=2. The 2nd dimension can be represented as H=0 and H=1. The 3rd dimension can be represented as W=0 and W=1. For ease of explanation, X_tensor is expanded into three sets of data: C=0, C=1, and C=2.

[0110] Step 4D: Set the offset value of X_tensor and the data retrieval step size.

[0111] Specifically, such as Figure 6 As shown in E605, processor 110 sets the offset value X_offset = 0 and the data stride X_Stride = [12, 4, 2, 1] of X_tensor. That is, in dimension 0, the first and second elements correspond to a 12-element gap in memory space X_storage data, and in dimension 1, the first and second elements correspond to a 4-element gap in memory space X_storage data, and so on. Once each element in X_tensor is determined, the reading of X_tensor is complete.

[0112] Back Figure 5 In step 5, the Y_tensor needs to be read using the second data natural semantics.

[0113] Specifically, such as Figure 6 As shown in E506, the processor 110 receives the second data natural semantics provided by the user, wherein the second data natural semantics refers to converting X_tensor into Y_tensor using a descriptor with natural semantics of NHWC.

[0114] After receiving the second data natural language semantics provided by the user, processor 110 generates a third parameter based on the second data usage request. The third parameter includes the following parameters: data type Y_datatype, number of dimensions Y_dim, size Y_size, descriptor Y_format, offset value Y_offset, and data retrieval step size Y_Stride. Y_datatype is the same as X_datatype; Y_dim is the same as X_dim.

[0115] Because the offset X_offset of X_tensor is 0, Y_offset is 0. Since the natural semantics are converted from NCHW to NHWC (i.e., the first and third dimensions are swapped before the second dimension is swapped), the dimensions of Y_tensor obtained by swapping the first and third dimensions (X_size = [1,3,2,2]) are 1, 2, 2, 3 from highest to lowest, i.e., Y_size = [1,2,2,3]. Through the corresponding dimension stride swaps, the second stride (X_Stride = [12,4,2,1]) is obtained by swapping the first and third dimensions before the second dimension is swapped, resulting in [12,2,1,4]. The correspondence between elements Y[i][j][k][l] in Y_tensor and their corresponding elements in Y_storage is as follows:

[0116] Y[i][j][k][l]=X_storage[(12*i)+(2*j)+(1*k)+(4*l)] (2)

[0117] The information for each dimension of Y_tensor is shown in Table 4:

[0118] Table 4

[0119] 0th dimension First dimension Second dimension The third dimension descriptor N H W C size 1 2 2 3 Data retrieval step size 12 2 1 4

[0120] Step 6: Convert X_tensor to Y_tensor according to the third parameter.

[0121] Specifically, processor 110 obtains the data type Y_datatype, dimension Y_dim, size Y_size, descriptor Y_format, offset Y_offset, and stride Y_Stride from step 5, and reads Y_tensor from the storage area of ​​X_tensor. Reading Y_tensor includes the following steps: reading the memory space X_storage of Y_tensor; reading the data type Y_datatype and dimension Y_dim; reading the size Y_size and descriptor Y_format of X_tensor; and reading the offset Y_offset and stride Y_Stride of X_tensor. For example... Figure 6 As shown in E507, Y_tensor is obtained based on the third parameter. For the specific implementation process, please refer to step 4, which is the process of reading X_tensor. It will not be repeated here.

[0122] To illustrate the difference between the natural semantics of the second data and the natural semantics of the first data, the following explanation uses the natural semantics of the second data as the NCL.

[0123] Step 7: Receive the Y_tensor that needs to be read using the second data natural semantics.

[0124] Specifically, the processor 110 receives a second data natural semantics provided by the user, wherein the second data natural semantics refers to converting X_tensor into Z_tensor using a descriptor with natural semantics of NCL.

[0125] After receiving the second data natural language semantics provided by the user, processor 110 generates a third parameter based on the second data usage request. The third parameter includes the data type Z_datatype, the number of dimensions Z_dim, the size Z_size, the descriptor Z_format, the offset value Z_offset, and the data retrieval step size Z_Stride. Y_datatype is the same as X_datatype; Y_dim is the same as X_dim.

[0126] Since the offset value X_offset of X_tensor is 0, Z_offset is 0. Since the natural semantics is converted from NCHW to NCL, that is, after merging the second and third dimensions, it is represented by L. Therefore, the dimensions of Z_tensor obtained by merging the second and third dimensions from X_size is [1,3,2,2] are 1, 3, and 4 respectively, that is, Z_size is [1,3,4]. By swapping the data stride of the corresponding dimensions, Z_Stride[12,4,2,1] is obtained by merging the second and third dimensions.

[0127] The information for each dimension of Z_tensor is shown in Table 5:

[0128] Table 5

[0129] 0th dimension First dimension Second dimension descriptor N C L size 1 3 4 Data retrieval step size 12 4 1

[0130] Step 8: Convert X_tensor to Z_tensor according to the third parameter.

[0131] Specifically, processor 110 reads the Z_tensor from the storage area of ​​X_tensor based on the data type Z_datatype, dimension Z_dim, size Z_size, descriptor Z_format, offset Z_offset, and stride Z_Stride obtained in step 7. Reading X_tensor includes the following steps: reading the memory space X_storage of the Z_tensor; reading the data type Z_datatype and dimension Z_dim; reading the size Z_size and descriptor Z_format of the Z_tensor; and reading the offset Z_offset and stride Z_Stride of the Z_tensor. The specific implementation process can be found in step 4, which describes the process of reading X_tensor, and will not be repeated here.

[0132] In summary, this application provides a method for reading tensors by incorporating descriptions of the data retrieval step size and offset values. Based on this method, tensors with different natural language meanings can be obtained by resetting the data retrieval step size and offset values. The method provided in this application eliminates the need to copy tensor memory space data before converting natural language meaning, saving runtime and memory, thus improving computational speed and reducing memory overhead.

[0133] The methods of the embodiments of this application have been described in detail above. In order to facilitate better implementation of the above-described solutions of the embodiments of this application, relevant equipment for cooperating in implementing the above solutions is also provided below.

[0134] This application also provides, for example Figure 7 The illustration shows a tensor reading device 700, which is used to perform the aforementioned tensor reading method. This application does not limit the division of functional units in the tensor reading device 700; the various units in the tensor reading device can be added, reduced, or merged as needed. Figure 7 An exemplary division of functional units is provided: a tensor reading device 700 includes an acquisition unit 710, a determination unit 720, and a reading unit 730, wherein,

[0135] The acquisition unit 710 is used to acquire storage information of data in the memory space, the storage information including the stored data and the storage order;

[0136] The determining unit 720 is used to determine the first data natural semantics of the first tensor, and the first data natural semantics is used to identify the data arrangement of the first tensor.

[0137] The reading unit 730 is used to read the first tensor from the memory space according to the correspondence between the natural semantics of the first data and the stored data when the data arrangement of the first tensor is inconsistent with the storage order.

[0138] In some embodiments, the tensor reading device may further include a conversion unit 740:

[0139] The conversion unit 740 is used to convert the first tensor into the second tensor based on the third parameter, wherein the third parameter includes a third offset value, a third data retrieval step, and a third descriptor.

[0140] In summary, this application provides a tensor reading device that incorporates descriptions of the data retrieval step size and offset value when reading tensors. Based on this method, tensors with different natural language meanings can be obtained by resetting the data retrieval step size and offset value. The method provided in this application eliminates the need to copy tensor memory space data before converting natural language meaning, saving runtime and memory, thus improving computational speed and reducing memory overhead.

[0141] It is understood that the functions of each program module of the device for determining hardware performance in the embodiments of this application can be specifically implemented according to the methods in the above method embodiments, and the specific implementation process can be referred to the relevant descriptions in the above method embodiments, which will not be repeated here.

[0142] This application also provides a computer storage medium storing a computer program for electronic data interchange, which causes a computer to perform some or all of the steps of any of the methods described in the above method embodiments.

[0143] This application also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments. This computer program product can be a software installation package.

[0144] Figure 8 This is a structural diagram illustrating a combined processing apparatus 800 according to an embodiment of this disclosure. Figure 8As shown, the combined processing device 800 includes a computing processing device 802, an interface device 804, other processing devices 806, and a storage device 808. Depending on the application scenario, the computing processing device may include one or more computing devices 810, which can be configured to perform the tasks described herein. Figure 4 The described operation.

[0145] In different embodiments, the computing processing apparatus disclosed herein can be configured to perform user-specified operations. In exemplary applications, the computing processing apparatus can be implemented as a single-core artificial intelligence processor or a multi-core artificial intelligence processor. Similarly, one or more computing devices included within the computing processing apparatus can be implemented as an artificial intelligence processor core or a portion of the hardware structure of an artificial intelligence processor core. When multiple computing devices are implemented as artificial intelligence processor cores or portions of the hardware structure of artificial intelligence processor cores, the computing processing apparatus disclosed herein can be considered to have a single-core structure or a homogeneous multi-core structure.

[0146] In an exemplary operation, the computing processing device disclosed herein can interact with other processing devices through an interface device to jointly complete user-specified operations. Depending on the implementation, the other processing devices disclosed herein may include one or more types of processors 110, such as a central processing unit (CPU), a graphics processing unit (GPU), or an artificial intelligence processor, and other general-purpose and / or special-purpose processors. These processors may include, but are not limited to, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., and their number can be determined according to actual needs. As mentioned above, the computing processing device disclosed herein can be considered to have a single-core structure or a homogeneous multi-core structure. However, when the computing processing device and other processing devices are considered together, they can be considered to form a heterogeneous multi-core structure.

[0147] In one or more embodiments, the other processing device may serve as an interface between the computing processing device disclosed herein (which may be specifically embodied in artificial intelligence, such as neural network operations) and external data and control, performing basic controls including but not limited to data transfer, starting and / or stopping the computing device. In another embodiment, the other processing device may also cooperate with the computing processing device to jointly complete computational tasks.

[0148] In one or more embodiments, the interface device can be used to transfer data and control commands between a computing processing device and other processing devices. For example, the computing processing device can obtain input data from other processing devices via the interface device and write it to a storage device (or memory 140) on the computing processing device chip. Further, the computing processing device can obtain control commands from other processing devices via the interface device and write them to a control cache on the computing processing device chip. Alternatively or optionally, the interface device can also read data from the storage device of the computing processing device and transmit it to other processing devices.

[0149] Additionally or optionally, the combined processing apparatus disclosed herein may further include a storage device. As shown in the figures, the storage device is connected to both the computing processing device and the other processing device. In one or more embodiments, the storage device may be used to store data from the computing processing device and / or the other processing device. For example, the data may be data that cannot be fully stored in the internal or on-chip storage of the computing processing device or other processing device.

[0150] In some embodiments, this disclosure also discloses a neural network chip (e.g. Figure 9 The chip shown is 902. In one implementation, the chip is a system-on-chip (SoC) and integrates one or more such... Figure 8 The combined processing unit shown is illustrated. This chip can be connected to external interface devices (such as...). Figure 9 The external interface device 906 shown is connected to other related components. These related components may be, for example, a camera, monitor, mouse, keyboard, network card, or Wi-Fi interface. In some applications, the chip may integrate other processing units (e.g., video codecs) and / or interface modules (e.g., DRAM interfaces). In some embodiments, this disclosure also discloses a chip package structure that includes the aforementioned chip. In some embodiments, this disclosure also discloses a board that includes the aforementioned chip package structure. The following will be combined with… Figure 9 This board is described in detail.

[0151] Figure 9This is a schematic diagram illustrating the structure of a board 900 according to an embodiment of this disclosure. The board 900 is used to perform the above-described method steps for reading tensors. Figure 9 As shown, the board includes a storage device 904 for storing data, which includes one or more storage cells 910. This storage device can be connected and transmit data with the controller 908 and the aforementioned chip 902 via, for example, a bus. Furthermore, the board also includes an external interface device 906, configured for data relay or switching between the chip (or a chip in a chip package) and an external device 912 (e.g., a server or computer). For example, data to be processed can be transferred from the external device to the chip via the external interface device. Alternatively, the calculation results of the chip can be transmitted back to the external device via the external interface device. Depending on the application scenario, the external interface device can have different interface forms, such as a standard PCIe interface.

[0152] In one or more embodiments, the controller in the disclosed board can be configured to regulate the state of the chip. Therefore, in one application scenario, the controller may include a microcontroller (MCU) for regulating the operating state of the chip.

[0153] Based on the above combination Figure 8 and Figure 9 Based on the description, those skilled in the art will understand that this disclosure also discloses an electronic device or apparatus that may include one or more of the aforementioned boards, one or more of the aforementioned chips, and / or one or more of the aforementioned combined processing apparatus.

[0154] Depending on the application scenario, the electronic devices or apparatus disclosed herein may include servers, cloud servers, server clusters, data processing devices, robots, computers, printers, scanners, tablets, smart terminals, PC devices, IoT terminals, mobile terminals, mobile phones, dashcams, navigators, sensors, cameras, video cameras, projectors, watches, headphones, mobile storage, wearable devices, visual terminals, autonomous driving terminals, vehicles, home appliances, and / or medical devices. The vehicles include airplanes, ships, and / or vehicles; the home appliances include televisions, air conditioners, microwave ovens, refrigerators, rice cookers, humidifiers, washing machines, lights, gas stoves, and range hoods; the medical devices include MRI scanners, ultrasound machines, and / or electrocardiographs. The electronic devices or apparatus disclosed herein can also be applied in fields such as the Internet, IoT, data centers, energy, transportation, public management, manufacturing, education, power grids, telecommunications, finance, retail, construction sites, and healthcare. Furthermore, the electronic devices or apparatus disclosed herein can also be used in application scenarios related to artificial intelligence, big data, and / or cloud computing, such as cloud computing, edge computing, and terminal applications. In one or more embodiments, the high-computing-power electronic devices or apparatuses according to the present disclosure can be applied to cloud devices (e.g., cloud servers), while the low-power electronic devices or apparatuses can be applied to terminal devices and / or edge devices (e.g., smartphones or cameras). In one or more embodiments, the hardware information of the cloud devices and the hardware information of the terminal devices and / or edge devices are compatible with each other, so that suitable hardware resources can be matched from the hardware resources of the cloud devices to simulate the hardware resources of the terminal devices and / or edge devices based on the hardware information of the terminal devices and / or edge devices, so as to complete the unified management, scheduling and collaborative work of end-to-cloud or cloud-edge-end integration.

[0155] It should be noted that, for the sake of brevity, this disclosure describes some methods and their embodiments as a series of actions and combinations thereof. However, those skilled in the art will understand that the solutions disclosed herein are not limited by the order of the described actions. Therefore, based on the disclosure or teachings of this document, those skilled in the art will understand that some steps can be performed in a different order or simultaneously. Furthermore, those skilled in the art will understand that the embodiments described in this disclosure can be considered optional embodiments, that is, the actions or modules involved are not necessarily essential for the implementation of one or more solutions disclosed herein. In addition, depending on the solution, the description of some embodiments in this disclosure may have different emphases. In view of this, those skilled in the art will understand that parts not described in detail in a certain embodiment of this disclosure can also be referred to the relevant descriptions of other embodiments.

[0156] In terms of specific implementation, based on the disclosure and teachings of this document, those skilled in the art will understand that several embodiments disclosed herein can also be implemented in other ways not disclosed herein. For example, regarding the various units in the electronic device or apparatus embodiments described above, this document divides them based on logical functions, but in actual implementation, there may be other division methods. As another example, multiple units or components can be combined or integrated into another system, or some features or functions in a unit or component can be selectively disabled. Regarding the connection relationships between different units or components, the connections discussed above in conjunction with the accompanying drawings can be direct or indirect couplings between units or components. In some scenarios, the aforementioned direct or indirect couplings involve communication connections utilizing interfaces, where the communication interface can support electrical, optical, acoustic, magnetic, or other forms of signal transmission.

[0157] In this disclosure, the units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units. The aforementioned components or units may be located in the same location or distributed across multiple network units. Furthermore, depending on actual needs, some or all of the units can be selected to achieve the purpose of the solution described in the embodiments of this disclosure. Additionally, in some scenarios, multiple units in the embodiments of this disclosure may be integrated into one unit or each unit may exist physically independently.

[0158] In some implementation scenarios, the integrated unit described above can be implemented as a software program module. If implemented as a software program module and sold or used as an independent product, the integrated unit can be stored in the computer-readable storage memory 140. Therefore, when the solution disclosed herein is embodied in the form of a software product (e.g., a computer-readable storage medium), the software product can be stored in the storage memory 140, which may include several instructions to cause a computer device (e.g., a personal computer, server, or network device) to execute some or all of the steps of the method described in the embodiments of this disclosure. The aforementioned storage memory 140 may include, but is not limited to, various media capable of storing program code, such as a USB flash drive, flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.

[0159] In other implementation scenarios, the integrated units described above can also be implemented in hardware, i.e., as specific hardware circuits, which may include digital circuits and / or analog circuits. The physical implementation of the hardware structure of the circuit may include, but is not limited to, physical devices, which may include, but are not limited to, transistors or memristors. Therefore, the various devices described herein (e.g., computing devices or other processing devices) can be implemented by appropriate hardware processors 110, such as CPUs, GPUs, FPGAs, DSPs, and ASICs. Furthermore, the aforementioned storage unit or storage device can be any suitable storage medium (including magnetic storage medium or magneto-optical storage medium, etc.), such as resistive random access memory (RRAM), dynamic random access memory (DRAM), static random access memory (SRAM), enhanced dynamic random access memory (EDRAM), high bandwidth memory (HBM), hybrid memory cube (HMC), ROM, and RAM, etc.

[0160] The foregoing can be better understood in accordance with the following terms:

[0161] Clause A1. A method for reading a tensor, comprising:

[0162] Obtain storage information of data in memory space, the storage information including stored data and storage order;

[0163] Determine the first data natural semantics of the first tensor, which is used to identify the data arrangement of the first tensor;

[0164] If the data arrangement of the first tensor is inconsistent with the storage order, the first tensor is read from the memory space according to the correspondence between the natural semantics of the first data and the stored data.

[0165] Clause A2. According to the method described in Clause A1, when the data arrangement of the first tensor is consistent with the storage order, a first parameter is generated according to the storage order, wherein the first parameter includes a first offset value, a first data retrieval step size, and a first descriptor;

[0166] Read the first tensor based on the first parameter.

[0167] Clause A3. The method described in accordance with Clause A2,

[0168] The first parameter further includes: a first size, a first data type, and a first dimension, wherein the first data type is consistent with the data type of the data in the memory space;

[0169] The first descriptor is used to describe the relationship between the data arrangement of the first tensor and the first natural semantics;

[0170] The first data acquisition step size is determined based on the first size and the first dimension.

[0171] Clause A4. According to the method described in Clause A3, the step of reading the first tensor from the memory space based on the correspondence between the natural semantics of the first data and the stored data when the data arrangement of the first tensor is inconsistent with the storage order includes:

[0172] The first parameter is generated according to the storage order;

[0173] The first parameter is transformed into a second parameter based on the natural semantics of the first data. The second parameter includes a second offset value, a second data retrieval step size, and a second descriptor.

[0174] The first tensor is read according to the second parameter.

[0175] Clause A5. Determine a second data natural semantics according to the method described in Clause A4, the second data natural semantics being used to identify the data arrangement of the second tensor;

[0176] Based on the correspondence between the natural semantics of the second data and the natural semantics of the first data, the second parameter is converted into the third parameter;

[0177] The first tensor is converted into the second tensor based on the third parameter, wherein the third parameter includes a third offset value, a third data retrieval step, and a third descriptor.

[0178] Clause A6. According to the method described in Clause A5, the second parameter further includes: a second size, a second number of dimensions, and a second data type;

[0179] The third parameter also includes: third size, third dimension number, and third data type;

[0180] The second and third data types are consistent with the data types of the data in the memory space.

[0181] Clause A7. The method described in accordance with Clause A6,

[0182] The first data's natural semantics and the second data's natural semantics have the same dimensions but different orders; or,

[0183] The natural semantics of the first data and the natural semantics of the second data have different dimensions.

[0184] Clause A8. A tensor reading device, comprising: an acquisition unit, a determination unit, and a reading unit:

[0185] The acquisition unit is used to acquire storage information of data in memory space, the storage information including stored data and storage order;

[0186] The determining unit is used to determine the first data natural semantics of the first tensor, and the first data natural semantics is used to identify the data arrangement of the first tensor.

[0187] The reading unit is used to read the first tensor from the memory space according to the correspondence between the natural semantics of the first data and the stored data when the data arrangement of the first tensor is inconsistent with the storage order.

[0188] Clause A9. According to the method described in Clause A8, the tensor reading device further includes: a conversion unit:

[0189] The conversion unit is used to convert the first tensor into the second tensor based on the third parameter, wherein the third parameter includes a third offset value, a third data retrieval step, and a third descriptor.

[0190] Clause A10. An electronic device, characterized in that the electronic device includes a tensor reading device that performs the method as described in any one of Clauses A1-A7.

[0191] Clause A11. A computer-readable storage medium, characterized in that the computer-readable storage medium stores instructions that, when executed on a computer, cause the computer to perform the method as described in any one of Clauses A1-A7.

[0192] While numerous embodiments of this disclosure have been shown and described herein, it will be apparent to those skilled in the art that the embodiments described above are provided by way of example only. Many modifications, alterations, and alternatives will arise for those skilled in the art without departing from the spirit and intent of this disclosure. It should be understood that various alternatives to the embodiments of this disclosure described herein may be employed in the practice of this disclosure. The appended claims are intended to define the scope of this disclosure and therefore cover equivalents or alternatives within the scope of these claims.

Claims

1. A method of reading a tensor, characterized by, The method is applied to an electronic device and comprises: obtaining storage information of data in a memory space, the storage information comprising stored data and a storage order; determining a first data natural semantic of a first tensor, the first data natural semantic being used to identify data arrangement of the first tensor; in a case where the data arrangement of the first tensor is inconsistent with the storage order, reading the first tensor from the memory space according to a corresponding relationship between the first data natural semantic and the stored data; wherein, in the case where the data arrangement of the first tensor is inconsistent with the storage order, the reading of the first tensor from the memory space according to the corresponding relationship between the first data natural semantic and the stored data comprises: generating a first parameter according to the storage order, wherein the first parameter comprises a first offset value, a first data fetching stride and a first descriptor; converting the first parameter into a second parameter according to the first data natural semantic, wherein the second parameter comprises a second offset value, a second data fetching stride and a second descriptor; reading the first tensor according to the second parameter.

2. The method of claim 1, wherein, The method further comprises: in a case where the data arrangement of the first tensor is consistent with the storage order, generating a first parameter according to the storage order, reading the first tensor according to the first parameter.

3. The method according to claim 2, wherein: the first parameter further comprises a first size, a first data type and a first dimension number, wherein the first data type is consistent with a data type of data in the memory space; the first descriptor is used to describe a relationship between the data arrangement of the first tensor and the first natural semantic; the first data fetching stride is determined based on the first size and the first dimension number.

4. The method of claim 1, wherein, The method further comprises: determining a second data natural semantic, the second data natural semantic being used to identify data arrangement of a second tensor; converting a second parameter into a third parameter according to a corresponding relationship between the second data natural semantic and the first data natural semantic; converting the first tensor into the second tensor based on the third parameter, wherein the third parameter comprises a third offset value, a third data fetching stride and a third descriptor.

5. The method according to claim 4, wherein: the second parameter further comprises a second size, a second dimension number and a second data type; the third parameter further comprises a third size, a third dimension number and a third data type; wherein the second data type and the third data type are consistent with the data type of data in the memory space.

6. The method according to claim 5, wherein: the first data natural semantic and the second data natural semantic are of the same dimension but different orders; or the first data natural semantic and the second data natural semantic are of different dimensions.

7. A reading device of a tensor, characterized by, The tensor reading device comprises an obtaining unit, a determining unit and a reading unit: the obtaining unit is used to obtain storage information of data in a memory space, the storage information comprising stored data and a storage order; the determining unit is used to determine a first data natural semantic of a first tensor, the first data natural semantic being used to identify data arrangement of the first tensor; The determining unit is configured to determine a first data natural semantic of the first tensor, the first data natural semantic being used to identify a data arrangement of the first tensor; The reading unit is configured to read the first tensor from the memory space according to a correspondence between the first data natural semantic and the stored data when the data arrangement of the first tensor is inconsistent with the storage order; The reading the first tensor from the memory space according to the correspondence between the first data natural semantic and the stored data when the data arrangement of the first tensor is inconsistent with the storage order comprises: generating a first parameter according to the storage order, wherein the first parameter comprises a first offset value, a first data reading stride and a first descriptor; converting the first parameter into a second parameter according to the first data natural semantic, wherein the second parameter comprises a second offset value, a second data reading stride and a second descriptor; reading the first tensor according to the second parameter.

8. The apparatus of claim 7, wherein, The tensor reading apparatus further comprises a converting unit. The converting unit is configured to convert a first tensor into a second tensor based on a third parameter, wherein the third parameter comprises a third offset value, a third data reading stride and a third descriptor.

9. An electronic device, comprising: The electronic device comprises a tensor reading apparatus, and the tensor reading apparatus performs the method according to any one of claims 1-6.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores instructions, and when the instructions are run on the computer, the computer is caused to perform the method according to any one of claims 1-6.

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