Power converter and control circuit therefor

Abstract

A control circuit of a switching power converter for generating a control signal to control a switching transistor in the power converter, the control circuit comprising: a comparator, a slope compensation circuit for generating a slope compensation signal and applying to a first input terminal or a second input terminal of the comparator; a turn-on time generating circuit for generating a turn-on time signal; a control signal generating circuit for generating the control signal according to the comparison signal and the turn-on time signal to control the switching transistor in the power converter; wherein the slope compensation circuit outputs a slope compensation signal with a first slope during a demagnetization period of an inductor current when the power converter operates in a continuous conduction mode, and outputs a slope compensation signal with a second slope during the demagnetization period of the inductor current and a zero current period when the power converter operates in a discontinuous conduction mode, the first slope being greater than the second slope.

Description

Technical Field

[0001] This application relates primarily to power electronics technology, and in particular to a power converter and its control circuit. Background Technology

[0002] Constant on-time control is widely used in power converters due to its excellent dynamic response speed and high efficiency under light load.

[0003] Constant on-time control offers excellent dynamic response and light-load efficiency, but it places high demands on the shape of the output voltage ripple. However, large voltage ripple can adversely affect the load. Existing technologies generally mitigate this issue by superimposing a slope compensation signal onto the feedback signal or voltage reference. The slope compensation signal is typically generated by current source charging and discharging or RC oscillation.

[0004] Meanwhile, to make the power converter more applicable, it needs to maintain stable operation in both continuous current mode (CCM) and discontinuous current mode (DCM). However, in discontinuous current mode, power converters that introduce slope compensation signals for control often experience false triggering, affecting stability.

[0005] Application content

[0006] The technical problem to be solved by this application is to provide a power converter and its control circuit and control method, so as to achieve stable operation of the power converter in both continuous inductor current mode and discontinuous inductor current mode.

[0007] To address the aforementioned technical problems, this application provides a control circuit for a switching power converter, used to generate a control signal to control a switching transistor located in the power converter. The control circuit includes: a comparator having a first input terminal, a second input terminal, and an output terminal; the first input terminal is used to input a reference signal, the second input terminal is used to input a feedback signal, and the output terminal is used to output a comparison signal; the feedback signal is obtained based on the output voltage; a slope compensation circuit for generating a slope compensation signal and applying it to the first or second input terminal of the comparator; a conduction time generation circuit for starting a timer based on the comparison signal or the control signal to generate a conduction timing signal; and a control signal generation circuit for generating a control signal based on the comparison signal and the conduction timing signal to control the switching transistor in the power converter; wherein, when the power converter operates in continuous inductor current mode, the slope compensation circuit outputs a slope compensation signal with a first slope during inductor current demagnetization, and when the power converter operates in discontinuous inductor current mode, it outputs a slope compensation signal with a second slope during inductor current demagnetization and zero current periods, wherein the first slope is greater than the second slope.

[0008] In one embodiment of this application, the slope compensation circuit further includes an operating mode detection circuit, which is used to detect the operating mode of the power converter in the current cycle and output a mode detection result signal to the slope compensation circuit.

[0009] In one embodiment of this application, the mode detection circuit includes a zero-crossing detector. The zero-crossing detector is used to detect whether the inductor current of the power converter crosses zero in the current cycle. If the zero-crossing detector detects that the inductor current of the power converter has crossed zero in the current cycle, it outputs the mode detection result signal to indicate that the power converter is operating in discontinuous inductor current mode. If the zero-crossing detector detects that the inductor current of the power converter has not crossed zero in the current cycle, it outputs the mode detection result signal to indicate that the power converter is operating in continuous inductor current mode. In one embodiment of this application, the zero-crossing detector includes: a first comparator having a first terminal, a second terminal, and an output terminal, wherein the first terminal receives a sensing signal characterizing the inductor current of the power converter, the second terminal receives a zero-crossing detection threshold, and the output terminal outputs a zero-crossing indication signal; a first delay module receiving the zero-crossing indication signal and generating a delayed zero-crossing indication signal by delaying the zero-crossing indication signal; a first AND logic gate having two input terminals and an output terminal, wherein the two input terminals respectively receive the zero-crossing indication signal and the delayed zero-crossing indication signal, and the output terminal outputs a zero-crossing detection result; and a sample-and-hold module sampling at the end of each operating cycle and holding the zero-crossing detection result at other times, and outputting the pattern detection result signal.

[0010] In one embodiment of this application, the slope compensation circuit switches the slope compensation signal between the first slope and the second slope in the next operating cycle after detecting a change in the operating current mode.

[0011] In one embodiment of this application, the slope compensation circuit includes: a compensation capacitor having a compensation signal terminal and a ground terminal, the ground terminal being connected to a reference ground; a first charging branch for controllably charging the compensation capacitor with a first current; a first discharging branch for controllably discharging a second current from the compensation capacitor; and a second discharging branch for controllably discharging a third current from the compensation capacitor, wherein the second discharging branch operates when the power converter is operating in continuous inductor current mode and does not operate when the power converter is operating in discontinuous inductor current mode.

[0012] In one embodiment of this application, the control circuit further includes an enable circuit, wherein the enable circuit includes an AND logic gate having two input terminals that receive a mode detection result signal and the control signal respectively, and the output terminal of the AND logic gate outputs an enable signal. The enable circuit is used to disable the second discharge branch when the mode detection result signal indicates that the power converter is operating in the discontinuous inductor current mode and during the period of inductor current demagnetization or zero current.

[0013] In another embodiment of this application, the slope compensation circuit includes: a compensation capacitor having a compensation signal terminal and a ground terminal, the ground terminal being connected to a reference ground; a first charging branch for controllably charging the compensation capacitor with a first current; and a first adjustable discharge branch, wherein the first adjustable discharge branch discharges the compensation capacitor with a second discharge current when the power converter is operating in the continuous inductor current mode, and discharges the compensation capacitor with a third discharge current when the power converter is operating in the discontinuous inductor current mode, the second discharge current being greater than the third discharge current.

[0014] In another embodiment of this application, the control circuit further includes a discharge current adjustment circuit, which includes an AND gate and a single-pole double-throw switch. The AND gate has two input terminals that receive a mode detection result signal and the control signal, respectively. The output terminal of the AND gate controls the single-pole double-throw switch to switch between a first current reference and a second current reference. The first current reference and the second current reference are used to set the second discharge current and the third discharge current, respectively. The discharge current adjustment circuit is used to select the second current reference when the mode detection result signal indicates that the power converter is operating in discontinuous inductor current mode and is within the demagnetization or zero current period.

[0015] This application also provides a switching power converter, comprising: a switching transistor; a control circuit for generating a control signal to control the switching transistor, the control circuit comprising: a comparator having a first input terminal, a second input terminal, and an output terminal, the first input terminal being used to input a reference signal, the second input terminal being used to input a feedback signal, and the output terminal being used to output a comparison signal; the feedback signal being obtained based on the output voltage; a slope compensation circuit for generating a slope compensation signal and applying it to the first input terminal or the second input terminal of the comparator; a conduction time generation circuit for starting a timing based on the comparison signal or the control signal to generate a conduction timing signal; and a control signal generation circuit for generating a control signal based on the comparison signal and the conduction timing signal to control the power switching transistor in the power converter; wherein, when the power converter operates in continuous inductor current mode, the slope compensation circuit outputs a slope compensation signal with a first slope during inductor current demagnetization, and when the power converter operates in discontinuous inductor current mode, it outputs a slope compensation signal with a second slope during inductor current demagnetization and zero current periods, the first slope being greater than the second slope.

[0016] Compared with the prior art, this application has the following advantages: The power converter of this application can achieve stable operation in both continuous inductor current mode and discontinuous inductor current mode by adjusting the discharge slope of the slope compensation circuit under different operating conditions. Attached Figure Description

[0017] The accompanying drawings are included to provide a further understanding of this application. They form part of this application, illustrate embodiments of the application, and, together with this specification, serve to explain the principles of the application. In the drawings:

[0018] Figure 1 This is a schematic diagram of the circuit structure of a power converter according to an embodiment of this application.

[0019] Figure 2 This is a waveform diagram of the power converter in CCM mode according to an embodiment of this application.

[0020] Figure 3A This is a waveform diagram of the power converter in ideal operating state under DCM mode.

[0021] Figure 3B This is a schematic diagram showing the equivalent series resistance and equivalent series inductance of the output capacitor in the output circuit of a power converter.

[0022] Figure 3C This is a waveform diagram showing a false triggering situation of the power converter in DCM mode.

[0023] Figure 4 This is a schematic diagram of the slope compensation circuit according to an embodiment of this application.

[0024] Figure 5 This is a schematic diagram of the mode detection circuit of a power converter according to an embodiment of this application.

[0025] Figure 6 This is a schematic diagram of the enable circuit in a power converter according to an embodiment of this application.

[0026] Figure 7 This is a schematic diagram of the slope compensation circuit according to an embodiment of this application.

[0027] Figure 8 This is a waveform diagram of the circuit operation state of a power converter according to an embodiment of the present application, showing the adjustable discharge slope of the ramp compensation signal in DCM mode.

[0028] Figure 9 This is a waveform diagram of the circuit operation state of a power converter according to an embodiment of the present application, in which the discharge slope of the ramp compensation signal is adjustable under DCM mode.

[0029] Figure 10 This is a waveform diagram of the circuit operation state of a power converter according to an embodiment of the present application, in which the discharge slope of the ramp compensation signal is adjustable under DCM mode. Detailed Implementation

[0030] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0031] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein, and therefore this application is not limited to the specific embodiments disclosed below.

[0032] As indicated in this application, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" do not specifically refer to the singular and may also include the plural. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of explicitly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

[0033] Furthermore, it should be noted that the use of terms such as "first" and "second" to define components is merely for the purpose of distinguishing the corresponding components. Unless otherwise stated, these terms have no special meaning and therefore should not be construed as limiting the scope of protection of this application. In addition, although the terminology used in this application is selected from commonly known and used terms, some terms mentioned in this application's specification may have been chosen by the applicant according to his or her judgment, and their detailed meanings are explained in the relevant sections of this description. Moreover, this application should be understood not only through the actual terms used, but also through the meaning implied by each term.

[0034] It should be understood that when a component is referred to as "on another component," "connected to another component," "coupled to another component," or "in contact with another component," it can be directly on, connected to, coupled to, or in contact with that other component, or there may be an intervening component. In contrast, when a component is referred to as "directly on another component," "directly connected to," "directly coupled to," or "directly in contact with" another component, there is no intervening component. Similarly, when a first component is referred to as "electrically contacting" or "electrically coupled to" a second component, there is an electrical path between the first and second components that allows current to flow. This electrical path may include capacitors, coupled inductors, and / or other components that allow current to flow, even if there is no direct contact between the conductive components.

[0035] The embodiments of this application describe a power converter and its control circuit and control method.

[0036] Figure 1 This is a schematic diagram of the circuit structure of a power converter according to an embodiment of this application. Figure 1 Figure (a) shows the switching circuit included in the power converter, which includes a switching transistor. Figure 1 Figure (b) shows the control circuit of the power converter. For example... Figure 1 As shown in Figure (a), the switching transistors in the switching circuit may specifically include a first switching transistor M1 and a second switching transistor M2 connected in series. Specifically, the first switching transistor M1 and the second switching transistor M2 each have a source, a gate, and a drain. The source of the first switching transistor M1 and the drain of the second switching transistor M2 are connected to form a node N1. In one embodiment, the node N1, where the first switching transistor M1 and the second switching transistor M2 are connected in series, is connected to an output inductor L1 and an output capacitor C1. The first end of the output inductor L1 is coupled to node N1, and the second end of L1 is connected to the first end of the output capacitor C1, which is grounded.

[0037] Continue to refer to Figure 1 In Figure (a), the drain of the first switching transistor M1 in the switching circuit receives the input voltage VIN. The source of the second switching transistor is grounded. The voltage across the first terminal of the output capacitor C1 is the output voltage VOUT. The gates of the first switching transistor M1 and the second switching transistor M2 are used to receive the first control signal HSPWM and the second control signal LSPWM, respectively. The types of the first switching transistor M1 and the second switching transistor M2 can be selected as needed, for example, as NMOS switching transistors.

[0038] like Figure 1 As shown in Figure (b), in one embodiment, the control circuit of the power converter includes a comparator COM1, a slope compensation circuit, an on-time generation circuit, and a control signal generation circuit. The control circuit of the power converter may also include a minimum off-time generation circuit and logic circuits.

[0039] refer to Figure 1 In Figure (b), comparator COM1 has a first input, a second input, and an output. The first input receives the reference signal VREF. The second input receives the feedback signal VFB.

[0040] A ramp compensation circuit generates a ramp compensation signal VRAMP and applies it to either the first or second input of the comparator. A conduction time generation circuit starts timing based on the comparison signal or the control signal, generating a conduction timing signal.

[0041] In some embodiments, the slope compensation circuit includes a compensation capacitor. The slope compensation circuit may also include a current source and a switch.

[0042] The control signal generation circuit generates a control signal Gate_on based on the comparison signal and the turn-on timing signal, which is used to control the switching transistors in the power converter. Based on the control signal Gate_on, a control signal HSPWM and a second control signal LSPWM are generated to control the first switching transistor M1 and the second switching transistor M2, respectively.

[0043] The minimum turn-off time generation circuit overcomes the parasitic capacitance of components in the control circuit, such as switching transistors. It prevents the power converter circuit from turning back on before the output voltage has reached zero when it is turned off, thus avoiding circuit losses, conducted radiation interference, or damage to circuit components.

[0044] Logic circuit 102 includes a first input terminal, a second input terminal, and an output terminal. The first input terminal of the logic circuit is coupled to the output terminal of comparator COM1 and receives a comparison signal. The second input terminal of the logic circuit is coupled to the output terminal of the minimum off-time generation circuit and receives a minimum off-time signal. The output terminal of logic circuit 102 is coupled to the input terminal of the on-time generation circuit. The output terminal of the on-time generation circuit generates an on-time signal PWM. The on-time signal PWM is passed through a driver circuit to generate a first control signal HSPWM and a second control signal LSPWM. The first control signal HSPWM and the second control signal LSPWM control the on and off states of the first switch M1 and the second switch M2, respectively. The feedback signal VFB is obtained based on the output voltage VOUT. For example, the output voltage VOUT is passed through a voltage divider resistor network to obtain the feedback signal VFB.

[0045] In one embodiment, the logic circuit 102 includes an AND gate G1 and an RS flip-flop. The first and second inputs of the AND gate G1 are coupled to the output of a comparator and the output of a minimum off-time generation circuit, respectively, to receive a comparison signal and a minimum off-time signal. The output of the AND gate G1 is connected to the S port of the RS flip-flop. The Q input of the RS flip-flop is coupled to the input of the on-time generation circuit to provide an excitation signal. The R input of the RS flip-flop receives a reset signal. The reset signal can be a synchronous signal or an asynchronous signal.

[0046] When the circuit is running, if the voltage at the first input terminal of the comparator is higher than the voltage at the second input terminal, the output of the comparator is set high, i.e., the comparison signal is high. When the output of the minimum turn-off time generation circuit is also high, the output of the AND gate G1 is set high. The S terminal of the RS flip-flop receives the excitation signal and generates an output signal at the Q terminal, which is coupled to the input terminal of the turn-on time generation circuit, enabling the turn-on time generation circuit. The output terminal of the turn-on time generation circuit forms the turn-on time signal PWM. The turn-on time signal PWM is then passed through the driver circuit to generate the first control signal HSPWM and the second control signal LSPWM, which control the turn-on and turn-off of the first switch M1 and the second switch M2, respectively, to achieve the power conversion function.

[0047] In one embodiment, the conduction time is inversely proportional to the amplitude of the input voltage VIN and directly proportional to the amplitude of the output voltage VOUT, so that the switching frequency of the switching circuit remains basically constant under different input voltage VIN and output voltage VOUT conditions.

[0048] The voltage at the second input of the comparator includes the feedback voltage VFB and the slope compensation voltage (i.e., the slope compensation signal) VRAMP. When there is no slope compensation signal VRAMP, the constant on-time control method, while having good dynamic response speed and light load efficiency, also has high requirements for the shape of the output voltage ripple.

[0049] When the ESR (Equivalent Series Resistance) of the output capacitor is very small, the ripple on the output capacitor C1 and the current I in the output inductor L1 will be affected. L In comparison, it lags behind by 90 degrees in phase, therefore the output voltage cannot reflect the inductor current I in a timely manner. L The change in inductor current I. When the first control signal HSPWM is high (at which time the conduction time signal PWM is also high), the inductor current I... L The phase lag is increased. However, due to the aforementioned 90° phase lag, the output voltage VOUT cannot be established in time, causing the feedback voltage VFB to fail to rise. Therefore, it's possible that after the current on-time of the HSPWM signal has elapsed, VFB may still be lower than VREF. In this case, an unnecessary additional PWM will be activated, leading to uneven PWM signal intervals and instability. Therefore, a slope compensation signal VRAMP can be added to the feedback signal VFB to improve circuit stability, or a slope compensation signal VRAMP can be subtracted from VREF to improve circuit stability.

[0050] The slope compensation signal VRAMP (also known as the ramp compensation signal) is a periodic signal, with the same period as the PWM signal. The amplitude of the VRAMP signal can vary within a fixed range. For example, the waveform of the ramp compensation signal VRAMP is a periodic sawtooth wave. In this case, the ramp compensation signal VRAMP looks like... Figure 2 As shown in Figure (a). Figure 2 This is a schematic diagram of the slope compensation waveform of a power converter in steady-state operation in CCM mode according to an embodiment of this application. Figure 2 Figure (b) shows the waveform of the feedback signal VFB superimposed with the slope compensation signal VRAMP. Figure 2 Figure (c) shows the waveform of the PWM conduction time signal. Figure 2 The inductor current I can be seen in diagram (d). L waveform and output current I OUT The waveform. I OUT That is the load current. I OUT The waveform is related to the load characteristics. For example, if the load operates in an intermittent constant current mode, the load current value will be relatively stable when it is in constant current mode.

[0051] The aforementioned slope compensation method can effectively compensate for the stability of the power converter when it is operating in steady state in CCM mode. However, in DCM mode, the aforementioned slope compensation method may cause the circuit to experience the phenomenon of two or more PWM pulses converging, resulting in increased output ripple, affecting the load output regulation rate, and even causing electromagnetic interference (EMI) and audio noise problems.

[0052] Specifically, in DCM mode, the second switching transistor M2 in the switching circuit is in the inductor current I L After crossing zero, the voltage is turned off. At this point, the slope compensation signal VRAMP also returns to zero voltage and remains at zero until the start of the next PWM cycle. This is equivalent to no slope compensation during this interval. During this time, the VFB voltage may be very close to VREF. Ideally, this compensation method will not cause instability problems. Figure 3A This is a waveform diagram of the power converter in ideal operating state under DCM mode.

[0053] However, in actual circuit systems, such as Figure 3B As shown, the output capacitor C1 has an equivalent series resistance (ESR) and an equivalent series inductance (ESL), and the inductor current I... LAfter crossing zero, also known as after the inductor current passes through zero current detection (ZCD), the output voltage VOUT will experience an additional drop and some glitches or oscillations. Furthermore, the drain voltage V of the second switching transistor M2... DS Oscillations may occur after ZCD, which can also be coupled to VFB through the parasitic capacitance of the switching transistor, causing VFB+VRAMP to fall below VREF, thus falsely triggering a new PWM pulse. For example... Figure 3C As shown, Figure 3C This is a waveform diagram showing a false triggering scenario of the power converter in DCM mode. Figure 3C Figure (b) shows the waveform of the feedback signal VFB superimposed with the slope compensation signal VRAMP. Figure 3C Figure (c) shows the waveform of the PWM conduction time signal. Figure 3C The inductor current I can be seen in diagram (d). L The waveform.

[0054] In one embodiment of this application, in order to eliminate the aforementioned false triggering situation and enable the power converter to maintain stable operation in DCM mode, the slope compensation circuit outputs a slope compensation signal with a first slope during the inductor current demagnetization period when the power converter is operating in the inductor current continuous mode, and outputs a slope compensation signal with a second slope during the inductor current demagnetization period and the zero current period when the power converter is operating in the inductor current discontinuous mode, wherein the first slope is greater than the second slope.

[0055] In one embodiment, such as Figure 4 As shown, the slope compensation circuit includes a compensation capacitor C2, a first charging branch, a first discharging branch, and a second discharging branch. The compensation capacitor C2 has a compensation signal terminal and a ground terminal. The first charging branch is formed by a first constant current source and a first switch S1 connected in series, used to controllably charge the compensation capacitor C2 with a first current I1. The control terminal of the first switch S1 is used to receive a first control signal HSPWM, thereby achieving controllable charging. The first discharging branch is formed by a second constant current source and a first switch S2 connected in series, used to controllably release a second current I2 from the compensation capacitor C2. The control terminal of the second switch S2 is used to receive a gate_off signal characterizing the demagnetization period and the zero-current period (i.e., the period when the first switch M1 is turned off), achieving controllable discharging. The second discharging branch is formed by a third constant current source and a third switch S3 connected in series, used to controllably release a second current I3 from the compensation capacitor C2. The second discharging branch operates when the power converter is operating in continuous inductor current mode and does not operate when the power converter is operating in discontinuous inductor current mode.

[0056] In some embodiments, the control circuit of the power converter further includes an operating mode detection circuit, which is used to detect the operating mode of the power converter in the current cycle and output a mode detection result signal to the ramp compensation circuit.

[0057] For example, the mode detection circuit may include a zero-crossing detector, which detects whether the inductor current of the power converter crosses zero in the current cycle. If the zero-crossing detector detects that the inductor current of the power converter has crossed zero in the current cycle, it outputs a mode detection result signal, indicating that the power converter is operating in discontinuous inductor current mode; if the zero-crossing detector detects that the inductor current of the power converter has not crossed zero in the current cycle, it outputs a mode detection result signal, indicating that the power converter is operating in continuous inductor current mode.

[0058] In one embodiment, such as Figure 5 As shown, the zero-crossing detector includes a first comparator COMP, a first delay module DELAY, a first AND logic gate AND1, and a sample-and-hold module S / H. The first comparator may have a first terminal, a second terminal, and an output terminal. The first terminal receives a current I characterizing the inductance of the power converter. L The sensing signal Isense is received at the second terminal, a zero-crossing detection threshold THR is received at the second terminal, and a zero-crossing alert signal Sr is output at the output terminal. The first delay module receives the zero-crossing alert signal and generates a delayed zero-crossing alert signal Srd by delaying the zero-crossing alert signal.

[0059] The first AND logic gate, in the illustrated embodiment, is a NAND gate (NAND1) with two inputs and one output. The two inputs receive the zero-crossing indication signal Sr and the delayed zero-crossing indication signal Srd, respectively, and the output outputs the zero-crossing detection result ZCD. In the illustrated embodiment, a high level ZCD indicates that the current has crossed zero. The sample-and-hold module S / H samples the zero-crossing detection result at the end of each operating cycle and holds the sampled result at other times, outputting the mode detection result signal Mdr. In an optional embodiment, the first AND logic gate can also be replaced with an AND gate, where the output is the zero-crossing detection result ZCD#, and a low level ZCD# indicates that the current has crossed zero. Upon receiving the mode detection result signal Mdr, the slope compensation circuit module, in the next operating cycle after detecting a change in the current mode of the operating power converter, switches the slope compensation signal between the first slope and the second slope.

[0060] To enable the slope compensation circuit to switch the slope compensation signal between the first slope and the second slope in the next duty cycle after detecting a change in the current mode of the operating power converter, the sample-and-hold module in the mode detection circuit performs sampling operations at the end of one cycle and before the start of the next cycle. During other periods, the sampling operation time point can be set as needed to update the mode detection result signal Mdr.

[0061] In some cases, the control circuit of the switching power converter of this application further includes an enable circuit. Specifically, such as... Figure 6 As shown, the enable circuit includes a second AND logic gate. In the illustrated embodiment, the second AND logic gate is AND2, which has two input terminals. These two input terminals respectively receive... Figure 5 The illustrated embodiment includes a mode detection result signal ZCD and a Gate_off signal representing the turn-off of the first switch M1. Specifically, Gate_off can be the inverse complementary signal of the first control signal HSPWM. The output of the AND logic gate outputs an enable signal S. CE The enable circuit is used to disable the second discharge branch when the mode detection result signal indicates that the power converter is operating in discontinuous inductor current mode (i.e., ZCD characterizes the zero-crossing period) and is within the inductor current demagnetization or zero current period (i.e., Gate_off indicates M1 is off).

[0062] Those skilled in the art will understand that the first AND gate needs to be matched with the Sr and Srd signals at different levels, and the second AND gate needs to be matched with the mode detection result signal and the Gate_off signal at different levels, so as to prevent the second discharge branch from being enabled when the mode detection result signal indicates that the power converter is operating in the discontinuous inductor current mode and is within the period of inductor current demagnetization or zero current. In other embodiments, the first AND gate and the second AND gate can be represented as combinations of various forms of logic gates according to the digital logic conversion rules conventional in the art, as long as the same logical judgment result can be achieved.

[0063] In one embodiment, Figure 4 The control terminal of the third switch S3 in the slope compensation circuit shown can be used to receive the enable signal S. CE This enables controlled discharge.

[0064] Specifically, for example, in the continuous inductor current mode, when the power converter is in a discharging state, the second switch S2 and the third switch S3 of the slope compensation circuit are respectively connected to the second control signal LSPWM and the enable signal S CEUnder the control of the circuit, all circuits are in a closed state. The slope compensation signal discharges through two current paths, namely the path formed by the second switch and the second current source, and the path formed by the third switch and the third current source.

[0065] In discontinuous inductor current mode, when the second switching transistor M2 in the switching circuit is in the inductor current I... L When the circuit is turned off after crossing zero, as mentioned above, due to the equivalent series resistance and equivalent series inductance of the output capacitor C1, the inductor current I... L After zero crossing, the output voltage VOUT will experience an additional drop and some glitches or oscillations. Furthermore, the drain voltage VDS of the switching transistor M2 may oscillate after ZCD, which can also couple to VFB through the parasitic capacitance of the switching transistor, causing VFB+VRAMP to fall below VREF, thus falsely triggering a new PWM pulse. To solve this problem, such as... Figure 8 As illustrated, when the mode detection circuit performs a current detection operation at the end of one cycle and before the start of the next cycle, and detects that the power converter is operating in discontinuous inductor current mode, then from the start of the next operating cycle, when the slope compensation signal terminal is in a discharging state, the enable circuit enables the enable signal S. CE The adjustment prevents the second discharge branch from being enabled during the inductor current demagnetization or zero current period. In this case, the slope compensation signal terminal discharges through only one discharge current path, namely the path formed by the second switch and the second current source. Therefore, the discharge slope becomes slower, which is the second discharge slope. Thus, the control logic to start from the next working cycle is to generate the enable signal S by performing an AND operation on the aforementioned mode detection result signal Mdr and the signal Gate_off. CE This enables control of the second discharge branch.

[0066] Figure 8 In the diagram, waveform 501 is a schematic diagram of the decrease in the discharge slope of the VRAMP ramp signal. Waveform 802 is a schematic diagram of the corresponding VFB+VRAMP signal waveform. Figure 8 Figure (e) shows the waveform of the ZCD signal. Figure 8 Figure (f) shows the waveform of the pattern detection result signal Mdr. As mentioned above, the sample-and-hold module performs a sampling operation at the end of one cycle and before the start of the next cycle to update the pattern detection result signal Mdr. Figure 8 The dashed line 805 is a sloping line with the same slope as waveform 804. It is only used to compare with waveform 801 to show the change in waveform slope after the discharge rate change. The dashed line 505 is not the actual waveform value.

[0067] When the slope of the VRAMP ramp signal decreases during discharge, i.e., the discharge rate slows down, the inductor current I... LAt the moment of zero crossing, VRAMP has not discharged to zero voltage. Thus, the voltage of VRAMP+VFB is still slightly higher than that of the reference signal VREF, making it less likely to trigger a new PWM pulse. Figure 8 VSTART in the equation is the initial period value set for the slope compensation signal VRAMP.

[0068] The ZCD signal returns to a low level at the start of a new duty cycle because the first switch M1 of the power converter is turned on again at this time, detecting the current I of the output inductor. L The ZCD signal is at a low level. Figure 9 Figure (e) illustrates a schematic diagram of the pattern detection result signal Mdr in a pattern detection circuit where the sample-and-hold module performs sampling operations not only at the end of one cycle and before the start of the next cycle, but also sets the sampling operation time points as needed during other periods to update the pattern detection result signal Mdr. In the technical solution of this application, as shown... Figure 10 As illustrated, through Figure 5 The zero-crossing detector in the pattern detection circuit shown can also be used to detect when the inductor current I... L After crossing zero and for a duration greater than or equal to a settable threshold time Td (Tduration), the slope of the VRAMP ramp signal discharge is reduced starting from the next duty cycle. If the inductor current I... L If the duration of the zero crossing is consistently greater than or equal to the threshold time Td within a single operating cycle, the VRAMP ramp signal will maintain a low discharge slope during discharge. If the inductor current I... L If the duration of the zero crossing is less than the threshold time Td within a working cycle, then starting from the next working cycle, the VRAMP ramp signal discharges and switches to the first discharge slope. Specifically, the threshold time Td can be defined in the first delay module DELAY.

[0069] As mentioned above, when the slope of the VRAMP ramp signal decreases during discharge, i.e. the discharge rate slows down, at the moment when the ZCD signal is at a high level, VRAMP has not discharged to zero voltage. Thus, the VRAMP+VFB voltage is still higher than the reference signal VREF, making it less likely to trigger a new PWM pulse.

[0070] In other embodiments, the slope compensation circuit in the control circuit of the switching power converter includes a compensation capacitor C3, a first charging branch, and a first adjustable discharging branch. For example... Figure 7As illustrated, the compensation capacitor C3 has a compensation signal terminal and a ground terminal, the ground terminal being connected to reference ground GND. A first charging branch is used to controllably charge the compensation capacitor C3 with a first current I1. A first adjustable discharging branch discharges the compensation capacitor C3 with a second discharging current I2 when the switching power converter is operating in continuous inductor current mode, and discharges the compensation capacitor with a third discharging current I3 when the power converter is operating in discontinuous inductor current mode, wherein the second discharging current I2 is greater than the third discharging current I3.

[0071] In some cases, the control circuit further includes a discharge current regulation circuit. This discharge current regulation circuit includes an AND gate AND4 and a single-pole double-throw switch S4. The AND gate AND4 has two inputs, which respectively receive a mode detection result signal Mdr and a Gate_off signal representing the turn-off of the first switch M1. The output of the AND gate AND4 controls the single-pole double-throw switch S4 to switch between a first current reference REF1 and a second current reference REF2. The first current reference REF1 and the second current reference REF2 are used to set the second discharge current I2 and the third discharge current I3, respectively. The discharge current regulation circuit selects the second current reference REF2 when the mode detection result signal indicates that the power converter is operating in discontinuous inductor current mode and is within a demagnetizing or zero-current period.

[0072] pass Figure 7 The combined effect of the slope compensation circuit and the discharge current regulation circuit shown can also achieve the following: when the power converter is operating in the continuous inductor current mode, a slope compensation signal with a first slope is output during the inductor current demagnetization period; when the power converter is operating in the discontinuous inductor current mode, a slope compensation signal with a second slope is output during the inductor current demagnetization period and the zero current period, wherein the first slope is greater than the second slope.

[0073] This application uses specific terms to describe embodiments of the application. Terms such as "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic associated with at least one embodiment of the application. Therefore, it should be emphasized and noted that references to "an embodiment," "one embodiment," or "an alternative embodiment" in different locations throughout this specification do not necessarily refer to the same embodiment. Furthermore, certain features, structures, or characteristics in one or more embodiments of the application can be appropriately combined.

[0074] Similarly, it should be noted that, in order to simplify the description of the present application and thus aid in the understanding of one or more embodiments, the foregoing description of the embodiments of the present application sometimes combines multiple features into a single embodiment, drawing, or description thereof. However, this disclosure method does not imply that the subject matter of the present application requires more features than those mentioned in the claims. In fact, the embodiments contain fewer features than all the features of the single embodiments disclosed above.

[0075] Although this application has been described with reference to specific embodiments, those skilled in the art should recognize that the above embodiments are only used to illustrate this application, and various equivalent changes or substitutions can be made without departing from the spirit of this application. Therefore, any changes or modifications to the above embodiments within the essential spirit of this application will fall within the scope of the claims of this application.

Claims

1. A control circuit for a switching power converter, used to generate control signals to control switching transistors located in the power converter, wherein, The power converter includes a switching circuit for receiving an input voltage and converting the input voltage into an output voltage. The switching circuit includes the switching transistor. The control circuit includes: The comparator has a first input terminal, a second input terminal, and an output terminal. The first input terminal is used to input a reference signal, the second input terminal is used to input a feedback signal, and the output terminal is used to output a comparison signal. The feedback signal is obtained based on the output voltage. A ramp compensation circuit, used to generate a ramp compensation signal and apply it to a first or second input terminal of the comparator, includes: a compensation capacitor having a compensation signal terminal and a ground terminal, the ground terminal being connected to a reference ground; a first charging branch for controllably charging a first current into the compensation capacitor; a first discharging branch for controllably discharging a second current from the compensation capacitor; and a second discharging branch for controllably discharging a third current from the compensation capacitor, wherein the second discharging branch operates when the power converter is operating in continuous inductor current mode and does not operate when the power converter is operating in discontinuous inductor current mode. The on-time generation circuit starts timing according to the comparison signal and generates an on-time timing signal. A control signal generation circuit generates a control signal based on the comparison signal and the turn-on timing signal, which is used to control the switching transistor in the power converter. The slope compensation circuit outputs a slope compensation signal with a first slope during the inductor current demagnetization period when the power converter is operating in the inductor current continuous mode, and outputs a slope compensation signal with a second slope during the inductor current demagnetization period and the zero current period when the power converter is operating in the inductor current discontinuous mode, wherein the first slope is greater than the second slope.

2. The control circuit as described in claim 1, characterized in that, It further includes an operating mode detection circuit, which is used to detect the operating mode of the power converter in the current cycle and output a mode detection result signal to the ramp compensation circuit.

3. The control circuit as described in claim 2, characterized in that, The mode detection circuit includes a zero-crossing detector, which detects whether the inductor current of the power converter crosses zero in the current cycle. If the zero-crossing detector detects that the inductor current of the power converter has crossed zero in the current cycle, it outputs the mode detection result signal to indicate that the power converter is operating in discontinuous inductor current mode. If the zero-crossing detector detects that the inductor current of the power converter has not crossed zero in the current cycle, it outputs the mode detection result signal to indicate that the power converter is operating in continuous inductor current mode.

4. The control circuit as described in claim 3, characterized in that, The zero-crossing detector includes: A first comparator has a first terminal, a second terminal, and an output terminal, wherein the first terminal receives a sensing signal characterizing the inductor current of the power converter, the second terminal receives a zero-crossing detection threshold, and the output terminal outputs a zero-crossing indication signal. The first delay module receives the zero-crossing alert signal and generates a delayed zero-crossing alert signal by delaying the zero-crossing alert signal. The first AND logic gate has two input terminals and one output terminal. The two input terminals receive the zero-crossing prompt signal and the delayed zero-crossing prompt signal, respectively, and the output terminal outputs the zero-crossing detection result. The sample-and-hold module samples the zero-crossing detection result at the end of each working cycle and holds the sampled result at other times, outputting the pattern detection result signal.

5. The control circuit according to claim 1, characterized in that, In the next operating cycle after detecting a change in the operating current mode, the slope compensation circuit switches the slope compensation signal between the first slope and the second slope.

6. The control circuit as described in claim 1, characterized in that, The system further includes an enable circuit, wherein the enable circuit includes an AND logic gate having two inputs that receive a mode detection result signal and a turn-off period indication signal characterizing the inductor current demagnetization period and the zero current period, respectively. The output of the AND logic gate outputs an enable signal. The enable circuit is used to disable the second discharge branch when the mode detection result signal indicates that the power converter is operating in the inductor current discontinuous mode and is in the inductor current demagnetization or zero current period.

7. A control circuit for a switching power converter, used to generate control signals to control switching transistors located in the power converter, wherein, The power converter includes a switching circuit for receiving an input voltage and converting the input voltage into an output voltage. The switching circuit includes the switching transistor. The control circuit includes: The comparator has a first input terminal, a second input terminal, and an output terminal. The first input terminal is used to input a reference signal, the second input terminal is used to input a feedback signal, and the output terminal is used to output a comparison signal. The feedback signal is obtained based on the output voltage. A ramp compensation circuit, used to generate a ramp compensation signal and apply it to a first input terminal or a second input terminal of the comparator, includes: a compensation capacitor having a compensation signal terminal and a ground terminal, the ground terminal being connected to a reference ground; a first charging branch for controllably charging the compensation capacitor with a first current; and a first adjustable discharging branch, wherein the first adjustable discharging branch discharges the compensation capacitor with a second discharging current when the power converter is operating in continuous inductor current mode, and discharges the compensation capacitor with a third discharging current when the power converter is operating in discontinuous inductor current mode, wherein the second discharging current is greater than the third discharging current; The on-time generation circuit starts timing according to the comparison signal and generates an on-time timing signal. A control signal generation circuit generates a control signal based on the comparison signal and the turn-on timing signal, which is used to control the switching transistor in the power converter. The slope compensation circuit outputs a slope compensation signal with a first slope during the inductor current demagnetization period when the power converter is operating in the inductor current continuous mode, and outputs a slope compensation signal with a second slope during the inductor current demagnetization period and the zero current period when the power converter is operating in the inductor current discontinuous mode, wherein the first slope is greater than the second slope.

8. The control circuit as described in claim 7, characterized in that, It further includes an operating mode detection circuit, which is used to detect the operating mode of the power converter in the current cycle and output a mode detection result signal to the ramp compensation circuit.

9. The control circuit as described in claim 8, characterized in that, The mode detection circuit includes a zero-crossing detector, which detects whether the inductor current of the power converter crosses zero in the current cycle. If the zero-crossing detector detects that the inductor current of the power converter has crossed zero in the current cycle, it outputs the mode detection result signal to indicate that the power converter is operating in discontinuous inductor current mode. If the zero-crossing detector detects that the inductor current of the power converter has not crossed zero in the current cycle, it outputs the mode detection result signal to indicate that the power converter is operating in continuous inductor current mode.

10. The control circuit as described in claim 9, characterized in that, The zero-crossing detector includes: A first comparator has a first terminal, a second terminal, and an output terminal, wherein the first terminal receives a sensing signal characterizing the inductor current of the power converter, the second terminal receives a zero-crossing detection threshold, and the output terminal outputs a zero-crossing indication signal. The first delay module receives the zero-crossing alert signal and generates a delayed zero-crossing alert signal by delaying the zero-crossing alert signal. The first AND logic gate has two input terminals and one output terminal. The two input terminals receive the zero-crossing prompt signal and the delayed zero-crossing prompt signal, respectively, and the output terminal outputs the zero-crossing detection result. The sample-and-hold module samples the zero-crossing detection result at the end of each working cycle and holds the sampled result at other times, outputting the pattern detection result signal.

11. The control circuit according to claim 7, characterized in that, In the next operating cycle after detecting a change in the operating current mode, the slope compensation circuit switches the slope compensation signal between the first slope and the second slope.

12. The control circuit according to claim 7, characterized in that, The system further includes a discharge current regulation circuit, which comprises an AND gate and a single-pole double-throw switch. The AND gate has two inputs that receive a mode detection result signal and the control signal, respectively. The output of the AND gate controls the single-pole double-throw switch to switch between a first current reference and a second current reference. The first current reference and the second current reference are used to set the second discharge current and the third discharge current, respectively. The discharge current regulation circuit is used to select the second current reference when the mode detection result signal indicates that the power converter is operating in discontinuous inductor current mode and is in a period of demagnetization or zero current.

13. A switching power converter, comprising: A switching circuit for receiving an input voltage and converting the input voltage into an output voltage, the switching circuit including a switching transistor; A control circuit is used to generate a control signal to control the switching transistor. The control circuit includes: The comparator has a first input terminal, a second input terminal, and an output terminal. The first input terminal is used to input a reference signal, the second input terminal is used to input a feedback signal, and the output terminal is used to output a comparison signal. The feedback signal is obtained based on the output voltage. A ramp compensation circuit, used to generate a ramp compensation signal and apply it to a first or second input terminal of the comparator, includes: a compensation capacitor having a compensation signal terminal and a ground terminal, the ground terminal being connected to a reference ground; a first charging branch for controllably charging a first current into the compensation capacitor; a first discharging branch for controllably discharging a second current from the compensation capacitor; and a second discharging branch for controllably discharging a third current from the compensation capacitor, wherein the second discharging branch operates when the power converter is operating in continuous inductor current mode and does not operate when the power converter is operating in discontinuous inductor current mode. The on-time generation circuit starts timing according to the comparison signal and generates an on-time timing signal. A control signal generation circuit generates a control signal based on the comparison signal and the turn-on timing signal, which is used to control the switching transistor in the power converter; The slope compensation circuit outputs a slope compensation signal with a first slope during the inductor current demagnetization period when the power converter is operating in the inductor current continuous mode, and outputs a slope compensation signal with a second slope during the inductor current demagnetization period and the zero current period when the power converter is operating in the inductor current discontinuous mode, wherein the first slope is greater than the second slope.

14. The switching power converter according to claim 13, characterized in that, It further includes an operating mode detection circuit, which is used to detect the operating mode of the power converter in the current cycle and output a mode detection result signal to the ramp compensation circuit.

15. The switching power converter according to claim 14, wherein the mode detection circuit includes a zero-crossing detector, the zero-crossing detector being used to detect whether the inductor current of the power converter crosses zero in the current cycle; if the zero-crossing detector detects that the inductor current of the power converter has crossed zero in the current cycle, the mode detection result signal is output to indicate that the power converter is operating in discontinuous inductor current mode; if the zero-crossing detector detects that the inductor current of the power converter has not crossed zero in the current cycle, the mode detection result signal is output to indicate that the power converter is operating in continuous inductor current mode.

16. The switching power converter according to claim 15, characterized in that, The zero-crossing detector includes: A first comparator has a first terminal, a second terminal, and an output terminal, wherein the first terminal receives a sensing signal characterizing the inductor current of the power converter, the second terminal receives a zero-crossing detection threshold, and the output terminal outputs a zero-crossing indication signal. The first delay module receives and generates a delayed zero-crossing warning signal by delaying the zero-crossing warning signal; The first AND logic gate receives the zero-crossing prompt signal and the delayed zero-crossing prompt signal from its two input terminals, and outputs the zero-crossing detection result from its output terminal. The sample-and-hold module samples the zero-crossing detection result at the end of each working cycle and holds the sampled result at other times, outputting the pattern detection result signal.

17. The switching power converter according to claim 13, characterized in that, The slope compensation circuit switches between the first slope and the second slope in the next operating cycle after detecting a change in the operating current mode.

18. The switching power converter according to claim 13, characterized in that, The system further includes an enable circuit, wherein the enable circuit includes an AND logic gate having two inputs that receive a mode detection result signal and a turn-off period indication signal characterizing the inductor current demagnetization period and the zero current period, respectively. The output of the AND logic gate outputs an enable signal. The enable circuit is used to disable the second discharge branch when the mode detection result signal indicates that the power converter is operating in the inductor current discontinuous mode and is within the demagnetization or zero current period.

19. A switching power converter, comprising: A switching circuit for receiving an input voltage and converting the input voltage into an output voltage, the switching circuit including a switching transistor; A control circuit is used to generate a control signal to control the switching transistor. The control circuit includes: The comparator has a first input terminal, a second input terminal, and an output terminal. The first input terminal is used to input a reference signal, the second input terminal is used to input a feedback signal, and the output terminal is used to output a comparison signal. The feedback signal is obtained based on the output voltage. A ramp compensation circuit, used to generate a ramp compensation signal and apply it to a first input terminal or a second input terminal of the comparator, includes: a compensation capacitor having a compensation signal terminal and a ground terminal, the ground terminal being connected to a reference ground; a first charging branch for controllably charging the compensation capacitor with a first current; and a first adjustable discharging branch, wherein the first adjustable discharging branch discharges the compensation capacitor with a second discharging current when the power converter is operating in continuous inductor current mode, and discharges the compensation capacitor with a third discharging current when the power converter is operating in discontinuous inductor current mode, wherein the second discharging current is greater than the third discharging current; The on-time generation circuit starts timing according to the comparison signal and generates an on-time timing signal. A control signal generation circuit generates a control signal based on the comparison signal and the turn-on timing signal, which is used to control the switching transistor in the power converter; The slope compensation circuit outputs a slope compensation signal with a first slope during the inductor current demagnetization period when the power converter is operating in the inductor current continuous mode, and outputs a slope compensation signal with a second slope during the inductor current demagnetization period and the zero current period when the power converter is operating in the inductor current discontinuous mode, wherein the first slope is greater than the second slope.

20. The switching power converter according to claim 19, characterized in that, It further includes an operating mode detection circuit, which is used to detect the operating mode of the power converter in the current cycle and output a mode detection result signal to the ramp compensation circuit.

21. The switching power converter according to claim 20, wherein the mode detection circuit includes a zero-crossing detector, the zero-crossing detector being used to detect whether the inductor current of the power converter crosses zero in the current cycle; if the zero-crossing detector detects that the inductor current of the power converter has crossed zero in the current cycle, the mode detection result signal is output to indicate that the power converter is operating in discontinuous inductor current mode; if the zero-crossing detector detects that the inductor current of the power converter has not crossed zero in the current cycle, the mode detection result signal is output to indicate that the power converter is operating in continuous inductor current mode.

22. The switching power converter according to claim 21, characterized in that, The zero-crossing detector includes: A first comparator has a first terminal, a second terminal, and an output terminal, wherein the first terminal receives a sensing signal characterizing the inductor current of the power converter, the second terminal receives a zero-crossing detection threshold, and the output terminal outputs a zero-crossing indication signal. The first delay module receives and generates a delayed zero-crossing warning signal by delaying the zero-crossing warning signal; The first AND logic gate receives the zero-crossing prompt signal and the delayed zero-crossing prompt signal from its two input terminals, and outputs the zero-crossing detection result from its output terminal. The sample-and-hold module samples the zero-crossing detection result at the end of each working cycle and holds the sampled result at other times, outputting the pattern detection result signal.

23. The switching power converter according to claim 19, characterized in that, The slope compensation circuit switches between the first slope and the second slope in the next operating cycle after detecting a change in the operating current mode.

24. The switching power converter according to claim 19, characterized in that, The system further includes a discharge current regulation circuit, which comprises an AND gate and a single-pole double-throw switch. The AND gate has two inputs that receive a mode detection result signal and the control signal, respectively. The output of the AND gate controls the single-pole double-throw switch to switch between a first current reference and a second current reference. The first current reference and the second current reference are used to set the second discharge current and the third discharge current, respectively. The discharge current regulation circuit is used to select the second current reference when the mode detection result signal indicates that the power converter is operating in discontinuous inductor current mode and during demagnetization or zero current.

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