Pixel driving circuit, driving method thereof, display substrate and display device

Abstract

A pixel driving circuit (D_1, D_2), a driving method thereof, a display substrate and a display device, wherein a display area (A) of the display substrate comprises a first display area (A1) and a second display area (A2); the display substrate comprises a plurality of pixel driving circuits (D_1, D_2) respectively coupled to respective second light emitting devices (EL); the pixel driving circuits (D_1, D_2) comprise: a first driving control circuit (10) located in a frame area (B), and a second driving control circuit (20) located in the second display area (A2); the first driving control circuit (10) is connected to the first display area (A1) via a first wire ( L) is coupled to a second drive control circuit (20), and the second drive control circuit (20) is coupled to a corresponding second light emitting device (EL); the first drive control circuit (10) is configured to generate a drive current for driving the corresponding second light emitting device (EL); and the second drive control circuit (20) is configured to disconnect the first drive control circuit (10) and the corresponding second light emitting device (EL) for a period of time when the drive current is conducted between the second drive control circuit (20) and the first wire (L), and then connect the first drive control circuit (10) and the corresponding second light emitting device (EL).

Description

[0001] This disclosure claims priority to patent application filed on September 29, 2020, with priority number PCT / CN2020 / 118657 and entitled "Driving method and display device for display panel and pixel circuit thereof", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of display technology, and more particularly to a pixel driving circuit, its driving method, a display substrate, and a display device. Background Technology

[0003] With the rapid development of display technology, in addition to the traditional functions of information display, the requirements for the appearance of display devices are also gradually increasing. Larger screen ratios are the future market trend. Therefore, display devices with under-display camera structures are highly favored by consumers.

[0004] In a display device with an under-display camera structure, the camera is positioned below the display area of ​​the display substrate. Light can pass through the display area of ​​the display substrate and shine onto the camera so that the camera can capture an image. However, the display area with the camera will exhibit uneven brightness at low grayscale levels. Summary of the Invention

[0005] The display substrate provided in this disclosure includes: a display area and a border area;

[0006] The display area includes: a first display area and a second display area; the first display area includes a plurality of first light-emitting devices, and the second display area includes a plurality of second light-emitting devices;

[0007] The display substrate includes: a plurality of pixel driving circuits respectively coupled to each of the second light-emitting devices;

[0008] The pixel driving circuit includes: a first driving control circuit located in the border area, and a second driving control circuit located in the second display area; the first driving control circuit is coupled to the second driving control circuit through a first wire, and the second driving control circuit is coupled to the corresponding second light-emitting device.

[0009] The first driving control circuit is configured to generate a driving current for driving the corresponding second light-emitting device;

[0010] The second drive control circuit is configured to disconnect the first drive control circuit from the corresponding second light-emitting device for a period of time when the drive current is conducted between the second drive control circuit and the first wire, and then connect the first drive control circuit to the corresponding second light-emitting device.

[0011] Optionally, in this embodiment of the disclosure, the first drive control circuit includes:

[0012] The first driving control sub-circuit is coupled to the first node, the second node, the third node, the first power supply terminal and the second power supply terminal respectively, and is configured to generate a driving current to drive the second light-emitting device according to the signals of the first node, the second node and the third node.

[0013] The first threshold compensation sub-circuit is coupled to the first scan signal terminal, the first node and the third node respectively, and is configured to perform threshold compensation on the first drive control sub-circuit under the control of the first scan signal terminal.

[0014] The first light-emitting control sub-circuit is coupled to the first power supply terminal, the fourth node, the first light-emitting control signal terminal, the second node, and the third node, respectively, and is configured to connect the first power supply terminal and the second node, and connect the third node and the fourth node under the control of the first light-emitting control signal terminal.

[0015] The first data writing sub-circuit is coupled to the first scan signal terminal, the first data signal terminal and the second node respectively, and is configured to provide the data signal of the first data signal terminal to the second node under the control of the first scan signal terminal;

[0016] The first storage sub-circuit, coupled to the first power supply terminal and the first node respectively, is configured to store data signals.

[0017] Optionally, in an embodiment of this disclosure, the first drive control sub-circuit includes: a first switching transistor;

[0018] The control terminal of the first switching transistor is coupled to the first node, the first electrode is coupled to the second node, and the second electrode is coupled to the third node.

[0019] Optionally, in this embodiment of the disclosure, the first threshold compensation sub-circuit includes: a second switching transistor;

[0020] The control terminal of the second switching transistor is coupled to the first scanning signal terminal, the first electrode is coupled to the first node, and the second electrode is coupled to the third node.

[0021] Optionally, in this embodiment of the disclosure, the first light-emitting control sub-circuit includes: a third switching transistor and a fourth switching transistor;

[0022] The control terminal of the third switching transistor is coupled to the first light-emitting control signal terminal, the first electrode is coupled to the first power supply terminal, and the second electrode is coupled to the second node.

[0023] The control terminal of the fourth switching transistor is coupled to the first light-emitting control signal terminal, the first electrode is coupled to the third node, and the second electrode is coupled to the fourth node.

[0024] Optionally, in an embodiment of this disclosure, the first data writing sub-circuit includes: a fifth switching transistor;

[0025] The control terminal of the fifth switching transistor is coupled to the first scanning signal terminal, the first electrode is coupled to the first data signal terminal, and the second electrode is coupled to the second node.

[0026] Optionally, in this embodiment of the disclosure, the first storage sub-circuit includes: a first capacitor;

[0027] The first electrode of the first capacitor is coupled to the first power supply terminal, and the second electrode is coupled to the first node.

[0028] Optionally, in this embodiment of the present disclosure, the first drive control circuit further includes: a first reset sub-circuit and a second reset sub-circuit;

[0029] The first reset sub-circuit is coupled to the first node, the first reset control terminal and the first reference signal terminal respectively, and is configured to provide the signal of the first reference signal terminal to the first node under the control of the first reset control terminal;

[0030] The second reset sub-circuit is coupled to the second light-emitting device, the second reset control terminal and the second reference signal terminal respectively, and is configured to provide the signal of the second reference signal terminal to the second light-emitting device under the control of the second reset control terminal;

[0031] The second drive control circuit includes:

[0032] The second light-emitting control sub-circuit is coupled to the first light-emitting control sub-circuit, the second light-emitting device, and the second light-emitting control signal terminal, and is configured to turn on the first light-emitting control circuit and the second light-emitting device under the control of the second light-emitting control signal terminal.

[0033] Optionally, in this embodiment of the disclosure, the first drive control circuit includes:

[0034] The first reset sub-circuit is coupled to the first node, the first reset control terminal and the first reference signal terminal respectively, and is configured to provide the signal of the first reference signal terminal to the first node under the control of the first reset control terminal.

[0035] The second drive control circuit includes: a second reset sub-circuit and a second light-emitting control sub-circuit;

[0036] The second reset sub-circuit is coupled to the second light-emitting device, the second reset control terminal and the second reference signal terminal respectively, and is configured to provide the signal of the second reference signal terminal to the second light-emitting device under the control of the second reset control terminal;

[0037] The second light-emitting control sub-circuit is coupled to the first light-emitting control sub-circuit, the second light-emitting device, and the second light-emitting control signal terminal, respectively, and is configured to turn on the first light-emitting control sub-circuit and the second light-emitting device under the control of the second light-emitting control signal terminal.

[0038] Optionally, in an embodiment of this disclosure, the first reset sub-circuit includes: a sixth switching transistor;

[0039] The control terminal of the sixth switching transistor is coupled to the first reset control terminal, the first electrode is coupled to the first reference signal terminal, and the second electrode is coupled to the first node.

[0040] Optionally, in an embodiment of this disclosure, the second reset sub-circuit includes: a seventh switching transistor;

[0041] The control terminal of the seventh switching transistor is coupled to the second reset control terminal, the first terminal is coupled to the second reference signal terminal, and the second terminal is coupled to the second light-emitting device.

[0042] Optionally, in an embodiment of this disclosure, the second light-emitting control sub-circuit includes: an eighth switching transistor;

[0043] The control terminal of the eighth switching transistor is coupled to the second light control signal terminal, the first electrode is coupled to the first light-emitting control sub-circuit, and the second electrode is coupled to the second light-emitting device.

[0044] Optionally, in this embodiment of the disclosure, it further includes: a plurality of third driving control circuits respectively coupled to each of the first light-emitting devices;

[0045] The third drive control circuit is located within the first display area;

[0046] The third driving control circuit is configured to generate a driving current for the corresponding first light-emitting device.

[0047] Optionally, in an embodiment of this disclosure, the third drive control circuit includes:

[0048] The second drive control sub-circuit is coupled to the sixth node, the seventh node, the eighth node, the third power supply terminal and the fourth power supply terminal respectively, and is configured to generate a drive current to drive the first light-emitting device according to the signals of the sixth node, the seventh node and the eighth node.

[0049] The second threshold compensation sub-circuit is coupled to the second scan signal terminal, the sixth node and the eighth node respectively, and is configured to perform threshold compensation on the second drive control sub-circuit under the control of the second scan signal terminal.

[0050] The third light-emitting control sub-circuit is coupled to the third power supply terminal, the fourth power supply terminal, the third light-emitting control signal terminal, the seventh node, and the eighth node, respectively, and is configured to couple the third power supply terminal to the seventh node and the eighth node to the fourth power supply terminal under the control of the third light-emitting control signal terminal.

[0051] The second data writing sub-circuit is coupled to the second scan signal terminal, the second data signal terminal and the seventh node respectively, and is configured to provide the data signal of the second data signal terminal to the seventh node under the control of the second scan signal terminal;

[0052] The second storage sub-circuit, which is coupled to the third power supply terminal and the sixth node respectively, is configured to store data signals;

[0053] The third reset sub-circuit is coupled to the sixth node, the third reset control terminal and the third reference signal terminal respectively, and is configured to provide the signal of the third reference signal terminal to the sixth node under the control of the third reset control terminal.

[0054] The fourth reset sub-circuit is coupled to the first light-emitting device, the fourth reset control terminal, and the fourth reference signal terminal, respectively, and is configured to provide the signal of the fourth reference signal terminal to the first light-emitting device under the control of the fourth reset control terminal.

[0055] Accordingly, this disclosure also provides a display device, which includes any of the above-described display substrates.

[0056] Optionally, in this embodiment of the disclosure, it further includes: an image acquisition device;

[0057] The image acquisition device is located in the second display area of ​​the display substrate, and the image acquisition device is located on the side of the display substrate away from the light-emitting surface.

[0058] Accordingly, this disclosure also provides a pixel driving circuit, wherein the pixel driving circuit is configured to drive a second light-emitting device; the pixel driving circuit includes:

[0059] The first driving control circuit is configured to generate a driving current for the corresponding second light-emitting device;

[0060] The second drive control circuit is coupled to the first drive control circuit via a first wire, and the second drive control circuit is coupled to the corresponding second light-emitting device; it is configured to disconnect the first drive control circuit from the corresponding second light-emitting device for a period of time when the drive current is conducted between the second drive control circuit and the first wire, and then turn the first drive control circuit to the corresponding second light-emitting device.

[0061] Accordingly, this disclosure also provides a driving method for the above-described pixel driving circuit, comprising:

[0062] During a first time period, the first driving control circuit is controlled to generate a driving current to drive the corresponding second light-emitting device. When the driving current is conducted between the second driving control circuit and the first wire, the first driving control circuit is controlled to disconnect from the corresponding second light-emitting device.

[0063] During the second time period, the first driving control circuit is controlled to conduct with the corresponding second light-emitting device.

[0064] Optionally, in this embodiment of the disclosure, the step of controlling the first driving control circuit to generate a driving current for the corresponding second light-emitting device during the first time period, and controlling the first driving control circuit to disconnect from the corresponding second light-emitting device when the driving current is conducted to the node between the second driving control circuit and the first wire, includes:

[0065] During the first sub-time period, a valid signal is applied to the first reset control terminal;

[0066] During the second sub-time period, valid signals are applied to the first scan signal terminal, the second reset control terminal, and the second light emission control signal terminal.

[0067] During the third sub-time period, the loading of a valid signal to the second light-emitting control signal terminal is stopped, while a valid signal is loaded to the first light-emitting control signal terminal.

[0068] Optionally, in this embodiment of the disclosure, after stopping the loading of a valid signal onto the second light-emitting control signal terminal, a valid signal is loaded onto the first light-emitting control signal terminal.

[0069] Optionally, in this embodiment of the disclosure, controlling the first driving control circuit to conduct with the corresponding second light-emitting device during the second time period includes:

[0070] During the second time period, valid signals are applied to the first and second light-emitting control signal terminals. Attached Figure Description

[0071] Figure 1 This is a schematic diagram of a planar structure of a display device with an under-display camera in related technologies.

[0072] Figure 2 This is a schematic diagram illustrating the light-emitting principle of the second light-emitting device in the second display area;

[0073] Figure 3 This is a schematic diagram of the current curve of the second light-emitting device in low grayscale display.

[0074] Figure 4 This is a schematic diagram of the planar structure of a display substrate provided in an embodiment of this disclosure;

[0075] Figure 5 This is a schematic diagram of the pixel driving circuit in an embodiment of the present disclosure;

[0076] Figure 6 To and Figure 5 A schematic diagram of the specific structure of the corresponding pixel driving circuit;

[0077] Figure 7 This is another schematic diagram of the pixel driving circuit in an embodiment of this disclosure;

[0078] Figure 8 To and Figure 7 A schematic diagram of the specific structure of the corresponding pixel driving circuit;

[0079] Figure 9 This is a schematic diagram of the third drive control circuit in an embodiment of this disclosure;

[0080] Figure 10 To and Figure 9 A schematic diagram of the specific structure of the corresponding third drive control circuit;

[0081] Figure 11 The above-described pixel driving circuit flowchart is provided in the embodiments of this disclosure;

[0082] Figure 12 This is a timing diagram of the pixel driving circuit in an embodiment of this disclosure. Detailed Implementation

[0083] Figure 1 This is a schematic diagram of a planar structure of a display device with an under-display camera structure in related technologies, such as... Figure 1As shown, the display device includes: a display area A and a frame area B connected to the display area A. The display area A includes a first display area A1 and a second display area A2. A camera can be positioned in the second display area A2. The first display area A1 has multiple pixel circuits P, each pixel circuit P including a first light-emitting device and a corresponding driving circuit; that is, the driving circuit in the pixel circuit P is located near the first light-emitting device. The second display area A2 has multiple second light-emitting devices EL, and a pixel driving circuit (e.g., [missing information]) is used to control the light emission of the second light-emitting devices EL. Figure 1 D_1 and D_2 are located in the border area B. The pixel driving circuit is coupled to the second light-emitting device EL through the first wire L. Due to the large load of the first wire L and the different lengths of each first wire L, the second display area A2 will have uneven brightness at low gray levels.

[0084] Figure 2 This is a schematic diagram illustrating the light-emitting principle of the second light-emitting device in the second display area. Figure 2 The illustration takes the pixel driving circuit D_1 driving the corresponding second light-emitting device EL as an example. Figure 2 In this context, R_L represents the resistance of the first conductor L, and C_L represents the parasitic capacitance generated by the first conductor L. This parasitic capacitance is generated by the first conductor L and other conductive film layers, and / or by the parasitic capacitance between the first conductor L and other conductive film layers. Figure 2 As shown, the pixel driving circuit D_1 generates a driving current to drive the second light-emitting device EL. When this driving current flows to the second power supply terminal VSS1, some charge Q2 will fill the parasitic capacitance C_L generated by the first wire, resulting in a decrease in the charge Q1 flowing to the second power supply terminal VSS1. This leads to a smaller voltage difference between the fifth node N5 and the second power supply terminal VSS1, thus reducing the brightness of the second light-emitting device EL. The longer the first wire, the larger the parasitic capacitance C_L generated by the first wire. A larger parasitic capacitance C_L results in less charge flowing to the second power supply terminal VSS1 within one frame, leading to a greater decrease in the brightness of the second light-emitting device EL. Therefore, due to the different lengths of the first wires, the degree of brightness reduction in each second light-emitting device EL varies, resulting in poor light emission uniformity in the second display area.

[0085] And, similarly refer to Figure 2When the second light-emitting device EL is displayed at low grayscale, the driving current is smaller, and the voltage of the fifth node N5 is raised more slowly. The charging speed of the charge Q2 into the parasitic capacitance C_L generated by the first wire is also slower. Therefore, most of the charge Q2 is charged into the parasitic capacitance C_L. As a result, the brightness of the second light-emitting device EL decreases more significantly when displayed at low grayscale. However, when the second light-emitting device EL is displayed at high grayscale, the driving current is larger, and the voltage of the fifth node N5 is raised more quickly. The charging speed of the charge Q2 into the parasitic capacitance C_L generated by the first wire is also faster. Therefore, less charge Q2 is charged into the parasitic capacitance C_L generated by the first wire. As a result, the brightness of the second light-emitting device EL decreases less significantly when displayed at high grayscale.

[0086] Figure 3 This is a schematic diagram of the current curve of the second light-emitting device in low grayscale display, as shown below. Figure 3 As shown, curve S1 represents the current curve of the second light-emitting device corresponding to the shorter first wire, and curve S2 represents the current curve of the second light-emitting device corresponding to the longer first wire. The upper inflection point in curves S1 and S2 represents the turn-on time of the second light-emitting device. Figure 3 It can be clearly seen that the longer the length of the first conductor, the longer the lighting time of the corresponding second light-emitting device, and the lower the brightness of the second light-emitting device.

[0087] Based on this, in view of the problem that uneven brightness occurs in the second display area at low gray levels in display devices with under-display camera structures in related technologies, this disclosure provides a pixel driving circuit, its driving method, a display substrate, and a display device.

[0088] The following description, in conjunction with the accompanying drawings, details the specific implementation methods of the pixel driving circuit, its driving method, the display substrate, and the display device provided in the embodiments of this disclosure. The sizes and shapes of the structures in the drawings do not reflect actual proportions and are intended only to illustrate the content of this disclosure.

[0089] This disclosure provides a display substrate, Figure 4 This is a schematic diagram of the planar structure of the display substrate provided in the embodiments of this disclosure, as shown below. Figure 4 As shown, the display substrate includes: a display area A and a frame area B; wherein the frame area B can be connected to the edge of one side of the display area A.

[0090] Display area A includes: a first display area A1 and a second display area A2; the first display area A1 includes a plurality of first light-emitting devices EL', Figure 4In the first display area A1, there are multiple pixel circuits P. Each pixel circuit P includes a first light-emitting device EL' and a corresponding third driving control circuit 30. The second display area A2 includes multiple second light-emitting devices EL (the multiple second light-emitting devices are located in each area W respectively).

[0091] The display substrate includes: multiple pixel driving circuits that are respectively coupled to each of the second light-emitting devices (EL);

[0092] Figure 5 This is a schematic diagram of the pixel driving circuit in an embodiment of the present disclosure, and also refers to... Figure 4 and Figure 5 The pixel driving circuit includes: a first driving control circuit 10 located in the border area B, and a second driving control circuit 20 located in the second display area A2. Figure 4 In the middle, the second driving control circuit 20 is located in region W, that is, region W is provided with the second driving control circuit 20 and the corresponding second light-emitting device EL; the first driving control circuit 10 is coupled to the second driving control circuit 20 through the first wire L, and the second driving control circuit 20 is coupled to the corresponding second light-emitting device EL.

[0093] The first drive control circuit 10 is configured to generate a drive current for driving the corresponding second light-emitting device EL;

[0094] The second drive control circuit 20 is configured to conduct drive current between the second drive control circuit 20 and the first wire L (e.g., Figure 5 When the fifth node N5 is reached, the first drive control circuit 10 is disconnected from the corresponding second light-emitting device EL for a period of time, and then the first drive control circuit 10 is turned on to the corresponding second light-emitting device EL.

[0095] In the display substrate provided in this embodiment, by setting a second driving control circuit in the second display area, when the driving current generated by the first driving control circuit is conducted to the fifth node, the second driving control circuit disconnects the first driving control circuit from the corresponding second light-emitting device for a period of time to charge the parasitic capacitance generated by the first wire, thereby raising the potential of the fifth node. Afterwards, the second driving control circuit connects the first driving control circuit to the corresponding second light-emitting device, so that the current flowing to each second light-emitting device is basically the same, thereby improving the brightness uniformity of the second display area.

[0096] The display substrate provided in this embodiment can be an organic electroluminescent display substrate, that is, the first light-emitting device and the second light-emitting device can be organic light-emitting diode devices. The display substrate can also be other types of display substrates, which are not limited here.

[0097] In specific implementation, such as Figure 4 As shown, an image sensor can be positioned at the location of the second display area A2, and the image sensor is located on the side of the display substrate away from the light-emitting surface. For example, the image sensor can be a camera. During the image acquisition period, light passes through the gap between adjacent second light-emitting devices in the display substrate and shines onto the image sensor. The image sensor receives the light passing through the display substrate, thereby capturing the corresponding image. In practical applications, the patterns of opaque layers such as metal films and black matrices in the display substrate can be improved to form light-transmitting areas in the gaps between adjacent second light-emitting devices, allowing light to pass through the display substrate. Alternatively, a fingerprint sensor can be used instead of the image sensor to achieve under-display fingerprint recognition. Or, an image sensor and a fingerprint sensor can be simultaneously placed in the second display area, or other photosensitive components can be placed in the second display area; no limitation is made here.

[0098] Optionally, in the embodiments of this disclosure, the first wire can be made of a transparent conductive oxide material such as indium tin oxide (ITO), or other transparent conductive materials can be used, which is not limited here.

[0099] like Figure 5 As shown, Figure 5 In this context, RC_L represents the resistance and parasitic capacitance of the first conductor. The first drive control circuit 10 is coupled to the second drive control circuit 20 through RC_L. Specifically, the first drive control circuit 10 is coupled to RC_L at the fourth node N4, and RC_L is coupled to the second drive control circuit 20 at the fifth node N5. One end of the second light-emitting device EL is coupled to the second light-emitting control circuit 20, and the other end is coupled to the second power supply terminal VSS1. When the driving current generated by the first driving control circuit 10 is conducted to the fifth node N5, the second driving control circuit 20 disconnects the first driving control circuit 10 from the corresponding second light-emitting device EL for a period of time, so that the driving current charges the parasitic capacitance generated by the first wire, thereby raising the potential of the fifth node N5. As the potential of the fifth node N5 continues to rise, the potential at the N5 node in different pixel driving circuits tends to be consistent. Afterwards, the second driving control circuit 20 connects the first driving control circuit 10 to the corresponding second light-emitting device EL. Since the parasitic capacitance has been charged in advance, the voltage difference between the fifth node N5 and the second power supply terminal VSS1 in different pixel driving circuits is basically consistent, thereby making the current flowing to each second light-emitting device EL basically consistent, improving the brightness uniformity of the second display area.

[0100] Optionally, in the display substrate provided in the embodiments of this disclosure, such as Figure 5 As shown, the first drive control circuit 10 may include:

[0101] The first drive control sub-circuit 101 is coupled to the first node N1, the second node N2, the third node N3, the first power supply terminal VDD1 and the second power supply terminal VSS1 respectively, and is configured to generate a drive current to drive the second light-emitting device EL according to the signals of the first node N1, the second node N2 and the third node N3.

[0102] The first threshold compensation sub-circuit 102 is coupled to the first scan signal terminal Ga1, the first node N1 and the third node N3 respectively, and is configured to perform threshold compensation on the first drive control sub-circuit 101 under the control of the first scan signal terminal Ga1.

[0103] The first light-emitting control sub-circuit 103 is coupled to the first power supply terminal VDD1, the fourth node N4, the first light-emitting control signal terminal EM1, the second node N2, and the third node N3, respectively. It is configured to, under the control of the first light-emitting control signal terminal EM1, turn on the first power supply terminal VDD1 and the second node N2, and turn on the third node N3 and the fourth node N4; the fourth node N4 is the node between the first light-emitting control sub-circuit 103 and the first wire.

[0104] The first data writing sub-circuit 104 is coupled to the first scan signal terminal Ga1, the first data signal terminal Da1 and the second node N2 respectively, and is configured to provide the data signal of the first data signal terminal Da1 to the second node N2 under the control of the first scan signal terminal Ga1.

[0105] The first storage sub-circuit 105 is coupled to the first power supply terminal VDD1 and the first node N1 respectively, and is configured to store data signals.

[0106] In this embodiment of the disclosure, through the cooperation of the first driving control sub-circuit 101, the first threshold compensation sub-circuit 102, the first light emission control sub-circuit 103, the first data writing sub-circuit 104 and the first storage sub-circuit 105, the first driving control circuit 10 can generate a driving current to drive the second light emission device EL.

[0107] Specifically, in the display substrate provided in the embodiments of this disclosure, Figure 6 To and Figure 5 The specific structural diagram of the corresponding pixel driving circuit is as follows: Figure 6 As shown, the first drive control sub-circuit 101 may include: a first switching transistor T1;

[0108] The control terminal g of the first switching transistor T1 is coupled to the first node N1, the first electrode s is coupled to the second node N2, and the second electrode d is coupled to the third node N3.

[0109] The above is merely an example illustrating the specific structure of the first driving control sub-circuit in the display substrate provided in the embodiments of this disclosure. In specific implementation, the specific structure of the first driving control sub-circuit is not limited to the structure provided in the embodiments of this disclosure, and may also be other structures known to those skilled in the art, which are not limited here.

[0110] In specific implementation, the display substrate provided in the embodiments of this disclosure, such as Figure 6 As shown, the first threshold compensation sub-circuit 102 may include: a second switching transistor T2;

[0111] The control terminal g of the second switching transistor T2 is coupled to the first scanning signal terminal Ga1, the first electrode s is coupled to the first node N1, and the second electrode d is coupled to the third node N3.

[0112] The above is merely an example illustrating the specific structure of the first threshold compensation sub-circuit in the display substrate provided in the embodiments of this disclosure. In specific implementations, the specific structure of the first threshold compensation sub-circuit is not limited to the structure provided in the embodiments of this disclosure, and may also be other structures known to those skilled in the art, which are not limited here.

[0113] Optionally, in the display substrate provided in the embodiments of this disclosure, such as Figure 6 As shown, the first light-emitting control sub-circuit 103 may include: a third switching transistor T3 and a fourth switching transistor T4;

[0114] The control terminal g of the third switching transistor T3 is coupled to the first light-emitting control signal terminal EM1, the first electrode s is coupled to the first power supply terminal VDD1, and the second electrode d is coupled to the second node N2.

[0115] The control terminal g of the fourth switching transistor T4 is coupled to the first light-emitting control signal terminal EM1, the first electrode s is coupled to the third node N3, and the second electrode d is coupled to the fourth node N4.

[0116] The above are merely illustrative examples illustrating the specific structure of the first light-emitting control sub-circuit in the display substrate provided in the embodiments of this disclosure. In specific implementations, the specific structure of the first light-emitting control sub-circuit is not limited to the structure provided in the embodiments of this disclosure, and may also be other structures known to those skilled in the art, which are not limited here.

[0117] In practical applications, the display substrates provided in the embodiments of this disclosure, such as Figure 6 As shown, the first data writing sub-circuit 104 may include: a fifth switching transistor T5;

[0118] The control terminal g of the fifth switching transistor T5 is coupled to the first scan signal terminal Ga1, the first terminal s is coupled to the first data signal terminal Da1, and the second terminal d is coupled to the second node N2.

[0119] The above is merely an example illustrating the specific structure of the first data writing sub-circuit in the display substrate provided in the embodiments of this disclosure. In specific implementations, the specific structure of the first data writing sub-circuit is not limited to the structure provided in the embodiments of this disclosure, and may also be other structures known to those skilled in the art, which are not limited here.

[0120] Optionally, in the display substrate provided in the embodiments of this disclosure, such as Figure 6 As shown, the first storage sub-circuit 105 may include: a first capacitor C1;

[0121] The first electrode c1 of the first capacitor C1 is coupled to the first power supply terminal VDD1, and the second electrode c2 is coupled to the first node N1.

[0122] The above are merely illustrative examples illustrating the specific structure of the first storage sub-circuit in the display substrate provided in the embodiments of this disclosure. In specific implementations, the specific structure of the first storage sub-circuit is not limited to the structure provided in the embodiments of this disclosure, and may also be other structures known to those skilled in the art, which are not limited here.

[0123] In specific implementation, the display substrate provided in the embodiments of this disclosure, such as Figure 5 As shown, the first drive control circuit 10 may further include: a first reset sub-circuit 106 and a second reset sub-circuit Fw;

[0124] The first reset sub-circuit 106 is coupled to the first node N1, the first reset control terminal Re1 and the first reference signal terminal Vi1 respectively, and is configured to provide the signal of the first reference signal terminal Vi1 to the first node N1 under the control of the first reset control terminal Re1, so as to realize the reset of the first drive control sub-circuit 101.

[0125] The second reset sub-circuit Fw is coupled to the second light-emitting device EL, the second reset control terminal Re2 and the second reference signal terminal Vi2 respectively. It is configured to provide the signal of the second reference signal terminal Vi2 to the second light-emitting device EL under the control of the second reset control terminal Re2, so as to realize the reset of the second light-emitting device EL.

[0126] The second drive control circuit 20 includes:

[0127] The second light-emitting control sub-circuit 201 is coupled to the first light-emitting control sub-circuit 103, the second light-emitting device EL, and the second light-emitting control signal terminal EM2, respectively. It is configured to, under the control of the second light-emitting control signal terminal EM2, turn on the first light-emitting control sub-circuit 103 and the second light-emitting device EL. By setting the second light-emitting control sub-circuit 201, the conduction relationship between the first light-emitting control circuit 103 and the second light-emitting device EL can be controlled under the control of the second light-emitting control signal terminal EM2. This allows for pre-charging of the parasitic capacitance of the first conductor before the driving current flows to the second light-emitting device EL, and for controlling the driving current to flow to the second light-emitting device EL after charging the parasitic capacitance. In specific implementations, the second light-emitting control sub-circuit 201 and the corresponding second light-emitting device EL can be set as follows: Figure 4 In the region W shown.

[0128] exist Figure 5 In the circuit, the second reset sub-circuit Fw is coupled to the fourth node N4, that is, the second reset sub-circuit Fw and the second light-emitting control sub-circuit 201 are coupled through the first wire. Therefore, Figure 5 In the structure shown, the second reset circuit Fw is located in the border area.

[0129] Figure 7 This is another schematic diagram of the pixel driving circuit in an embodiment of this disclosure, such as... Figure 7 As shown, in the display substrate provided in this embodiment, the first driving control circuit 10 includes:

[0130] The first reset sub-circuit 106 is coupled to the first node N1, the first reset control terminal Re1 and the first reference signal terminal Vi1 respectively, and is configured to provide the signal of the first reference signal terminal Vi1 to the first node N1 under the control of the first reset control terminal Re1, so as to realize the reset of the first drive control sub-circuit 101.

[0131] The second drive control circuit 20 includes: a second reset sub-circuit Fw and a second light-emitting control sub-circuit 201;

[0132] The second reset sub-circuit Fw is coupled to the second light-emitting device EL, the second reset control terminal Re2 and the second reference signal terminal Vi2 respectively. It is configured to provide the signal of the second reference signal terminal Vi2 to the second light-emitting device EL under the control of the second reset control terminal Re2, so as to realize the reset of the second light-emitting device EL.

[0133] The second light-emitting control sub-circuit 201 is coupled to the first light-emitting control sub-circuit 103, the second light-emitting device EL, and the second light-emitting control signal terminal EM2, respectively. It is configured to turn on the first light-emitting control sub-circuit 103 and the second light-emitting device EL under the control of the second light-emitting control signal terminal EM2. By setting the second light-emitting control sub-circuit 201, the conduction relationship between the first light-emitting control circuit 103 and the second light-emitting device EL can be controlled under the control of the second light-emitting control signal terminal EM2. Thus, before the driving current flows to the second light-emitting device EL, the parasitic capacitance of the first wire is pre-charged, and after the parasitic capacitance is charged, the driving current is controlled to flow to the second light-emitting device EL.

[0134] exist Figure 7 In the circuit, the second reset sub-circuit Fw is coupled to the fifth node N5, that is, the second reset sub-circuit Fw is coupled to the first light-emitting control sub-circuit 103 through the first wire. Therefore, Figure 7 In the structure shown, the second reset sub-circuit Fw is located in the second display area. For example, the second reset sub-circuit Fw, the second light-emitting control sub-circuit 201, and the corresponding second light-emitting device EL can all be located in the second display area. Figure 4 In the region W shown.

[0135] Figure 8 To and Figure 7 The specific structural diagram of the corresponding pixel driving circuit is as follows: Figure 6 and Figure 8 As shown, in the above-described display substrate provided in this embodiment, the first reset sub-circuit 106 may include: a sixth switching transistor T6;

[0136] The control terminal g of the sixth switching transistor T6 is coupled to the first reset control terminal Re1, the first electrode s is coupled to the first reference signal terminal Vi1, and the second electrode d is coupled to the first node N1.

[0137] The above is merely an example illustrating the specific structure of the first reset sub-circuit in the display substrate provided in the embodiments of this disclosure. In specific implementation, the specific structure of the first reset sub-circuit is not limited to the structure provided in the embodiments of this disclosure, and may also be other structures known to those skilled in the art, which are not limited here.

[0138] Optionally, in the display substrate provided in the embodiments of this disclosure, such as Figure 6 and Figure 8 As shown, the second reset circuit Fw may include: a seventh switching transistor T7;

[0139] The control terminal g of the seventh switching transistor T7 is coupled to the second reset control terminal Re2, the first terminal s is coupled to the second reference signal terminal Vi2, and the second terminal d is coupled to the second light-emitting device EL.

[0140] The above are merely illustrative examples illustrating the specific structure of the second reset circuit in the display substrate provided in the embodiments of this disclosure. In specific implementations, the specific structure of the second reset circuit is not limited to the structure provided in the embodiments of this disclosure, but may also be other structures known to those skilled in the art, which are not limited here.

[0141] In specific implementation, the display substrate provided in the embodiments of this disclosure, such as Figure 6 and Figure 8 As shown, the second light-emitting control sub-circuit 201 may include: an eighth switching transistor T8;

[0142] The control terminal g of the eighth switching transistor T8 is coupled to the second light control signal terminal EM2, the first electrode s is coupled to the first light-emitting control sub-circuit 103, and the second electrode d is coupled to the second light-emitting device EL.

[0143] The above are merely illustrative examples illustrating the specific structure of the second light-emitting control sub-circuit in the display substrate provided in the embodiments of this disclosure. In specific implementations, the specific structure of the second light-emitting control sub-circuit is not limited to the structure provided in the embodiments of this disclosure, and may also be other structures known to those skilled in the art, which are not limited here.

[0144] It should be noted that in the embodiments of this disclosure, in the pixel driving circuit described above, the first reset sub-circuit 106 and the second reset sub-circuit Fw are connected to different reference signal terminals, that is, the first reset sub-circuit 106 is coupled to the first reference signal terminal Vi1, and the second reset sub-circuit Fw is coupled to the second reference signal terminal Vi2. In specific implementation, the first reset sub-circuit 106 and the second reset sub-circuit Fw can also be coupled to the same reference signal terminal. Similarly, the first reset sub-circuit 106 and the second reset sub-circuit Fw can also be coupled to the same reset control terminal. This is not limited here.

[0145] Optionally, in the display substrate provided in the embodiments of this disclosure, reference is made to... Figure 4 It may also include: a plurality of third driving control circuits 30 respectively coupled to each of the first light-emitting devices EL';

[0146] The third driving control circuit 30 is located within the first display area A1. For example, the third driving control circuit 30 can be located within the pixel circuit P, that is, the third driving control circuit 30 is located near the corresponding first light-emitting device EL'.

[0147] The third drive control circuit 30 is configured to generate a drive current for driving the corresponding first light-emitting device EL'.

[0148] In this embodiment of the present disclosure, by setting a third driving control circuit that is respectively coupled to each of the first light-emitting devices, the corresponding first light-emitting devices can be driven to emit light, thereby achieving a display effect with better image quality.

[0149] In specific implementation, the display substrate provided in the embodiments of this disclosure, Figure 9 This is a schematic diagram of the structure of the third drive control circuit in an embodiment of this disclosure, as shown below. Figure 9 As shown, the third drive control circuit 30 may include:

[0150] The second drive control sub-circuit 301 is coupled to the sixth node N6, the seventh node N7, the eighth node N8, the third power supply terminal VDD2 and the fourth power supply terminal VSS2 respectively, and is configured to generate a drive current to drive the first light-emitting device EL' according to the signals of the sixth node N6, the seventh node N7 and the eighth node N8.

[0151] The second threshold compensation sub-circuit 302 is coupled to the second scan signal terminal Ga2, the sixth node N6 and the eighth node N8 respectively, and is configured to perform threshold compensation on the second drive control sub-circuit 301 under the control of the second scan signal terminal Ga2.

[0152] The third light-emitting control sub-circuit 303 is coupled to the third power supply terminal VDD2, the fourth power supply terminal VSS2, the third light-emitting control signal terminal EM3, the seventh node N7 and the eighth node N8 respectively, and is configured to couple the third power supply terminal VDD2 to the seventh node N7 and the eighth node N8 to the fourth power supply terminal VSS2 under the control of the third light-emitting control signal terminal EM3.

[0153] The second data writing sub-circuit 304 is coupled to the second scan signal terminal Ga2, the second data signal terminal Da2 and the seventh node N7 respectively, and is configured to provide the data signal of the second data signal terminal Da2 to the seventh node N7 under the control of the second scan signal terminal Ga2.

[0154] The second storage sub-circuit 305 is coupled to the third power supply terminal VDD2 and the sixth node N6 respectively, and is configured to store data signals.

[0155] The third reset sub-circuit 306 is coupled to the sixth node N6, the third reset control terminal Re3 and the third reference signal terminal Vi3 respectively, and is configured to provide the signal of the third reference signal terminal Vi3 to the sixth node N6 under the control of the third reset control terminal Re3.

[0156] The fourth reset sub-circuit 307 is coupled to the first light-emitting device EL', the fourth reset control terminal Re4, and the fourth reference signal terminal Vi4, respectively. It is configured to provide the signal of the fourth reference signal terminal Vi4 to the first light-emitting device EL' under the control of the fourth reset control terminal Re4. For example, in the figure, the fourth reset sub-circuit 307 is coupled to the first light-emitting device EL' at the ninth node N9.

[0157] In this embodiment of the disclosure, through the mutual cooperation of the second drive control sub-circuit 301, the second threshold compensation sub-circuit 302, the third light emission control sub-circuit 303, the second data writing sub-circuit 304, the second storage sub-circuit 305, the third reset sub-circuit 306 and the fourth reset sub-circuit 307, the second drive control circuit 30 can generate a drive current to drive the first light emission device EL'.

[0158] Specifically, in the display substrate provided in the embodiments of this disclosure, Figure 10 To and Figure 9 The specific structural diagram of the corresponding third drive control circuit is as follows: Figure 10 As shown, the second drive control sub-circuit 301 may include: an eleventh switching transistor T11;

[0159] The control terminal g of the eleventh switching transistor T11 is coupled to the sixth node N6, the first terminal s is coupled to the seventh node N7, and the second terminal d is coupled to the eighth node N8.

[0160] The second threshold compensation sub-circuit 302 may include: a twelfth switching transistor T12;

[0161] The control terminal g of the twelfth switching transistor T12 is coupled to the second scanning signal terminal Ga2, the first terminal s is coupled to the sixth node N6, and the second terminal d is coupled to the eighth node N8.

[0162] The third light-emitting control sub-circuit 303 may include: a thirteenth switching transistor T13 and a fourteenth switching transistor T14;

[0163] The control terminal g of the thirteenth switching transistor T13 is coupled to the third light-emitting control signal terminal EM3, the first terminal s is coupled to the third power supply terminal VDD2, and the second terminal d is coupled to the seventh node N7.

[0164] The control terminal g of the fourteenth switching transistor T14 is coupled to the third light-emitting control signal terminal EM3, the first terminal s is coupled to the eighth node N8, and the second terminal d is coupled to the fourth power supply terminal VSS2.

[0165] The second data writing sub-circuit 304 may include: the fifteenth switching transistor T15;

[0166] The control terminal g of the fifteenth switching transistor T15 is coupled to the second scan signal terminal Ga2, the first terminal s is coupled to the second data signal terminal Da2, and the second terminal d is coupled to the seventh node N7.

[0167] The second storage sub-circuit 305 may include: a second capacitor C2;

[0168] The first electrode c3 of the second capacitor C2 is coupled to the third power supply terminal VDD2, and the second electrode c4 is coupled to the sixth node N6.

[0169] The third reset sub-circuit 306 is coupled to the sixth node N6, the third reset control terminal Re3 and the third reference signal terminal Vi3 respectively, and is configured to provide the signal of the third reference signal terminal Vi3 to the sixth node N6 under the control of the third reset control terminal Re3, so as to realize the reset of the second drive control sub-circuit 301.

[0170] The second reset sub-circuit 307 is coupled to the first light-emitting device EL', the fourth reset control terminal Re4 and the fourth reference signal terminal Vi4 respectively, and is configured to provide the signal of the fourth reference signal terminal Vi4 to the first light-emitting device EL' under the control of the fourth reset control terminal Re4, so as to realize the reset of the first light-emitting device EL'.

[0171] The above are merely illustrative examples illustrating the specific structures of the second driving control sub-circuit, the second threshold compensation sub-circuit, the third light emission control sub-circuit, the second data writing sub-circuit, the second storage sub-circuit, the third reset sub-circuit, and the fourth reset sub-circuit in the display substrate provided in the embodiments of this disclosure. In specific implementations, the specific structures of the above sub-circuits are not limited to the structures provided in the embodiments of this disclosure, and may also be other structures known to those skilled in the art, which are not limited here.

[0172] It should be noted that in the embodiments of this disclosure, in the third drive control circuit described above, the third reset sub-circuit 306 and the fourth reset sub-circuit 307 are connected to different reference signal terminals, that is, the third reset sub-circuit 306 is coupled to the third reference signal terminal Vi3, and the fourth reset sub-circuit 307 is coupled to the fourth reference signal terminal Vi4. In specific implementation, the third reset sub-circuit 306 and the fourth reset sub-circuit 307 can also be coupled to the same reference signal terminal. Similarly, the third reset sub-circuit 306 and the fourth reset sub-circuit 307 can also be coupled to the same reset control terminal. This is not limited here.

[0173] Based on the same inventive concept, this disclosure also provides a display device, including the aforementioned display substrate. This display device can be applied to any product or component with display functionality, such as mobile phones, tablets, televisions, monitors, laptops, digital photo frames, and navigators. Since the principle by which this display device solves the problem is similar to that of the aforementioned display substrate, the implementation of this display device can refer to the implementation of the aforementioned display substrate; repeated details will not be elaborated further.

[0174] Optionally, the display device provided in the embodiments of this disclosure may further include: an image acquisition unit;

[0175] The image acquisition device is located in the second display area of ​​the display substrate, and the image acquisition device is located on the side of the display substrate away from the light-emitting surface.

[0176] In practical implementation, the image acquisition device can be a camera. During the image acquisition period, light passes through the gap between adjacent second light-emitting devices in the display substrate and shines onto the image acquisition device. The image acquisition device receives the light passing through the display substrate, thereby capturing the corresponding image. In practical applications, the patterns of opaque layers such as metal films and black matrices in the display substrate can be improved to form light-transmitting areas in the gaps between adjacent second light-emitting devices, allowing light to pass through the display substrate. Alternatively, a fingerprint recognition sensor can be used instead of the image acquisition device to achieve under-display fingerprint recognition. Or, both an image acquisition device and a fingerprint recognition sensor can be simultaneously placed in the second display area; no limitation is made here.

[0177] Based on the same inventive concept, this disclosure also provides a pixel driving circuit. Since the principle of solving the problem by the pixel driving circuit is similar to that of the above-described display substrate, the implementation of the pixel driving circuit can refer to the implementation of the above-described display substrate, and the repeated parts will not be described again.

[0178] The pixel driving circuit provided in the embodiments of this disclosure, such as Figure 5 As shown, the pixel driving circuit is configured to drive the second light-emitting device EL; the pixel driving circuit may include:

[0179] The first drive control circuit 10 is configured to generate a drive current for driving the corresponding second light-emitting device EL;

[0180] The second drive control circuit 20 is coupled to the first drive control circuit 10 via a first wire, and the second drive control circuit 20 is coupled to the corresponding second light-emitting device EL. It is configured to disconnect the first drive control circuit 10 from the corresponding second light-emitting device EL for a period of time when the drive current is conducted between the second drive control circuit 20 and the first wire, and then turn the first drive control circuit 10 and the corresponding second light-emitting device 20 on.

[0181] In this embodiment of the present disclosure, by setting a second driving control circuit, when the driving current generated by the first driving control circuit is conducted to the fifth node, the second driving control circuit disconnects the first driving control circuit from the corresponding second light-emitting device for a period of time to charge the parasitic capacitance generated by the first wire, thereby raising the potential of the fifth node. Afterwards, the second driving control circuit connects the first driving control circuit to the corresponding second light-emitting device, which can make the current flowing to each second light-emitting device basically the same, thereby improving the brightness uniformity of the second display area.

[0182] Based on the same inventive concept, this disclosure also provides a driving method for the above-described pixel driving circuit. Since the principle of this driving method in solving the problem is similar to that of the above-described pixel driving circuit, the implementation of this driving method can refer to the implementation of the above-described pixel driving circuit, and the repeated parts will not be described again.

[0183] The driving method of the pixel driving circuit provided in the embodiments of this disclosure, such as Figure 11 As shown, it includes:

[0184] S401. In the first time period, the first driving control circuit is controlled to generate a driving current to drive the corresponding second light-emitting device. When the driving current is conducted between the second driving control circuit and the first wire, the first driving control circuit is controlled to disconnect from the corresponding second light-emitting device.

[0185] S402, in the second time period, control the first drive control circuit to conduct with the corresponding second light-emitting device.

[0186] In the driving method provided in this embodiment, during the first time period, when the driving current is conducted between the second driving control circuit and the first wire (i.e., the fifth node), the first driving control circuit is controlled to disconnect from the corresponding second light-emitting device to charge the parasitic capacitance generated by the first wire, thereby raising the potential of the fifth node. During the second time period, the first driving control circuit is controlled to conduct to the corresponding second light-emitting device, so that the current flowing to each second light-emitting device is basically consistent, thereby improving the brightness uniformity of the second display area.

[0187] The following is based on Figures 5 to 8 Taking the pixel driving circuit shown as an example, combined with Figure 12 The circuit timing diagram shown illustrates the driving method described above in the embodiments of this disclosure.

[0188] In specific implementation, the above-mentioned driving method provided in this disclosure embodiment may include step S401, which may include:

[0189] During the first sub-time period t1, a valid signal is applied to the first reset control terminal Re1 to provide the signal of the first reference signal terminal Vi1 to the first node N1, thereby resetting the first drive control sub-circuit 101.

[0190] During the second sub-time period t2, valid signals are applied to the first scan signal terminal Ga1, the second reset control terminal Re, and the second light emission control signal terminal EM2. The first scan signal terminal Ga1 is applied with a valid signal. Under the control of the first scan signal terminal Ga1, the first threshold compensation sub-circuit 102 performs threshold compensation on the first drive control sub-circuit 101 and provides the data signal from the first data signal terminal Da1 to the second node N2. The second reset control terminal Re2 and the second light emission control signal terminal EM2 are applied with valid signals. Under the control of the second light emission control signal terminal EM2, the fourth node N4 (or the fifth node N5) is connected to the second light emission device EL. Under the control of the second reset control terminal Re2, the signal from the second reference signal terminal Vi2 is provided to the second light emission device EL, resetting the second light emission device EL.

[0191] During the third sub-time period t3, the loading of a valid signal to the second light-emitting control signal terminal EM2 is stopped, and a valid signal is loaded to the first light-emitting control signal terminal EM1. This disconnects the first light-emitting control circuit 103 from the second light-emitting device EL, thereby charging the parasitic capacitance generated by the first wire and raising the potential of the fifth node N5.

[0192] Furthermore, in step S401 above, after stopping the loading of a valid signal onto the second light-emitting control signal terminal EM2, a valid signal is loaded onto the first light-emitting control signal terminal EM1. This avoids leakage during the charging of the parasitic capacitance generated in the first wire. Otherwise, during the short period when a valid signal is initially loaded onto the first light-emitting control signal terminal EM1, current will flow through the second light-emitting device EL, causing it to emit light. Especially in high grayscale displays, due to the large driving current, the second light-emitting device EL will be clearly visible to light up briefly during the first time period. Specifically, during the second sub-time period t2, after loading a valid signal onto the second light-emitting control signal terminal EM2 for a period of time, the loading of a valid signal onto the second light-emitting control signal terminal EM2 can be stopped, and then a valid signal can be loaded onto the first light-emitting control signal terminal EM1 during the third sub-time period t3. Alternatively, during the third sub-time period t3, the loading of a valid signal onto the second light-emitting control signal terminal EM2 can be stopped first, and then a valid signal can be loaded onto the first light-emitting control signal terminal EM1.

[0193] In specific implementation, step S402 of the driving method provided in this embodiment may include:

[0194] During the second time period t4, valid signals are applied to the first light-emitting control signal terminal EM1 and the second light-emitting control signal terminal EM2, thereby controlling the first driving control circuit to conduct with the corresponding second light-emitting device, so that the second light-emitting device emits light.

[0195] The following is Figure 6 and Figure 8 Taking the pixel driving circuit shown as an example, combined with Figure 12 The circuit timing diagram shown describes the operation of the display substrate provided in the embodiments of this disclosure. Specifically, using... Figures 6 to 8 Taking the P-type transistors as an example, and using a low-level signal as the effective signal, the explanation will be provided.

[0196] Figure 12 In the diagram, re1 represents the signal loaded at the first reset control terminal Re1, re2 represents the signal loaded at the second reset control terminal Re2, ga represents the signal loaded at the first scan signal terminal Ga1, em1 represents the signal loaded at the first light emission control signal terminal EM1, and em2 represents the signal loaded at the second light emission control signal terminal EM2.

[0197] During the first sub-time period t1, the signal re1 loaded at the first reset control terminal Re1 is at a low level, which turns on the sixth switching transistor T6. The signal at the first reference signal terminal Vi1 is provided to the first node N1 to reset the control terminal of the first switching transistor T1.

[0198] During the second sub-time period t2, the signal ga loaded on the first scan signal terminal Ga1 is at a low level, turning on the second switching transistor T2 and the fifth switching transistor T5. The fifth switching transistor T5 turns on, providing the data signal of the first data signal terminal Da1 to the second node N2. The second switching transistor T2 turns on, turning on the first node N1 and the third node N3, which in turn turns on the first switching transistor T1, allowing the data signal to fill the first node N1. Meanwhile, the signal re2 loaded on the second reset control terminal Re2 is at a low level, turning on the seventh switching transistor T7. The signal of the second reference signal terminal Vi2 is provided to the fourth node N4 and the fifth node N5 to reset the fourth node N4 and the fifth node N5. At the same time, the signal em2 loaded on the second light emission control signal terminal EM2 is also at a low level, turning on the eighth switching transistor T8. The signal of the second reference signal terminal Vi2 is provided to the second light emission device EL to reset the second light emission device EL.

[0199] During the third sub-time period t3, the signal em1 loaded on the first light emission control signal terminal EM1 is at a low level, and the third switching transistor T3 and the fourth switching transistor T4 are turned on, so that the first power supply terminal VDD1 is connected to the second node N2, and the third node N3 is connected to the fourth node N4. The third switching transistor T3 provides the voltage of the first power supply terminal VDD1 to the first terminal s of the first switching transistor T1, so that the first switching transistor T1 generates a driving current. Meanwhile, the signal em2 loaded on the second light emission control signal terminal EM2 is at a high level, and the eighth switching transistor T8 is turned off, so that the driving current continuously flows into the parasitic capacitance generated by the first wire. The voltages of the fourth node N4 and the fifth node N5 continuously rise. After the parasitic capacitance is fully charged, the voltages of the fourth node N4 (or the fifth node N5) in each pixel driving circuit tend to be consistent.

[0200] In addition, to avoid leakage during the charging process of the parasitic capacitance generated in the first conductor, a low-level signal can be applied to the second light-emitting control signal terminal EM2 for a period of time during the second sub-time period t2, followed by a high-level signal. In the third sub-time period t3, a low-level signal can be applied to the first light-emitting control signal terminal EM1. Alternatively, a high-level signal can be applied to the second light-emitting control signal terminal EM2 first, followed by a low-level signal applied to the first light-emitting control signal terminal EM1 during the third sub-time period t3.

[0201] In the fourth sub-time period t4, the signal em1 loaded at the first light-emitting control signal terminal EM1 is at a low level, and the signal em2 loaded at the second light-emitting control signal terminal EM2 is at a low level, thereby causing the driving current to flow to the second light-emitting device EM, causing the second light-emitting device EM to emit light. Because the parasitic capacitance generated by the first conductor is pre-charged in the third sub-time period t3, the voltage difference between the fourth node N4 (or the fifth node N5) and the second power supply terminal VSS1 is large, resulting in a larger average current within one frame. This avoids the phenomenon of delayed lighting of the second light-emitting device EL and improves the uneven display of the second display area in low grayscale images.

[0202] In practice, other methods for compensating for the parasitic capacitance of the first conductor can also be used to further eliminate the influence of the resistance and parasitic capacitance of the first conductor on the display effect.

[0203] Furthermore, the display substrate, driving method, and display device provided in this disclosure improve the uneven brightness of the low grayscale display in the second display area without affecting the display effect of the high grayscale in the second display area. The following is a comparative analysis using two comparative examples.

[0204] Comparative Example 1: Due to the higher luminous efficiency of green pixels, the current of green pixels is the lowest under the same grayscale. Therefore, the display effect of green pixels is used to reflect the low grayscale display effect. Table 1 shows the correspondence between the duration of the third sub-time period, the load of the first conductor, and the current of the second light-emitting device. As shown in Table 1, "G = 5.1V" in Table 1 indicates that the voltage difference between the first and second power supply terminals is 5.1V. The maximum resistance of the first conductor in Table 1 is 896kΩ, that is, the resistance corresponding to 100% is 896kΩ. The maximum parasitic capacitance of the first conductor is 3.6pF. It can be clearly seen from Table 1 that the duration of the third sub-time period t3 is between 200μs and 2m. When the resistance of the first conductor changes between s, the difference in the current of the second light-emitting device does not exceed 2%. Within the adjustment range of the gamma voltage, when the duration of the third sub-time period t3 is 0, the difference in the current of the second light-emitting device is obvious, which means that the brightness uniformity of the second display area is poor when displaying at low grayscale. Therefore, when displaying at low grayscale, the brightness unevenness of the second display area caused by the first conductor can be improved by adjusting the duration of the third sub-time period t3. Furthermore, while improving the brightness uniformity of the second display area, the duration of the third sub-time period t3 should be shortened as much as possible to avoid affecting the light emission effect of the fourth sub-time period t4.

[0205] Table 1

[0206]

[0207] Comparative Example 2: Due to the lower luminous efficiency of blue pixels, the current of blue pixels is larger at the same grayscale. Therefore, the display effect of blue pixels is used to reflect the display effect of high grayscale. Table 2 shows the correspondence between the duration of the third sub-time period, the load of the first conductor, and the current of the second light-emitting device. As shown in Table 2, "B = 2.8V" in Table 2 indicates that the voltage difference between the first power supply terminal and the second power supply terminal is 2.8V. The maximum resistance of the first conductor in Table 2 is 896kΩ, that is, the resistance corresponding to 100% is 896kΩ. The maximum parasitic capacitance of the first conductor is 3.6pF. It can be clearly seen from Table 2 that when the duration of the third sub-time period t3 varies between 0 and 2ms, the resistance of the first conductor is different, and the difference in the current of the second light-emitting device does not exceed 2%, which is within the adjustment range of the gamma voltage. Furthermore, although the current of the second light-emitting device is different when the duration of the third sub-time period t3 is different, the current uniformity of the second light-emitting device is better when the duration of the third sub-time period t3 is fixed. Therefore, the third sub-time period t3 will not affect the display effect of high grayscale in the second display area.

[0208] Table 2

[0209]

[0210] In the pixel driving circuit, driving method, display substrate, and display device provided in the embodiments of this disclosure, by setting a second driving control circuit in the second display area, when the driving current generated by the first driving control circuit is conducted to the fifth node, the second driving control circuit disconnects the first driving control circuit from the corresponding second light-emitting device for a period of time to charge the parasitic capacitance generated by the first wire, thereby raising the potential of the fifth node. Afterwards, the second driving control circuit connects the first driving control circuit to the corresponding second light-emitting device, which can make the current flowing to each second light-emitting device basically consistent, thereby improving the brightness uniformity of the second display area.

[0211] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

[0212] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of the embodiments of this disclosure. Therefore, if these modifications and variations to the embodiments of this disclosure fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include these modifications and variations.

Claims

1. A display substrate, wherein: The display substrate comprises: a display area and a frame area; The display area includes: a first display area and a second display area; the first display area includes a plurality of first light emitting devices, and the second display area includes a plurality of second light emitting devices; The display substrate comprises: a plurality of pixel driving circuits respectively coupled to the second light emitting devices; The pixel driving circuit includes: a first driving control circuit located in the frame area, and a second driving control circuit located in the second display area; the first driving control circuit is coupled to the second driving control circuit through a first wire, and the second driving control circuit is coupled to the corresponding second light-emitting device; The first drive control circuit is configured to generate a drive current for driving the corresponding second light emitting device; The second drive control circuit is configured to disconnect the first drive control circuit from the corresponding second light-emitting device for a period of time when the drive current is conducted between the second drive control circuit and the first wire, and then connect the first drive control circuit to the corresponding second light-emitting device; Wherein, the first drive control circuit includes: A first drive control subcircuit is coupled to the first node, the second node, the third node, the first power supply terminal and the second power supply terminal respectively, and is configured to generate a drive current for driving the second light-emitting device according to signals of the first node, the second node and the third node; A first threshold compensation subcircuit is coupled to the first scan signal terminal, the first node and the third node respectively, and is configured to perform threshold compensation on the first drive control subcircuit under the control of the first scan signal terminal; A first light-emitting control subcircuit is coupled to the first power supply terminal, the fourth node, the first light-emitting control signal terminal, the second node, and the third node, respectively, and is configured to conduct the first power supply terminal with the second node and conduct the third node with the fourth node under the control of the first light-emitting control signal terminal; A first data writing sub-circuit is coupled to the first scan signal terminal, the first data signal terminal and the second node respectively, and is configured to provide the data signal of the first data signal terminal to the second node under the control of the first scan signal terminal; The first storage sub-circuit is coupled to the first power supply terminal and the first node respectively, and is configured to store a data signal.

2. The display substrate according to claim 1, wherein: The first drive control subcircuit includes: a first switch transistor; The control terminal of the first switch transistor is coupled to the first node, the first electrode is coupled to the second node, and the second electrode is coupled to the third node.

3. The display substrate according to claim 1, wherein: The first threshold compensation sub-circuit includes: a second switch transistor; The control terminal of the second switch transistor is coupled to the first scan signal terminal, the first electrode is coupled to the first node, and the second electrode is coupled to the third node.

4. The display substrate according to claim 1, wherein: The first light emitting control subcircuit comprises: a third switch transistor and a fourth switch transistor; The control terminal of the third switch transistor is coupled to the first light emitting control signal terminal, the first electrode is coupled to the first power supply terminal, and the second electrode is coupled to the second node; The control terminal of the fourth switch transistor is coupled to the first light emitting control signal terminal, the first electrode is coupled to the third node, and the second electrode is coupled to the fourth node.

5. The display substrate according to claim 1, wherein: The first data writing sub-circuit comprises: a fifth switch transistor; The control terminal of the fifth switch transistor is coupled to the first scan signal terminal, the first electrode is coupled to the first data signal terminal, and the second electrode is coupled to the second node.

6. The display substrate according to claim 1, wherein: The first storage sub-circuit includes: a first capacitor; A first electrode of the first capacitor is coupled to the first power supply terminal, and a second electrode of the first capacitor is coupled to the first node.

7. The display substrate according to claim 1, wherein: The first drive control circuit further includes: a first reset subcircuit and a second reset subcircuit; The first reset subcircuit is coupled to the first node, the first reset control terminal and the first reference signal terminal respectively, and is configured to provide the signal of the first reference signal terminal to the first node under the control of the first reset control terminal; The second reset subcircuit is coupled to the second light emitting device, the second reset control terminal and the second reference signal terminal respectively, and is configured to provide the signal of the second reference signal terminal to the second light emitting device under the control of the second reset control terminal; The second drive control circuit comprises: The second light-emitting control subcircuit is coupled to the first light-emitting control subcircuit, the second light-emitting device and the second light-emitting control signal terminal respectively, and is configured to turn on the first light-emitting control subcircuit and the second light-emitting device under the control of the second light-emitting control signal terminal.

8. The display substrate according to claim 1, wherein: The first drive control circuit comprises: A first reset subcircuit is coupled to the first node, the first reset control terminal and the first reference signal terminal respectively, and is configured to provide a signal of the first reference signal terminal to the first node under the control of the first reset control terminal; The second driving control circuit includes: a second resetting subcircuit and a second light emitting control subcircuit; The second reset subcircuit is coupled to the second light emitting device, the second reset control terminal and the second reference signal terminal respectively, and is configured to provide the signal of the second reference signal terminal to the second light emitting device under the control of the second reset control terminal; The second light-emitting control subcircuit is coupled to the first light-emitting control subcircuit, the second light-emitting device and the second light-emitting control signal terminal respectively, and is configured to turn on the first light-emitting control subcircuit and the second light-emitting device under the control of the second light-emitting control signal terminal.

9. The display substrate according to claim 7 or 8, wherein: The first reset sub-circuit comprises: a sixth switch transistor; The control terminal of the sixth switch transistor is coupled to the first reset control terminal, the first electrode is coupled to the first reference signal terminal, and the second electrode is coupled to the first node.

10. The display substrate according to claim 7 or 8, wherein: The second reset sub-circuit comprises: a seventh switch transistor; The control terminal of the seventh switch transistor is coupled to the second reset control terminal, the first electrode is coupled to the second reference signal terminal, and the second electrode is coupled to the second light emitting device.

11. The display substrate according to claim 7 or 8, wherein: The second light emitting control subcircuit comprises: an eighth switch transistor; The control terminal of the eighth switch transistor is coupled to the second light-emitting control signal terminal, the first electrode is coupled to the first light-emitting control subcircuit, and the second electrode is coupled to the second light-emitting device.

12. The display substrate according to any one of claims 1 to 8, wherein: Also includes: a plurality of third driving control circuits respectively coupled to the first light emitting devices; The third driving control circuit is located in the first display area; The third driving control circuit is configured to generate a driving current for driving the corresponding first light-emitting device.

13. The display substrate according to claim 12, wherein: The third drive control circuit comprises: A second drive control subcircuit is coupled to the sixth node, the seventh node, the eighth node, the third power supply terminal and the fourth power supply terminal respectively, and is configured to generate a drive current for driving the first light-emitting device according to signals of the sixth node, the seventh node and the eighth node; A second threshold compensation sub-circuit is coupled to the second scan signal terminal, the sixth node and the eighth node respectively, and is configured to perform threshold compensation on the second drive control sub-circuit under the control of the second scan signal terminal; a third light-emitting control subcircuit, coupled to the third power supply terminal, the fourth power supply terminal, the third light-emitting control signal terminal, the seventh node and the eighth node, respectively, and configured to couple the third power supply terminal to the seventh node and the eighth node to the fourth power supply terminal under the control of the third light-emitting control signal terminal; A second data writing sub-circuit is coupled to the second scan signal terminal, the second data signal terminal and the seventh node respectively, and is configured to provide the data signal of the second data signal terminal to the seventh node under the control of the second scan signal terminal; A second storage sub-circuit, coupled to the third power supply terminal and the sixth node respectively, and configured to store a data signal; A third reset subcircuit is coupled to the sixth node, the third reset control terminal and the third reference signal terminal respectively, and is configured to provide the signal of the third reference signal terminal to the sixth node under the control of the third reset control terminal; The fourth reset subcircuit is coupled to the first light emitting device, the fourth reset control terminal and the fourth reference signal terminal respectively, and is configured to provide the signal of the fourth reference signal terminal to the first light emitting device under the control of the fourth reset control terminal.

14. A display device, wherein: include: The display substrate according to any one of claims 1 to 13.

15. The display device according to claim 14, wherein: Also includes: Image collector; The image collector is located at the second display area of ​​the display substrate, and the image collector is located at a side of the display substrate away from the light emitting surface.

16. A pixel driving circuit, wherein: The pixel driving circuit is configured to drive a second light emitting device; The pixel driving circuit comprises: A first drive control circuit is configured to generate a drive current for driving the corresponding second light emitting device; a second drive control circuit, coupled to the first drive control circuit through a first wire, and the second drive control circuit is coupled to the corresponding second light-emitting device; configured to disconnect the first drive control circuit from the corresponding second light-emitting device for a period of time when the drive current is conducted between the second drive control circuit and the first wire, and then connect the first drive control circuit to the corresponding second light-emitting device; Wherein, the first drive control circuit includes: A first drive control subcircuit is coupled to the first node, the second node, the third node, the first power supply terminal and the second power supply terminal respectively, and is configured to generate a drive current for driving the second light-emitting device according to signals of the first node, the second node and the third node; A first threshold compensation subcircuit is coupled to the first scan signal terminal, the first node and the third node respectively, and is configured to perform threshold compensation on the first drive control subcircuit under the control of the first scan signal terminal; A first light-emitting control subcircuit is coupled to the first power supply terminal, the fourth node, the first light-emitting control signal terminal, the second node, and the third node, respectively, and is configured to conduct the first power supply terminal with the second node and conduct the third node with the fourth node under the control of the first light-emitting control signal terminal; A first data writing sub-circuit is coupled to the first scan signal terminal, the first data signal terminal and the second node respectively, and is configured to provide the data signal of the first data signal terminal to the second node under the control of the first scan signal terminal; The first storage sub-circuit is coupled to the first power supply terminal and the first node respectively, and is configured to store a data signal.

17. A driving method of a pixel driving circuit as claimed in claim 16, wherein: include: In a first time period, controlling the first drive control circuit to generate a drive current for driving the corresponding second light-emitting device, and when the drive current is conducted between the second drive control circuit and the first wire, controlling the first drive control circuit to be disconnected from the corresponding second light-emitting device; In a second time period, controlling the first drive control circuit and the corresponding second light emitting device to be turned on; Wherein, in the first time period, controlling the first drive control circuit to generate a drive current that drives the corresponding second light-emitting device, and when the drive current is conducted to a node between the second drive control circuit and the first wire, controlling the first drive control circuit to be disconnected from the corresponding second light-emitting device, comprises: In the first sub-time period, a valid signal is applied to the first reset control terminal; In the second sub-period, a valid signal is loaded to the first scanning signal terminal, the second reset control terminal and the second light emitting control signal terminal; In the third sub-time period, stop loading the valid signal to the second light-emitting control signal terminal, and load the valid signal to the first light-emitting control signal terminal.

18. The driving method according to claim 17, wherein: After stopping loading the valid signal to the second light emitting control signal terminal, loading the valid signal to the first light emitting control signal terminal.

19. The driving method according to claim 17, wherein: The controlling the first driving control circuit and the corresponding second light emitting device to be turned on in the second time period includes: In the second time period, a valid signal is loaded to the first light-emitting control signal terminal and the second light-emitting control signal terminal.

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