Method for improving the quality of silicon substrate for high electron mobility transistor epitaxial wafer

Abstract

The present disclosure provides a method for preparing high electron mobility transistor epitaxial wafer with improved silicon substrate quality, and belongs to the technical field of semiconductor devices. The silicon substrate comprises a silicon material body and a silicon oxide coating, the silicon material body comprises a first surface and a second surface which are parallel and opposite to each other, and the second surface is coated with the silicon oxide coating. The silicon oxide coating is subjected to supersaturation treatment before the epitaxial material is grown on the first surface, so that the missing parts of the silicon oxide coating can be filled, and the integrity of the silicon oxide coating of the silicon substrate before the epitaxial material is grown is ensured. The silicon oxide coating of the silicon substrate is a complete and uniform layer of material, so that the thickness of the silicon substrate as a whole and the heat transfer are also relatively uniform, which can ensure the uniform growth and reaction of the epitaxial material grown on the silicon substrate, reduce the slip defects caused by the silicon oxide coating in the finally obtained epitaxial wafer, and effectively improve the quality of the high electron mobility transistor.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor device technology, and in particular to a method for fabricating high electron mobility transistor epitaxial wafers that improves the quality of silicon substrates. Background Technology

[0002] HEMT (High Electron Mobility Transistor) is a heterojunction field-effect transistor widely used in various electrical appliances. HEMT epitaxial wafers are the foundation for fabricating HEMT devices. An HEMT epitaxial wafer consists of a substrate and sequentially stacked layers on the substrate: an AlGaN buffer layer, an AlGaN high-resistivity layer, a GaN channel layer, an AlGaN barrier layer, and a GaN capping layer.

[0003] In the fabrication of HTME devices, silicon substrates are mostly chosen for epitaxial material growth to improve conductivity and reduce voltage drop and power consumption on the substrate. A silicon substrate typically consists of a silicon substrate and a silicon oxide coating. The silicon substrate includes two parallel and opposite surfaces: a first surface and a second surface. The silicon oxide coating covers the second surface, while the first surface of the silicon substrate is used for epitaxial material growth. Because the thickness of the silicon oxide coating on the silicon substrate is limited, and due to the fabrication and handling of the substrate, some degree of silicon oxide coating loss occurs at the edges. This loss at the edges leads to uneven heat transfer and causes slip defects in the epitaxial material, extending from the edges to the center, thus affecting the crystal quality of the final epitaxial wafer. Summary of the Invention

[0004] This disclosure provides a method for fabricating high electron mobility transistor (HEMT) epitaxial wafers on silicon substrates to improve substrate quality. This method reduces slip defects within the final HEMT, effectively improving its quality. The technical solution is as follows:

[0005] This disclosure provides a high electron mobility transistor epitaxial wafer, wherein the method for fabricating the high electron mobility transistor epitaxial wafer with improved silicon substrate quality includes:

[0006] A silicon substrate is provided, the silicon substrate comprising a silicon material body and a silicon oxide coating, the silicon material body comprising two parallel and opposite first surfaces, a second surface and a sidewall connecting the first surface and the second surface, the silicon oxide coating covering the second surface;

[0007] The edges of the silicon oxide coating are subjected to oversaturation treatment to fill the missing parts of the silicon oxide coating, wherein the edges of the silicon oxide coating are the parts where the silicon oxide coating meets the sidewall of the silicon material body;

[0008] An AlGaN buffer layer, an AlGaN high-resistivity layer, a GaN channel layer, an AlGaN barrier layer, and a GaN capping layer are sequentially grown on the first surface of the silicon material body.

[0009] Optionally, the step of oversaturating the edges of the silicon oxide coating to fill the missing areas of the silicon oxide coating includes:

[0010] The silicon substrate is placed in a metal-organic chemical vapor deposition apparatus, and the first surface of the silicon substrate is supported in the substrate groove of the metal-organic chemical vapor deposition apparatus.

[0011] SiH4 and O2 are introduced into the reaction chamber of the metal-organic chemical vapor deposition apparatus to supersaturate the silicon oxide coating and fill the missing parts of the silicon oxide coating.

[0012] Optionally, 50-100 sccm of SiH4 and 1000-5000 sccm of O2 are introduced into the reaction chamber to supersaturate the silicon oxide coating and fill the missing parts of the silicon oxide coating.

[0013] Optionally, the silicon oxide coating may be supersaturated under a pressure of 5 to 20 mbar to fill any missing areas of the silicon oxide coating.

[0014] Optionally, the silicon oxide coating may be supersaturated at a temperature of 1000–1100°C to fill any missing portions of the silicon oxide coating.

[0015] Optionally, the time for oversaturating the edge of the silicon oxide coating is 30 to 60 minutes.

[0016] Optionally, the step of oversaturating the edges of the silicon oxide coating to fill the missing areas of the silicon oxide coating further includes:

[0017] The flow field within the reaction chamber of the metal-organic chemical vapor deposition apparatus is adjusted so that the SiH4 and O2 introduced into the reaction chamber are concentrated at the edge of the silicon oxide coating to compensate for the deficiencies in the silicon oxide coating.

[0018] Optionally, adjusting the flow field within the reaction chamber of the metal-organic chemical vapor deposition apparatus includes increasing the volume of nitrogen gas entering the reaction chamber from the central pipe, wherein the nitrogen gas volume is 8-10 L.

[0019] Optionally, the method for preparing a high electron mobility transistor epitaxial wafer with improved silicon substrate quality further includes: after supersaturating the silicon oxide coating, before growing an n-type layer on the first surface of the silicon material body, introducing N2 into the reaction chamber for 5 to 10 minutes to remove O2 from the reaction chamber.

[0020] Optionally, the method for preparing a high electron mobility transistor epitaxial wafer with improved silicon substrate quality further includes cleaning the side of the silicon oxide coating away from the silicon material body before performing oversaturation treatment on the edge of the silicon oxide coating.

[0021] The beneficial effects of the technical solutions provided in this disclosure include:

[0022] A commonly used silicon substrate consists of a silicon substrate and a silicon oxide coating. The silicon substrate includes a first surface and a second surface that are parallel and opposite to each other. The first surface is typically used for growing epitaxial materials, while the second surface is used to coat the silicon oxide coating and is supported on the substrate groove in a metal-organic vapor deposition (MOV) apparatus. The first and second surfaces of the silicon substrate are connected by sidewalls, forming a unified whole that ensures stable growth of the epitaxial material. During the preparation and use of the silicon oxide coating on the silicon substrate, gaps inevitably occur at the edges of the silicon oxide substrate. These edges are where the silicon oxide coating meets the sidewalls of the silicon substrate. Before growing the epitaxial material on the first surface, the silicon oxide coating is supersaturated to ensure that any missing areas are filled, thus maintaining the integrity of the silicon oxide coating on the silicon substrate before epitaxial growth. If the silicon oxide coating on the silicon substrate is a complete and uniform layer of material, the overall thickness and heat transfer of the silicon substrate will also be relatively uniform. This can ensure the uniform growth and reaction of the epitaxial material grown on the silicon substrate, reduce the slip defects caused by the silicon oxide coating in the final epitaxial wafer, and effectively improve the quality of high electron mobility transistors. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a flowchart of a method for fabricating high electron mobility transistor epitaxial wafers to improve the quality of silicon substrates, provided in an embodiment of this disclosure.

[0025] Figure 2This is a schematic diagram of the structure of the silicon substrate before the oversaturation treatment provided in the embodiments of this disclosure;

[0026] Figure 3 This is a schematic diagram of the structure of a silicon substrate after supersaturation treatment provided in an embodiment of this disclosure;

[0027] Figure 4 This is a schematic diagram of the structure of a high electron mobility transistor epitaxial wafer for improving crystal quality provided in an embodiment of this disclosure;

[0028] Figure 5 This is a flowchart of another method for fabricating high electron mobility transistor epitaxial wafers to improve silicon substrate quality, provided by an embodiment of this disclosure.

[0029] Figure 6 This is a schematic diagram of another high electron mobility transistor epitaxial wafer structure provided in this embodiment of the present disclosure to improve crystal quality. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0031] Figure 1 This is a flowchart illustrating a method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality, provided in an embodiment of this disclosure. (Refer to...) Figure 1 As can be seen, this disclosure provides a method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality. The method includes:

[0032] S101: A silicon substrate is provided, the silicon substrate including a silicon material body and a silicon oxide coating, the silicon material body including two parallel and opposite first surfaces, a second surface and a sidewall connecting the first surface and the second surface, the silicon oxide coating covering the second surface.

[0033] S102: The edges of the silicon oxide coating are oversaturated to fill the missing parts of the silicon oxide coating. The edges of the silicon oxide coating are the parts where the silicon oxide coating meets the sidewall of the silicon material body.

[0034] S103: An AlGaN buffer layer, an AlGaN high-resistivity layer, a GaN channel layer, an AlGaN barrier layer, and a GaN capping layer are sequentially grown on the first surface of the silicon material substrate.

[0035] A commonly used silicon substrate consists of a silicon substrate and a silicon oxide coating. The silicon substrate includes a first surface and a second surface that are parallel and opposite to each other. The first surface is typically used for growing epitaxial materials, while the second surface is used to coat the silicon oxide coating and is supported on the substrate groove in a metal-organic vapor deposition (MOV) apparatus. The first and second surfaces of the silicon substrate are connected by sidewalls, forming a unified whole that ensures stable growth of the epitaxial material. During the preparation and use of the silicon oxide coating on the silicon substrate, gaps inevitably occur at the edges of the silicon oxide substrate. These edges are where the silicon oxide coating meets the sidewalls of the silicon substrate. Before growing the epitaxial material on the first surface, the silicon oxide coating is supersaturated to ensure that any missing areas are filled, thus maintaining the integrity of the silicon oxide coating on the silicon substrate before epitaxial growth. If the silicon oxide coating on the silicon substrate is a complete and uniform layer of material, the overall thickness and heat transfer of the silicon substrate will also be relatively uniform. This can ensure the uniform growth and reaction of the epitaxial material grown on the silicon substrate, reduce the slip defects caused by the silicon oxide coating in the final epitaxial wafer, and effectively improve the quality of high electron mobility transistors.

[0036] It should be noted that the heat transfer of the silicon substrate is also affected by its thickness. The sidewalls and the second surface of the silicon substrate are mainly used to receive thermal radiation and generate heat. The absence of silicon oxide coating at the upper edge of the silicon substrate will cause uneven thickness of the entire substrate. Therefore, filling the missing or fallen areas of silicon oxide coating can effectively ensure uniform heat transfer of the silicon substrate, thereby improving the quality of the epitaxial material grown on the silicon substrate.

[0037] For example, in step S102, the edge of the silicon oxide coating is oversaturated to fill the missing parts of the silicon oxide coating, which includes: placing the silicon substrate in a metal-organic chemical vapor deposition apparatus and supporting the first surface of the silicon substrate in the substrate groove of the metal-organic chemical vapor deposition apparatus; introducing SiH4 and O2 into the reaction chamber of the metal-organic chemical vapor deposition apparatus to oversaturate the silicon oxide coating to fill the missing parts of the silicon oxide coating.

[0038] The first surface of the silicon substrate is supported within a substrate groove, with the silicon oxide coating on the substrate facing the top of the reaction chamber. The SiH4 and O2 introduced into the reaction chamber can supersaturate the surface of the silicon oxide coating and fill any missing areas. This facilitates the filling of missing areas, and the silicon substrate's location within the reaction chamber also allows for subsequent adjustment of its position to grow other epitaxial materials on the first surface. Furthermore, since the surface of the undamaged silicon oxide coating lacks nucleation sites, while the surfaces of the missing areas have good protrusions that serve as nucleation sites, SiH4 and O2 will nucleate and grow on these missing areas.

[0039] It should be noted that metal-organic chemical vapor deposition (MOCVD) equipment typically includes a reaction chamber, an epitaxial tray within the reaction chamber, and a drive mechanism for rotating the epitaxial tray. One end face of the epitaxial tray has multiple substrate grooves for placing the substrate. Reactive gases and an organometallic source enter the reaction chamber and react on the substrate to form epitaxial material.

[0040] Optionally, 50-100 sccm of SiH4 and 1000-5000 sccm of O2 are introduced into the reaction chamber to oversaturate the silicon oxide coating and fill the missing parts of the silicon oxide coating.

[0041] The reaction chamber is purged with 50–100 sccm of SiH4 and 1000–5000 sccm of O2. The flow rates of SiH4 and O2 are within the above ranges. The overall flow rate is relatively low, which makes it easier to grow on the parts where the silicon oxide coating is missing, rather than on the surface where the silicon oxide coating is not missing or fallen off. This can effectively ensure the surface integrity and thickness uniformity of the final silicon oxide coating, thereby effectively improving the quality of the epitaxial wafer of the high electron mobility transistor grown on the silicon substrate.

[0042] For example, the silica coating is supersaturated under a pressure of 5 to 20 mbar to fill the missing parts of the silica coating.

[0043] During the supersaturation treatment of the silicon oxide coating, the pressure in the reaction chamber is within the above range. The low-pressure environment ensures that SiH4 and O2 mainly concentrate in the areas where the silicon oxide coating is missing, and do not grow in the areas where the silicon oxide coating is not missing. This ensures the integrity of the silicon oxide coating while improving the uniformity of the silicon substrate thickness to improve the heat transfer uniformity.

[0044] Optionally, the silicon oxide coating is supersaturated at a temperature of 1000–1100°C to fill the missing areas of the silicon oxide coating.

[0045] During the supersaturation treatment of the silicon oxide coating, the temperature of the reaction chamber is within the above range, which facilitates the reaction and growth of SiH4 and O2 at the missing parts of the silicon oxide coating, ensuring the efficiency of the supersaturation treatment of the silicon oxide coating, thereby improving the fabrication efficiency of the high electron mobility transistor.

[0046] Optionally, the time for oversaturation treatment of the edges of the silicon oxide coating is 30 to 60 minutes.

[0047] The time for oversaturation treatment of the edges of the silicon oxide coating is within the above range, which can ensure the stable progress of the oversaturation treatment and ensure that the areas on the silicon oxide coating that need to be filled grow completely.

[0048] For example, step S102 further includes: adjusting the flow field within the reaction chamber of the metal-organic chemical vapor deposition apparatus so that the SiH4 and O2 introduced into the reaction chamber are concentrated at the edge of the silicon oxide coating to replenish the missing silicon oxide coating.

[0049] It can effectively improve the integrity of the obtained silicon oxide coating and ensure good uniformity of the thickness of the obtained silicon oxide coating, thereby improving the overall temperature uniformity of the silicon substrate.

[0050] Optionally, the flow field within the reaction chamber of the metal-organic chemical vapor deposition apparatus can be adjusted by increasing the volume of nitrogen entering the reaction chamber from the central pipe, wherein the nitrogen volume is 8–10 L.

[0051] Increasing the nitrogen volume in the central pipe of the spray head in the reaction chamber, with an initial nitrogen volume of 8-10L, increases the gas flow in the central pipe, which transports the reactants (SiH4 and O2) from the center to the edge. Simultaneously, the overall pressure in the reaction chamber is relatively low, for example, 20-50 mbar. The lower the pressure, the faster the exhaust pump's extraction rate, and the easier it is for the gas flow from the chamber to be drawn to the edge. This facilitates the control of the flow field within the reaction chamber and the oversaturation treatment of the silicon oxide coating.

[0052] It should be noted that, in other implementations provided in this disclosure, the silicon oxide coating can also be oversaturated using a physical vapor deposition (PVD) apparatus, or a filler material can be spin-coated onto the missing areas of the silicon oxide coating to fill and supplement these areas. This improves the integrity of the silicon oxide coating and reduces the possibility of uneven heating of the epitaxial material grown on the silicon substrate. This disclosure does not impose any limitations on this approach.

[0053] Figure 2 This is a schematic diagram of the silicon substrate structure before supersaturation treatment provided in the embodiments of this disclosure. Figure 3 This is a schematic diagram of the structure of a silicon substrate after supersaturation treatment according to an embodiment of this disclosure. Figure 2 and Figure 3 The silicon material substrate and the silicon oxide coating are identified in the reference. Figure 2 and Figure 3 It can be seen that, Figure 2 The silicon substrate 1 includes a silicon material body 11 and a silicon oxide coating 12 coated on the second surface of the silicon material body 11, with missing portions 121 at the edges of the silicon oxide coating 12. Figure 3 After the silicon oxide coating 12 on the silicon substrate 1 is oversaturated, the missing parts 121 of the silicon oxide coating 12 are filled.

[0054] For ease of understanding, the following can also be provided here: Figure 4 , Figure 4 This is a schematic diagram of the structure of a high electron mobility transistor epitaxial wafer for improving crystal quality, provided by an embodiment of this disclosure. Figure 4 The high electron mobility transistor epitaxial wafer shown can be employed Figure 1 The high electron mobility transistor epitaxial wafer fabrication method shown is obtained by referring to... Figure 4 It is known that the high electron mobility transistor epitaxial wafer for improving crystal quality includes a silicon substrate 1 and an AlGaN buffer layer 2, an AlGaN high-resistivity layer 3, a GaN channel layer 4, an AlGaN barrier layer 5, and a GaN capping layer 6 sequentially stacked on the silicon substrate 1. This ensures the basic functionality of the epitaxial wafer used to fabricate high electron mobility transistors.

[0055] Figure 5 This is a flowchart of another method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality provided in this disclosure, with reference to... Figure 5 It can be seen that methods for fabricating high electron mobility transistor epitaxial wafers to improve silicon substrate quality also include:

[0056] S201: A silicon substrate is provided, the silicon substrate including a silicon material body and a silicon oxide coating, the silicon material body including two parallel and opposite first surfaces, a second surface and a sidewall connecting the first surface and the second surface, the silicon oxide coating covering the second surface.

[0057] S202: Clean the side of the silicon oxide coating that is away from the main silicon material.

[0058] Before performing supersaturation treatment on the silicon oxide coating, the side of the silicon oxide coating away from the silicon substrate can be cleaned first. This can remove impurities from the surface of the silicon oxide coating and improve the surface treatment effect of the silicon oxide coating.

[0059] Alternatively, an organic solvent can be used to clean the silicon oxide coating. This effectively removes impurities without damaging the silicon oxide coating.

[0060] S203: The edges of the silicon oxide coating are oversaturated to fill the missing parts of the silicon oxide coating. The edges of the silicon oxide coating are the parts where the silicon oxide coating meets the sidewall of the silicon material body.

[0061] Step S203 can be referred to Figure 1 Step S102 in the high electron mobility epitaxial wafer preparation method shown in the figure will not be described again here.

[0062] S204: Cleaning the silicon substrate.

[0063] After the silicon substrate is supersaturated, further cleaning of the silicon substrate can reduce residual impurities on the surface of the silicon substrate and improve the quality of the epitaxial material on the silicon substrate.

[0064] For example, an organic solvent or water can be used to clean the silicon substrate. This disclosure does not limit this process.

[0065] S205: Before growing an n-type layer on the first surface of the silicon material substrate, N2 is introduced into the reaction chamber for 5 to 10 minutes to remove O2 from the reaction chamber.

[0066] Nitrogen gas has a small mass and a high mobility, and it will not damage epitaxial materials. Using hydrogen and nitrogen for gas exchange can effectively improve the gas exchange efficiency of the reaction chamber, thereby increasing the fabrication efficiency of high electron mobility transistors. The gas exchange time within the above range ensures sufficient gas replacement within the reaction chamber, maintaining its purity before the growth of other epitaxial materials and guaranteeing the quality of the thick epitaxial material growth.

[0067] Optionally, the flow rate of nitrogen gas introduced into the reaction chamber is 5000–8000 sccm.

[0068] The flow rate of hydrogen or nitrogen introduced into the reaction chamber is within the above range, which can ensure rapid replacement of the atmosphere in the reaction chamber.

[0069] S206: An AlN layer, an AlGaN buffer layer, an AlGaN high-resistivity layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, and a GaN capping layer are sequentially grown on the first surface of the silicon material substrate.

[0070] The growth conditions for each epitaxial layer in step S206 are as follows:

[0071] Optionally, the growth temperature of the AlN layer is 1100℃~1200℃, and the growth pressure of the AlN layer is 40~70mbar. This can yield a first AlN layer of relatively good quality.

[0072] For example, the growth thickness of the AlN layer can be 0.5 to 2 micrometers.

[0073] This ensures that AlN itself effectively blocks impurities, and the quality of the AlN layer is also relatively good.

[0074] Optionally, the growth conditions for the AlGaN buffer layer include a growth temperature of 1050℃ to 1250℃ and a pressure of 40 to 70 mbar. This can yield an AlGaN buffer layer of relatively good quality.

[0075] For example, the growth temperature of the AlGaN high-resistivity layer can be 1000℃-1200℃, and the growth pressure of the AlGaN high-resistivity layer can be 40-70mbar.

[0076] When the growth temperature and growth pressure of the AlGaN high-resistivity layer are within the above ranges, the growth quality of the obtained AlGaN high-resistivity layer can be effectively improved.

[0077] Optionally, the AlGaN high-resistivity layer can be grown to a thickness of 1.0–2.0 micrometers. This ensures the growth quality of the AlGaN high-resistivity layer while effectively achieving the goal of high resistivity.

[0078] Optionally, the AlGaN high-resistivity layer is doped with carbon, and the carbon doping concentration is 10. 19 cm -3 -10 20 cm -3 .

[0079] Doping AlGaN high-resistivity layers with carbon can improve their high-resistivity effect, and the carbon doping concentration within the above range can also ensure the quality of the AlGaN high-resistivity layer itself.

[0080] Optionally, the growth conditions for the GaN channel layer include a growth temperature of 1050℃ to 1150℃ and a pressure of 150 to 250 mbar. This can yield a GaN channel layer of relatively good quality.

[0081] For example, the thickness of the GaN channel layer is between 1.0 and 1.5 micrometers. This improves the quality of the final HEMT epitaxial wafer. The resulting GaN channel layer has good quality.

[0082] Optionally, the growth temperature of the AlN insertion layer is 1050℃~1150℃, and the growth pressure of the AlN insertion layer is 40~70mbar. This can yield AlN insertion layers of good quality.

[0083] Optionally, the growth temperature of the AlGaN barrier layer is 1050℃~1150℃, and the growth pressure of the AlGaN barrier layer is 40~70mbar. The resulting AlGaN barrier layer has good quality.

[0084] Optionally, the growth temperature of the GaN capping layer is 1050℃~1150℃, and the growth pressure of the AlGaN barrier layer is 40~70mbar. The resulting GaN capping layer has good quality.

[0085] It should be noted that in the embodiments disclosed herein, the LED growth method is achieved using VeecoK 465i or C4 or RB MOCVD (Metal-Organic Chemical Vapor Deposition) equipment. High-purity H2 (hydrogen), high-purity N2 (nitrogen), or a mixture of high-purity H2 and high-purity N2 are used as the carrier gas; high-purity NH3 is used as the N source; trimethylgallium (TMGa) and triethylgallium (TEGa) are used as gallium sources; trimethylindium (TMIn) is used as the indium source; silane (SiH4) is used as the N-type dopant; trimethylaluminum (TMAl) is used as the aluminum source; magnesium cerium styrene (CP2Mg) is used as the P-type dopant; and ferrocene (Cp2Fe) is used as the precursor for the iron (Fe) source.

[0086] Figure 6 This is a schematic diagram of another high electron mobility transistor epitaxial wafer structure for improving crystal quality provided in this disclosure embodiment, with reference to... Figure 6 It is known that the high electron mobility transistor epitaxial wafer may include a silicon substrate 1 and an AlN layer 7, an AlGaN buffer layer 2, an AlGaN high resistivity layer 3, a GaN channel layer 4, an AlN insertion layer 8, an AlGaN barrier layer 5, and a GaN capping layer 6 sequentially stacked on the silicon substrate 1.

[0087] Optionally, the AlN layer thickness is 0.5–2 micrometers. This ensures good AlN layer quality, providing a good growth foundation for HEMT epitaxial wafers.

[0088] For example, the thickness of the AlGaN buffer layer 2 is 1 to 1.5 micrometers. The resulting AlGaN buffer layer 4 has good quality.

[0089] Optionally, the thickness of the GaN channel layer 4 can be 100–400 nm.

[0090] The thickness of GaN channel layer 4 is appropriate, and the cost is reasonable while effectively improving the quality of high electron mobility transistor epitaxial wafers.

[0091] Figure 6 relative to Figure 4The structure of the HEMT epitaxial wafer incorporates an AlN insertion layer 8. This reduces the negative impact of lattice mismatch in the underlying layer. Furthermore, the interfaces between the AlN insertion layer 8 and the GaN channel layer 4, as well as between the AlN insertion layer 8 and the AlGaN barrier layer 5, form two-dimensional electron gases. These two-dimensional electron gases increase carrier accumulation at the interfaces, ensuring the effective use of the high electron mobility transistor epitaxial wafer.

[0092] Optionally, the thickness of the AlN insertion layer 8 is 0.5–2 nm.

[0093] The thickness of the AlN insertion layer 8 within the above range can effectively form a two-dimensional electron gas without significantly increasing the cost.

[0094] In one implementation provided in this disclosure, the thickness of the AlN insertion layer 8 can be 2 nm. This disclosure does not impose any limitation on this.

[0095] Optionally, the thickness of the AlGaN barrier layer 5 can be 15–40 nm. This ensures the quality of the high electron mobility transistor epitaxial wafer.

[0096] In one implementation provided in this disclosure, the thickness of the AlGaN barrier layer 5 can be 100 nm. This disclosure does not impose any limitation on this.

[0097] For example, the GaN capping layer 6 can be a p-type GaN layer, which facilitates fabrication and acquisition.

[0098] Optionally, the thickness of the GaN capping layer 6 is 3–10 nm. The resulting GaN capping layer 6 has good overall quality.

[0099] For example, the impurity within the GaN capping layer 6 is Mg. This facilitates preparation and acquisition.

[0100] It should be noted that, Figure 6 This is merely one implementation of a high electron mobility transistor epitaxial wafer provided in this disclosure. In other implementations provided in this disclosure, the high electron mobility transistor epitaxial wafer may also be other forms of high electron mobility transistor epitaxial wafer including a reflective layer, and this disclosure does not impose any limitations on this.

[0101] The above is not intended to limit this disclosure in any way. Although this disclosure has been disclosed above through embodiments, it is not intended to limit this disclosure. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this disclosure. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this disclosure without departing from the content of the technical solution of this disclosure shall still fall within the scope of the technical solution of this disclosure.

Claims

1. A method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality, characterized in that, The method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality includes: A silicon substrate is provided, the silicon substrate comprising a silicon material body and a silicon oxide coating, the silicon material body comprising two parallel and opposite first surfaces, a second surface and a sidewall connecting the first surface and the second surface, the silicon oxide coating covering the second surface for support on a substrate groove in a metal-organic chemical vapor deposition apparatus; The edges of the silicon oxide coating are subjected to oversaturation treatment to fill the missing parts of the silicon oxide coating, wherein the edges of the silicon oxide coating are the parts where the silicon oxide coating meets the sidewall of the silicon material body; An AlGaN buffer layer, an AlGaN high-resistivity layer, a GaN channel layer, an AlGaN barrier layer, and a GaN capping layer are sequentially grown on the first surface of the silicon material body.

2. The method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality according to claim 1, characterized in that, The step of oversaturating the edges of the silicon oxide coating to fill the missing areas of the silicon oxide coating includes: The silicon substrate is placed in a metal-organic chemical vapor deposition apparatus, and the first surface of the silicon substrate is supported in the substrate groove of the metal-organic chemical vapor deposition apparatus. SiH4 and O2 are introduced into the reaction chamber of the metal-organic chemical vapor deposition apparatus to supersaturate the silicon oxide coating and fill the missing parts of the silicon oxide coating.

3. The method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality according to claim 2, characterized in that, 50-100 sccm of SiH4 and 1000-5000 sccm of O2 are introduced into the reaction chamber to supersaturate the silicon oxide coating and fill the missing parts of the silicon oxide coating.

4. The method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality according to claim 2, characterized in that, The silica coating is subjected to supersaturation treatment under a pressure of 5 to 20 mbar to fill the missing parts of the silica coating.

5. The method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality according to claim 4, characterized in that, The silicon oxide coating is subjected to supersaturation treatment at a temperature of 1000–1100°C to fill the missing parts of the silicon oxide coating.

6. The method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality according to claim 5, characterized in that, The time for oversaturating the edges of the silicon oxide coating is 30 to 60 minutes.

7. The method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality according to any one of claims 2 to 6, characterized in that, The method of oversaturating the edges of the silicon oxide coating to fill the missing areas of the silicon oxide coating further includes: The flow field within the reaction chamber of the metal-organic chemical vapor deposition apparatus is adjusted so that the SiH4 and O2 introduced into the reaction chamber are concentrated at the edge of the silicon oxide coating to compensate for the deficiencies in the silicon oxide coating.

8. The method for fabricating high electron mobility transistor epitaxial wafers with improved silicon substrate quality according to claim 7, characterized in that, Adjusting the flow field within the reaction chamber of the metal-organic chemical vapor deposition apparatus includes: Increase the volume of nitrogen gas entering the reaction chamber from the central pipe, wherein the nitrogen gas volume is 8-10L.

9. The method for fabricating a high electron mobility transistor epitaxial wafer with improved silicon substrate quality according to any one of claims 2 to 6, characterized in that, The method for preparing a high electron mobility transistor epitaxial wafer with improved silicon substrate quality further includes: after supersaturating the silicon oxide coating, before growing an n-type layer on the first surface of the silicon material body, introducing N2 into the reaction chamber for 5 to 10 minutes to remove O2 from the reaction chamber.

10. The method for fabricating a high electron mobility transistor epitaxial wafer with improved silicon substrate quality according to any one of claims 2 to 6, characterized in that, The method for preparing a high electron mobility transistor epitaxial wafer with improved silicon substrate quality further includes cleaning the side of the silicon oxide coating away from the silicon material body before performing oversaturation treatment on the edge of the silicon oxide coating.

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