Method and device applied to grid-connected inverter

Abstract

The present application discloses a method and device applied to a grid-connected inverter. The method includes: within each control period, a positive and negative sequence separation link obtains the fundamental component of the grid voltage and its quadrature quantity, the error of the grid voltage αβ-axis component, and the positive and negative sequence components of the grid voltage; the frequency-locked loop link obtains the grid angular frequency; the variable gain control link feeds the updated frequency-locked loop gain factor or the frequency-locked integral reset signal back to the frequency-locked loop link, and feeds the updated positive and negative sequence separation gain factors and the positive and negative sequence separation link for use in the next control period. The present application can solve the problem of abnormal frequency jump of the output frequency of the frequency-locked loop when the grid voltage drops or surges, and alleviate the contradiction between the extraction accuracy of the positive and negative sequence components of the grid voltage and the dynamic response ability.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular, to a method and device for separating positive and negative sequence components of grid voltage and locking positive sequence frequency applied to a grid-connected inverter. Background Art

[0002] Developing new energy has become a global consensus to address the increasingly severe energy crisis, and the utilization of new energy is mainly achieved through power generation. As a grid-connected converter, which is the energy transmission interface between new energy and the grid, its operating performance is directly related to the power quality of the electric energy generated by new energy; moreover, as the proportion of new energy continues to increase, its performance is even more crucial for the stability of the power system.

[0003] However, with the increase in the scale of power electronic devices connected to the grid, problems such as unbalanced grid voltage, grid voltage harmonics, grid voltage transient dips, sudden rise faults, and deviation of grid voltage frequency from the rated value often occur, resulting in a complex and changeable grid environment and bringing many challenges to the operation of grid-connected converters.

[0004] During grid voltage dips or sudden rise faults, new energy power generation equipment needs to generate positive sequence reactive current corresponding to the positive sequence component of the grid voltage according to the requirements of grid connection standards to support the recovery of the grid voltage. The accuracy of the positive sequence reactive current generation is closely related to the accuracy of the positive sequence component of the grid voltage used in the calculation of its target current, which is particularly obvious when an asymmetrical fault occurs in the grid voltage. In addition, during asymmetrical grid faults, it is often necessary to generate negative sequence reactive current proportional to the negative sequence voltage to avoid abnormal grid voltage in the unfaulted phases due to the positive sequence reactive current generated by the converter. The converter also needs to accurately lock the phase of the positive sequence component of the grid voltage to ensure its reliable synchronization. Therefore, the accurate extraction of positive and negative sequence components of grid voltage is very important for the performance of the converter during grid fault ride-through.

[0005] With the rapid increase in the scale of new energy grid connection, the rapid rise in its penetration rate has brought great challenges to the stability of the power system frequency. To address this issue, new wind power generation and photovoltaic grid adaptability test regulations have added requirements for primary frequency regulation and inertia response to generator sets. Primary frequency regulation requires new energy generator sets to increase or decrease the active power proportional to the change in grid voltage frequency; while inertia response requires new energy generator sets to increase or decrease the active power proportional to the change rate of grid voltage frequency. Whether it is primary frequency regulation or inertia response, it requires the converter to accurately and quickly detect the grid voltage frequency and its change rate.

[0006] As can be seen from the above discussion, to enable new energy generating units to adapt to the increasingly complex and changeable power grid environment, it is crucial to accurately detect information such as the positive and negative sequence components and power grid frequency in the power grid voltage. When obtaining this information, DSOGI-FLL (Dual Second Order Generalized Intergrator With Freqency Locked Loop) and FOGI-FLL (First Order Generalized Intergrator With Freqency Locked Loop), which have the functions of positive and negative sequence separation of the power grid voltage and power grid frequency tracking, are both good choices. The implementation principles of traditional DSOGI-FLL and FOGI-FLL are respectively as Figure 1 and Figure 2 shown. Both of them consist of a positive and negative sequence separation link (DSOGI or FOGI) and a frequency locked loop (FLL). Both DSOGI-FLL and FOGI-FLL contain two adjustable parameters, namely the positive and negative sequence separation gain and the frequency locked loop gain. Traditional DSOGI-FLL or FOGI-FLL generally sets these two parameters to fixed values. However, using them in this way in engineering will bring the following problems:

[0007] 1) When the power grid voltage drops, the power grid frequency tracked by the frequency locked loop will have abnormal jumps, and the jump amplitude increases with the increase of the power grid voltage drop amplitude;

[0008] 2) When the power grid voltage contains background harmonics, the frequency tracked by the frequency locked loop will be inaccurate, resulting in the wrong triggering of the frequency modulation and inertia response functions of the converter that uses this frequency for primary frequency modulation and inertia response;

[0009] Reducing the gain of the frequency locked loop can solve problem 1), but it will reduce the dynamic response ability of the frequency locked loop. When the power grid frequency changes, the frequency tracking of the frequency locked loop is not timely, resulting in the lag of the primary frequency modulation and inertia response of the grid-connected converter; reducing the gain of the positive and negative sequence separation link can solve problem 2), but it will reduce the dynamic response ability of the positive and negative sequence voltage separation. When the power grid voltage drops significantly under a normal power grid, there will be an obvious deviation between the separated positive and negative sequence components of the power grid voltage and the actual components, resulting in inaccurate calculation of the reactive current target value using the positive and negative sequence components of the power grid voltage.

[0010] Although the use of DSOGI cascading (or FOGI-like cascading) can, to a certain extent, solve the above problems existing in traditional DSOGI-FLL (FOGI-FLL-like), alleviate the contradictions between frequency tracking accuracy and dynamic response, and positive and negative sequence separation accuracy and dynamic response, the cascading structure increases the complexity of the positive and negative sequence separation algorithm on the one hand, and on the other hand, it will inevitably reduce the potential ability of the positive and negative sequence separation dynamic response. There are also certain constraints in the parameter design between cascading structures. Summary of the Invention

[0011] This application aims to provide a method and device for separating positive and negative sequence components of grid voltage and locking positive sequence frequency for grid-connected inverters, to solve the contradictions between the two functions of positive and negative sequence separation and frequency tracking in terms of extraction accuracy and dynamic response ability when the positive and negative sequence separation algorithm with frequency locking function is applied to grid-connected converters.

[0012] On the one hand, this application provides a method applied to grid-connected inverters, and the method includes:

[0013] In each control period, the positive and negative sequence separation section obtains the fundamental component of the grid voltage and its orthogonal quantity, and the error of the grid voltage αβ-axis component according to the αβ-axis components of the grid voltage, the grid angular frequency output by the frequency-locked loop section, and the positive and negative sequence separation gain factor output by the variable gain control section; calculates the positive and negative sequence components of the grid voltage according to the fundamental component of the grid voltage and its orthogonal quantity.

[0014] The frequency-locked loop section obtains the grid angular frequency according to at least one of the fundamental component of the grid voltage, the orthogonal quantity of the fundamental component of the grid voltage, the positive and negative sequence components of the grid voltage output by the positive and negative sequence separation section, the error of the grid voltage αβ-axis component, and the frequency-locked loop gain factor or frequency-locked integral reset signal output by the variable gain control section; feeds the obtained grid angular frequency back to the positive and negative sequence separation section for its use in the next control period.

[0015] The variable gain control section calculates the grid voltage amplitude mutation index and the grid voltage background harmonic content index respectively according to the error of the grid voltage αβ-axis component and the positive sequence component of the grid voltage output by the positive and negative sequence separation section; updates the frequency-locked loop gain factor or frequency-locked integral reset signal according to the grid voltage amplitude mutation index, and updates the positive and negative sequence separation gain factor according to the grid voltage background harmonic content index; feeds the updated frequency-locked loop gain factor or frequency-locked integral reset signal back to the frequency-locked loop section, and feeds the updated positive and negative sequence separation gain factor back to the positive and negative sequence separation section for its use in the next control period.

[0016] On the other hand, this application provides a device applied to grid-connected inverters, including:

[0017] A positive and negative sequence separation module, configured to obtain a fundamental component of the grid voltage and its orthogonal quantity, and an error of the αβ-axis component of the grid voltage according to the αβ-axis component of the grid voltage, the grid angular frequency output by a frequency-locked loop, and the positive and negative sequence separation gain factor output by a variable gain control module; calculate the positive and negative sequence components of the grid voltage according to the fundamental component of the grid voltage and its orthogonal quantity;

[0018] A frequency-locked loop, configured to obtain the grid angular frequency according to at least one of the fundamental component of the grid voltage, the orthogonal quantity of the fundamental component of the grid voltage, the positive and negative sequence components of the grid voltage output by the positive and negative sequence separation module, the error of the αβ-axis component of the grid voltage, and the frequency-locked loop gain factor or the frequency-locked integral reset signal output by the variable gain control module; feedback the obtained grid angular frequency to the positive and negative sequence separation module for use in the next control cycle;

[0019] A variable gain control module, configured to calculate a grid voltage amplitude mutation index and a grid voltage background harmonic content index respectively according to the error of the αβ-axis component of the grid voltage and the positive sequence component of the grid voltage output by the positive and negative sequence separation module; update the frequency-locked loop gain factor or the frequency-locked integral reset signal according to the grid voltage amplitude mutation index, and update the positive and negative sequence separation gain factor according to the grid voltage background harmonic content index; feedback the updated frequency-locked loop gain factor or the frequency-locked integral reset signal to the frequency-locked loop, and feedback the updated positive and negative sequence separation gain factor to the positive and negative sequence separation module for use in the next control cycle;

[0020] The variable gain control module is connected to the frequency-locked loop, and the frequency-locked loop and the variable gain control module are respectively connected to the positive and negative sequence separation module.

[0021] The method and device provided in the embodiments of the present application are applied to a grid-connected inverter. By detecting the state of the error of the αβ-axis component of the grid voltage in the positive and negative sequence separation link, it is judged whether the amplitude of the grid voltage jumps and whether the grid voltage contains background harmonics, and the gain of the positive and negative sequence separation link and the gain of the frequency-locked loop link are adaptively adjusted according to the judgment result, or the output of the integrator in the frequency-locked loop link is reset to zero, so as to reduce the interference of grid voltage dips or surges and grid background harmonics on the frequency tracking of the frequency-locked loop link. This method is simple and easy to implement. It can not only solve the problem of abnormal frequency jump in the output of traditional methods when grid voltage dips or surges occur, alleviate the contradiction between the extraction accuracy and dynamic response ability of the positive and negative sequence components of the grid voltage, but also automatically adjust parameters to ensure the frequency tracking accuracy and the accuracy of positive and negative sequence separation of the grid voltage when obvious background harmonics appear in the grid voltage, and its dynamic response ability of frequency tracking when the grid voltage is normal will not be affected. Description of the Drawings

[0022] Figure 1 It is a schematic diagram of a traditional DSOGI-FLL;

[0023] Figure 2 is a schematic diagram of a traditional FOGI-FLL;

[0024] Figure 3a is a schematic diagram of positive and negative sequence separation of grid voltage and positive sequence frequency locking applied to a grid-connected inverter provided by an embodiment of the present application;

[0025] Figure 3b is a schematic diagram of positive and negative sequence separation of grid voltage and positive sequence frequency locking applied to a grid-connected inverter provided by another embodiment of the present application;

[0026] Figure 4a is an improved DSOGI-FLL schematic diagram provided by an embodiment of the present application;

[0027] Figure 4b is an improved DSOGI-FLL schematic diagram provided by another embodiment of the present application.

[0028] Figure 5a is an improved FOGI-FLL schematic diagram provided by an embodiment of the present application;

[0029] Figure 5b is an improved FOGI-FLL schematic diagram provided by another embodiment of the present application;

[0030] Figure 6a is a schematic diagram of a variable gain control link provided by an embodiment of the present application;

[0031] Figure 6b is a schematic diagram of a variable gain control link provided by another embodiment of the present application;

[0032] The realization, functional features and advantages of the purpose of the present application will be further described with reference to the embodiments and the accompanying drawings. Detailed implementation manners

[0033] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application clearer and more understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0034] In the description of the present application, it should be understood that the orientation or positional relationship indicated by terms such as "center", "upper", "lower", "front", "rear", "left", "right", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present application. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0035] The variables involved in the embodiments of the present application and their definitions:

[0036] v α 、v β : The αβ-axis (α-axis, β-axis) components of the grid voltage, which are the input quantities of the method proposed in the present invention

[0037] v αf 、v βf : The fundamental wave components of the grid voltage

[0038] v αq 、v βq : The orthogonal quantities of the fundamental wave components of the grid voltage

[0039] v αp 、v βp : The αβ-axis components of the positive sequence components of the grid voltage

[0040] v αn 、v βn : The αβ-axis components of the negative sequence components of the grid voltage

[0041] ε α 、ε β : The αβ-axis component errors of the grid voltage

[0042] K pnsc : The initial gain of positive and negative sequence separation

[0043] K png_act : The positive and negative sequence separation gain factor

[0044] K png0 : The initial factor of the positive and negative sequence separation gain, generally set to 1

[0045] K png : The preset factor of the positive and negative sequence separation gain

[0046] K png_tgt : The target factor of the positive and negative sequence separation gain

[0047] K fll : The initial gain of the frequency-locked loop

[0048] Kfreq_act : PLL gain factor

[0049] K freq0 : Initial factor of PLL gain, usually set to 1

[0050] K freq : Preset factor of PLL gain

[0051] K freq_tgt : Target factor of PLL gain

[0052] p f : Output ratio of the integral link with reset function in the PLL, ranging from 0 to 1

[0053] f tgt : Grid frequency output by the PLL

[0054] ω tgt : Grid angular frequency corresponding to the grid frequency output by the PLL

[0055] ε m : Square root of the sum of the squares of the αβ-axis component errors of the grid voltage

[0056] v pm : Magnitude of the positive sequence component of the grid voltage

[0057] v nm : Magnitude of the negative sequence component of the grid voltage

[0058] ε h : Grid voltage background harmonic content index

[0059] ε hf : Filtered value of the grid voltage background harmonic content index

[0060] m h : Grid voltage amplitude mutation index

[0061] fll_sw_flag: PLL variable gain control trigger flag

[0062] fll_sw_flag0: Initial trigger flag of PLL variable gain control

[0063] Rst_flag: Locked integration reset signal

[0064] VJmp_flag: Grid voltage amplitude mutation flag

[0065] h flag : Output flag of the timing control module

[0066] pnsc_sw_flag: Positive and negative sequence separation variable gain control trigger flag

[0067] mhL : Voltage amplitude jump-out threshold

[0068] m hH : Voltage amplitude jump-trigger threshold

[0069] ε hL : Positive and negative sequence separation variable gain control jump-out threshold

[0070] ε hH : Positive and negative sequence separation variable gain control trigger threshold

[0071] Figure 3a is the grid voltage positive and negative sequence separation and positive sequence frequency locking block diagram provided by an embodiment of the present application for a grid-connected inverter.

[0072] As Figure 3a shown, the variable gain control link uses the αβ-axis components v αp and v βp of the positive sequence component of the grid voltage output by the positive and negative sequence separation link and the grid voltage αβ-axis component errors ε α and ε β as inputs, determines whether the grid voltage has a voltage drop or a sudden rise, or whether it contains background harmonics according to its state, and transmits the positive and negative sequence separation gain factor K png_act and the frequency locking loop gain factor K freq_act to the positive and negative sequence separation link and the frequency locking loop link one by one, so as to reduce the interference of the grid voltage drop or sudden rise and the grid background harmonics on the frequency tracking result of the frequency locking loop link by adjusting the gains of the positive and negative sequence separation link or the frequency locking loop link, improve the positive and negative sequence separation accuracy and frequency tracking accuracy of the positive and negative sequence separation link when the grid contains background harmonics, and at the same time ensure the dynamic response ability of the grid voltage positive and negative sequence separation and the dynamic tracking ability of the frequency locking loop link to the grid frequency as much as possible.

[0073] Figure 3b is the grid voltage positive and negative sequence separation and positive sequence frequency locking block diagram provided by another embodiment of the present application for a grid-connected inverter.

[0074] Among them, the positive and negative sequence separation link and the frequency locking loop link can be implemented by DSOGI-FLL or FOGI-FLL; preferably, the improved DSOGI-FLL (hereinafter referred to as DSOGI-FLL-pro) in Figure 4a or Figure 4b can be used to implement, or the improved FOGI-FLL (hereinafter referred to as FOGI-FLL-pro) in Figure 5a or Figure 5b can be used to implement. The implementation principle of the present application will be described below by taking the DSOGI-FLL-pro shown in Figure 4a as an example.

[0075] As Figure 4a shown, its positive and negative sequence separation link consists of two parts: DSOGI and positive and negative sequence component extraction. Among them, the input of DSOGI is the αβ-axis components v α 、v β of the grid voltage, the positive and negative sequence separation gain factor K png_act from the variable gain control link, the grid angular frequency ω tgt corresponding to the grid frequency from the output of the frequency-locked loop, and the output is the fundamental component v αf 、v βf of the grid voltage, the orthogonal quantities v αq 、v βq of the fundamental component of the grid voltage, and the errors ε α 、ε β of the αβ-axis components of the grid voltage. The transfer function of the output-to-input characteristic of DSOGI can be expressed as:

[0076]

[0077] In the formula, k represents α or β, K pnsc is the initial gain of positive and negative sequence separation of DSOGI, K png_act is the positive and negative sequence separation gain factor from the variable gain control link, and its product with K pnsc constitutes the gain of DSOGI.

[0078] The positive and negative sequence component extraction part calculates the αβ-axis components v αp 、v βp of the positive sequence component of the grid voltage and the αβ-axis components v αn 、v βn of the negative sequence component according to the fundamental component of the grid voltage output by DSOGI and its orthogonal quantity.

[0079] The calculation formula is:

[0080]

[0081] The input of the frequency-locked loop is the errors ε α 、ε β of the αβ-axis components of the grid voltage and the αβ-axis components v αp 、v βp of the positive sequence component of the grid voltage, the frequency-locked loop gain factor K freq_act from the variable gain control link, and the output of the frequency-locked loop is the grid frequency f tgt and its corresponding grid angular frequency ω tgt 。The relationship between the output and input of the frequency-locked loop can be expressed as:

[0082]

[0083] where K fll is the initial gain of the frequency-locked loop, ω0 is the rated angular frequency of the power grid, and K freq_act is the frequency-locked loop gain factor from the variable gain control link, and its product with K fll together constitutes the gain of the frequency-locked loop.

[0084] In another embodiment, the inputs to the frequency-locked loop are the αβ-axis component errors ε α , ε β of the power grid voltage and the quadrature quantities v αq , v βq of the fundamental component of the power grid voltage, the frequency-locked integration reset signal Rst_flag from the variable gain control link, and the output of the frequency-locked loop is the power grid frequency f tgt and its corresponding power grid angular frequency ω tgt . The relationship between the output and the input of the frequency-locked loop can be expressed as:

[0085]

[0086] where ω tgt1 and ω tgt2 are the angular frequencies output by the frequency-locked loop without the reset integration link and with the reset integration link respectively, p f ∈[0, 1] is the proportion of the output of the integrator with reset, and the proportion of the output of the integrator without reset is 1 - p f . The sum of the products of the outputs of the two integrators and their respective proportions is used as the output of the frequency-locked loop. When the frequency-locked loop operates, the integrator without the reset function integrates the input signal in each control cycle and outputs ω tgt1 ; the integrator with the reset function integrates the input signal in each control cycle when the received frequency-locked integration reset signal Rst_flag is 0, and clears and resets the output of the integrator when the received frequency-locked integration reset signal Rst_flag is 1.

[0087] Figure 6a is a schematic diagram of the variable gain control link provided by an embodiment of the present application.

[0088] Figure 6b is a schematic diagram of the variable gain control link provided by another embodiment of the present application.

[0089] As Figure 6a shown, first, according to the input αβ-axis component errors ε α , ε β of the power grid voltage, calculate their absolute values |εα|, |ε β | and the modulus value ε m of the sum of their squares; at the same time, according to the αβ-axis components v αp , vβp Calculate its modulus value v pm , ε m and v pm The calculation formulas for are as follows:

[0090]

[0091]

[0092] Secondly, based on the calculated |ε α |, |ε β | and ε m , v pm calculate the grid voltage amplitude mutation index m h and the grid voltage background harmonic content index ε h and its filtered value ε hf . The calculation formulas for m h and ε h are as follows:

[0093] m h = max(|ε α |, |ε β |) / v pm

[0094] ε h = ε m / v pm

[0095] ε hf is obtained by passing ε h through a low-pass filter.

[0096] In another embodiment, based on the input αβ-axis components v αn , v βn of the negative sequence component of the grid voltage, calculate its modulus value v nm , v nm The calculation formulas for are as follows:

[0097]

[0098] Secondly, based on the calculated |ε α |, |ε β | and ε m , v pm calculate the grid voltage amplitude mutation index m h and the grid voltage background harmonic content index ε h . The calculation formulas for m h and ε h are as follows:

[0099] m h = max(|εα |, | ε β |, ε m ) / v pm

[0100] ε h = (ε m - v nm ) / v pm

[0101] Then, the following steps are executed in parallel.

[0102] 1) According to m h Judge whether the amplitude of the grid voltage jumps, and update the initial trigger flag fll_sw_flag0 of the variable gain control of the frequency-locked loop. The update rule is:

[0103]

[0104] In the formula, m hH and m hL (m hH > m hL > 0) are the trigger threshold and the exit threshold for the voltage amplitude jump respectively.

[0105] When it is detected that the initial trigger flag fll_sw_flag0 of the variable gain control of the frequency-locked loop = 1, set the trigger flag of the variable gain control of the frequency-locked loop to 1, that is, fll_sw_flag = 1. At the same time, start the counting of the timing control module, and update its output flag hflag according to its count value hcnt.

[0106] In this embodiment, the timing control module counts in the following way:

[0107]

[0108] The update rule of its output value is:

[0109]

[0110] In the formula, hcnt_set is the set value for confirming the time corresponding to the sudden change in the grid voltage amplitude. When the count value exceeds this set value, if the value of the initial trigger flag fll_sw_flag0 of the variable gain control of the frequency-locked loop is still 1, it is considered that there are background harmonics in the grid voltage. At this time, the output flag hflag of the timing control module is updated to 1. When it is detected that hflag = 1, clear the trigger flag of the variable gain control of the frequency-locked loop, that is, fll_sw_flag = 0.

[0111] In another embodiment, according to m hDetermine whether the grid voltage amplitude jumps, and update the grid voltage amplitude mutation flag VJmp_flag according to the hysteresis rule. The hysteresis rule and its threshold are as follows:

[0112]

[0113] Where m hH and m hL (m JH > m JL > 0) are the voltage amplitude jump trigger threshold and the exit threshold respectively.

[0114] When the grid voltage amplitude mutation flag VJmp_flag = 1 is detected, start the timing control module to count, and update its output flag hflag according to its count value hcnt. In this embodiment, the timing control module counts in the following manner:

[0115]

[0116] The update rule of its output flag is:

[0117]

[0118] Where hcnt_set is the set value for confirming the time corresponding to the grid voltage amplitude mutation.

[0119] 2) According to ε h Judge whether the grid voltage contains background harmonics, and update the positive and negative sequence separation variable gain control trigger flag pnsc_sw_flag. The update rule is:

[0120]

[0121] Where ε hH and ε hL (ε hH > ε hL > 0) are the positive and negative sequence separation variable gain control trigger threshold and the exit threshold respectively.

[0122] In another embodiment, the hysteresis rule is used to update the positive and negative sequence separation variable gain control trigger flag pnsc_sw_flag. The update rule is:

[0123]

[0124] Where ε hH and ε hL (ε hH > ε hL > 0) are the positive and negative sequence separation variable gain control trigger threshold and the exit threshold respectively.

[0125] 3) Use the initial factor K of the frequency-locked loop gain freq0 (0 < K freq0 ≤ 1) Subtract the grid voltage amplitude mutation index m h to obtain the preset factor K of the frequency-locked loop gain freq . To ensure the normal operation of the frequency-locked loop, it is necessary to limit the amplitude of K freq After amplitude limiting, the target factor K of the frequency-locked loop gain is obtained freq_tgt . The amplitude limiting rule is:

[0126]

[0127] In the formula, K freq_min is the minimum value allowed for the frequency-locked loop gain factor.

[0128] 4) Use the initial factor K of the positive and negative sequence separation gain png0 (0 < K png0 ≤ 1) Subtract the grid voltage background harmonic content index ε h to obtain the preset factor K of the positive and negative sequence separation gain png . To ensure the normal operation of the positive and negative sequence separation link, it is necessary to limit the amplitude of K png After amplitude limiting, the target factor K of the positive and negative sequence separation gain is obtained png_tgt . The amplitude limiting rule is:

[0129]

[0130] In the formula, K png_min is the minimum value allowed for the positive and negative sequence separation gain factor.

[0131] Finally, perform the following steps.

[0132] 1) Determine whether to perform variable gain control on the positive and negative sequence separation link according to the positive and negative sequence separation variable gain control trigger flag pnsc_sw_flag. If pnsc_sw_flag = 1, perform variable gain control on the positive and negative sequence separation link. At this time, the positive and negative sequence separation gain factor takes K png_act = K png_tgt , otherwise take K png_act = 1.

[0133] 2) Determine whether to perform variable gain control on the frequency-locked loop link according to the frequency-locked loop variable gain control trigger flag fll_sw_flag. If fll_sw_flag = 1, perform variable gain control on the frequency-locked loop. At this time, the frequency-locked loop gain factor takes K freq_act = K freq_tgt , otherwise take K freq_act = 1.

[0134] In another embodiment, the frequency-locked integration reset signal Rst_flag is updated according to the timing control module output flag hflag and the grid voltage mutation flag VJmp_flag, and the update rule is as follows:

[0135]

[0136] Feed the updated frequency-locked loop gain factor or the frequency-locked integration reset signal back to the frequency-locked loop link, and feed the positive and negative sequence separation gain factor back to the positive and negative sequence separation link for use in the next control cycle.

[0137] So far, the process of the method of this application in one control cycle is completed.

[0138] Another embodiment of this application further provides a method applied to a grid-connected inverter, and the method includes:

[0139] Step S11: In each control cycle, the positive and negative sequence separation link obtains the fundamental wave component of the grid voltage and its orthogonal quantity, and the error of the grid voltage αβ-axis component according to the grid voltage αβ-axis component, the grid angular frequency output by the frequency-locked loop link, and the positive and negative sequence separation gain factor output by the variable gain control link; calculate the positive and negative sequence components of the grid voltage according to the fundamental wave component of the grid voltage and its orthogonal quantity;

[0140] Step S12: The frequency-locked loop link obtains the grid angular frequency according to at least one of the fundamental wave component of the grid voltage, the orthogonal quantity of the fundamental wave component of the grid voltage, the positive and negative sequence components of the grid voltage, the error of the grid voltage αβ-axis component output by the positive and negative sequence separation link, and the frequency-locked loop gain factor or the frequency-locked integration reset signal output by the variable gain control link; feed the obtained grid angular frequency back to the positive and negative sequence separation link for use in the next control cycle;

[0141] Step S13: The variable gain control link calculates the grid voltage amplitude mutation index and the grid voltage background harmonic content index respectively according to the grid voltage αβ-axis component error and the positive sequence component of the grid voltage output by the positive and negative sequence separation link; update the frequency-locked loop gain factor or the frequency-locked integration reset signal according to the grid voltage amplitude mutation index, and update the positive and negative sequence separation gain factor according to the grid voltage background harmonic content index; feed the updated frequency-locked loop gain factor or the frequency-locked integration reset signal back to the frequency-locked loop link, and feed the updated positive and negative sequence separation gain factor back to the positive and negative sequence separation link for use in the next control cycle.

[0142] A method applied to a grid-connected inverter provided by the present invention can not only solve the problem of abnormal frequency tracking jumps in traditional methods when grid voltage dips or surges occur, alleviate the contradiction between the extraction accuracy of positive and negative sequence components of grid voltage and the dynamic response ability, but also automatically adjust parameters to ensure the tracking accuracy of frequency and the separation accuracy of positive and negative sequence components of grid voltage when obvious background harmonics appear in the grid voltage, and its dynamic response ability of frequency tracking when the grid voltage is normal will not be affected thereby.

[0143] In an example, the step of updating the frequency-locked loop gain factor or the frequency-locked integral reset signal according to the grid voltage amplitude mutation index includes:

[0144] Updating the variable gain control trigger flag of the frequency-locked loop according to the grid voltage amplitude mutation index; updating the frequency-locked loop gain factor according to the variable gain control trigger flag of the frequency-locked loop; or

[0145] Updating the grid voltage amplitude mutation flag according to the grid voltage amplitude mutation index; updating the output flag of the timing control module according to the grid voltage amplitude mutation flag; updating the frequency-locked integral reset signal according to the output flag of the timing control module and the grid voltage amplitude mutation flag.

[0146] In an example, the step of updating the positive and negative sequence separation gain factor according to the grid voltage background harmonic content index includes:

[0147] Updating the variable gain control trigger flag of positive and negative sequence separation according to the grid voltage background harmonic content index; updating the positive and negative sequence separation gain factor according to the variable gain control trigger flag of positive and negative sequence separation.

[0148] In an example, the positive and negative sequence separation link can be implemented by a traditional double second-order generalized integrator or a first-order generalized integrator, and can also be implemented by an improved double second-order generalized integrator or an improved first-order generalized integrator.

[0149] In an example, the double second-order generalized integrator DSOGI of the positive and negative sequence separation link obtains the fundamental component of the grid voltage, the orthogonal quantity of the fundamental component of the grid voltage, and the error of the grid voltage αβ axis component according to the grid voltage αβ axis component, the grid angular frequency, and the positive and negative sequence separation gain factor;

[0150] The positive and negative sequence component extraction part of the positive and negative sequence separation link calculates the positive and negative sequence components of the grid voltage according to the fundamental component of the grid voltage and its orthogonal quantity.

[0151] In an example, the frequency-locked loop link integrates the signal input to the integrator or clears and resets the output of the integrator according to the frequency-locked integral reset signal.

[0152] In one example, the variable gain control section calculates the absolute value and modulus of the error based on at least one of the αβ-axis component errors of the grid voltage, and calculates the modulus of the positive sequence component of the grid voltage at the same time; calculates the grid voltage amplitude mutation index and the grid voltage background harmonic content index respectively according to the absolute value of the error, the modulus of the error, and the modulus of the component.

[0153] In one example, the variable gain control section determines whether the grid voltage drops according to the grid voltage amplitude mutation index, and updates the initial trigger flag of the frequency-locked loop variable gain control; determines the trigger flag of the frequency-locked loop variable gain control according to the initial trigger flag of the frequency-locked loop variable gain control.

[0154] In one example, the initial trigger flag of the frequency-locked loop variable gain control is updated according to the output value of the timing control module.

[0155] In one example, the variable gain control section determines whether the grid voltage contains background harmonics according to the grid voltage background harmonic content index, and updates the positive and negative sequence separation variable gain control trigger flag.

[0156] In one example, the variable gain control section obtains the preset factor of the frequency-locked loop gain according to the initial factor of the frequency-locked loop gain and the grid voltage amplitude mutation index; obtains the target factor of the frequency-locked loop gain after limiting the preset factor of the frequency-locked loop gain; updates the frequency-locked loop gain factor according to the trigger flag of the frequency-locked loop variable gain control and the target factor of the frequency-locked loop gain.

[0157] In one example, the variable gain control section obtains the preset factor of the positive and negative sequence separation gain according to the initial factor of the positive and negative sequence separation gain and the grid voltage background harmonic content index; obtains the target factor of the positive and negative sequence separation gain after limiting the preset factor of the positive and negative sequence separation gain; updates the positive and negative sequence separation gain factor according to the trigger flag of the positive and negative sequence separation variable gain control and the target factor of the positive and negative sequence separation gain.

[0158] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, and thus do not limit the scope of rights of the present application. Any modifications, equivalent replacements, and improvements made by those skilled in the art without departing from the scope and essence of the present application shall fall within the scope of rights of the present application.

Claims

1. A method applied to a grid-connected inverter, characterized in that The method includes: In each control period, the positive and negative sequence separation unit obtains the fundamental component of the grid voltage and its orthogonal quantity, and the error of the grid voltage αβ-axis component according to the αβ-axis components of the grid voltage, the grid angular frequency output by the frequency-locked loop unit, and the positive and negative sequence separation gain factor output by the variable gain control unit; calculates the positive and negative sequence components of the grid voltage according to the fundamental component of the grid voltage and its orthogonal quantity; The frequency-locked loop unit obtains the grid angular frequency according to at least one of the fundamental component of the grid voltage, the orthogonal quantity of the fundamental component of the grid voltage, the positive and negative sequence components of the grid voltage output by the positive and negative sequence separation unit, the error of the grid voltage αβ-axis component, and the frequency-locked loop gain factor or the frequency-locked integral reset signal output by the variable gain control unit; feeds the obtained grid angular frequency back to the positive and negative sequence separation unit for use in the next control period; The variable gain control unit calculates the grid voltage amplitude mutation index and the grid voltage background harmonic content index respectively according to the error of the grid voltage αβ-axis component and the positive sequence component of the grid voltage output by the positive and negative sequence separation unit; updates the frequency-locked loop gain factor or the frequency-locked integral reset signal according to the grid voltage amplitude mutation index, and updates the positive and negative sequence separation gain factor according to the grid voltage background harmonic content index; feeds the updated frequency-locked loop gain factor or the frequency-locked integral reset signal back to the frequency-locked loop unit, and feeds the updated positive and negative sequence separation gain factor back to the positive and negative sequence separation unit for use in the next control period.

2. The method according to claim 1, wherein The step of updating the frequency-locked loop gain factor or the frequency-locked integral reset signal according to the grid voltage amplitude mutation index includes: Updating the frequency-locked loop variable gain control trigger flag according to the grid voltage amplitude mutation index; updating the frequency-locked loop gain factor according to the frequency-locked loop variable gain control trigger flag; or Updating the grid voltage amplitude mutation flag according to the grid voltage amplitude mutation index; updating the output flag of the timing control module according to the grid voltage amplitude mutation flag; updating the frequency-locked integral reset signal according to the output flag of the timing control module and the grid voltage amplitude mutation flag.

3. The method according to claim 1, characterized in that, The step of updating the positive and negative sequence separation gain factor according to the grid voltage background harmonic content index includes: Updating the positive and negative sequence separation variable gain control trigger flag according to the grid voltage background harmonic content index; updating the positive and negative sequence separation gain factor according to the positive and negative sequence separation variable gain control trigger flag.

4. The method according to claim 1, wherein The frequency-locked loop unit integrates the signal input to the integrator or clears and resets the output of the integrator according to the frequency-locked integral reset signal.

5. The method according to claim 1, characterized in that The variable gain control unit calculates the absolute value and modulus of the error according to at least one of the errors of the grid voltage αβ-axis component, and calculates the modulus of the component according to the positive sequence component of the grid voltage; calculates the grid voltage amplitude mutation index and the grid voltage background harmonic content index respectively according to the absolute value of the error, the modulus of the error, and the modulus of the component.

6. The method according to claim 1, wherein The variable gain control unit determines whether the grid voltage jumps according to the grid voltage amplitude mutation index, and updates the initial trigger flag of the PLL variable gain control; updates the PLL variable gain control trigger flag according to the initial trigger flag of the PLL variable gain control and the output flag of the timing control module.

7. The method according to claim 1, wherein The variable gain control unit determines whether the grid voltage contains background harmonics according to the grid voltage background harmonic content index, and updates the positive and negative sequence separation variable gain control trigger flag.

8. The method according to claim 1, characterized in that, The variable gain control unit obtains the preset factor of the PLL gain according to the initial factor of the PLL gain and the grid voltage amplitude mutation index; obtains the target factor of the PLL gain after limiting the preset factor of the PLL gain; Updates the PLL gain factor according to the PLL variable gain control trigger flag and the target factor of the PLL gain.

9. The method according to claim 1, wherein The variable gain control unit obtains the preset factor of the positive and negative sequence separation gain according to the initial factor of the positive and negative sequence separation gain and the grid voltage background harmonic content index; Obtains the target factor of the positive and negative sequence separation gain after limiting the preset factor of the positive and negative sequence separation gain; Updates the positive and negative sequence separation gain factor according to the positive and negative sequence separation variable gain control trigger flag and the target factor of the positive and negative sequence separation gain.

10. A device applied to a grid-connected inverter, characterized in that, Comprises: A positive and negative sequence separation module, configured to obtain the fundamental component of the grid voltage and its orthogonal quantity, and the error of the grid voltage αβ-axis component according to the grid voltage αβ-axis component, the grid angular frequency output by the PLL, and the positive and negative sequence separation gain factor output by the variable gain control module; calculates the positive and negative sequence components of the grid voltage according to the fundamental component of the grid voltage and its orthogonal quantity. A phase-locked loop, configured to obtain the grid angular frequency according to at least one of the fundamental component of the grid voltage, the orthogonal quantity of the fundamental component of the grid voltage, and the positive and negative sequence components of the grid voltage output by the positive and negative sequence separation module, the error of the grid voltage αβ-axis component, and the PLL gain factor or the PLL integral reset signal output by the variable gain control module; feeds the obtained grid angular frequency back to the positive and negative sequence separation module for use in the next control cycle. A variable gain control module, configured to calculate the grid voltage amplitude mutation index and the grid voltage background harmonic content index respectively according to the error of the grid voltage αβ-axis component and the positive sequence component of the grid voltage output by the positive and negative sequence separation module; updates the PLL gain factor or the PLL integral reset signal according to the grid voltage amplitude mutation index, and updates the positive and negative sequence separation gain factor according to the grid voltage background harmonic content index; feeds the updated PLL gain factor or the PLL integral reset signal back to the PLL, and feeds the updated positive and negative sequence separation gain factor back to the positive and negative sequence separation module for use in the next control cycle. The variable gain control module is connected to the PLL, and the PLL and the variable gain control module are respectively connected to the positive and negative sequence separation module.

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