Soft error detection method and device based on systolic array

Abstract

The present application discloses a soft error detection method and device based on a pulsating array, which is applied to the field of computer technology. The method includes determining the redundancy factor of the target layer according to the parameters of the pulsating array and the total number of filters of the target layer of the target convolutional neural network; determining the fragile filters for redundant execution in each layer of the network according to the elastic difference information between the filters of the target convolutional neural network and each redundancy factor; repeatedly loading each fragile filter into the pulse array during the weight loading process of the target convolutional neural network; sending the output information of the current cycle of the pulse array to the cache area for numerical verification, and performing error detection on the output information of the repeated filter of the next cycle of the pulse array, thereby significantly reducing energy overhead while ensuring the error detection capability.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a soft error detection method and device based on a systolic array. Background Art

[0002] In recent years, convolutional neural networks have been widely deployed in application systems such as IoT smart terminals and autonomous driving due to their superior performance. Relying on a large amount of training data, network algorithms can be applied to many technical fields such as image classification and detection, human-computer games, and natural language processing. Generally, a convolutional neural network consists of a convolutional layer, a pooling layer, and a fully connected layer, and most of its calculations occur in the convolutional layer. Each convolutional layer consists of many filters, which are used to capture various features. The pooling layer is used to divide the feature map into several parts, and after processing through specific rules such as maximum pooling and average pooling, only one representative value in these divided parts is retained to reduce the size of the feature map. The fully connected layer uses the features extracted from the previous convolutional layer for classification or detection. In this context, the structure of the convolutional neural network is becoming more and more complex, and the depth is constantly increasing, and the amount of network calculation is also increasing, resulting in low computing efficiency or high power consumption of general hardware platforms.

[0003] In order to solve the shortcomings of this technology, dedicated hardware is used to accelerate the calculation of convolutional neural networks. Among them, the systolic array design reuses input data to accelerate the main multiplication and accumulation operations in convolutional neural networks, showing efficient performance and excellent scalability, and has received widespread attention from academia and industry. The systolic array consists of a group of highly parallel processing elements (PEs). The working principle is as follows: Figure 1 As shown, each processing element performs multiplication and accumulation operations and is closely connected to its neighbors in two dimensions. In technical design, a fixed-weight systolic array containing 256×256 processing elements is the baseline architecture, such as Google's Tensor Processing Unit. In the fixed-weight data flow, each weight of the filter will be pre-assigned to a processing element along a column. The input will flow from the left to the processing element on the right to reuse the input data between filters. At the same time, each processing element produces a partial sum and propagates it to the neighbor below for accumulation.

[0004] As semiconductor size shrinks and chip integration density increases, pulsating arrays with tens of thousands of processing elements are increasingly vulnerable to high-energy neutrons or alpha particles, causing the stored 0s and 1s to jump, such as 001 to 000, which will cause instantaneous bit flips during execution, known as soft errors. Although convolutional neural networks themselves have a certain degree of fault tolerance, errors that occur at critical fault points can still lead to catastrophic failures, such as Figure 2The significant impact caused by the soft errors shown. In addition, due to the frequent data reuse in the system array, the errors in a single PE will propagate along the data flow, which may cause a sharp drop in the accuracy of the convolutional neural network. Therefore, when the convolutional neural network accelerator pursues higher performance and energy efficiency, it must also consider reliable execution in the presence of soft errors.

[0005] The execution procedure of a convolutional neural network includes two steps: training and inference. The training phase is usually performed on a high-performance platform, where the back-propagation process generally suppresses errors. In contrast, the inference phase will be executed multiple times and may be deployed on unreliable platforms, such as embedded systems with limited energy. Therefore, this technology is effective in improving the error resistance of the inference phase of the convolutional neural network. In addition, since the convolutional layer and the fully connected layer are accelerated on the systolic array, only the weight errors of the convolutional layer and the fully connected layer are usually focused on. Data perturbations caused by soft errors may lead to misclassification of the network. Since the inputs of each inference process are different, 10 inputs are selected in each category to capture the general error resilience of the convolutional neural network. The inference process of the convolutional neural network in the systolic array is as follows: When the inference process in the convolutional neural network is carried out in layers, when the calculation reaches the convolutional layer or the fully connected layer stage, the systolic array takes over the calculation process, and the weight parameters of the filter of this layer are unfolded and tiled in the processing elements of the systolic array in the order of calculation. One of the filters occupies a single column of the systolic array. If one round of systolic array calculation cannot complete all the calculation operations of this layer, the systolic array will perform expansion rounds of calculations in horizontal and vertical space, and finally output the calculation results of this layer for the calculation of the next layer. Therefore, each round of calculation of the systolic array can only be used for the same layer and cannot be used across layers.

[0006] Related technologies In order to detect soft errors that occur in the systolic array during this reasoning process, a dual-mode redundancy method is usually used. The specific process is: the fully connected layer and the convolution layer calculated on the systolic array, each layer is executed twice in the systolic array, and finally the output results of the two rounds of systolic arrays of the same calculation are compared. If the calculation results are the same, it can be considered that no error has occurred. At this time, it is considered that the two rounds of systolic calculations cannot have soft errors occurring at the same position. If the calculation results are different, it is considered that a soft error has occurred. At this time, the soft error is detected and other subsequent processing processes are required. It can be seen that the dual-mode redundancy method requires repeated calculations of the key calculation layers in the convolutional neural network, such as the convolutional layer and the fully connected layer, which increases the reasoning calculation time exponentially and is not suitable for some time-critical applications. In addition, the overall structure of the convolutional neural network itself is fixed before the reasoning calculation stage. According to its calculation mode on the systolic array, when a small-scale convolution layer is deployed on the accelerator, that is, the number of filters is less than the width of the systolic array, some entire columns of PEs are idle. In addition, when the size of a specific filter layer cannot be evenly distributed by the width of the systolic array, the multiple filters of the convolution layer will also show different elasticity when errors occur due to their functional tendencies. According to statistics, only a few filters in the same convolution layer are sensitive to errors and ultimately affect the calculation results of the convolutional neural network. Therefore, the dual-mode redundancy method performs poorly in terms of efficacy.

[0007] In view of this, how to reduce energy consumption while ensuring error detection capabilities is a computational problem that technicians in the field need to solve. Summary of the invention

[0008] The present application provides a soft error detection method and device based on a systolic array, which can significantly reduce energy consumption while ensuring error detection capability.

[0009] To solve the above technical problems, the embodiments of the present invention provide the following technical solutions:

[0010] An embodiment of the present invention provides a soft error detection method based on a systolic array, comprising:

[0011] Determining a redundancy factor of a target layer of a target convolutional neural network based on parameters of the systolic array and a total number of filters of the target layer;

[0012] Determining the fragile filters for redundant execution in each layer of the network according to the elastic difference information and each redundancy factor between the filters of the target convolutional neural network;

[0013] During the weight loading process of the target convolutional neural network, repeatedly loading each fragile filter into the systolic array;

[0014] The output information of the current cycle of the systolic array is sent to a buffer area for value verification, and the output information of the repetitive filter of the next cycle of the systolic array is error detected.

[0015] Optionally, before the elastic difference information and each redundancy factor between the filters of the target convolutional neural network, the method further includes:

[0016] Based on the gradient analysis method, the elastic difference information between the filters of the target convolutional neural network is determined.

[0017] Optionally, repeatedly loading each fragile filter into the systolic array comprises:

[0018] For each fragile filter, a repeated filter of a current fragile filter is allocated next to the current fragile filter, so that the repeated filter and the current fragile filter are processed in adjacent cycles.

[0019] Optionally, after performing error detection on the output information of the repetition filter of the next cycle of the systolic array, the method further includes:

[0020] If an error is detected, outputting a whole round of calculation instructions for restarting the systolic array;

[0021] If no error is detected, the output information of the current cycle of the systolic array is written into the input buffer.

[0022] Optionally, after outputting the instruction to restart the whole round of calculation of the systolic array if an error is detected, the method further includes:

[0023] For the systolic array after executing the instruction, numerically verify the new output information of the systolic array again, and send the new output information of the repetitive filter of the next cycle of the systolic array to the comparator for error detection;

[0024] If an error is detected, new output information of the repetitive filter of the next cycle of the systolic array is sent to the input buffer, and an instruction to maintain a normal operating state is sent.

[0025] Optionally, performing error detection on output information of a repetition filter of a next cycle of the systolic array includes:

[0026] Determining whether the total number of filters in the current layer is greater than the column width of the systolic array;

[0027] If the total number of filters in the current layer is greater than the column width of the systolic array, and there is a fragile filter that is exactly allocated to the last column of the systolic array, then error detection is performed on output information of the repeated filter in the next next period of the systolic array;

[0028] If the total number of filters of the current layer is less than or equal to the column width of the systolic array, and / or there is no fragile filter exactly allocated to the last column of the systolic array, error detection is performed on output information of repeated filters of the next period of the systolic array.

[0029] Optionally, determining the fragile filter for redundant execution in each layer of the network according to the elasticity difference information and each redundancy factor between the filters of the target convolutional neural network includes:

[0030] If the filter of the current layer network just completely fills the systolic array, triggering an instruction to generate a redundant round to obtain a free column of the systolic array;

[0031] For each layer of the network, if the redundancy factor of the current layer is greater than a preset redundancy threshold, all filters of the current layer are fragile filters;

[0032] If the redundancy factor of the current layer is less than or equal to the preset redundancy threshold, a target number of filters are selected from all filters of the current layer as fragile filters according to the elastic difference information; the target number is the same as the number of free columns of the systolic array;

[0033] Each fragile filter is mapped onto an idle processing element of the systolic array.

[0034] Another aspect of the present invention provides a soft error detection device based on a systolic array, comprising:

[0035] A network deployment module, configured to determine a redundancy factor of a target layer according to parameters of a systolic array and the total number of filters of a target layer of a target convolutional neural network; determine fragile filters for redundant execution in each layer of the network according to elastic difference information between filters of the target convolutional neural network and each redundancy factor; and repeatedly load each fragile filter into the systolic array during a weight loading process of the target convolutional neural network;

[0036] The soft error detection module is used to send the output information of the current cycle of the systolic array to the buffer area for value verification, and to perform error detection on the output information of the repetitive filter of the next cycle of the systolic array.

[0037] Optionally, the network deployment module is also used to: determine elastic difference information between filters of the target convolutional neural network based on a gradient analysis method.

[0038] Optionally, the network deployment module is further used to: for each fragile filter, allocate a repeated filter of a current fragile filter next to the current fragile filter, so that the repeated filter and the current fragile filter are processed in adjacent cycles.

[0039] The advantage of the technical solution provided by the present application is that it uses the elastic difference information between filter granularities in combination with the recycling of idle processing element columns in the systolic array for soft error detection of fragile filters, replacing the inefficient error injection process to simulate the actual occurrence of soft errors in hardware. Compared with the traditional dual-mode redundancy (i.e., DMR) and its optimized recycled dual-module redundancy (i.e., R-DMR), it can significantly reduce energy overhead while ensuring error detection capabilities, and can accurately detect most soft errors in convolutional neural networks.

[0040] In addition, the embodiment of the present invention also provides a corresponding implementation device for the soft error detection method based on the systolic array, which further makes the method more practical, and the device has corresponding advantages.

[0041] It is to be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present invention or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0043] Figure 1 A schematic diagram of the working principle of the pulsation series provided by an embodiment of the present invention;

[0044] Figure 2 A schematic diagram of the impact caused by a soft error in an illustrative example provided in an embodiment of the present invention;

[0045] Figure 3 A schematic diagram of a flow chart of a soft error detection method based on a systolic array provided in an embodiment of the present invention;

[0046] Figure 4 A structural diagram of a specific implementation of a soft error detection device based on a systolic array provided in an embodiment of the present invention;

[0047] Figure 5 A structural diagram of a specific implementation of an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0048] In order to enable those skilled in the art to better understand the scheme of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0049] The terms "first", "second", "third", "fourth", etc. in the specification and claims of this application and the above drawings are used to distinguish different objects rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but may include steps or units that are not listed.

[0050] After introducing the technical solutions of the embodiments of the present invention, various non-limiting implementation methods of the present application are described in detail below.

[0051] See first Figure 3 , Figure 3 A flowchart of a soft error detection method based on a systolic array provided in an embodiment of the present invention. The calculation of a convolutional neural network is usually divided into two processes: training and reasoning. The parameters required for its calculation will no longer change after the training process is completed. At this time, the convolutional neural network will be deployed on an intelligent computing device for offline calculation according to different application scenarios. The technical solution of this application is applied to the period after the completion of training and before the deployment of calculations, that is, for a trained convolutional neural network. The embodiments of the present invention may include the following contents:

[0052] S301: Determine a redundancy factor of a target layer according to parameters of a systolic array and the total number of filters of a target layer of a target convolutional neural network.

[0053] In this embodiment, the target convolutional neural network is any network model that has been trained and needs to be deployed to an intelligent computing device. Since the convolutional neural network is layered into a systolic array, for each layer of the convolutional neural network, it is necessary to determine the redundancy factor of each layer based on the parameters of the systolic array, such as the column width of the systolic array, and the total number of filters contained in each layer of the target convolutional neural network. The redundancy factor serves as a strategy selection criterion for performing redundant filters.

[0054] S302: Determine the fragile filter for redundant execution in each layer of the network according to the elastic difference information and various redundancy factors between the filters of the target convolutional neural network.

[0055] Before executing this step, it is necessary to determine the elastic difference information between the target convolutional neural networks. In order to obtain the elastic difference of the filter granularity of the convolutional neural network, the typical method is to perform a sufficient error injection test on each filter. However, due to the huge number of filters in modern convolutional neural networks, this method will introduce a lot of time or energy overhead. Based on this, this embodiment can replace error injection with gradient analysis to evaluate the soft error elastic difference of the convolutional neural network. During the model testing process, back propagation can be used to obtain the gradient of the weight and use it as the selection criterion for subsequent redundant filters. That is, the elastic difference information between the filters of the target convolutional neural network can be determined based on the gradient analysis method. For the trained convolutional neural network model, the filter-level gradient analysis is used to estimate the sensitivity of the filter. Of course, technical personnel in the relevant field can also flexibly choose other methods according to actual needs, such as using significance analysis methods, benefit analysis methods, average L2 paradigm analysis methods, etc. to calculate the fault-tolerant elastic difference of the convolutional neural network filter level.

[0056] S303: During the weight loading process of the target convolutional neural network, each fragile filter is repeatedly loaded into the systolic array.

[0057] In the previous step, the fragile filter refers to a reusable filter selected from all filters in each layer, or a filter that can be repeatedly loaded into the systolic array for calculation. To distinguish, this type of filter can be called a fragile filter, or a bright column. The number of fragile filters in different layers is different, and for each fragile filter, the fragile filter is used as the original filter, and the reused fragile filter can be called a repeated filter, or a shadow column. In order to improve the error detection efficiency, for each fragile filter, the repeated filter of the current fragile filter is assigned to the side of the current fragile filter so that the repeated filter and the current fragile filter are processed in adjacent cycles. That is, the repeated filters (i.e., shadow columns) are assigned to the side of the original filters, so that they will be processed in adjacent cycles, and accordingly, the output results can be obtained in adjacent cycles, thereby having a higher error detection efficiency.

[0058] In this embodiment, each fragile filter is repeatedly loaded into the systolic array, and idle processing element columns in the systolic array can be recycled. Based on the error sensitivity of the filter in each network layer, such as the convolutional layer, the most fragile part of the filters is repeatedly allocated to the systolic array by recycling the idle processing element columns in the systolic array to perform soft error detection.

[0059] S304: Send the output information of the current cycle of the systolic array to the buffer area for value verification, and perform error detection on the output information of the repetitive filter of the next cycle of the systolic array.

[0060] In this embodiment, when performing error detection, the output of the systolic array can be sent to the buffer for data value verification. In the next cycle, the output of the repeated filter will reach the comparator for error detection. If an error is detected, the output will restart the whole round of calculation instructions of the systolic array; if no error is detected, the output information of the current cycle of the systolic array will be written to the input buffer. That is, if an error is detected, the whole round of execution will be restarted to ensure the correctness of the model execution. Otherwise, the verified data will be written back to the input buffer. Considering that some errors in the systolic array will be masked by the activation function and the pooling layer, the functional unit that performs error detection can be placed after the polling unit that performs the polling task, thereby improving the overall work efficiency. Further, due to the nature of soft errors, the probability of errors occurring in two executions of the same filter is extremely low. In addition, the present application can also use a gating method to ensure the data correctness of the introduced hardware components such as demultiplexers, comparators, and comparison buffers. Since the size of these hardware components is negligible compared to the high-density systolic array, the introduced area / energy overhead is negligible.

[0061] In the technical solution provided in the embodiment of the present invention, the elastic difference information between the filter granularities is combined with the column of idle processing elements in the systolic array to be recycled for soft error detection of fragile filters, which replaces the inefficient error injection process to simulate the actual occurrence of soft errors in hardware. Compared with the traditional dual-mode redundancy (i.e., DMR) and its optimized recycled dual-module redundancy (i.e., R-DMR), it can significantly reduce energy overhead while ensuring error detection capability, and can accurately detect most soft errors in convolutional neural networks.

[0062] It should be noted that there is no strict order of execution between the steps in this application. As long as they comply with the logical order, these steps can be executed simultaneously or in a certain preset order. Figure 3 This is just a schematic and does not mean that this is the only execution order.

[0063] It can be understood that after a soft error is detected, the systolic array will restart and execute a whole round of calculations. For the systolic array after executing the instruction, the new output information of the systolic array can be numerically verified again, and the new output information of the repetition filter of the next cycle of the systolic array is sent to the comparator for error detection; if an error is detected, the new output information of the repetition filter of the next cycle of the systolic array is sent to the input buffer, and an instruction to maintain the normal operating state is sent.

[0064] In this embodiment, after the systolic array receives the restart and execute the whole round of calculation instruction, in order to make the expression clear and unambiguous, the output of the whole round of calculation corresponding to the execution instruction can be called new output information. That is, if an error is detected, the next round will be restarted first, and the verification will be performed again. If an error is still detected, it means that the original result is incorrect. At this time, the output of the repeated filter will be sent to the input buffer and the program will be kept running.

[0065] It is understandable that when the number of filters is greater than the column width of the systolic array, there may be a special case where one of the fragile filters happens to be assigned to the last column of the array, i.e., the rightmost column. In this case, the repeated filter will be executed in the next round. Based on this, an optional implementation of the above steps for error detection of the output information of the repeated filter of the next cycle of the systolic array can be:

[0066] Determine whether the total number of filters in the current layer is greater than the column width of the systolic array;

[0067] If the total number of filters in the current layer is greater than the column width of the systolic array, and there is a fragile filter that is exactly assigned to the last column of the systolic array, then error detection is performed on the output information of the repeated filter in the next next cycle of the systolic array, that is, the next cycle of the next cycle;

[0068] If the total number of filters in the current layer is less than or equal to the column width of the systolic array, and / or there is no fragile filter exactly assigned to the last column of the systolic array, error detection is performed on the output information of the repeated filters in the next cycle of the systolic array.

[0069] In the above embodiment, there is no limitation on how to execute step S102. In this embodiment, an optional identification method of a fragile filter is provided, which may include the following steps:

[0070] If the filter of the current layer network just completely fills the systolic array, that is, the systolic array of the current layer has no idle opportunities, then an instruction to generate a redundant round is triggered, and the idle columns of the systolic array are obtained or recycled through the redundant round to improve the reliability of soft error detection.

[0071] For each layer of the network, if the redundancy factor of the current layer is greater than a preset redundancy threshold, all filters of the current layer are fragile filters; if the redundancy factor of the current layer is less than or equal to the preset redundancy threshold, a target number of filters are selected from all filters of the current layer as fragile filters according to elastic difference information; the target number is the same as the number of free columns of the systolic array; and each fragile filter is mapped to an idle processing element of the systolic array.

[0072] In this embodiment, the redundancy factor can be characterized by a parameter called column idle rate, which can be easily calculated by the column width (width) of the systolic array and the number of filters in a layer (fnum). In the calculation, [fnum / width] is the number of rounds of full-load execution of the systolic array of a specific convolutional layer in the systolic array, which represents the number of idle columns. Therefore, column idle rate = (width-(fnum%width)) / fnum. The filter will be repeated in two cases: in the first case, when the column idle rate is greater than the preset redundancy threshold such as 0.5, it means that there will be enough idle columns for full redundancy of the filter in this layer, which usually occurs in the first few layers of the convolutional neural network. In the second case, that is, when the first case is not met, partial redundancy will be triggered. Based on the elasticity difference between filters, the first k sensitive filters can be selected for replication, where k is the number of idle columns. Since the scale of the network, the gradient of the filter and the size of the systolic array are fixed, the above-mentioned fragile filter identification or selection stage is easy to implement offline. In order to improve reliability. During the processing of some intermediate layers, the filters may just completely fill the systolic array (i.e., fnum%width=0), which indicates that there is no opportunity to recycle the PEs of the free columns for error detection. In pursuit of higher reliability, a redundant round can be triggered. In this case, k (k=width) free columns are obtained by sacrificing a little execution time. The top k fragile filters for redundant execution will be selected by the above analysis method. Considering the error sensitivity of filters in convolutional neural networks, there is an opportunity to map fragile filters to idle PEs of the systolic array to improve the reliability of soft errors, which achieves a better trade-off between reliability and cost. In addition, the whole method does not affect the workflow of the baseline systolic array, so it does not introduce much performance degradation.

[0073] The embodiment of the present invention also provides a corresponding device for the soft error detection method based on the systolic array, which further makes the method more practical. The device can be described from the perspective of functional modules and hardware. The soft error detection device based on the systolic array provided by the embodiment of the present invention is introduced below. The soft error detection device based on the systolic array described below and the soft error detection method based on the systolic array described above can be referred to each other.

[0074] From the perspective of functional modules, see Figure 4 , Figure 4 A structural diagram of a soft error detection device based on a systolic array provided in an embodiment of the present invention in a specific implementation manner, the device may include:

[0075] The network deployment module 401 is used to determine the redundancy factor of the target layer according to the parameters of the systolic array and the total number of filters of the target layer of the target convolutional neural network; determine the fragile filters for redundant execution in each layer of the network according to the elastic difference information between the filters of the target convolutional neural network and each redundancy factor; and repeatedly load each fragile filter into the systolic array during the weight loading process of the target convolutional neural network.

[0076] The soft error detection module 402 is used to send the output information of the current cycle of the systolic array to the buffer area for value verification, and to perform error detection on the output information of the repetitive filter of the next cycle of the systolic array.

[0077] Optionally, in some implementations of this embodiment, the above-mentioned network deployment module 401 can be used to: determine the elastic difference information between filters of the target convolutional neural network based on the gradient analysis method.

[0078] As an optional implementation of this embodiment, the network deployment module 401 may also be used to: for each fragile filter, allocate a repeated filter of the current fragile filter next to the current fragile filter, so that the repeated filter and the current fragile filter are processed in adjacent cycles.

[0079] As another optional implementation of this embodiment, the above-mentioned network deployment module 401 can also be further used for: if the filters of the current layer network just completely fill the systolic array, then triggering an instruction to generate a redundant round to obtain the free columns of the systolic array; for each layer of the network, if the redundancy factor of the current layer is greater than the preset redundancy threshold, then all filters of the current layer are fragile filters; if the redundancy factor of the current layer is less than or equal to the preset redundancy threshold, then according to the elastic difference information, a target number of filters are selected from all filters of the current layer as fragile filters; the target number is the same as the number of free columns of the systolic array; and each fragile filter is mapped to an idle processing element of the systolic array.

[0080] Optionally, in some other implementations of this embodiment, the soft error detection module 402 may be used to: if an error is detected, output a whole round of calculation instructions to restart the systolic array; if no error is detected, write the output information of the current cycle of the systolic array into the input buffer.

[0081] As an optional implementation of the above embodiment, the soft error detection module 402 can also be used to: for the systolic array after executing the instruction, perform numerical verification on the new output information of the systolic array again, and send the new output information of the repetition filter of the next cycle of the systolic array to the comparator for error detection; if an error is detected, send the new output information of the repetition filter of the next cycle of the systolic array to the input buffer area, and send an instruction to maintain the normal operating state.

[0082] As another optional implementation of the above embodiment, the soft error detection module 402 may be further configured to: determine whether the total number of filters in the current layer is greater than the column width of the systolic array; if the total number of filters in the current layer is greater than the column width of the systolic array, and there is a fragile filter that is exactly allocated to the last column of the systolic array, then perform error detection on output information of repeated filters in the next next cycle of the systolic array; if the total number of filters in the current layer is less than or equal to the column width of the systolic array, and / or there is no fragile filter that is exactly allocated to the last column of the systolic array, then perform error detection on output information of repeated filters in the next cycle of the systolic array.

[0083] The functions of the functional modules of the soft error detection device based on the systolic array described in the embodiment of the present invention can be specifically implemented according to the method in the above method embodiment. The specific implementation process can refer to the relevant description of the above method embodiment, which will not be repeated here.

[0084] It can be seen from the above that the embodiments of the present invention can significantly reduce energy consumption while ensuring the error detection capability.

[0085] The soft error detection device based on the systolic array mentioned above is described from the perspective of functional modules. Furthermore, the present application also provides an electronic device, which is described from the perspective of hardware. Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application in one implementation manner. Figure 5 As shown, the electronic device includes a memory 50 for storing a computer program; a processor 51 for implementing the steps of the soft error detection method based on the systolic array as mentioned in any of the above embodiments when executing the computer program.

[0086] Among them, the processor 51 may include one or more processing cores, such as a 4-core processor, an 8-core processor, and the processor 51 may also be a controller, a microcontroller, a microprocessor or other data processing chip. The processor 51 may be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 51 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 51 may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 51 may also include an AI (Artificial Intelligence) processor, which is used to process computing operations related to machine learning.

[0087] The memory 50 may include one or more computer-readable storage media, which may be non-transitory. The memory 50 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices and flash storage devices. In some embodiments, the memory 50 may be an internal storage unit of an electronic device, such as a hard disk of a server. In other embodiments, the memory 50 may also be an external storage device of an electronic device, such as a plug-in hard disk equipped on a server, a smart memory card (Smart Media Card, SMC), a secure digital (SecureDigital, SD) card, a flash card (Flash Card), etc. Further, the memory 50 may also include both an internal storage unit of an electronic device and an external storage device. The memory 50 may not only be used to store application software and various types of data installed in the electronic device, such as: the code of the program for executing the vulnerability processing method, etc., but also be used to temporarily store data that has been output or is to be output. In this embodiment, the memory 50 is at least used to store the following computer program 501, wherein, after the computer program is loaded and executed by the processor 51, the relevant steps of the soft error detection method based on the systolic array disclosed in any of the aforementioned embodiments can be implemented. In addition, the resources stored in the memory 50 may also include an operating system 502 and data 503, etc., and the storage method may be temporary storage or permanent storage. The operating system 502 may include Windows, Unix, Linux, etc. The data 503 may include, but is not limited to, data corresponding to the soft error detection result based on the systolic array, etc.

[0088] In some embodiments, the electronic device may further include a display screen 52, an input / output interface 53, a communication interface 54 or a network interface, a power supply 55 and a communication bus 56. Among them, the display screen 52 and the input / output interface 53 such as a keyboard belong to the user interface, and the optional user interface may also include a standard wired interface, a wireless interface, etc. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, and an OLED (Organic Light-Emitting Diode) touch device, etc. The display may also be appropriately referred to as a display screen or a display unit, which is used to display information processed in the electronic device and to display a visual user interface. The communication interface 54 may optionally include a wired interface and / or a wireless interface, such as a WI-FI interface, a Bluetooth interface, etc., which is usually used to establish a communication connection between the electronic device and other electronic devices. The communication bus 56 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0089] Those skilled in the art will understand that Figure 5 The structure shown in the figure does not constitute a limitation on the electronic device, and may include more or fewer components than those shown in the figure, for example, it may also include a sensor 57 for realizing various functions.

[0090] The functions of the functional modules of the electronic device described in the embodiment of the present invention can be specifically implemented according to the method in the above method embodiment. The specific implementation process can refer to the relevant description of the above method embodiment, which will not be repeated here.

[0091] It can be seen from the above that the embodiments of the present invention can significantly reduce energy consumption while ensuring the error detection capability.

[0092] It can be understood that if the soft error detection method based on the systolic array in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium to execute all or part of the steps of the methods of each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), electrically erasable programmable ROM, register, hard disk, multimedia card, card-type memory (such as SD or DX memory, etc.), magnetic memory, removable disk, CD-ROM, magnetic disk or optical disk, etc. Various media that can store program codes.

[0093] Based on this, an embodiment of the present invention further provides a readable storage medium storing a computer program. When the computer program is executed by a processor, the steps of the soft error detection method based on the systolic array as described in any of the above embodiments are performed.

[0094] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the hardware disclosed in the embodiments, including devices and electronic devices, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the method part.

[0095] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0096] The above is a detailed introduction to a soft error detection method and device based on a systolic array provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A soft error detection method based on a systolic array, characterized in that: include: Determining a redundancy factor of a target layer of a target convolutional neural network based on parameters of the systolic array and a total number of filters of the target layer; If the filters of the current layer network just completely fill the systolic array, an instruction to generate a redundant round is triggered to obtain the free columns of the systolic array; for each layer network, if the redundancy factor of the current layer is greater than a preset redundancy threshold, all filters of the current layer are fragile filters; if the redundancy factor of the current layer is less than or equal to the preset redundancy threshold, a target number of filters are selected from all filters of the current layer as fragile filters according to the elastic difference information; The target number is the same as the number of free columns of the systolic array; each fragile filter is mapped to an idle processing element of the systolic array; During the weight loading process of the target convolutional neural network, repeatedly loading each fragile filter into the systolic array; The output information of the current cycle of the systolic array is sent to a buffer area for value verification, and the output information of the repetitive filter of the next cycle of the systolic array is error detected.

2. The soft error detection method based on systolic array according to claim 1, characterized in that: Before the elastic difference information and each redundancy factor between the filters of the target convolutional neural network, it also includes: Based on the gradient analysis method, the elastic difference information between the filters of the target convolutional neural network is determined.

3. The soft error detection method based on systolic array according to claim 1, characterized in that: The repeatedly loading each fragile filter into the systolic array comprises: For each fragile filter, a repeated filter of a current fragile filter is allocated next to the current fragile filter, so that the repeated filter and the current fragile filter are processed in adjacent cycles.

4. The soft error detection method based on systolic array according to claim 1, characterized in that: After performing error detection on the output information of the repetitive filter of the next cycle of the systolic array, the method further includes: If an error is detected, outputting a whole round of calculation instructions for restarting the systolic array; If no error is detected, the output information of the current cycle of the systolic array is written into the input buffer.

5. The soft error detection method based on systolic array according to claim 4, characterized in that: After outputting the instruction of restarting the whole round calculation of the systolic array if an error is detected, the method further includes: For the systolic array after executing the instruction, numerically verify the new output information of the systolic array again, and send the new output information of the repetitive filter of the next cycle of the systolic array to the comparator for error detection; If an error is detected, new output information of the repetitive filter of the next cycle of the systolic array is sent to the input buffer, and an instruction to maintain a normal operating state is sent.

6. The soft error detection method based on systolic array according to claim 1, characterized in that: The performing error detection on the output information of the repetitive filter of the next cycle of the systolic array comprises: Determining whether the total number of filters in the current layer is greater than the column width of the systolic array; If the total number of filters in the current layer is greater than the column width of the systolic array, and there is a fragile filter that is exactly allocated to the last column of the systolic array, then error detection is performed on output information of the repeated filter in the next next period of the systolic array; If the total number of filters of the current layer is less than or equal to the column width of the systolic array, and / or there is no fragile filter exactly allocated to the last column of the systolic array, error detection is performed on output information of repeated filters of the next period of the systolic array.

7. A soft error detection device based on a systolic array, characterized in that: include: A network deployment module, configured to determine a redundancy factor of a target layer of a target convolutional neural network based on parameters of the systolic array and a total number of filters of the target layer; If the filters of the current layer network just completely fill the systolic array, an instruction to generate a redundant round is triggered to obtain the free columns of the systolic array; for each layer network, if the redundancy factor of the current layer is greater than a preset redundancy threshold, all filters of the current layer are fragile filters; if the redundancy factor of the current layer is less than or equal to the preset redundancy threshold, a target number of filters are selected from all filters of the current layer as fragile filters according to the elastic difference information; The target number is the same as the number of free columns of the systolic array; each fragile filter is mapped to an idle processing element of the systolic array; and each fragile filter is repeatedly loaded into the systolic array during the weight loading process of the target convolutional neural network; The soft error detection module is used to send the output information of the current cycle of the systolic array to the buffer area for value verification, and to perform error detection on the output information of the repetitive filter of the next cycle of the systolic array.

8. The soft error detection device based on systolic array according to claim 7, characterized in that: The network deployment module is also used to determine elastic difference information between filters of the target convolutional neural network based on a gradient analysis method.

9. The soft error detection device based on systolic array according to claim 7, characterized in that: The network deployment module is further used for: for each fragile filter, allocating a repeated filter of a current fragile filter next to the current fragile filter, so that the repeated filter and the current fragile filter are processed in adjacent cycles.

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