A Self-Learning Asynchronous Serial Communication Clock Error Correction Algorithm

Abstract

The present invention relates to the field of serial communication technologies, and in particular to a self-learning asynchronous serial communication clock error correction algorithm. The algorithm includes the following steps: perform normal distribution sampling, select a small batch of MCUs to be used, and through means such as a logic analyzer or an oscilloscope, select the MCUs with the built-in oscillator frequency error at the central value. Set the timer value with a duration of 1 bit for the selected MCU, and the timer value will be solidified into the program as the timer reference value; The error correction algorithm proposed by the present invention can greatly improve the timing sampling accuracy, enable the built-in oscillators with large errors to be applied to serial communications with high-precision requirements, and has good effects in actual measurements in one-to-one or one-to-many serial communications. In the case of a very large MCU clock error, the sampling timings are very consistent and there is sufficient time margin, which not only reduces the cost of the MCU during use but also obtains good consistency, resulting in good economic benefits.

Description

Technical Field

[0001] The present invention relates to the technical field of serial communication, and particularly to a self-learning asynchronous serial communication clock error correction algorithm. Background Technique

[0002] In serial communication, the parsing of data completely depends on local timing sampling. When sampling, it is judged whether the line is 0 or 1 to extract the data of each bit. Generally, at least 1 Byte is transmitted at a time, and the timing accumulation of 8-bit data has relatively high requirements for the accuracy of the clock. Due to cost reasons, many circuit designs usually use the RC oscillator inside the MCU. However, the RC oscillator has a large error. Although there is a trimming operation during the wafer packaging process, due to production cost factors, the accuracy control within 1% is already considered very good, and it is also greatly affected by temperature, which greatly limits the built-in oscillator in serial communication with higher requirements.

[0003] The typical serial communication data format and the process of the receiving end parsing 1 frame of character data are shown in Figure 1 and Figure 2 . When the serial data line is idle, it is in a high-level state. When the level on the data line jumps from high level to low level, it will cause a falling-edge interruption at the receiving end to trigger the entry into the receiving interrupt service subroutine. The interrupt service program will have a Delay operation, setting the time base in the middle of the parity bit to ensure that the stable level in the middle of each bit is read at the sampling point. A delay is made for each bit read as the sampling point for the next bit, and the delay is the time length of a single bit calculated according to the baud rate. Since there is no synchronous clock in asynchronous serial communication, the only thing that can be used as a synchronous reference is the start bit, and only the start bit is fixed to jump from high level to low level. Each time 1 bit is read, it depends on this zero point of the start bit, and the time offset sampling is calculated by accumulating the local clock, which puts forward relatively high requirements for the local clock error. The error will increase exponentially with the number of accumulations. If the accumulated error exceeds the time length of 1 bit, it will cause sampling errors and the data cannot be correctly received. Some MCUs cannot be applied to these scenarios at all due to the extremely poor consistency of the built-in RC oscillator and the too high defect rate. Summary of the Invention

[0004] The purpose of the present invention is to provide a self-learning asynchronous serial communication clock error correction algorithm to solve the problems raised in the above background technique.

[0005] To achieve the above purpose, the present invention provides the following technical solution: A self-learning asynchronous serial communication clock error correction algorithm, and its algorithm includes the following steps:

[0006] S1. Take samples from a normal distribution, select a small batch of MCUs to be used, and through means such as a logic analyzer or an oscilloscope, select the MCUs with the oscillator frequency error within the central value. Set the timer value of 1 bit duration with the selected MCU, and the timer value will be solidified into the program as the timer reference value;

[0007] S2. The communication protocol stipulates that the host computer sends a handshake signal regularly, and it is agreed that both the sending and receiving have parity bits or parity words to enable the other party to judge whether the received data is correct;

[0008] S3. After the device is powered on, the program judges the error correction flag bit. If there is no correction record, it will automatically enter the error correction subroutine;

[0009] S4. After entering the error correction subroutine, the MCU closes all interrupts. The MCU waits for the level jump of the serial line. If it jumps from 1 to 0, immediately start the timer to time until the timing ends when it jumps from 0 to 1;

[0010] S5. Exit the error correction subroutine and enter the normal serial transceiver program. Set the timer value in the transceiver program to the reference value + compensation value.

[0011] Preferably, in the step S1, a domestic MCU with a built-in 16M oscillator is used.

[0012] Preferably, in the step S1, the MCU uses 1 start bit + 8 data bits as a character frame.

[0013] Preferably, in the step S2, the handshake signal is sent to prevent the slave computer from being unable to complete the error correction due to not receiving serial data for a long time.

[0014] Preferably, in the step S2, the time interval for the host computer to send the handshake signal is 0.1 - 2h.

[0015] Preferably, in the step S4, the value of the timer is compared with the calibrated timer. If the difference range is too large, discard it and re-capture. Capture continuously twice. If the values of the two times are equal, subtract the counter value from the timer reference value and store it as the error compensation value in the memory, and at the same time set the calibration flag bit to 1.

[0016] Preferably, in the step S4, the judgment standard value of the difference range is greater than 1 / 2 of the reference value.

[0017] Preferably, in the step S5, after the timer value is set, sample the parity bit and judge whether the data parsing is correct. If it is correct, end the program. If it is incorrect, re-enter the error correction subroutine.

[0018] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0019] The error correction algorithm proposed by the present invention can greatly improve the timing sampling accuracy, enable an internal oscillator with a large error to be applied in serial communication with high-precision requirements, and has been measured to have good effects in one-to-one or one-to-many serial communication. In the case of a very large clock error of the MCU, the sampling timing is very consistent and the time margin is very sufficient, which not only reduces the cost of the MCU during use but also obtains good consistency, resulting in good economic benefits. Brief Description of the Drawings

[0020] Figure 1 It is a schematic diagram of a typical serial data format and parsing timing.

[0021] Figure 2 It is a schematic diagram of the character frame parsing process.

[0022] Figure 3 It is a schematic diagram of eigenvalue sampling timing.

[0023] Figure 4 It is a schematic diagram of the error compensation value calculation process.

[0024] Figure 5 It is a schematic diagram of the character frame parsing process with an error correction algorithm.

[0025] Figure 6 It is a schematic diagram of Sample1 without the error correction algorithm.

[0026] Figure 7 It is a schematic diagram of Sample2 without the error correction algorithm.

[0027] Figure 8 It is a schematic diagram of Sample1 with the self-learning error correction algorithm added.

[0028] Figure 9 It is a schematic diagram of Sample2 with the self-learning error correction algorithm added. Detailed Embodiments

[0029] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0030] Embodiment 1:

[0031] A self-learning asynchronous serial communication clock error correction algorithm, the algorithm includes the following steps:

[0032] S1. Take samples from a normal distribution, select a small batch of MCUs to be used. The MCU is a domestic one with a built-in 16M oscillator. By means of a logic analyzer or an oscilloscope, etc., select the MCU whose built-in oscillator frequency error is at the central value. Set the timer value with a duration of 1 bit for the selected MCU, and the timer value will be solidified into the program as the timer reference value;

[0033] S2. The communication protocol stipulates that the host computer periodically sends a handshake signal to prevent the slave computer from being unable to complete error correction due to not receiving serial data for a long time. It is agreed that both the sending and receiving have parity bits or parity words for the other party to judge whether the received data is correct;

[0034] S3. After the device is powered on, the program judges the error correction flag bit. If there is no correction record, it will automatically enter the error correction subroutine;

[0035] S4. If Figure 3 、 Figure 4 , after entering the error correction subroutine, the MCU closes all interrupts. The MCU waits for the level transition of the serial line. If it jumps from 1 to 0, immediately start the timer to time until the timing ends when it jumps from 0 to 1. Compare the value of the timer with the calibrated timer. If the difference range is too large, discard and re-capture. Capture twice continuously. If the values of the two times are equal, subtract the counter value from the timer reference value and store it in the memory as the error compensation value, and at the same time set the calibration flag bit to 1;

[0036] S5. Exit the error correction subroutine and enter the normal serial communication and reception program. Set the timer value in the communication and reception program to the reference value + compensation value.

[0037] Embodiment 2:

[0038] A self-learning asynchronous serial communication clock error correction algorithm, and the algorithm includes the following steps:

[0039] S1. Take samples from a normal distribution, select a small batch of MCUs to be used. The MCU is a domestic one with a built-in 16M oscillator. The MCU uses 1 start bit + 8 data bits as a character frame. By means of a logic analyzer or an oscilloscope, etc., select the MCU whose built-in oscillator frequency error is at the central value. Set the timer value with a duration of 1 bit for the selected MCU, and the timer value will be solidified into the program as the timer reference value;

[0040] S2. The communication protocol stipulates that the host computer periodically sends a handshake signal to prevent the slave computer from being unable to complete error correction due to not receiving serial data for a long time. The time interval for the host computer to send the handshake signal is 0.1h. It is agreed that both the sending and receiving have parity bits or parity words for the other party to judge whether the received data is correct;

[0041] S3. After the device is powered on, the program checks the error correction flag bit. If there is no correction record, it will automatically enter the error correction subroutine;

[0042] S4. If Figure 3 , Figure 4 , after entering the error correction subroutine, the MCU closes all interrupts. The MCU waits for the level transition of the serial line. If it jumps from 1 to 0, the timer is immediately started to count. The counting stops until it jumps from 0 to 1. The value of the timer is compared with the calibrated timer. If the difference range is too large, it is discarded and re-captured. If the values of the two captures are equal, the timer reference value minus the counter value is stored in the memory as the error compensation value, and the calibration flag bit is set to 1;

[0043] S5. After exiting the error correction subroutine, enter the normal serial transceiver program. The timer value in the transceiver program is set to the reference value + compensation value.

[0044] Embodiment 2:

[0045] A self-learning asynchronous serial communication clock error correction algorithm, and the algorithm includes the following steps:

[0046] S1. Make a normal distribution sampling. Select a small batch of MCUs to be used. The MCU uses a domestic built-in 16M oscillator. The MCU uses 1 start bit + 8 data bits as a character frame. Through means such as a logic analyzer or an oscilloscope, select the MCU with the oscillator frequency error within the central value. Set the timer value of 1 bit duration with the selected MCU. The timer value will be solidified into the program as the timer reference value;

[0047] S2. The communication protocol stipulates that the host computer sends a handshake signal regularly to prevent the slave computer from being unable to complete the error correction due to not receiving serial data for a long time. The time interval for the host computer to send the handshake signal is 1h. It is agreed that both the sending and receiving have parity bits or parity words for the other party to judge whether the received data is correct;

[0048] S3. After the device is powered on, the program checks the error correction flag bit. If there is no correction record, it will automatically enter the error correction subroutine;

[0049] S4. If Figure 3 , Figure 4, after entering the error correction subroutine, the MCU turns off all interrupts. The MCU waits for the level change of the serial line. If it changes from 1 to 0, the timer is immediately started to count until the count ends when it changes from 0 to 1. The value of the timer is compared with the calibrated timer. If the difference range is too large (for example, 1 / 2 of the reference value), discard it and re-grasp. Grasp twice continuously (to prevent capturing incorrect data). If the values of the two captures are equal, subtract the counter value from the timer reference value and store it as the error compensation value in the memory, and at the same time set the calibration flag to 1;

[0050] S5. Exit the error correction subroutine and enter the normal serial transceiver program. The timer value in the transceiver program is set to the reference value + compensation value. After the timer value is set, sample the parity bit and determine whether the data parsing is correct. If it is correct, end the program. If it is incorrect, re-enter the error correction subroutine.

[0051] Example verification:

[0052] This example is an intelligent evacuation system with one-to-many communication between the host computer and the slave computers. The MCU uses a domestic built-in 16M oscillator. One start bit + eight data bits form a character frame, and the parity check uses a parity byte. Figure 6 and Figure 7 are the situations of Sample1 and Sample2 without the self-learning error correction algorithm parsing the data sent by the host computer. The upper line represents the data sent by the host computer, and the transition edges of the lower line represent the sampling points of each bit of the local machine. The data sent by the host computer is 00000000b. Using the same timing value, but because the clock frequency of the MCU built-in oscillator in Sample1 is too fast, the value read by the slave computer becomes 00011111b, and the data cannot be correctly parsed at all. In Sample2, because the MCU clock is too slow, there is not much time margin for the last sampling point.

[0053] Figure 7 and Figure 8 are the data parsing situations after adding the self-learning clock error correction algorithm to Sample1 and Sample2. From the timing diagram captured by the oscilloscope, it can be seen that when the clock error of the MCU is very large, the sampling timings are very consistent and there is sufficient margin, which not only reduces the usage cost of the MCU but also obtains good consistency, resulting in good economic benefits.

[0054] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A self-learning asynchronous serial communication clock error correction algorithm, characterized in that: Its algorithm includes the following steps: S1. Take samples from the normal distribution, select a small batch of MCUs to be used, and through means such as a logic analyzer or an oscilloscope, select the MCUs with the built-in oscillator frequency error at the central value. Set the timer value of 1 bit duration with the selected MCU, and the timer value will be solidified into the program as the timer reference value; S2. The communication protocol stipulates that the host computer sends a handshake signal regularly, and it is agreed that there are parity bits or parity words for both sending and receiving to enable the other party to judge whether the received data is correct; S3. After the device is powered on, the program judges the error correction flag bit. If there is no correction record, it will automatically enter the error correction subroutine; S4. After entering the error correction subroutine, the MCU closes all interrupts. The MCU waits for the level jump of the serial line. If it jumps from 1 to 0, immediately start the timer to time until the timing ends when it jumps from 0 to 1. Compare the value of the timer with the calibrated timer reference value. If the difference is greater than 1 / 2 of the reference value, discard the current timing value and re-capture. When the two captures are consecutive and the two timing values are equal, subtract the timing value from the timer reference value and store it as the error compensation value, and set the calibration flag bit to 1; S5. Exit the error correction subroutine and enter the normal serial communication sending and receiving program. Set the timer value in the sending and receiving program to the reference value + compensation value.

2. The self-learning asynchronous serial communication clock error correction algorithm according to claim 1, characterized in that: In the step S1, the MCU uses a domestic built-in 16M oscillator.

3. A self-learning asynchronous serial communication clock error correction algorithm according to claim 1, characterized in that: In the step S1, the MCU uses 1 start bit + 8 data bits as a character frame.

4. A self-learning asynchronous serial communication clock error correction algorithm according to claim 1, characterized in that: In the step S2, the sending of the handshake signal is used to prevent the slave computer from being unable to complete the error correction due to not receiving serial data for a long time.

5. A self-learning asynchronous serial communication clock error correction algorithm according to claim 1, characterized in that: In the step S2, the time interval for the host computer to send the handshake signal is 0.1 - 2h.

6. A self-learning asynchronous serial communication clock error correction algorithm according to claim 1, characterized in that: In the step S4, compare the value of the timer with the calibrated timer. If the difference range is too large, discard and re-capture. Capture twice continuously. If the two values are equal, subtract the counter value from the timer reference value and store it as the error compensation value in the memory, and at the same time set the calibration flag bit to 1.

7. A self-learning asynchronous serial communication clock error correction algorithm according to claim 6, characterized in that: In the step S4, the judgment standard value for the difference range is greater than 1 / 2 of the reference value.

8. A self-learning asynchronous serial communication clock error correction algorithm according to claim 1, characterized in that: In the step S5, after the timer value is set, sample the parity bit and judge whether the data parsing is correct. If it is correct, end the program. If it is incorrect, re-enter the error correction subroutine.

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