Power consumption control method and device for multi-core systems

Abstract

This disclosure provides a power consumption control method and apparatus for a multi-core system. The multi-core system includes a master processor and at least one slave processor, and is applied in a device including the multi-core system. The method includes: the master processor determining whether a slave processor needs to enter a sleep state based on a comparison of the amount of unprocessed data stored in the input cache space of any slave processor with a first preset threshold, and a comparison of the amount of processed data stored in the output cache space of the slave processor with a second preset threshold; if the master processor determines that the slave processor needs to enter a sleep state, the master processor sets the frequency of the slave processor to a first specified frequency, wherein the first specified frequency is less than an intermediate frequency, and the intermediate frequency is the minimum frequency required for the slave processor to operate normally. This sets the slave processor to a sleep state, thereby reducing the power consumption of the multi-core system.

Description

Technical Field

[0001] This invention relates to the field of information processing technology, and in particular to a power consumption control method and apparatus for a multi-core system. Background Technology

[0002] In today's electronics, communications, and internet industries, whether in embedded systems or general-purpose computer systems, single-core processors are increasingly unable to meet users' demands for high performance and large capacity. As a result, multi-core technology has emerged and continues to develop and mature, rapidly expanding its application in the market. The replacement of traditional single-core technology by multi-core technology has become an inevitable trend.

[0003] In existing technologies, because the slave processors in a multi-core system are always running at high speed, when there is no input data to process, there will be a phenomenon of waiting for data to enter and exit, which will increase the power consumption of the multi-core system. Summary of the Invention

[0004] This disclosure provides an exemplary embodiment of a power consumption control method and apparatus for a multi-core system, used to reduce the power consumption of the multi-core system.

[0005] A first aspect of this disclosure provides a power consumption control method for a multi-core system, the multi-core system including a main processor and at least one slave processor, applied in a device including the multi-core system, the method comprising:

[0006] The main processor determines whether the slave processor needs to enter a sleep state based on the result of comparing the amount of data to be processed stored in the input cache space of any slave processor with a first preset threshold, and based on the result of comparing the amount of processed data stored in the output cache space of the slave processor with a second preset threshold.

[0007] If the master processor determines that the slave processor needs to enter a sleep state, the master processor sets the frequency of the slave processor to a first specified frequency, wherein the first specified frequency is less than an intermediate frequency, and the intermediate frequency is the minimum frequency required for the slave processor to work normally.

[0008] In this embodiment, the processor is determined to enter a sleep state based on a comparison between the amount of data to be processed stored in the processor's input cache and a first preset threshold, and a comparison between the amount of processed data stored in the processor's output cache and a second preset threshold. If it is determined that the processor needs to enter a sleep state, it is set to do so. This reduces the power consumption of the multi-core system.

[0009] In one embodiment, the main processor determines whether the slave processor needs to enter a sleep state based on a comparison between the amount of unprocessed data stored in the input cache space of any slave processor and a first preset threshold, and a comparison between the amount of processed data stored in the output cache space of the slave processor and a second preset threshold, including:

[0010] If the main processor determines that the amount of data to be processed in the input cache space of the slave processor is less than the first preset threshold, and the amount of data processed in the output cache space of the slave processor is greater than the second preset threshold, then the main processor determines that the slave processor needs to enter a sleep state.

[0011] This embodiment determines whether the processor needs to enter a sleep state by comparing the amount of unprocessed data in the processor's input cache space and the amount of processed data in the output cache space with preset thresholds. This makes the determination of the sleep state more accurate.

[0012] In one embodiment, before the main processor determines whether the slave processor needs to enter a sleep state based on a comparison between the amount of data to be processed stored in the input cache space of any slave processor and a first preset threshold, and a comparison between the amount of data processed stored in the output cache space of the slave processor and a second preset threshold, the method further includes:

[0013] At fixed intervals, the slave processor determines the percentage of its non-working time within those fixed intervals; if the processor determines that the percentage of non-working time is within a specified range, the slave processor sends a request to the master processor to enter a sleep state.

[0014] The fixed duration in this embodiment can be set according to the actual situation, and this disclosure does not limit it.

[0015] In this embodiment, the processor determines whether it needs to enter a sleep state by judging the proportion of its non-working time. If so, it sends a sleep state request to the main processor, and the main processor determines whether it needs to enter a sleep state. In this way, the two processors, the main processor and the slave processor, work together to determine whether the slave processor needs to enter a sleep state, so that the determination result is more accurate.

[0016] In one embodiment, after the main processor determines that the slave processor needs to enter a sleep state, and sets the frequency of the slave processor to a first specified frequency by the main processor, the method further includes:

[0017] If the main processor determines that the amount of data to be processed in the input cache space of the slave processor is less than the first preset threshold, then the main processor determines whether the amount of data already processed in the output cache space of the slave processor is not greater than the second preset threshold.

[0018] If so, the main processor sets the frequency of the slave processor to a second specified frequency, wherein the second specified frequency is not less than the intermediate frequency.

[0019] In this embodiment, the main processor compares the amount of data to be processed in the input cache space and the amount of data already processed in the output cache space of the slave processor with preset thresholds to determine whether the slave processor needs to end its sleep state. This ensures that the multi-core system can operate normally while reducing power consumption.

[0020] In one embodiment, the method further includes:

[0021] If the main processor determines that the amount of data to be processed in the input cache space of the slave processor is not less than the first preset threshold, then the main processor sets the frequency of the slave processor to the second specified frequency.

[0022] In this embodiment, if the main processor determines that the amount of data to be processed in the input cache space of the slave processor is not less than the first preset threshold, then it is determined that the slave processor needs to end its sleep state.

[0023] A second aspect of this disclosure provides a power consumption control device for a multi-core system, the device comprising:

[0024] The hibernation state determination module is used by the main processor to determine whether the slave processor needs to enter a hibernation state based on the result of comparing the amount of data to be processed stored in the input cache space of any slave processor with a first preset threshold, and the result of comparing the amount of data processed stored in the output cache space of the slave processor with a second preset threshold.

[0025] A hibernation state setting module is used to set the frequency of the slave processor to a first specified frequency if the master processor determines that the slave processor needs to enter a hibernation state. The first specified frequency is less than an intermediate frequency, and the intermediate frequency is the minimum frequency required for the slave processor to work normally.

[0026] In one embodiment, the sleep state determination module is specifically used for:

[0027] If the main processor determines that the amount of data to be processed in the input cache space of the slave processor is less than the first preset threshold, and the amount of data processed in the output cache space of the slave processor is greater than the second preset threshold, then the main processor determines that the slave processor needs to enter a sleep state.

[0028] In one embodiment, the apparatus further includes:

[0029] The non-working time percentage module is used by the main processor to determine whether the slave processor needs to enter a sleep state before determining whether the slave processor needs to enter a sleep state, based on the result of comparing the amount of data to be processed stored in the input cache space of any slave processor with a first preset threshold and the result of comparing the amount of data processed stored in the output cache space of the slave processor with a second preset threshold. At fixed intervals, the slave processor determines its own non-working time percentage within the fixed interval.

[0030] A hibernation request module is used to send a request to the main processor to enter hibernation if the processor determines that the proportion of non-working time is within a specified range.

[0031] In one embodiment, the apparatus further includes:

[0032] The sleep state termination determination module is used to determine whether the amount of data to be processed in the output cache space of the slave processor is not greater than the second preset threshold after the master processor determines that the slave processor needs to enter a sleep state and sets the frequency of the slave processor to a first specified frequency.

[0033] The first end-of-sleep state setting module is configured to, if so, set the frequency of the slave processor to a second specified frequency, wherein the second specified frequency is not less than the intermediate frequency.

[0034] In one embodiment, the apparatus further includes:

[0035] The second end-of-sleep state setting module is used to set the frequency of the slave processor to the second specified frequency if the main processor determines that the amount of data to be processed in the input cache space of the slave processor is not less than the first preset threshold.

[0036] According to a third aspect of the present disclosure, an electronic device is provided, comprising:

[0037] At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor; the instructions being executed by the at least one processor to enable the at least one processor to perform the method as described in the first aspect.

[0038] According to a fourth aspect provided in the embodiments of this disclosure, a computer storage medium is provided, the computer storage medium storing a computer program for performing the method as described in the first aspect. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is one of the flowcharts illustrating a power consumption control method for a multi-core system according to an embodiment of the present disclosure;

[0041] Figure 2 This is a second schematic flowchart of a power consumption control method for a multi-core system according to an embodiment of the present disclosure;

[0042] Figure 3 This is a power consumption control device for a multi-core system according to an embodiment of the present disclosure;

[0043] Figure 4 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present disclosure. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0045] In this disclosure, the term "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0046] The application scenarios described in this disclosure are for the purpose of more clearly illustrating the technical solutions of this disclosure and do not constitute a limitation on the technical solutions provided in this disclosure. Those skilled in the art will understand that with the emergence of new application scenarios, the technical solutions provided in this disclosure are also applicable to similar technical problems. In the description of this disclosure, unless otherwise stated, "multiple" means two or more.

[0047] In existing technologies, because the slave processors in a multi-core system are always running at high speed, when there is no input data to process, there will be a phenomenon of waiting for data to enter and exit, which will increase the power consumption of the multi-core system.

[0048] Therefore, this disclosure provides a power consumption control method and apparatus for a multi-core system. The main processor in the multi-core system determines whether the slave processor needs to enter a sleep state by comparing the amount of unprocessed data stored in the slave processor's input cache with a first preset threshold, and by comparing the amount of processed data stored in the slave processor's output cache with a second preset threshold. If it is determined that the slave processor needs to enter a sleep state, it is then set to sleep mode. This reduces the power consumption of the multi-core system. The solution of this disclosure will now be described in detail with reference to the accompanying drawings.

[0049] Figure 1 This is a flowchart illustrating the power consumption control method for a multi-core system disclosed herein, wherein the multi-core system includes a main processor and at least one slave processor, and may include the following steps:

[0050] Step 101: The main processor determines whether the slave processor needs to enter a sleep state based on the result of comparing the amount of data to be processed stored in the input cache space of any slave processor with a first preset threshold, and the result of comparing the amount of processed data stored in the output cache space of the slave processor with a second preset threshold.

[0051] In one embodiment, step 101 can be implemented as follows: if the main processor determines that the amount of data to be processed in the input cache space of the slave processor is less than the first preset threshold, and the amount of data of processed data in the output cache space of the slave processor is greater than the second preset threshold, then the main processor determines that the slave processor needs to enter a sleep state.

[0052] For example, if the first preset threshold is A and the second preset threshold is B, and the main processor determines that the amount of data to be processed in the input cache space of the slave processor is less than A, and the amount of processed data in the output cache space of the slave processor is greater than B, then the slave processor needs to enter a sleep state.

[0053] If it is determined that the amount of data to be processed in the input cache space of the processor is not less than A, then it is not necessary to compare the amount of processed data in the output cache space of the processor with the second preset threshold, thereby reducing computational overhead.

[0054] It should be noted that the first preset threshold and the second preset threshold may be equal or unequal, and can be set according to the actual situation. This embodiment of the present disclosure does not limit the specific values.

[0055] To make the determination of whether a slave processor needs to enter a sleep state more accurate, in one embodiment, at fixed intervals, the slave processor determines the percentage of its non-working time within the fixed interval; if the processor determines that the percentage of non-working time is within a specified range, the slave processor sends a request to the master processor to enter a sleep state.

[0056] The method for determining the proportion of non-working time is as follows:

[0057] The idle time of the processor's state machine within a fixed period is statistically analyzed. This idle time is then divided by the fixed period to obtain the percentage of non-working time. For example, this can be determined using formula (1):

[0058] a = t / T (1);

[0059] Where a is the percentage of non-working time; t is the idle time; and T is the fixed time.

[0060] Therefore, by judging the proportion of its own non-working time, it determines whether it needs to enter a hibernation state. If so, it sends a hibernation request to the main processor, and the main processor determines whether it needs to enter a hibernation state. In this way, by having both the main processor and the slave processor work together to determine whether the slave processor needs to enter a hibernation state, the determination result is more accurate.

[0061] Step 102: If the main processor determines that the slave processor needs to enter a sleep state, the main processor sets the frequency of the slave processor to a first specified frequency, wherein the first specified frequency is less than the intermediate frequency, and the intermediate frequency is the minimum frequency required for the slave processor to work normally.

[0062] Therefore, based on the comparison between the amount of unprocessed data stored in the processor's input cache and a first preset threshold, and based on the comparison between the amount of processed data stored in the processor's output cache and a second preset threshold, it is determined whether the processor needs to enter a sleep state. If it is determined that the processor needs to enter a sleep state, the processor is set to enter a sleep state. This reduces the power consumption of the multi-core system.

[0063] In one embodiment, after executing step 102, if the main processor determines that the amount of data to be processed in the input cache space of the slave processor is less than the first preset threshold, then the main processor determines whether the amount of data processed in the output cache space of the slave processor is not greater than the second preset threshold; if so, the main processor sets the frequency of the slave processor to a second specified frequency, wherein the second specified frequency is not less than the intermediate frequency.

[0064] For example, if it is determined that the amount of data to be processed in the input buffer space is less than A, and the amount of data processed in the output buffer space of the processor is not greater than B, then it is determined that the processor needs to end its sleep state, and the frequency of the processor is set to the second specified frequency.

[0065] In one embodiment, if the master processor determines that the amount of data to be processed in the input cache space of the slave processor is not less than the first preset threshold, then the master processor sets the frequency of the slave processor to the second specified frequency.

[0066] Therefore, by comparing the amount of data to be processed in the input cache space and the amount of data already processed in the output cache space of the slave processor with preset thresholds, the main processor determines whether the slave processor needs to end its sleep state. This ensures that the multi-core system can operate normally while reducing power consumption.

[0067] It should be noted that if it is determined that the amount of data to be processed in the input cache space of the slave processor is not less than the first preset threshold, the frequency of the slave processor can be directly set to the second specified frequency, and the sleep state of the slave processor can be directly ended. It is not necessary to judge the relationship between the amount of processed data in the output cache space of the slave processor and the second preset threshold.

[0068] To further understand the technical solution of this disclosure, the following is in conjunction with... Figure 2 A detailed explanation may include the following steps:

[0069] Step 201: Every fixed time interval, the processor determines the percentage of its non-working time within the fixed time interval;

[0070] Step 202: If the processor determines that the proportion of non-working time is within a specified range, the slave processor sends a request to the main processor to enter a sleep state;

[0071] Step 203: The main processor determines whether the slave processor needs to enter a sleep state based on the comparison between the amount of data to be processed stored in the input cache space of the slave processor and a first preset threshold, and the comparison between the amount of data processed stored in the output cache space of the slave processor and a second preset threshold.

[0072] Step 204: If the main processor determines that the slave processor needs to enter a sleep state, the main processor sets the frequency of the slave processor to a first specified frequency, wherein the first specified frequency is less than the intermediate frequency, and the intermediate frequency is the minimum frequency required for the slave processor to work normally;

[0073] Step 205: The main processor determines whether the amount of data to be processed in the input cache space of the slave processor is less than a first preset threshold. If yes, then execute step 206; otherwise, execute step 207.

[0074] Step 206: The main processor determines whether the amount of data processed in the output cache space of the slave processor is not greater than the second preset threshold; if yes, then execute step 207; if no, then return to execute step 205.

[0075] Step 207: The main processor sets the frequency of the slave processor to a second specified frequency.

[0076] The following describes in detail the embodiments of this disclosure, taking a multi-core system comprising two processors, wherein the main processor is a CPU (central processing unit) and the slave processor is a DSP (Digital Signal Processor):

[0077] Every fixed time interval, the DSP determines the percentage of its non-working time within that fixed time interval. If the DSP determines that the percentage of non-working time is within a specified range, the DSP sends a request to the CPU to enter a sleep state. The CPU determines whether the DSP needs to enter a sleep state based on a comparison between the amount of data to be processed stored in the DSP's input buffer and a first preset threshold, and a comparison between the amount of processed data stored in the DSP's output buffer and a second preset threshold. If the CPU determines that the DSP needs to enter a sleep state, the CPU sets the DSP's frequency to a first specified frequency, where the first specified frequency is less than an intermediate frequency, which is the minimum frequency required for the DSP to operate normally. Then, if the CPU determines that the amount of data to be processed in the DSP's input buffer is less than the first preset threshold, the CPU determines whether the amount of processed data in the DSP's output buffer is not greater than the second preset threshold; if so, the CPU sets the DSP's frequency to a second specified frequency, where the second specified frequency is not less than the intermediate frequency.

[0078] Based on the same disclosed concept, the power consumption control method for multi-core systems described above can also be implemented by a power consumption control device for multi-core systems. The effect of this power consumption control device is similar to that of the aforementioned method, and will not be repeated here.

[0079] Figure 3 This is a schematic diagram of the power consumption control device for a multi-core system according to an embodiment of the present disclosure.

[0080] like Figure 3 As shown, the power consumption control device 300 for a multi-core system disclosed herein may include a sleep state determination module 310 and a sleep state setting module 320.

[0081] The hibernation state determination module 310 is used by the main processor to determine whether the slave processor needs to enter a hibernation state based on the result of comparing the amount of data to be processed stored in the input cache space of any slave processor with a first preset threshold, and the result of comparing the amount of data processed stored in the output cache space of the slave processor with a second preset threshold.

[0082] The hibernation state setting module 320 is used to set the frequency of the slave processor to a first specified frequency if the master processor determines that the slave processor needs to enter a hibernation state. The first specified frequency is less than an intermediate frequency, and the intermediate frequency is the minimum frequency required for the slave processor to work normally.

[0083] In one embodiment, the sleep state determination module 310 is specifically used for:

[0084] If the main processor determines that the amount of data to be processed in the input cache space of the slave processor is less than the first preset threshold, and the amount of data processed in the output cache space of the slave processor is greater than the second preset threshold, then the main processor determines that the slave processor needs to enter a sleep state.

[0085] In one embodiment, the apparatus further includes:

[0086] The non-working time percentage module 330 is used by the main processor to determine whether the slave processor needs to enter a sleep state before determining whether the slave processor needs to enter a sleep state, based on the result of comparing the amount of data to be processed stored in the input cache space of any slave processor with a first preset threshold and the result of comparing the amount of data processed stored in the output cache space of the slave processor with a second preset threshold. At fixed intervals, the slave processor determines its own non-working time percentage within the fixed interval.

[0087] The hibernation request module 340 is used to send a request to the main processor to enter hibernation state if the processor determines that the proportion of non-working time is within a specified range.

[0088] In one embodiment, the apparatus further includes:

[0089] The sleep state end determination module 350 is used to determine whether the amount of data to be processed in the output cache space of the slave processor is not greater than the second preset threshold after the master processor determines that the slave processor needs to enter a sleep state and sets the frequency of the slave processor to a first specified frequency.

[0090] The first end-of-sleep state setting module 360 ​​is configured to, if so, set the frequency of the slave processor to a second specified frequency, wherein the second specified frequency is not less than the intermediate frequency.

[0091] In one embodiment, the apparatus further includes:

[0092] The second end-of-sleep state setting module 370 is used to set the frequency of the slave processor to the second specified frequency if the main processor determines that the amount of data to be processed in the input cache space of the slave processor is not less than the first preset threshold.

[0093] After introducing a power consumption control method and apparatus for a multi-core system according to an exemplary embodiment of the present disclosure, an electronic device according to another exemplary embodiment of the present disclosure will be introduced next.

[0094] Those skilled in the art will understand that various aspects of this disclosure can be implemented as a system, method, or program product. Therefore, various aspects of this disclosure can be specifically implemented in the following forms: a completely hardware implementation, a completely software implementation (including firmware, microcode, etc.), or a combination of hardware and software aspects, collectively referred to herein as a "circuit," "module," or "system."

[0095] In some possible implementations, the electronic device according to this disclosure may include at least one processor and at least one computer storage medium. The computer storage medium stores program code that, when executed by the processor, causes the processor to perform the steps in the power consumption control method for a multi-core system according to various exemplary embodiments of this disclosure described above. For example, the processor may perform actions such as... Figure 1 Steps 101-102 are shown in the diagram.

[0096] The following reference Figure 4 To describe an electronic device 400 according to such an embodiment of the present disclosure. Figure 4 The electronic device 400 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments disclosed herein.

[0097] like Figure 4 As shown, the electronic device 400 is manifested in the form of a general electronic device. The components of the electronic device 400 may include, but are not limited to: at least one processor 401, at least one computer storage medium 402, and a bus 403 connecting different system components (including the computer storage medium 402 and the processor 401).

[0098] Bus 403 represents one or more of several bus structures, including a computer storage media bus or computer storage media controller, peripheral bus, processor, or local bus using any of the various bus structures.

[0099] Computer storage medium 402 may include readable media in the form of volatile computer storage media, such as random access computer storage medium (RAM) 421 and / or cache storage medium 422, and may further include read-only computer storage medium (ROM) 423.

[0100] Computer storage medium 402 may also include a program / utility 425 having a set (at least one) of program modules 424, including but not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of these examples may include an implementation of a network environment.

[0101] Electronic device 400 can also communicate with one or more external devices 404 (e.g., keyboard, pointing device, etc.), and with one or more devices that enable a user to interact with electronic device 400, and / or with any device that enables electronic device 400 to communicate with one or more other electronic devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 405. Furthermore, electronic device 400 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 406. As shown, network adapter 406 communicates with other modules used in electronic device 400 via bus 403. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 400, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0102] In some possible implementations, various aspects of the power consumption control method for a multi-core system provided in this disclosure can also be implemented in the form of a program product, which includes program code that, when the program product is run on a computer device, causes the computer device to perform the steps in the power consumption control method for a multi-core system according to various exemplary embodiments of this disclosure described above.

[0103] The program product may take the form of any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access computer storage media (RAM), read-only computer storage media (ROM), erasable programmable read-only computer storage media (EPROM or flash memory), optical fibers, portable compact disk read-only computer storage media (CD-ROM), optical computer storage media, magnetic computer storage media, or any suitable combination thereof.

[0104] The power consumption control program product of the multi-core system according to embodiments of this disclosure can be a portable compact disc read-only computer storage medium (CD-ROM) and include program code, and can run on an electronic device. However, the program product of this disclosure is not limited thereto. In this document, the readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0105] A readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying readable program code. This propagated data signal may take many forms, including—but not limited to—electromagnetic signals, optical signals, or any suitable combination thereof. A readable signal medium may also be any readable medium other than a readable storage medium, capable of sending, propagating, or transmitting a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0106] The program code contained on the readable medium may be transmitted using any suitable medium, including—but not limited to—wireless, wired, optical fiber, RF, or any suitable combination thereof.

[0107] Program code for performing the operations of this disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's electronic device, partially on the user's device, as a standalone software package, partially on the user's electronic device and partially on a remote electronic device, or entirely on a remote electronic device or server. In cases involving remote electronic devices, the remote electronic device can be connected to the user's electronic device via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external electronic device (e.g., via the Internet using an Internet service provider).

[0108] It should be noted that although several modules of the apparatus have been mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more modules described above can be embodied in one module. Conversely, the features and functions of one module described above can be further divided and embodied by multiple modules.

[0109] Furthermore, although the operations of the methods disclosed herein are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all of the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0110] Those skilled in the art will understand that embodiments of this disclosure can be provided as methods, systems, or computer program products. Therefore, this disclosure can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this disclosure can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk computer storage media, CD-ROMs, optical computer storage media, etc.) containing computer-usable program code.

[0111] This disclosure is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0112] These computer program instructions may also be stored in a computer-readable computer storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable computer storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0113] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0114] Obviously, those skilled in the art can make various modifications and variations to this disclosure without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include such modifications and variations.

Claims

1. A method of power consumption control of a multi-core system, characterized by, The multi-core system comprises a master processor and at least one slave processor, and is applied to a device comprising the multi-core system, and the method comprises: The slave processor determines a non-working time proportion of itself in a fixed time interval every fixed time interval; If the processor determines that the non-working time proportion is within a specified range, the slave processor sends a request for entering a sleep state to the master processor; The master processor determines whether the slave processor needs to enter a sleep state according to a comparison result of a data amount of to-be-processed data stored in an input cache space of any slave processor with a first preset threshold value and according to a comparison result of a data amount of processed data stored in an output cache space of the slave processor with a second preset threshold value; If the master processor determines that the slave processor needs to enter a sleep state, the master processor sets a frequency of the slave processor to a first specified frequency, wherein the first specified frequency is less than an intermediate frequency, and the intermediate frequency is a minimum frequency required by the slave processor for normal operation; The master processor determines whether the slave processor needs to enter a sleep state according to a comparison result of a data amount of to-be-processed data stored in an input cache space of any slave processor with a first preset threshold value and according to a comparison result of a data amount of processed data stored in an output cache space of the slave processor with a second preset threshold value, comprising: If the master processor determines that the data amount of to-be-processed data in the input cache space of the slave processor is less than the first preset threshold value and the data amount of processed data in the output cache space of the slave processor is greater than the second preset threshold value, the master processor determines that the slave processor needs to enter a sleep state.

2. The method of claim 1, wherein, If the master processor determines that the data amount of to-be-processed data in the input cache space of the slave processor is less than the first preset threshold value, the master processor judges whether the data amount of processed data in the output cache space of the slave processor is not greater than the second preset threshold value; If yes, the master processor sets the frequency of the slave processor to a second specified frequency, wherein the second specified frequency is not less than the intermediate frequency. The method further comprises:

3. The method of claim 2, wherein, If the master processor determines that the data amount of to-be-processed data in the input cache space of the slave processor is not less than the first preset threshold value, the master processor sets the frequency of the slave processor to the second specified frequency. The multi-core system comprises a master processor and at least one slave processor, and the device comprises:

4. A power consumption control apparatus of a multi-core system, characterized by comprising: A non-working time proportion module, configured to determine, by the slave processor, a non-working time proportion of itself in a fixed time interval every fixed time interval; A sleep state request module, configured to send, by the slave processor, a request for entering a sleep state to the master processor if the processor determines that the non-working time proportion is within a specified range; and A frequency setting module, configured to set, by the master processor, a frequency of the slave processor to a first specified frequency if the master processor determines that the slave processor needs to enter a sleep state, wherein the first specified frequency is less than an intermediate frequency, and the intermediate frequency is a minimum frequency required by the slave processor for normal operation. The hibernation state determination module is configured to determine whether the slave processor needs to enter the hibernation state according to a comparison result of the data amount of the to-be-processed data stored in the input buffer space of the slave processor with the first preset threshold and according to a comparison result of the data amount of the processed data stored in the output buffer space of the slave processor with the second preset threshold. The hibernation state setting module is configured to set the frequency of the slave processor to a first specified frequency if the master processor determines that the slave processor needs to enter the hibernation state, wherein the first specified frequency is less than an intermediate frequency, and the intermediate frequency is a minimum frequency required for normal operation of the slave processor. The hibernation state determination module is specifically configured to: If the master processor determines that the data amount of the to-be-processed data in the input buffer space of the slave processor is less than the first preset threshold and the data amount of the processed data in the output buffer space of the slave processor is greater than the second preset threshold, the master processor determines that the slave processor needs to enter the hibernation state.

5. The apparatus of claim 4, wherein, The apparatus further includes: The end hibernation state determination module is configured to, if the master processor determines that the slave processor needs to enter the hibernation state, determine whether the data amount of the processed data in the output buffer space of the slave processor is not greater than the second preset threshold if the data amount of the to-be-processed data in the input buffer space of the slave processor is less than the first preset threshold after the master processor sets the frequency of the slave processor to the first specified frequency. The first end hibernation state setting module is configured to, if yes, set the frequency of the slave processor to a second specified frequency, wherein the second specified frequency is not less than the intermediate frequency.

6. The apparatus of claim 5, wherein, The apparatus further includes: The second end hibernation state setting module is configured to, if the master processor determines that the data amount of the to-be-processed data in the input buffer space of the slave processor is not less than the first preset threshold, set the frequency of the slave processor to the second specified frequency.

7. An electronic device, comprising: The apparatus includes at least one processor and a memory connected with the at least one processor in communication, wherein the memory stores instructions executed by the at least one processor; the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1-3.

8. A computer storage medium, characterized in that, The computer storage medium stores a computer program for executing the method according to any one of claims 1-3.

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