Splicing display screen

Abstract

The embodiment of the present application discloses a spliced ​​display screen, comprising a motherboard, at least two sub-boards and an LED light-emitting substrate, wherein the at least two sub-boards are bound to one of the motherboards, and two adjacent sub-boards are spliced ​​to form a splicing seam; the LED light-emitting substrate is bound to the motherboard and is located in the splicing seam. The present application aims to solve the technical problem of splicing seams in the splicing process of large-size spliced ​​screens, so as to achieve the purpose of seamless splicing display.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a spliced ​​display screen. Background Art

[0002] OLED (Organic Light Emitting Diode) display devices are recognized as the mainstream technology for the next generation of display and are favored by major display manufacturers because of their excellent characteristics such as self-luminescence, no need for backlight, high contrast, thin thickness, wide viewing angle, fast response speed, and can be used for flexible panels and curved panels. However, OLED technology has been mainly used in small and medium-sized fields so far, and splicing technology is still needed for large-size OLED displays. Summary of the invention

[0003] The embodiment of the present application provides a spliced ​​display screen, which aims to solve the technical problem of seams in the splicing process of large-sized spliced ​​screens, so as to achieve the purpose of seamless splicing display.

[0004] The present application provides a spliced ​​display screen, including:

[0005] motherboard;

[0006] At least two sub-boards, the at least two sub-boards are bound to one of the motherboards, and two adjacent sub-boards are spliced ​​to form a splicing seam; and

[0007] An LED light-emitting substrate is bound to the motherboard and is located in the joint.

[0008] Optionally, in some embodiments of the present application, the LED light-emitting substrate includes an array substrate and a plurality of first pixel units, the array substrate is bound to the motherboard, and the plurality of first pixel units are arrayed on a side of the array substrate facing away from the motherboard.

[0009] Optionally, in some embodiments of the present application, the array substrate includes a first base substrate, an electrode layer, a first connection electrode and a second connection electrode; the first pixel unit includes at least one LED device; the electrode layer includes a first binding pad and a second binding pad;

[0010] The first substrate is bound and connected to the motherboard, the electrode layer is arranged on the side of the first substrate facing away from the motherboard, the LED device is bound and connected to the electrode layer, the first connecting electrode and the second connecting electrode are arranged on the side of the first substrate facing the motherboard, and the first connecting electrode is electrically connected to the first binding pad, the second connecting electrode is electrically connected to the second binding pad, and the first connecting electrode and the second connecting electrode are both electrically connected to the motherboard.

[0011] Optionally, in some embodiments of the present application, the motherboard includes:

[0012] substrate;

[0013] an insulating layer, the insulating layer being disposed on the substrate, the insulating layer being provided with an opening corresponding to the joint, the first connecting electrode and the second connecting electrode being disposed in the opening; and

[0014] A metal layer, wherein the metal layer is disposed on the insulating layer, the metal layer comprises a first conductive pad and a second conductive pad, at least a portion of the first conductive pad and at least a portion of the second conductive pad are located in the opening, the first conductive pad is bound and connected to the first connecting electrode, and the second conductive pad is bound and connected to the second connecting electrode.

[0015] Optionally, in some embodiments of the present application, the motherboard also includes a first driving function layer, the first driving function layer is arranged between the substrate and the insulating layer, the first driving function layer includes a first thin film transistor, and the source or drain of the first thin film transistor is connected to the first conductive pad.

[0016] Optionally, in some embodiments of the present application, the sub-board includes:

[0017] A second substrate, wherein a plurality of pads are provided on a side of the second substrate close to the motherboard, and the plurality of pads are connected and bound to the motherboard;

[0018] a second driving function layer, the second driving function layer being disposed on a side of the second substrate away from the motherboard, the second driving function layer comprising a plurality of second thin film transistors, one of the second thin film transistors being electrically connected to one of the pads; and

[0019] A plurality of second pixel units are arranged at intervals on a side of the second driving function layer away from the motherboard.

[0020] Optionally, in some embodiments of the present application, a horizontal distance between two adjacent first pixel units is A; a horizontal distance between two adjacent second pixel units is B;

[0021] The horizontal distance between the first pixel unit of the LED light-emitting substrate close to the edge of the sub-board and the second pixel unit of the adjacent sub-board is C, and A=B=C.

[0022] Optionally, in some embodiments of the present application, the second driving function layer includes:

[0023] a planar layer, the planar layer being arranged on a side of the second thin film transistor facing away from the motherboard;

[0024] A plurality of anodes, wherein the plurality of anodes are disposed on the planar layer, and one of the anodes is connected to a source or a drain of the second thin film transistor;

[0025] A pixel definition layer, the pixel definition layer is disposed on a side of the flat layer away from the motherboard, the pixel definition layer is provided with a plurality of openings, and one of the openings exposes one of the anodes;

[0026] The second pixel unit includes a plurality of light-emitting layers, and the plurality of light-emitting layers have different colors; one of the light-emitting layers is disposed in one of the openings;

[0027] The sub-board also includes a packaging layer, and the packaging layer is arranged on a side of the pixel definition layer away from the motherboard.

[0028] Optionally, in some embodiments of the present application, the spliced ​​display screen further includes a cover plate, which is disposed on a side of the packaging layer of each of the sub-plates facing away from the mother plate and covers the LED light-emitting substrate.

[0029] Optionally, in some embodiments of the present application, the spliced ​​display screen further includes a black flat layer, a plurality of first color filter layers, and a plurality of second color filter layers;

[0030] The black flat layer is arranged between the packaging layer of each sub-board and the cover board, and the black flat layer is provided with a plurality of through holes corresponding to the plurality of light-emitting layers, and one of the first color filter layers is arranged in one of the through holes;

[0031] A plurality of the second color filter layers correspond to a plurality of the first pixel units, and a second color filter layer is arranged between a surface of the first pixel unit facing away from the array substrate and the cover plate.

[0032] Optionally, in some embodiments of the present application, the black flat layer extends to cover the peripheral side surface of the sub-board to form a shielding portion, and the shielding portion is located between the peripheral side surface of the sub-board and the peripheral side surface of the LED substrate.

[0033] The spliced ​​display screen provided by the present application includes a motherboard, at least two sub-boards and an LED light-emitting substrate, at least two sub-boards are bound to one motherboard, and two adjacent sub-boards are spliced ​​to form a splicing seam. The LED light-emitting substrate is bound to the motherboard and is located in the splicing seam. In this way, by adding an LED light-emitting substrate between the splicing units of the two sub-boards, the splicing seam can be displayed normally, thereby solving the technical problem of splicing seams in the splicing process of large-size splicing screens, so as to achieve the purpose of seamless splicing display. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 is a structural schematic diagram of a first embodiment of a spliced ​​display screen provided by the present application;

[0036] Figure 2 It is a schematic diagram of the spliced ​​sub-board and LED light-emitting substrate of the spliced ​​display screen provided by the present application;

[0037] Figure 3 is a structural schematic diagram of a second embodiment of the spliced ​​display screen provided by the present application;

[0038] Figure 4 It is a structural schematic diagram of the third embodiment of the spliced ​​display screen provided by the present application.

[0039] Description of reference numerals:

[0040]

[0041] DETAILED DESCRIPTION

[0042] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise stated, the directional words such as "upper" and "lower" used generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; while "inside" and "outside" refer to the outline of the device.

[0043] The present application provides a spliced ​​display screen 100. The following are detailed descriptions. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments.

[0044] Reference Figure 1The spliced ​​display screen 100 provided in the first embodiment of the present application includes a motherboard 10, at least two sub-boards 20 and an LED light-emitting substrate 30. At least two sub-boards 20 are bound to one motherboard 10, and two adjacent sub-boards 20 are spliced ​​to form a splicing seam 90. The LED light-emitting substrate 30 is bound to the motherboard 10 and is located in the splicing seam 90.

[0045] In this way, by adding an LED light-emitting substrate 30 between the splicing units of the two sub-boards 20, the splicing seam 90 can be displayed normally, thereby solving the technical problem of the splicing seam 90 in the splicing process of the large-sized splicing screen, so as to achieve the purpose of seamless splicing display.

[0046] The sub-board 20 is generally an organic light-emitting diode (OLED) display panel, and multiple organic light-emitting diodes are spliced ​​together to meet the needs of screen splicing and coordinated display. Moreover, the sub-board 20 is arranged on the same motherboard 10 and electrically driven by the same motherboard 10 to ensure the stability of the spliced ​​sub-board 20 and the LED light-emitting substrate 30.

[0047] In one embodiment of the present application, the LED light-emitting substrate 30 includes an array substrate 31 and a plurality of first pixel units 32. The array substrate 31 is bound to the motherboard 10, and the plurality of first pixel units 32 are arranged in an array on the side of the array substrate 31 away from the motherboard 10. The array of the plurality of first pixel units 32 is arranged on the array substrate 31 to make the overall structure of the spliced ​​screen more compact while ensuring the display effect. In addition, other arrangements may also be used, such as using a plurality of sub-boards 20 to form a single row arrangement, or using special patterns for arrangement, such as a "rice" shape or other flower patterns, etc., without specific limitation.

[0048] Further, the array substrate 31 includes a first base substrate 311, an electrode layer 312, a first connection electrode 313 and a second connection electrode 314. The first pixel unit 32 includes at least one LED device 321. The electrode layer 312 includes a first binding pad 3121 and a second binding pad 3122. The first base substrate 311 is bound and connected to the motherboard 10, the electrode layer 312 is arranged on the side of the first base substrate 311 away from the motherboard 10, the LED device 321 and the electrode layer 312 are bound and connected, the first connection electrode 313 and the second connection electrode 314 are arranged on the side of the first base substrate 311 facing the motherboard 10, and the first connection electrode 313 is electrically connected to the first binding pad 3121, the second connection electrode 314 is electrically connected to the second binding pad 3122, and the first connection electrode 313 and the second connection electrode 314 are both electrically connected to the motherboard 10.

[0049] Among them, the LED device 321 is welded and bound to the electrode layer 312, and the LED device 321 is a three-primary color LED chip. The LED device 321 can be a Mini-LED (submillimeter light-emitting diode) chip or a Micro-LED (micro light-emitting diode). The size of the Mini-LED lamp is in the micron level, which can provide higher resolution and thus improve the display effect. Unlike the organic electroluminescent display panel, which needs to encapsulate the entire effective light-emitting area, the micro LED or miniLED is based on self-encapsulation technology, that is, the micro LED or miniLED is encapsulated for a single sub-pixel, and no additional encapsulation design is required. Therefore, the size of the boundary can be reduced to zero, overcoming the boundary effect caused by the whole surface encapsulation of the organic electroluminescent display panel. Micro-LED or Mini-LED adopts a standard RGB arrangement, and the multiple LED devices 321 include red LED devices, green LED devices, and blue LED devices. The first connecting electrode 313 and the second connecting electrode 314 are used to achieve electrical conduction between the electrode layer 312 and the motherboard 10. When the first base substrate 311 is made of a polyimide substrate 11 , since polyimide is a flexible material, it can provide bendability for large-size splicing displays, further improving the display effect.

[0050] Furthermore, the motherboard 10 includes a substrate 11, an insulating layer 12, and a metal layer 13. The insulating layer 12 is disposed on the substrate 11. The insulating layer 12 is provided with an opening 121 at a position corresponding to the joint 90. The first connection electrode 313 and the second connection electrode 314 are disposed in the opening 121. The metal layer 13 is disposed on the insulating layer 12. The metal layer 13 includes a first conductive pad 131 and a second conductive pad 132. At least a portion of the first conductive pad 131 and at least a portion of the second conductive pad 132 are located in the opening 121. The first conductive pad 131 is bound and connected to the first connection electrode 313, and the second conductive pad 132 is bound and connected to the second connection electrode 314.

[0051] The metal layer 13 is bound and connected to the sub-board 20 for electrical conduction. By opening an opening 121 in the insulating layer 12 to accommodate the first connection electrode 313 and the second connection electrode 314, the structure between the motherboard 10 and the LED light-emitting substrate 30 is made more compact, which is more conducive to the overall thinning of the splicing screen. At the same time, the first conductive pad 131 at the bottom of the opening 121 is bound and connected to the first connection electrode 313 and the second conductive pad 132 at the bottom of the opening 121 is bound and connected to the second connection electrode 314, which not only realizes the electrical conduction between the motherboard 10 and the LED light-emitting substrate 30, but also further improves the stability of the motherboard 10 and the LED light-emitting substrate 30 after connection. In addition, the first conductive pad 131 and the second conductive pad 132 extend and cover the hole wall of the opening 121, and partially extend to the side of the insulating layer 12 away from the substrate 11. In this way, the stability of the first conductive pad 131 and the second conductive pad 132 after being arranged is improved, thereby ensuring the electrical conduction between the first conductive pad 131 and the second conductive pad 132 and the first connection electrode 313 and the second connection electrode 314, respectively. It should be noted that a conductive adhesive layer 80 is also provided between the insulating layer 12 and the sub-board 20 and the first base substrate 311, respectively, and the conductive adhesive layer 80 is filled in the opening 121. The conductive adhesive layer 80 not only improves the connection stability between the motherboard 10 and the LED light-emitting substrate 30 and the sub-board 20, respectively, but also improves the electrical conduction between the metal layer 13 and the LED light-emitting substrate 30 and the sub-board 20. Of course, the conductive adhesive layer 80 can also be other adhesive layers that can be bonded.

[0052] In one embodiment of the present application, the sub-board 20 includes a second base substrate 21, a second driving function layer 22, and a plurality of second pixel units 23. A plurality of pads 211 are provided on a side of the second base substrate 21 close to the motherboard 10, and the plurality of pads 211 are connected and bound to the motherboard 10. The second driving function layer 22 is disposed on a side of the second base substrate 21 away from the motherboard 10, and the second driving function layer 22 includes a plurality of second thin film transistors 221, and a second thin film transistor 221 is electrically connected to a pad 211. A plurality of second pixel units 23 are disposed at intervals on a side of the second driving function layer 22 away from the motherboard 10.

[0053] It is understandable that the material of the second base substrate 21 can be plastic or glass, or can be the same as the material of the first base substrate 311. In addition, a buffer layer 25 and an inorganic insulating layer 26 can be stacked in sequence on the second base substrate 21 and the second driving function layer 22. The second base substrate 21 is bound and fixed to the motherboard 10 through a plurality of pads 211, and the plurality of pads 211 are electrically connected to a plurality of second thin film transistors 221, so that the motherboard 10 can control the luminous intensity of a plurality of second pixel units 23 through the second thin film transistors 221. The plurality of second pixel units 23 are arranged in an array on the second driving function layer 22 to make the structural arrangement more compact.

[0054] Optionally, the second driving function layer 22 includes a flat layer 222, a plurality of anodes 223 and a pixel definition layer 224, wherein the flat layer 222 is disposed on a side of the second thin film transistor 221 away from the motherboard 10. A plurality of anodes 223 are disposed on the flat layer 222, and an anode 223 is connected to a source or drain of a second thin film transistor 221. The pixel definition layer 224 is disposed on a side of the flat layer 222 away from the motherboard 10, and the pixel definition layer 224 is provided with a plurality of openings 2241, and an opening 2241 exposes an anode 223. The second pixel unit 23 includes a plurality of light-emitting layers 231, and the plurality of light-emitting layers 231 have different colors. A light-emitting layer 231 is disposed in an opening 2241.

[0055] A flat layer 222 is formed by physical deposition or chemical deposition on the side of the second thin film transistor 221 away from the motherboard 10. A pixel definition layer 224 is formed on the side of the flat layer 222 away from the motherboard 10, and a plurality of openings 2241 are opened on the pixel definition layer 224 to expose a plurality of anodes 223, so that an anode 223 can be electrically connected to a light-emitting layer 231 located in an opening 2241. The light-emitting layer 231 may include a red light-emitting layer 231, a blue light-emitting layer 231, and a green light-emitting layer 231. The sub-board 20 also includes an encapsulation layer 24, which is disposed on the side of the pixel definition layer 224 away from the motherboard 10. When the light-emitting layer 231 emits light and propagates outward, a surface plasmon polariton effect will exist near the metal / medium interface, which results in a decrease in the efficiency of the emitted light, and thus this effect can be improved by providing the encapsulation layer 24, and the encapsulation layer 24 can also protect the second driving function layer 22. Furthermore, the spliced ​​display screen 100 further includes a cover plate 40, which is disposed on a side of the packaging layer 24 of each sub-board 20 away from the motherboard 10 and covers the LED light-emitting substrate 30. The cover plate 40 is provided not only to protect each sub-board 20 and the LED light-emitting substrate 30, but also to ensure the flatness of the spliced ​​screen.

[0056] Combined with reference Figure 2, further, the horizontal distance between two adjacent first pixel units 32 is A. The horizontal distance between two adjacent second pixel units 23 is B. The horizontal distance between the first pixel unit 32 at the edge of the LED light-emitting substrate 30 close to the sub-board 20 and the second pixel unit 23 of the adjacent sub-board 20 is C, A=B=C. Among them, by making the distance value relationship between each pixel of the sub-board 20 and the LED light-emitting substrate 30 satisfy A=B=C, so that the light-emitting effect on the LED light-emitting substrate 30 is the same as the light-emitting effect on the sub-board 20, and then the display effect at the joint 90 is the same as the display effect at each sub-board 20, so as to achieve the purpose of seamless splicing display.

[0057] Reference Figure 3 The display screen 100 of the second embodiment of the present application is different from the display screen 100 of the first embodiment in that: the motherboard 10 also includes a first driving function layer 14, the first driving function layer 14 is arranged between the substrate 11 and the insulating layer 12, and the first driving function layer 14 includes a first thin film transistor 141, and the source or drain of the first thin film transistor 141 is connected to the first conductive pad 131. Among them, in the display panel, the thin film transistor can be used as a switching device or a driving device. The positions of the first thin film transistor 141 and the LED light-emitting substrate 30 are arranged relative to each other, so that the first thin film transistor 141 is added to the position where the LED light-emitting substrate 30 is connected on the motherboard 10, and the voltage given to the LED light-emitting substrate 30 can be adjusted by the first thin film transistor 141, and then the luminous intensity thereof can be adjusted, so as to be consistent with the display effect of the sub-board 20, so as to achieve a truly seamless splicing.

[0058] Furthermore, the spliced ​​display screen 100 further includes a black flat layer 50, a plurality of first color filter layers 60, and a plurality of second color filter layers 70. The black flat layer 50 is disposed between the encapsulation layer 24 and the cover plate 40 of each sub-plate 20, and the black flat layer 50 is provided with a plurality of through holes corresponding to the plurality of light-emitting layers 231, and a first color filter layer 60 is disposed in a through hole. The plurality of second color filter layers 70 correspond to the plurality of first pixel units 32, and a second color filter layer 70 is disposed between a surface of a first pixel unit 32 that is away from the array substrate 31 and the cover plate 40.

[0059] Among them, the first color filter layer 60 and the second color filter layer 70 may include a red filter, a green filter and a blue filter arranged at intervals. The red filter, the green filter and the blue filter may include diffusion particles and are filters with a diffusion effect. The red filter, the green filter and the blue filter may be rectangular in shape and arranged alternately. The red filter, the green filter, the blue filter and the black flat layer 50 may be made on the sub-board 20 or the first pixel unit 32 by printing. By arranging the black flat layer 50, the first color filter layer 60 and the second color filter layer 70 to form a filter layer, when the light emitted by the light-emitting layer 231 passes through the filter layer, it can be diffused to various angles outside the spliced ​​display screen 100 under the action of the diffusion particles. The black flat layer 50 can be used to divide adjacent color blocks, block the gaps between colors, prevent light leakage or color mixing, and thus ensure the display effect of the spliced ​​display screen 100.

[0060] Furthermore, the black flat layer 50 extends to cover the peripheral side of the sub-board 20 to form a shielding portion 51, and the shielding portion 51 is located between the peripheral side of the sub-board 20 and the peripheral side of the LED substrate 11. The black flat layer 50 forms the shielding portion 51 between the peripheral side of the sub-board 20 and the peripheral side of the LED substrate 11, so as to further eliminate the visual deviation problem in the splicing area.

[0061] Reference Figure 4 The third embodiment of the present application is different from the above embodiments in that: the LED light-emitting substrate 30 also includes a third driving function layer 315, which is arranged between the first base substrate 311 and the electrode layer 312, and is electrically connected to the electrode layer 312, and the third driving function layer 315 includes a third thin film transistor 3151, and the source or drain of the third thin film transistor 3151 is connected to the first connection electrode 313 or the second connection electrode 314, so that the voltage given to the LED device 321 can be adjusted by the third thin film transistor 3151, and then its luminous intensity can be adjusted, so as to be consistent with the display effect of the sub-board 20, so as to achieve true seamless splicing.

[0062] The spliced ​​display screen 100 provided in the embodiment of the present application is introduced in detail above. The principle and implementation mode of the present application are explained in this article by using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for technicians in this field, according to the idea of ​​the present application, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A spliced ​​display screen, characterized in that: include: motherboard; At least two sub-boards, the at least two sub-boards are bound to one of the motherboards, and two adjacent sub-boards are spliced ​​to form a splicing seam; as well as An LED light-emitting substrate, the LED light-emitting substrate is bound to the motherboard and is located in the joint, the LED light-emitting substrate comprises an array substrate and a plurality of first pixel units, the array substrate is bound to the motherboard, and the plurality of first pixel units are arrayed on a side of the array substrate away from the motherboard; The array substrate comprises a first base substrate, an electrode layer, a first connection electrode and a second connection electrode; the first pixel unit comprises at least one LED device; the electrode layer comprises a first binding pad and a second binding pad; The first substrate is bound and connected to the motherboard, the electrode layer is arranged on the side of the first substrate facing away from the motherboard, the LED device is bound and connected to the electrode layer, the first connecting electrode and the second connecting electrode are arranged on the side of the first substrate facing the motherboard, and the first connecting electrode is electrically connected to the first binding pad, the second connecting electrode is electrically connected to the second binding pad, and the first connecting electrode and the second connecting electrode are both electrically connected to the motherboard.

2. The spliced ​​display screen according to claim 1, characterized in that: The motherboard comprises: substrate; an insulating layer, the insulating layer being disposed on the substrate, the insulating layer being provided with an opening corresponding to the joint, the first connecting electrode and the second connecting electrode being disposed in the opening; and A metal layer, wherein the metal layer is disposed on the insulating layer, the metal layer comprises a first conductive pad and a second conductive pad, at least a portion of the first conductive pad and at least a portion of the second conductive pad are located in the opening, the first conductive pad is bound and connected to the first connecting electrode, and the second conductive pad is bound and connected to the second connecting electrode.

3. The spliced ​​display screen according to claim 2, characterized in that: The motherboard further includes a first driving function layer, which is disposed between the substrate and the insulating layer. The first driving function layer includes a first thin film transistor, and a source or a drain of the first thin film transistor is connected to the first conducting pad.

4. The spliced ​​display screen according to claim 1, characterized in that: The sub-board includes: A second substrate, wherein a solder pad is provided on a side of the second substrate close to the motherboard, and the solder pad is connected and bound to the motherboard; a second driving function layer, the second driving function layer being disposed on a side of the second substrate away from the motherboard, the second driving function layer comprising a plurality of second thin film transistors, one of the second thin film transistors being electrically connected to one of the pads; and A plurality of second pixel units are arranged at intervals on a side of the second driving function layer away from the motherboard.

5. The spliced ​​display screen as claimed in claim 4, characterized in that: The horizontal distance between two adjacent first pixel units is A; the horizontal distance between two adjacent second pixel units is B; The horizontal distance between the first pixel unit of the LED light-emitting substrate close to the edge of the sub-board and the second pixel unit of the adjacent sub-board is C, and A=B=C.

6. The spliced ​​display screen according to claim 4, characterized in that: The second driving function layer comprises: a planar layer, the planar layer being arranged on a side of the second thin film transistor facing away from the motherboard; A plurality of anodes, wherein the plurality of anodes are disposed on the planar layer, and one of the anodes is connected to a source or a drain of the second thin film transistor; A pixel definition layer, the pixel definition layer is disposed on a side of the flat layer away from the motherboard, the pixel definition layer is provided with a plurality of openings, and one of the openings exposes one of the anodes; The second pixel unit includes a plurality of light-emitting layers, and the plurality of light-emitting layers have different colors; one of the light-emitting layers is disposed in one of the openings; The sub-board also includes a packaging layer, and the packaging layer is arranged on a side of the pixel definition layer away from the motherboard.

7. The spliced ​​display screen according to claim 6, characterized in that: The spliced ​​display screen further comprises a cover plate, which is arranged on a side of the packaging layer of each of the sub-plates away from the mother plate and covers the LED light-emitting substrate.

8. The spliced ​​display screen according to claim 7, characterized in that: The spliced ​​display screen also includes a black flat layer, a plurality of first color filter layers and a plurality of second color filter layers; The black flat layer is arranged between the packaging layer of each sub-board and the cover board, and the black flat layer is provided with a plurality of through holes corresponding to the plurality of light-emitting layers, and one of the first color filter layers is arranged in one of the through holes; A plurality of the second color filter layers correspond to a plurality of the first pixel units, and a second color filter layer is arranged between a surface of the first pixel unit facing away from the array substrate and the cover plate.

9. The spliced ​​display screen according to claim 8, characterized in that: The black flat layer extends to cover the peripheral side surface of the sub-board to form a shielding portion, and the shielding portion is located between the peripheral side surface of the sub-board and the peripheral side surface of the LED light-emitting substrate.

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