Heat treatment apparatus and heat treatment method

Abstract

Even a radiation thermometer using a quantum-type infrared sensor can appropriately measure the temperature of the substrate after irradiation of the flash. The heat treatment apparatus is provided with a quantum-type infrared sensor for measuring the temperature of the first substrate and the temperature of the second substrate, and has a temperature correction section for correcting the temperature of the second substrate subjected to the second heat treatment with irradiation of the flash, measured by the quantum-type infrared sensor, using a correction coefficient calculated based on a reference temperature and an offset temperature.

Description

TECHNICAL FIELD

[0001] The technology disclosed in the present application specification relates to a heat treatment apparatus and a heat treatment method. BACKGROUND

[0002] In the manufacturing process of a semiconductor device, impurity implantation is a process for forming a pn junction or the like required in a thin plate-like precision electronic substrate (hereinafter, sometimes simply referred to as "substrate") such as a semiconductor wafer. Impurity implantation is generally performed by an ion implantation method and a subsequent annealing method.

[0003] The ion implantation method is a technology for physically implanting impurities by ionizing impurity elements such as boron (B), arsenic (As), and phosphorus (P), and colliding them with a semiconductor wafer at a high acceleration voltage.

[0004] The implanted impurities are activated by annealing. At this time, if the annealing time is several seconds or more, the implanted impurities are diffused relatively deeply due to heat, and as a result, the junction depth becomes deeper than required, and thus, it can be a hindrance to good device formation.

[0005] Therefore, as an annealing technology for heating a semiconductor wafer in an extremely short time, flash lamp anneal (hereinafter, simply referred to as "FLA") has been attracting attention. FLA is a heat treatment technology for irradiating a flash of light from a xenon flash lamp (hereinafter, in the case of simply referring to "flash lamp", it means a xenon flash lamp) to the surface of a semiconductor wafer, thereby heating only the surface of the semiconductor wafer implanted with impurities in an extremely short time (for example, several milliseconds or less).

[0006] The emission spectrum distribution of the xenon flash lamp is in the ultraviolet region to the near infrared region, and the wavelength is shorter than that of the conventional halogen lamp, and is substantially consistent with the fundamental absorption band of a silicon semiconductor wafer. Therefore, in the case of irradiating a flash of light from the xenon flash lamp to the semiconductor wafer, since the amount of transmitted light is small, the semiconductor wafer can be rapidly heated. In addition, it has been clarified that if it is an extremely short time of several milliseconds or less of flash irradiation, only the vicinity of the surface of the semiconductor wafer can be selectively heated. Therefore, if it is an extremely short time of heating based on the xenon flash lamp, impurity activation can be performed without diffusing the impurities relatively deeply.

[0007] For example, in Patent Literature 1, a flash lamp annealing apparatus is disclosed which preheats a semiconductor wafer by a heating plate disposed below a processing chamber, and then irradiates a flash of light from a flash lamp disposed above the processing chamber to the surface of the semiconductor wafer.

[0008] PRIOR ART DOCUMENTS

[0009] PATENT LITERATURE

[0010] Patent Literature 1: Japanese Patent Application Laid-Open No. 2004-186542 SUMMARY

[0011] PROBLEMS TO BE SOLVED BY THE INVENTION

[0012] In flash lamp annealing, since the temperature of the surface of a substrate irradiated with a flash light rises in a short time, in order to measure the temperature of the surface of the substrate irradiated with the flash light, a temperature meter capable of responding at high speed is required. As such a temperature meter capable of responding at high speed, for example, there is a radiation thermometer using a quantum-type infrared ray sensor.

[0013] However, the radiation thermometer using the quantum-type infrared ray sensor has a problem that the output voltage changes with the passage of time, and it is difficult to perform temperature measurement with high precision.

[0014] The technology disclosed in the present application specification is completed in view of the above-described problems, and is a technology capable of appropriately measuring the temperature of a substrate irradiated with a flash light even if a radiation thermometer using a quantum-type infrared ray sensor is used.

[0015] MEANS OF SOLVING THE PROBLEM

[0016] A first aspect of the technology disclosed in the present application specification is a heat treatment apparatus that heats a first substrate and a second substrate by irradiating a flash light, wherein the heat treatment apparatus has a quantum-type infrared ray sensor that measures the temperature of the first substrate and the temperature of the second substrate, sets the temperature of the first substrate measured by the quantum-type infrared ray sensor, which has undergone the first heat treatment of irradiating the flash light, as a reference temperature, sets the temperature of the first substrate measured by the quantum-type infrared ray sensor, which has undergone the first heat treatment again after the first heat treatment, as a shift temperature, and further has a temperature correction section that corrects the temperature of the second substrate measured by the quantum-type infrared ray sensor, which has undergone the second heat treatment of irradiating the flash light, using a correction coefficient calculated based on the reference temperature and the shift temperature.

[0017] A second aspect of the technology disclosed in the present application specification is associated with the first aspect, and the correction coefficient is calculated based on the ratio of the reference temperature to the shift temperature.

[0018] A third aspect of the technology disclosed in the present application specification is associated with the first or second aspect, and the correction coefficient is calculated based on at least one of the reference temperature and the shift temperature, which is an average value of the temperature of the first substrate measured a plurality of times.

[0019] The fourth aspect of the technology disclosed in the present specification is associated with any one of the first to third aspects, and the heat treatment apparatus further includes an alarm unit configured to issue an alarm if a difference between the reference temperature and the offset temperature exceeds a threshold value.

[0020] The fifth aspect of the technology disclosed in the present specification is associated with any one of the first to fourth aspects, and the quantum-type infrared sensor measures at least a temperature on an upper surface of the first substrate on which the flash is radiated, and the heat treatment apparatus further includes a lower surface thermometer configured to measure at least a temperature on a lower surface of the first substrate. A temperature on the lower surface of the first substrate measured by the lower surface thermometer before the first heat treatment is performed is set as an auxiliary temperature, and the temperature correction unit corrects the temperature of the second substrate using the correction coefficient calculated based on the reference temperature, the offset temperature, and the auxiliary temperature.

[0021] The sixth aspect of the technology disclosed in the present specification is associated with the fifth aspect, and the correction coefficient is calculated based on a ratio of a difference between the reference temperature and the auxiliary temperature and a difference between the offset temperature and the auxiliary temperature.

[0022] The seventh aspect of the technology disclosed in the present specification is a heat treatment method for heating a first substrate and a second substrate by radiating a flash, and includes a process of measuring a temperature of the first substrate on which the flash is radiated by a first heat treatment using a quantum-type infrared sensor, and setting the measured temperature of the first substrate as a reference temperature; a process of measuring again a temperature of the first substrate on which the first heat treatment is performed after the first heat treatment using the quantum-type infrared sensor, and setting the measured again temperature of the first substrate as an offset temperature; and a process of correcting a temperature of the second substrate on which the flash is radiated by a second heat treatment measured by the quantum-type infrared sensor using a correction coefficient calculated based on the reference temperature and the offset temperature.

[0023] Effects of Invention

[0024] According to the first to seventh aspects of the technology disclosed in the present specification, even a radiation thermometer using a quantum-type infrared sensor can appropriately measure a temperature of a substrate after a flash is radiated.

[0025] In addition, the objects, features, aspects, advantages of the technology disclosed in the present specification can be more apparent through the following detailed description and accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1is a plan view schematically showing an example of a structure of a heat treatment system to which the embodiment is applied.

[0027] Figure 2 is a front view schematically showing an example of a structure of a heat treatment system to which the embodiment is applied.

[0028] Figure 3 is a sectional view schematically showing a structure of a heat treatment device in a heat treatment system to which the embodiment is applied.

[0029] Figure 4 is a perspective view showing the overall appearance of a holding portion.

[0030] Figure 5 is a plan view of a susceptor.

[0031] Figure 6 is a sectional view of the susceptor.

[0032] Figure 7 is a plan view of a transfer mechanism.

[0033] Figure 8 is a side view of the transfer mechanism.

[0034] Figure 9 is a plan view showing the arrangement of a plurality of halogen lamps.

[0035] Figure 10 is a view showing the positional relationship of a lower radiation thermometer and a semiconductor wafer W held in a susceptor.

[0036] Figure 11 is a functional block diagram showing the relationship of a lower radiation thermometer, an upper radiation thermometer, and a control portion.

[0037] Figure 12 is a flowchart for explaining the operation of a heat treatment system to which the embodiment is applied.

[0038] Figure 13 is a flowchart for explaining the operation of a heat treatment system to which the embodiment is applied.

[0039] Figure 14 is a view showing the change in the surface temperature of a test substrate.

[0040] Figure 15 is a view schematically showing an example of a correction coefficient table in which a correction coefficient is held for each processing recipe.

[0041] Figure 16 is a view of an example of a GUI screen for inputting each variable of a correction coefficient having variables. DETAILED DESCRIPTION

[0042] Embodiments will be described below with reference to the accompanying drawings. In the following embodiments, detailed features and the like are shown for the purpose of explaining the technology, but these are merely examples, and all of these features are not necessarily essential features for implementing the embodiments.

[0043] Note that the drawings schematically show the structures, and the structures are appropriately omitted or simplified in the drawings for convenience of explanation. In addition, the sizes and the positional relationships of the structures and the like shown in the respective drawings are not necessarily accurately represented, and appropriate changes can be made. In the drawings that are not cross-sectional views or plan views, there are cases where hatching is added in order to easily understand the contents of the embodiments.

[0044] In addition, in the explanation shown below, the same reference numerals are assigned to the same components, and the names and functions thereof are the same. Thus, there are cases where detailed explanation thereof is omitted in order to avoid repetition.

[0045] In addition, in the explanation described below, in the case where a certain component is described as "provided with", "including", or "having", it is not an exclusive expression that excludes the presence of other components, unless otherwise specified.

[0046] In addition, in the explanation described below, even in the case where ordinal numbers such as "first" or "second" are used, these terms are used for the purpose of easily understanding the contents of the embodiments, and are not limited to the order and the like generated by these ordinal numbers.

[0047] In addition, in the explanation described below, expressions indicating equal states, such as "same", "equal", "uniform", or "homogeneous", include cases where a state of strict equality is indicated, and cases where a state where a difference is generated within a range of a tolerance or a function of the same degree is obtained, unless otherwise specified.

[0048] In addition, in the explanation described below, even in the case where terms indicating positions or directions such as "upper", "lower", "left", "right", "side", "bottom", "top", or "inner" are used, these terms are used for the purpose of easily understanding the contents of the embodiments, and are not related to the positions or directions at the time of actual implementation.

[0049] <First Embodiment>

[0050] Hereinafter, a heat treatment device and a heat treatment method in a heat treatment system to which the present embodiment is applied will be described.

[0051] <Structure of Heat Treatment System>

[0052] Figure 1is a plan view schematically showing an example of the structure of the heat treatment system 100 to which the present embodiment is applied. In addition, Figure 2 is a front view schematically showing an example of the structure of the heat treatment system 100 to which the present embodiment is applied.

[0053] As Figure 1 shown in the example in FIG. 1, the heat treatment system 100 is a flash lamp annealing apparatus that irradiates a flash light to a semiconductor wafer W in a circular plate shape as a substrate to heat the semiconductor wafer W.

[0054] The size of the semiconductor wafer W that becomes a processing target is not particularly limited, and is, for example, φ300 mm or φ450 mm.

[0055] As Figure 1 and Figure 2 shown, the heat treatment system 100 is provided with: an indexing section 101 that functions to carry an unprocessed semiconductor wafer W from the outside into the apparatus and to carry a processed semiconductor wafer W out of the apparatus to the outside; an alignment section 230 that performs positioning of the unprocessed semiconductor wafer W; two cooling sections 130 and 140 that perform cooling of the semiconductor wafer W after the heat treatment; a heat treatment apparatus 160 that performs flash heating treatment of the semiconductor wafer W; and a transfer robot 150 that performs handover of the semiconductor wafer W to and from the cooling sections 130 and 140 and the heat treatment apparatus 160.

[0056] In addition, the heat treatment system 100 is further provided with a control section 3 that functions to control the action mechanisms provided in the above-described respective processing sections and the transfer robot 150 to cause the flash heating treatment of the semiconductor wafer W to be performed.

[0057] The indexing section 101 is provided with: a loading port 110 that places a plurality of carriers C (two in the present embodiment) side by side; and a handover robot 120 that takes out the unprocessed semiconductor wafer W from each carrier C and accommodates the processed semiconductor wafer W into each carrier C.

[0058] The carrier C that accommodates the unprocessed semiconductor wafer W is placed on the loading port 110 by being carried by an automated guided vehicle (AGV, OHT) or the like, and the carrier C that accommodates the processed semiconductor wafer W is taken away from the loading port 110 by the automated guided vehicle.

[0059] In addition, in the loading port 110, the carrier C is capable of moving up and down as indicated by an arrow CU in Figure 2 , so that the handover robot 120 is capable of carrying in and out the unprocessed semiconductor wafer W with respect to the carrier C.

[0060] Note that as the form of the carrier C, in addition to the front opening unified pod (FOUP) in which the semiconductor wafer W is housed in a sealed space, a standard mechanical interface (SMIF) pod or an open cassette (OC) in which the housed semiconductor wafer W is exposed to the outside air can be used.

[0061] In addition, the transfer robot 120 is capable of sliding movement as indicated by an arrow 120S, rotational movement as indicated by an arrow 120R, and lifting movement. Thus, the transfer robot 120 is capable of carrying in and out the semiconductor wafer W with respect to the two carriers C, and is capable of transferring the semiconductor wafer W with respect to the alignment section 230 and the two cooling sections 130 and 140. Figure 1

[0062] The carrying in and out of the semiconductor wafer W with respect to the carrier C by the transfer robot 120 is performed by sliding movement of the hand 121 and lifting movement of the carrier C. In addition, the transfer of the semiconductor wafer W between the transfer robot 120 and the alignment section 230 or the cooling section 130 (cooling section 140) is performed by sliding movement of the hand 121 and lifting movement of the transfer robot 120.

[0063] The alignment section 230 is provided laterally along the indexing section 101 in the Y-axis direction. The alignment section 230 is a processing section that rotates the semiconductor wafer W in the horizontal plane and orients the semiconductor wafer W in a direction suitable for flash heating. The alignment section 230 is configured to have, inside an aluminum alloy frame, i.e., an alignment chamber 231, a mechanism that supports the semiconductor wafer W in a horizontal posture and rotates the semiconductor wafer W, a mechanism that optically detects a notch or an orientation flat or the like formed in a peripheral portion of the semiconductor wafer W, and the like.

[0064] The transfer of the semiconductor wafer W to the alignment section 230 is performed by the transfer robot 120. The semiconductor wafer W is transferred from the transfer robot 120 to the alignment chamber 231 so that the center of the wafer is located at a predetermined position.

[0065] In the alignment section 230, the semiconductor wafer W is rotated around the vertical direction axis with the center portion of the semiconductor wafer W received from the indexing section 101 as the center of rotation, and the orientation of the semiconductor wafer W is adjusted by optically detecting the notch or the like. The semiconductor wafer W after the orientation adjustment is taken out from the alignment chamber 231 by the transfer robot 120.

[0066] ​As a transfer space of the semiconductor wafer W by the transfer robot 150, a transfer chamber 170 which accommodates the transfer robot 150 is provided. The chamber 6 of the heat treatment device 160, the first cooling chamber 131 of the cooling section 130, and the second cooling chamber 141 of the cooling section 140 are connected to the transfer chamber 170.

[0067] The main part of the heat treatment system 100, that is, the heat treatment device 160 is a substrate processing section which irradiates a flash (flashlight) from a xenon flash lamp FL to the semiconductor wafer W which has been subjected to preheating (auxiliary heating) and performs flash heating treatment. The structure of the heat treatment device 160 will be described later.

[0068] The two cooling sections 130 and 140 have approximately the same structure. The cooling sections 130 and 140 each have a metal cooling plate and a quartz plate (not shown) placed on the upper surface thereof inside an aluminum alloy frame, that is, the first cooling chamber 131 or the second cooling chamber 141. The cooling plate is temperature-controlled to a normal temperature (about 23°C) by a Peltier element or a constant-temperature water circulation.

[0069] The semiconductor wafer W subjected to the flash heating treatment in the heat treatment device 160 is carried into the first cooling chamber 131 or the second cooling chamber 141, placed on the quartz plate, and cooled.

[0070] The first cooling chamber 131 and the second cooling chamber 141 are each located between the indexing section 101 and the transfer chamber 170 and connected to both of them.

[0071] Two openings for carrying in / out the semiconductor wafer W are provided on the first cooling chamber 131 and the second cooling chamber 141. The opening of the two openings of the first cooling chamber 131 which is connected to the indexing section 101 is opened / closed by a gate valve 181.

[0072] On the other hand, the opening of the first cooling chamber 131 which is connected to the transfer chamber 170 is opened / closed by a gate valve 183. That is, the first cooling chamber 131 and the indexing section 101 are connected via the gate valve 181, and the first cooling chamber 131 and the transfer chamber 170 are connected via the gate valve 183.

[0073] When the semiconductor wafer W is exchanged between the indexing section 101 and the first cooling chamber 131, the gate valve 181 is opened. Also, when the semiconductor wafer W is exchanged between the first cooling chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valve 181 and the gate valve 183 are closed, the inside of the first cooling chamber 131 becomes airtight.

[0074] Further, the opening of the second cooling chamber 141 connected to the indexing section 101 among the two openings can be opened and closed by a gate valve 182. On the other hand, the opening of the second cooling chamber 141 connected to the transfer chamber 170 can be opened and closed by a gate valve 184. That is, the second cooling chamber 141 and the indexing section 101 are connected via the gate valve 182, and the second cooling chamber 141 and the transfer chamber 170 are connected via the gate valve 184.

[0075] When the handoff of the semiconductor wafer W is performed between the indexing section 101 and the second cooling chamber 141, the gate valve 182 is opened. Further, when the handoff of the semiconductor wafer W is performed between the second cooling chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valve 182 and the gate valve 184 are closed, the inside of the second cooling chamber 141 becomes a sealed space.

[0076] The transfer robot 150 provided in the transfer chamber 170 provided adjacent to the chamber 6 can be rotated as shown by an arrow 150R with an axis in the vertical direction as a center. The transfer robot 150 has two link mechanisms composed of a plurality of arm sections, and a transfer hand 151a and a transfer hand 151b that hold the semiconductor wafer W are provided at the front ends of the two link mechanisms, respectively. These transfer hands 151a and 151b are arranged at a predetermined interval in the vertical direction, and can be independently linearly slid in the same horizontal direction by the link mechanisms, respectively.

[0077] Further, the transfer robot 150 moves up and down by moving up and down the base provided with the two link mechanisms, thereby moving up and down the two transfer hands 151a and 151b held in a state of being separated at a predetermined interval.

[0078] When the transfer robot 150 performs the handoff (carry-in and carry-out) of the semiconductor wafer W with the first cooling chamber 131, the second cooling chamber 141, or the chamber 6 of the heat treatment device 160 as the handoff object, first, the two transfer hands 151a and 151b are rotated in a manner to face the handoff object, and then (or during the rotation) are moved up and down, and either one of the transfer hands is positioned at a height at which the semiconductor wafer W is handed off with the handoff object. Then, the transfer hand 151a (151b) is linearly slid in the horizontal direction to perform the handoff of the semiconductor wafer W with the handoff object.

[0079] The handoff of the semiconductor wafer W between the transfer robot 150 and the handoff robot 120 can be performed via the cooling section 130 and the cooling section 140. That is, the first cooling chamber 131 of the cooling section 130 and the second cooling chamber 141 of the cooling section 140 function as a passage for the handoff of the semiconductor wafer W between the transfer robot 150 and the handoff robot 120. Specifically, the handoff of the semiconductor wafer W is performed by one of the transfer robot 150 or the handoff robot 120 delivering the semiconductor wafer W to the first cooling chamber 131 or the second cooling chamber 141, which is received by the other. The transfer mechanism for transferring the semiconductor wafer W from the carrier C to the heat treatment apparatus 160 is constituted by the transfer robot 150 and the handoff robot 120.

[0080] As described above, the gate valve 181 or the gate valve 182 is provided between the first cooling chamber 131 or the second cooling chamber 141 and the indexing section 101, respectively. Further, the gate valve 183 or the gate valve 184 is provided between the transfer chamber 170 and the first cooling chamber 131 or the second cooling chamber 141, respectively. Furthermore, the gate valve 185 is provided between the transfer chamber 170 and the chamber 6 of the heat treatment apparatus 160. These gate valves are appropriately opened and closed when the semiconductor wafer W is transported within the heat treatment system 100.

[0081] Figure 3 FIG. 2 is a cross-sectional view schematically showing the structure of the heat treatment apparatus 160 in the heat treatment system 100 according to the present embodiment.

[0082] As Figure 3 As shown in the example, the heat treatment apparatus 160 is a flash lamp annealing apparatus that heats the semiconductor wafer W by irradiating the semiconductor wafer W, which is a circular plate-shaped substrate, with a flash of light.

[0083] The size of the semiconductor wafer W as a processing target is not particularly limited, and is, for example, φ300 mm or φ450 mm (φ300 mm in the present embodiment).

[0084] The heat treatment apparatus 160 has a chamber 6 that accommodates the semiconductor wafer W, a flash heating section 5 that houses a plurality of flash lamps FL, and a halogen heating section 4 that houses a plurality of halogen lamps HL. The flash heating section 5 is provided on the upper side of the chamber 6, and the halogen heating section 4 is provided on the lower side.

[0085] Further, the heat treatment apparatus 160 has a holding section 7 that holds the semiconductor wafer W in a horizontal posture inside the chamber 6, and a transfer mechanism 10 that performs the handoff of the semiconductor wafer W between the holding section 7 and the outside of the apparatus.

[0086] Further, the heat treatment apparatus 160 has a control section 3 which controls each of the operation mechanisms provided to the halogen heating section 4, the flash heating section 5, and the chamber 6, to perform the heat treatment of the semiconductor wafer W.

[0087] The chamber 6 is configured to fit a chamber window made of quartz in the up-and-down direction of the cylindrical chamber side section 61. The chamber side section 61 has a substantially cylindrical shape with an up-and-down opening, and is blocked by fitting an upper chamber window 63 to the upper side opening and a lower chamber window 64 to the lower side opening.

[0088] The upper chamber window 63 constituting the top of the chamber 6 is a circular plate-shaped member formed of quartz, and functions as a quartz window which transmits the flash light emitted from the flash heating section 5 into the chamber 6.

[0089] Further, the lower chamber window 64 constituting the bottom of the chamber 6 is also a circular plate-shaped member formed of quartz, and functions as a quartz window which transmits the light from the halogen heating section 4 into the chamber 6.

[0090] Further, a reflection ring 68 is fitted to the upper portion of the inner wall surface of the chamber side section 61, and a reflection ring 69 is fitted to the lower portion thereof. The reflection rings 68 and 69 are each formed in a circular ring shape.

[0091] The upper reflection ring 68 is fitted by being inserted from the upper side of the chamber side section 61. On the other hand, the lower reflection ring 69 is fitted by being inserted from the lower side of the chamber side section 61 and being fixed by a screw not shown. That is, the reflection rings 68 and 69 are each detachably fitted to the chamber side section 61.

[0092] The inner space of the chamber 6, that is, the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side section 61, the reflection ring 68, and the reflection ring 69 is defined as a heat treatment space 65.

[0093] By fitting the reflection rings 68 and 69 to the chamber side section 61, a recess 62 is formed in the inner wall surface of the chamber 6. That is, the recess 62 is formed which is surrounded by the central portion of the inner wall surface of the chamber side section 61 where the reflection rings 68 and 69 are not fitted, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69.

[0094] The recess 62 is formed in a circular ring shape in the horizontal direction of the inner wall surface of the chamber 6, and surrounds the holding section 7 which holds the semiconductor wafer W. The chamber side section 61, the reflection ring 68, and the reflection ring 69 are formed of a metal material (for example, stainless steel) which is excellent in strength and heat resistance.

[0095] Further, a transfer opening portion (furnace port) 66 for transferring the semiconductor wafer W into and out of the chamber 6 is provided in the chamber side portion 61. The transfer opening portion 66 is openable and closable by a gate valve 185. The transfer opening portion 66 is in communication with the outer peripheral surface of the recessed portion 62.

[0096] Therefore, when the gate valve 185 opens the transfer opening portion 66, the semiconductor wafer W can be transferred into the heat treatment space 65 from the transfer opening portion 66 through the recessed portion 62, and the semiconductor wafer W can be transferred out of the heat treatment space 65 from the transfer opening portion 66 through the recessed portion 62. Further, when the gate valve 185 closes the transfer opening portion 66, the heat treatment space 65 in the chamber 6 becomes a closed space.

[0097] Further, a through-hole 61a and a through-hole 61b are provided through the chamber side portion 61. The through-hole 61a is a cylindrical hole for guiding infrared light radiated from the upper surface of the semiconductor wafer W held on a susceptor 74 described later toward the quantum-type infrared sensor 29 of the upper radiation thermometer 25. On the other hand, the through-hole 61b is a cylindrical hole for guiding infrared light radiated from the lower surface of the semiconductor wafer W toward the thermal-type infrared sensor 24 of the lower radiation thermometer 20. The through-holes 61a and 61b are provided obliquely with respect to the horizontal direction so that their through directions intersect the main surface of the semiconductor wafer W held on the susceptor 74.

[0098] The quantum-type infrared sensor 29 is an element that directly converts the photon energy of infrared light into an electric signal by a photoelectric conversion effect. The quantum-type infrared sensor 29 is, for example, a photoconductive InSb sensor having a sensitivity wavelength of 3 to 5 μm, and can be another quantum-type infrared sensor (impurity-type infrared sensor, or photovoltaic-type infrared sensor, etc.).

[0099] Further, the thermal-type infrared sensor 24 is an element that converts the energy of absorbed infrared light into heat and detects the change in heat as a signal. The thermal-type infrared sensor 24 is, for example, a thermoelectric sensor using a thermoelectric effect, a thermopile using the Seebeck effect, or a bolometer using the change in resistance of a semiconductor caused by heat. Further, the infrared sensor used in the lower radiation thermometer 20 can be replaced with a quantum-type infrared sensor.

[0100] A transparent window 26 composed of a calcium fluoride material that transmits infrared light in the wavelength region that the upper radiation thermometer 25 can measure is attached to the end portion of the through-hole 61a on the side facing the heat treatment space 65. Further, a transparent window 21 composed of a barium fluoride material that transmits infrared light in the wavelength region that the lower radiation thermometer 20 can measure is attached to the end portion of the through-hole 61b on the side facing the heat treatment space 65.

[0101] Further, a gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is provided at an upper portion of the inner wall of the chamber 6. The gas supply hole 81 is provided at a position higher than the recess 62, and can be provided at the reflection ring 68. The gas supply hole 81 is connected to a gas supply pipe 83 via a buffer space 82 formed in a circular ring shape in the side wall of the chamber 6.

[0102] The gas supply pipe 83 is connected to a processing gas supply source 85. Further, a valve 84 is installed in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82.

[0103] The processing gas flowing into the buffer space 82 flows in a manner that diffuses in the buffer space 82 having a fluid resistance smaller than the gas supply hole 81, and is supplied into the heat treatment space 65 from the gas supply hole 81. As the processing gas, for example, a non-reactive gas such as nitrogen (N2), or a reactive gas such as hydrogen (H2) or ammonia (NH3), or a mixed gas (in this embodiment, nitrogen) obtained by mixing them can be used.

[0104] On the other hand, a gas discharge hole 86 for discharging the gas in the heat treatment space 65 is provided at a lower portion of the inner wall of the chamber 6. The gas discharge hole 86 is provided at a position lower than the recess 62, and can be provided at the reflection ring 69. The gas discharge hole 86 is connected to a gas discharge pipe 88 via a buffer space 87 formed in a circular ring shape in the side wall of the chamber 6. The gas discharge pipe 88 is connected to the exhaust section 190. Further, a valve 89 is installed in the middle of the path of the gas discharge pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas discharge hole 86 to the gas discharge pipe 88 via the buffer space 87.

[0105] Note that the gas supply hole 81 and the gas discharge hole 86 can be provided in plural along the circumferential direction of the chamber 6, or can be slit-shaped holes. Further, the processing gas supply source 85 and the exhaust section 190 can be a mechanism provided at the heat treatment device 160, or can be an apparatus provided at a factory where the heat treatment device 160 is installed.

[0106] Further, a gas discharge pipe 191 for discharging the gas in the heat treatment space 65 is connected to the front end of the conveyance opening 66. The gas discharge pipe 191 is connected to the exhaust section 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is discharged via the conveyance opening 66.

[0107] Figure 4 is a perspective view showing the overall appearance of the holding section 7. The holding section 7 is configured to include the base ring 71, the connecting section 72, and the pedestal 74. The base ring 71, the connecting section 72, and the pedestal 74 are each formed of quartz. That is, the entire holding section 7 is formed of quartz.

[0108] The base ring 71 is a circular arc-shaped quartz member formed by removing a portion of a circular ring shape. The removed portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 described later and the base ring 71. The base ring 71 is supported to the wall surface of the chamber 6 by being placed on the bottom surface of the recess 62 (see FIG. 2). A plurality of (four in this embodiment) link portions 72 are vertically provided on the upper surface of the base ring 71 along the circumferential direction of the circular ring shape. The link portions 72 are also quartz members, and are fixed to the base ring 71 by welding. Figure 3 ). A plurality of (four in this embodiment) link portions 72 are vertically provided on the upper surface of the base ring 71 along the circumferential direction of the circular ring shape. The link portions 72 are also quartz members, and are fixed to the base ring 71 by welding.

[0109] The pedestals 74 are supported by the four link portions 72 of the base ring 71. Figure 5 is a plan view of the pedestal 74. In addition, Figure 6 is a sectional view of the pedestal 74.

[0110] The pedestal 74 has a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate-shaped member formed of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a larger planar size than the semiconductor wafer W.

[0111] The guide ring 76 is a member having a circular ring shape with an inner diameter larger than the diameter of the semiconductor wafer W. For example, in the case where the diameter of the semiconductor wafer W is φ 300 mm, the inner diameter of the guide ring 76 is φ 320 mm.

[0112] The inner periphery of the guide ring 76 is a tapered surface that widens upward from the holding plate 75. The guide ring 76 is formed of the same quartz as the holding plate 75.

[0113] The guide ring 76 can be fused to the upper surface of the holding plate 75, or can be fixed to the holding plate 75 by another fixing member such as a pin. Alternatively, the holding plate 75 and the guide ring 76 can be processed as an integral member.

[0114] The region of the upper surface of the holding plate 75 inward of the guide ring 76 is provided as a planar holding surface 75a that holds the semiconductor wafer W. A plurality of substrate support pins 77 are vertically provided on the holding surface 75a of the holding plate 75. In this embodiment, a total of twelve substrate support pins 77 are vertically provided at intervals of 30° along a circle concentric with the outer periphery circle (inner periphery circle of the guide ring 76) of the holding surface 75a.

[0115] The diameter of the circle in which the twelve substrate support pins 77 are arranged (the distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W, and if the diameter of the semiconductor wafer W is φ300 mm, the diameter of the circle in which the twelve substrate support pins 77 are arranged is φ270 mm to φ280 mm (φ270 mm in this embodiment). Each substrate support pin 77 is formed of quartz.

[0116] The plurality of substrate support pins 77 can be provided on the upper surface of the holding plate 75 by welding, or can be integrally machined with the holding plate 75.

[0117] Returning to Figure 4 , the four connecting portions 72 of the base ring 71 and the peripheral portion of the holding plate 75 of the pedestal 74 are fixed by welding. That is, the pedestal 74 and the base ring 71 are fixedly connected by the connecting portions 72. The base ring 71 of the holding portion 7 is supported by the wall surface of the chamber 6, and thus the holding portion 7 is fitted to the chamber 6. In a state in which the holding portion 7 is fitted to the chamber 6, the holding plate 75 of the pedestal 74 is in a horizontal posture (a posture in which the normal line coincides with the vertical direction). That is, the holding surface 75a of the holding plate 75 is a horizontal surface.

[0118] The semiconductor wafer W carried into the chamber 6 is placed and held on the pedestal 74 of the holding portion 7 fitted to the chamber 6 in a horizontal posture. At this time, the semiconductor wafer W is supported and held on the pedestal 74 by the twelve substrate support pins 77 vertically arranged on the holding plate 75. Strictly speaking, the upper end portions of the twelve substrate support pins 77 are in contact with the lower surface of the semiconductor wafer W and support the semiconductor wafer W.

[0119] Since the heights of the twelve substrate support pins 77 (the distance from the upper end of the substrate support pin 77 to the holding surface 75a of the holding plate 75) are uniform, the semiconductor wafer W can be supported in a horizontal posture by the twelve substrate support pins 77.

[0120] In addition, the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a prescribed interval from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pin 77. Therefore, the positional displacement of the semiconductor wafer W in the horizontal direction supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.

[0121] In addition, as Figure 4 and Figure 5As shown, an opening 78 is formed in the holding plate 75 of the susceptor 74. The opening 78 is provided to allow the lower radiation thermometer 20 to receive radiation (infrared light) emitted from the lower surface of the semiconductor wafer W. That is, the lower radiation thermometer 20 receives light emitted from the lower surface of the semiconductor wafer W via the opening 78 and the transparent window 21 of the through-hole 61b provided in the side portion 61 of the chamber, and measures the temperature of the semiconductor wafer W.

[0122] Further, four through-holes 79 are formed in the holding plate 75 of the susceptor 74, through which the lift pins 12 of the transfer mechanism 10 described later pass to exchange the semiconductor wafer W.

[0123] Figure 7 is a plan view of the transfer mechanism 10. In addition, Figure 8 is a side view of the transfer mechanism 10. The transfer mechanism 10 has two transfer arms 11. The transfer arms 11 are roughly in the shape of a circular arc along the circular recess 62.

[0124] Two lift pins 12 are vertically provided in each of the transfer arms 11. The transfer arms 11 and the lift pins 12 are formed of quartz. Each of the transfer arms 11 is rotatable by a horizontal movement mechanism 13. The horizontal movement mechanism 13 moves the pair of transfer arms 11 between a transfer operation position (solid line position of Figure 7 ) at which the semiconductor wafer W is transferred with respect to the holding portion 7, and a retreat position (double-dot chain line position of Figure 7 ) at which the semiconductor wafer W held in the holding portion 7 does not overlap when viewed from above.

[0125] As the horizontal movement mechanism 13, each of the transfer arms 11 can be individually rotated by a separate motor, or a pair of transfer arms 11 can be rotatably connected by a link mechanism and rotated by one motor.

[0126] In addition, the pair of transfer arms 11 is moved up and down by a lift mechanism 14 together with the horizontal movement mechanism 13. When the lift mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, the four lift pins 12 in total protrude from the upper surface of the susceptor 74 through the through-holes 79 (see Figure 4 and Figure 5 ) provided in the susceptor 74. On the other hand, when the lift mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position to withdraw the lift pins 12 from the through-holes 79, and the horizontal movement mechanism 13 moves the pair of transfer arms 11 in an open manner, each of the transfer arms 11 is moved to the retreat position.

[0127] The retreat position of the pair of transfer arms 11 is directly above the base ring 71 of the holding section 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retreat position of the transfer arms 11 is inside the recess 62. Note that a not-shown exhaust mechanism is provided in the vicinity of the portion where the drive section (the horizontal movement mechanism 13 and the vertical movement mechanism 14) of the transfer mechanism 10 is provided, and the ambient gas in the vicinity of the drive section of the transfer mechanism 10 is exhausted to the outside of the chamber 6.

[0128] Returning to Figure 3 The flash heating section 5 provided above the chamber 6 is configured to have, inside the frame 51, a light source composed of a plurality of (30 in this embodiment) flash lamps FL, and a reflector 52 provided so as to cover the upper side of the light source.

[0129] In addition, a light emission window 53 is attached to the bottom of the frame 51 of the flash heating section 5. The light emission window 53 constituting the bottom of the flash heating section 5 is a plate-shaped quartz window formed of quartz. By providing the flash heating section 5 above the chamber 6, the light emission window 53 and the upper chamber window 63 face each other.

[0130] The flash lamps FL irradiate flash light to the heat treatment space 65 from above the chamber 6 via the light emission window 53 and the upper chamber window 63.

[0131] The plurality of flash lamps FL are each a rod-shaped lamp having a long, cylindrical shape, and are arranged in a planar manner with their respective longitudinal directions parallel to each other along the main surface of the semiconductor wafer W held in the holding section 7 (i.e., along the horizontal direction). Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

[0132] The flash lamp FL has a rod-shaped glass tube (discharge tube) in which xenon gas is enclosed, an anode and a cathode connected to a capacitor provided at both ends of the glass tube, and a trigger electrode attached to the outer peripheral surface of the glass tube.

[0133] Since xenon is an electrical insulator, even if an electric charge is accumulated in the capacitor, no current flows in the glass tube in the normal state. However, when a high voltage is applied to the trigger electrode to break the insulation, the electric charge accumulated in the capacitor momentarily flows in the glass tube, and light is emitted by excitation of xenon atoms or molecules at that time.

[0134] In such a flash lamp FL, since electrostatic energy accumulated in advance in the capacitor is converted into an extremely short light pulse of 0.1 milliseconds to 100 milliseconds, it has a feature of being able to radiate extremely strong light compared to the light source of the halogen lamp HL that is continuously lit like that. That is, the flash lamp FL is a pulse light lamp that emits light instantaneously in an extremely short time of less than 1 second. Note that the light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power source that supplies power to the flash lamp FL.

[0135] Note that the electrostatic energy that is the light emission intensity of the flash lamp FL can be changed by the charged voltage accumulated in the capacitor. In addition, the light emission time of the flash lamp FL can be changed according to the setting of the pulse waveform.

[0136] In addition, a reflector 52 is provided above the plurality of flash lamps FL to cover them as a whole. The basic function of the reflector 52 is to reflect the flash emitted from the plurality of flash lamps FL to one side of the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and the surface (the surface of the side facing the flash lamps FL, that is, the upper surface) is subjected to roughening processing by sandblasting.

[0137] The halogen heating section 4 provided below the chamber 6 has a plurality of (40 in this embodiment) halogen lamps HL built inside the inner side of the frame 41. The halogen heating section 4 heats the semiconductor wafer W by light irradiation from the plurality of halogen lamps HL from below the chamber 6 to the heat treatment space 65 via the lower side chamber window 64.

[0138] Figure 9 is a plan view showing the arrangement of the plurality of halogen lamps HL. The 40 halogen lamps HL are arranged in two layers of upper and lower layers. In the upper layer close to the holding section 7, 20 halogen lamps HL are provided, and in the lower layer farther from the holding section 7 than the upper layer, 20 halogen lamps HL are provided.

[0139] Each halogen lamp HL is a rod-shaped lamp having a long, cylindrical shape. In the upper and lower layers, the 20 halogen lamps HL are each arranged with the length direction along the main surface of the semiconductor wafer W held in the holding section 7 (that is, along the horizontal direction) in parallel with each other. Therefore, in the upper and lower layers, the plane formed by the arrangement of the halogen lamps HL is a horizontal plane.

[0140] In addition, as shown in Figure 9 the arrangement density of the halogen lamps HL in the region opposing the peripheral portion is higher than in the region opposing the central portion of the semiconductor wafer W held in the holding section 7. That is, in the upper and lower layers, the arrangement interval of the halogen lamps HL in the peripheral portion is shorter than in the central portion of the lamp arrangement. Therefore, it is possible to perform irradiation of a larger amount of light to the peripheral portion of the semiconductor wafer W that is prone to temperature decrease when heated by light irradiation from the halogen heating section 4.

[0141] In addition, the groups of halogen lamps HL arranged on the upper layer and the groups of halogen lamps HL arranged on the lower layer are arranged in a lattice-like intersecting manner. That is, the 40 halogen lamps HL are arranged in such a manner that the longitudinal directions of the 20 halogen lamps HL arranged on the upper layer and the longitudinal directions of the 20 halogen lamps HL arranged on the lower layer are orthogonal to each other.

[0142] The halogen lamp HL is a filament type light source that emits light by incandescence of a filament by electric current supplied to the filament arranged inside a glass tube. Inside the glass tube, a gas in which a halogen element (iodine, bromine, etc.) is introduced in a trace amount into a non-active gas such as nitrogen or argon is enclosed. By the introduction of the halogen element, the filament can be prevented from being damaged and the temperature of the filament can be set to a high temperature.

[0143] Therefore, the halogen lamp HL has a characteristic that the life is long compared to a general incandescent lamp and can continuously emit strong light. That is, the halogen lamp HL is a continuous lighting lamp that emits light for at least one second or more continuously. In addition, since the halogen lamp HL is a rod-shaped lamp, the life is long, and by arranging the halogen lamp HL in the horizontal direction, the radiation efficiency to the semiconductor wafer W in the upward direction is excellent.

[0144] In addition, inside the frame 41 of the halogen heating unit 4, a reflector 43 is further provided on the lower side of the two layers of halogen lamps HL. Figure 3 The reflector 43 reflects light emitted from the plurality of halogen lamps HL toward the heat treatment space 65 side.

[0145] As shown in FIG. 2, two radiation thermometers (pyrometers in this embodiment) are provided in the chamber 6, an upper radiation thermometer 25 and a lower radiation thermometer 20. Figure 3 The upper radiation thermometer 25 is arranged diagonally upward of the semiconductor wafer W held by the susceptor 74, and the lower radiation thermometer 20 is arranged diagonally downward of the semiconductor wafer W held by the susceptor 74.

[0146] Figure 10 is a view showing the positional relationship between the lower radiation thermometer 20 and the semiconductor wafer W held by the susceptor 74.

[0147] The light-receiving angle θ of the thermal-type infrared sensor 24 of the lower radiation thermometer 20 with respect to the semiconductor wafer W is 60° or more and 89° or less. The light-receiving angle θ is an angle formed between the optical axis of the thermal-type infrared sensor 24 of the lower radiation thermometer 20 and the normal line (a line perpendicular to the main surface) of the semiconductor wafer W. Also, similarly, the light-receiving angle θ of the quantum-type infrared sensor 29 of the upper radiation thermometer 25 with respect to the semiconductor wafer W is 60° or more and 89° or less. Note that the light-receiving angle of the thermal-type infrared sensor 24 of the lower radiation thermometer 20 with respect to the semiconductor wafer W and the light-receiving angle of the quantum-type infrared sensor 29 of the upper radiation thermometer 25 with respect to the semiconductor wafer W can not be equal angles.

[0148] The control section 3 controls the above-described various mechanisms provided in the heat treatment apparatus 160. The hardware configuration of the control section 3 is the same as that of a general computer. That is, the control section 3 has a circuit (CPU) that performs various arithmetic processes, a read-only memory (ROM) that stores a basic program, a memory (RAM) that stores various information, and a disk that stores control software, data, and the like. The processing in the heat treatment apparatus 160 is performed by the CPU of the control section 3 executing a prescribed processing program.

[0149] Figure 11 is a functional block diagram showing the relationship of the lower radiation thermometer 20, the upper radiation thermometer 25, and the control section 3.

[0150] The lower radiation thermometer 20, which is disposed diagonally below the semiconductor wafer W and measures the temperature of the lower surface of the semiconductor wafer W, has the thermal-type infrared sensor 24 and a temperature measurement unit 22.

[0151] The thermal-type infrared sensor 24 receives infrared light radiated from the lower surface of the semiconductor wafer W held on the susceptor 74 via the opening portion 78. The thermal-type infrared sensor 24 is electrically connected to the temperature measurement unit 22 and transmits a signal generated in response to light reception to the temperature measurement unit 22.

[0152] The temperature measurement unit 22 has an amplification circuit, an A / D converter, a temperature conversion circuit, and the like, which are not shown, and converts a signal output from the thermal-type infrared sensor 24, which represents the intensity of infrared light, into a temperature. The temperature obtained by the temperature measurement unit 22 is the temperature of the lower surface of the semiconductor wafer W.

[0153] On the other hand, the upper radiation thermometer 25 disposed obliquely above the semiconductor wafer W and measuring the temperature of the upper surface of the semiconductor wafer W has a quantum-type infrared sensor 29 and a temperature measuring unit 27. The quantum-type infrared sensor 29 receives infrared light radiated from the upper surface of the semiconductor wafer W held on the susceptor 74. The quantum-type infrared sensor 29 has an optical element of InSb (indium antimonide) to be able to cope with a sharp temperature change of the upper surface of the semiconductor wafer W in the instant when the semiconductor wafer W is irradiated with a flash. The quantum-type infrared sensor 29 is electrically connected to the temperature measuring unit 27, and transmits a signal generated in response to light reception to the temperature measuring unit 27. The temperature measuring unit 27 converts a signal output from the quantum-type infrared sensor 29, which represents the intensity of infrared light, into a temperature. The temperature calculated by the temperature measuring unit 27 is the temperature of the upper surface of the semiconductor wafer W.

[0154] The lower radiation thermometer 20 and the upper radiation thermometer 25 are electrically connected to a control section 3 of a controller of the entire heat treatment apparatus 160, and the temperatures of the lower surface and the upper surface of the semiconductor wafer W measured by the lower radiation thermometer 20 and the upper radiation thermometer 25, respectively, are transmitted to the control section 3.

[0155] The control section 3 has a coefficient calculating section 31, a temperature correction section 32, and an alarm section 36. The coefficient calculating section 31 and the temperature correction section 32 are functional processing sections realized by a CPU of the control section 3 executing a prescribed processing program. The processing contents of the coefficient calculating section 31, the temperature correction section 32, and the alarm section 36 will be further described later. Note that the alarm section 36 can not be provided. In addition, the control section 3 can be of a type that does not have the coefficient calculating section 31 and inputs a correction coefficient calculated in advance to an input section 34 or a display section 33.

[0156] In addition, the control section 3 is connected to the display section 33, the input section 34, and a storage section 35. The control section 3 displays various information on the display section 33. The input section 34 is a device for an operator of the heat treatment system 100 to input various instructions or parameters to the control section 3. The operator can also perform condition setting of a processing plan in which a processing step and a processing condition of the semiconductor wafer W are described from the input section 34 while confirming the display content of the display section 33.

[0157] The storage section 35 can be, for example, a memory (storage medium) including a volatile or non-volatile semiconductor memory such as an HDD, a RAM, a ROM, or a flash memory, a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, or a DVD, and the like.

[0158] As the display section 33 and the input section 34, a touch panel having both functions can also be used, and in the present embodiment, a liquid crystal touch panel provided to an outer wall of the heat treatment system 100 is employed.

[0159] In addition to the above-described structure, the heat treatment system 100 is provided with various structures for cooling in order to prevent excessive temperature rise of the halogen heating section 4, the flash heating section 5, and the chamber 6 due to heat energy generated from the halogen lamp HL and the flash lamp FL at the time of heat treatment of the semiconductor wafer W.

[0160] For example, a water-cooling pipe (not shown) is provided in the wall of the chamber 6. In addition, the halogen heating section 4 and the flash heating section 5 are provided as air-cooling structures in which gas flow is formed inside to discharge heat. In addition, air is supplied to the gap between the upper chamber window 63 and the lamp light emission window 53 to cool the flash heating section 5 and the upper chamber window 63.

[0161] <About the operation of the heat treatment system>

[0162] Next, the operation of the heat treatment system according to the present embodiment will be described. Figure 12 is a flowchart for explaining the operation of the heat treatment system according to the present embodiment. The following processing steps of the heat treatment system 100 are performed by the control section 3 controlling each of the operation mechanisms of the heat treatment system 100.

[0163] First, the valve 84 for gas supply is opened, and the valve 89 and the valve 192 for gas discharge are opened, and the supply and discharge of gas into the chamber 6 is started. When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. In addition, when the valve 89 is opened, the gas in the chamber 6 is discharged from the gas discharge hole 86.

[0164] Thus, the nitrogen gas supplied from the upper portion of the heat treatment space 65 in the chamber 6 flows downward, and is discharged from the lower portion of the heat treatment space 65. In addition, by opening the valve 192, the gas in the chamber 6 is also discharged from the transfer opening 66. Further, the ambient gas around the drive section of the transfer mechanism 10 is also discharged by a discharge mechanism not shown.

[0165] Note that, when the semiconductor wafer W or the test substrate in the heat treatment device 160 is subjected to heat treatment, nitrogen gas is continuously supplied to the heat treatment space 65, and the amount of supply is appropriately changed according to the processing procedure.

[0166] Next, the gate valve 185 is opened to open the transfer opening 66, and the test substrate is carried into the heat treatment space 65 in the chamber 6 from the transfer robot outside the device through the transfer opening 66 (step ST01).

[0167] Here, the test substrate refers to a substrate subjected to test heat treatment before flash lamp annealing of the semiconductor wafer W as a processing target, and is, for example, non-film formation. In addition, the test substrate is preferably a substrate having the same diameter and thickness as the semiconductor wafer W.

[0168] In addition, the test heat treatment refers to a heat treatment performed on a test substrate before flash lamp annealing performed on the semiconductor wafer W as a treatment target, for example, a heat treatment including irradiation of a flash.

[0169] Note that, in the present embodiment, although described with the test substrate, the test substrate can be the semiconductor wafer W actually subjected to the heat treatment. It is sufficient to know the amount of change in the output voltage of the quantum-type infrared ray sensor.

[0170] With the test substrate carried in, it is possible for ambient gas outside the apparatus to be drawn in, but since nitrogen gas is continuously supplied into the chamber 6, nitrogen gas flows out from the carrying opening portion 66, and drawing in of such ambient gas outside can be minimized.

[0171] The test substrate carried in by the carrying robot advances to a position directly above the holding portion 7 and stops. Then, the pair of transfer arms 11 of the transfer mechanism 10 moves horizontally from the retracted position to the transfer operation position and rises, and the lift pins 12 project through the through holes 79 from the upper surface of the holding plate 75 of the susceptor 74 to receive the test substrate. At this time, the lift pins 12 rise to a position higher than the upper end of the substrate support pins 77.

[0172] After the test substrate is placed on the lift pins 12, the carrying robot exits from the heat treatment space 65, and the gate valve 185 closes the carrying opening portion 66. Then, by lowering the pair of transfer arms 11, the test substrate is handed over from the transfer mechanism 10 to the susceptor 74 of the holding portion 7 and is held in a horizontal posture from below. The test substrate is supported by the plurality of substrate support pins 77 standing on the holding plate 75 and is held in the susceptor 74. In addition, the test substrate is held by the holding portion 7 with the surface as the treated surface as the upper surface. A prescribed gap is formed between the lower surface (main surface on the opposite side from the surface) of the test substrate supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11 lowered below the susceptor 74 is retracted to the retracted position, that is, the inside of the recess 62, by the horizontal movement mechanism 13.

[0173] Next, the test heat treatment including irradiation of a flash is performed on the test substrate (step ST02). At this time, a part of the flash emitted from the flash lamp FL directly goes toward the inside of the chamber 6, and the other part temporarily reflects off the reflector 52 and goes toward the inside of the chamber 6, and flash heating of the test substrate is performed by irradiation of these flashes.

[0174] The flash heating is performed by flash (flashlight) irradiation from the flash lamp FL, and thus the surface temperature of the test substrate can be raised in a short time. That is, the flash irradiated from the flash lamp FL is an extremely short and strong flash whose irradiation time is around 0.1 msec or more and 100 msec or less, in which electrostatic energy accumulated in a capacitor beforehand is converted into an extremely short light pulse. Also, the surface temperature of the test substrate is sharply raised in an extremely short time by the flash irradiation from the flash lamp FL.

[0175] Then, the temperature of the upper surface of the test substrate at the time of the test heat treatment is measured using the quantum-type infrared sensor 29 of the upper radiation thermometer 25 (step ST03). The temperature of the upper surface of the test substrate measured in step ST03 is stored in the storage section 35 as a reference temperature.

[0176] Then, after the temperature of the test substrate is decreased to a predetermined value or less, the pair of transfer arms 11 of the transfer mechanism 10 is moved horizontally and upward again from the retreat position to the transfer operation position, and thus the lift pins 12 are protruded from the upper surface of the pedestal 74 to receive the test substrate after the heat treatment from the pedestal 74. Next, the conveyance opening portion 66 closed by the gate valve 185 is opened, and the test substrate placed on the lift pins 12 is carried out from the chamber 6 by a conveyance robot outside the apparatus, and the test heat treatment of the test substrate is ended (step ST04).

[0177] Here, as the timing of performing the test heat treatment, for example, the timing of the initial calibration of the heat treatment system 100 (including the initial calibration of the quantum-type infrared sensor 29) or the like is assumed.

[0178] Next, the test heat treatment is performed again on the test substrate in the same manner as in steps ST01 to ST04 (the same set values) (step ST05). Then, the temperature of the upper surface of the test substrate at the time of the test heat treatment is measured using the quantum-type infrared sensor 29 of the upper radiation thermometer 25 (step ST06). The temperature of the upper surface of the test substrate measured in step ST06 is stored in the storage section 35 as a shift temperature.

[0179] As the timing of performing the test heat treatment again, for example, the timing of the maintenance of the heat treatment system 100 or the like is assumed. In addition, in the case where the heat treatment is continuously performed on each semiconductor wafer W, the timing at which an abnormal state is detected during this period or the like is also assumed. For example, it is possible to perform the test heat treatment when the output voltage of the quantum-type infrared sensor 29 obtained by the irradiation of the flash differs by a predetermined value or more before and after the semiconductor wafers W sequentially subjected to the heat treatment, in which the output voltage of the quantum-type infrared sensor 29 is considered to be greatly changed.

[0180] Next, the coefficient calculation section 31 of the control section 3 calculates the correction coefficient based on the reference temperature and the offset temperature. Specifically, as shown in the following equation (1), the correction coefficient CF is calculated based on the reference temperature T ref and the offset temperature T shift (Step ST07).

[0181] [Equation 1]

[0182]

[0183] Here, in a case where the correction coefficient deviates from a range set in advance (i.e., a case where the difference between the reference temperature and the offset temperature exceeds a threshold value), the alarm section 36 can issue an alarm to the operator using sound or image display, or the like. This is because the larger the value of the correction coefficient, which is the change in the output voltage of the quantum-type infrared sensor 29 (sensitivity offset), the further the value deviates from 1, and in a case where the sensitivity offset is excessively large, a failure of the quantum-type infrared sensor 29 can be assumed, and further, a failure of other structures in the chamber 6 (contamination of the transparent window 26, or the like) can be assumed.

[0184] Next, the semiconductor wafer W that is the processing target is carried into the heat treatment space 65 in the chamber 6 (Step ST08). Then, flash lamp annealing that irradiates the semiconductor wafer W with a flash of light is performed (Step ST09). Thereafter, the temperature of the upper surface of the semiconductor wafer W at the time of the flash lamp annealing is measured using the quantum-type infrared sensor 29 of the upper radiation thermometer 25 (Step ST10). The temperature of the upper surface of the semiconductor wafer W measured in Step ST10 is stored in the storage section 35 as a measured temperature.

[0185] Next, the temperature correction section 32 of the control section 3 corrects the measured temperature measured in Step ST10 using the correction coefficient stored in the storage section 35. Specifically, as shown in the following equation (2), the measured temperature T measure is corrected to a corrected measured temperature T' measure (Step ST11).

[0186] [Equation 2]

[0187] T' measure = CF x T measure …(2)

[0188] Then, the semiconductor wafer W is carried out of the chamber 6 by a carrying robot outside the apparatus, and the flash lamp annealing of the semiconductor wafer W is ended (Step ST12).

[0189] Note that, in step ST11, the correction coefficient is corrected by referring to the correction coefficient stored in the storage section 35, but the correction coefficient calculated by the coefficient calculation section 31 and stored in the storage section 35 can not be used, and the correction coefficient can be calculated by an operator by manual calculation or the like and input directly via the input section 34, and the temperature correction section 32 of the control section 3 uses the correction coefficient from the input section 34 to correct the measured temperature T measure corrected to the correction measured temperature T' measure .

[0190] According to the above-described embodiment, the control section 3 corrects the measured temperature T measure Even in a case where the output voltage of the quantum-type infrared sensor 29 changes with the passage of time, the temperature of the upper surface of the semiconductor wafer W can be measured with high accuracy. Thus, it is possible to appropriately confirm whether flash lamp annealing is appropriately performed. For example, the control section 3 can adjust the output value of the flash lamp or the irradiation time or the like in a case where the correction measured temperature T measure deviates from the assumed temperature range.

[0191] Note that, in the above-described embodiment, although the reference temperature and the offset temperature are each measured once, at least one of the reference temperature and the offset temperature can be an average of the temperatures of the test substrate measured a plurality of times.

[0192] In addition, in a case where the infrared sensor used by the lower radiation thermometer 20 is a quantum-type infrared sensor, the coefficient calculation section 31 of the control section 3 can calculate a correction coefficient used in correction of a measured temperature measured by the quantum-type infrared sensor used by the lower radiation thermometer 20.

[0193] <Second Embodiment>

[0194] A heat treatment apparatus and a heat treatment method in a heat treatment system to which the present embodiment relates will be described. Note that, in the following description, the same reference numerals are used to denote the same components as those described in the above-described embodiments, and detailed description thereof will be appropriately omitted.

[0195] Next, an operation of the heat treatment system to which the present embodiment relates will be described. Figure 13 is a flowchart for describing an operation of the heat treatment system to which the present embodiment relates. The following processing steps of the heat treatment system 100 are performed by the control section 3 controlling each of the operation mechanisms of the heat treatment system 100.

[0196] First, as with step ST01 in the first embodiment, a test substrate is carried in (step ST21). Then, the test substrate is subjected to preheating (auxiliary heating) and a test heat treatment including irradiation of a flash (step ST22).

[0197] Figure 14 is a graph showing a change in surface temperature of the test substrate. Note that even the semiconductor wafer W described later can show a change in surface temperature as shown in Figure 14 by the flash lamp annealing.

[0198] After the test substrate is carried into the chamber 6 and held by the susceptor 74, at time tl, the 40 halogen lamps HL of the halogen heating section 4 are all lit to start preheating (auxiliary heating) (step ST23). Halogen light emitted from the halogen lamps HL transmits through the lower chamber window 64 formed of quartz and the susceptor 74 and is irradiated to the lower surface of the test substrate. By receiving the light irradiation from the halogen lamps HL, the test substrate is preheated and the temperature is raised.

[0199] Note that since the transfer arm 11 of the transfer mechanism 10 is retracted to the inside of the recessed portion 62, it does not become an obstacle to heating based on the halogen lamps HL.

[0200] The temperature of the test substrate raised by light irradiation from the halogen lamps HL is measured by the lower radiation thermometer 20. That is, the lower radiation thermometer 20 receives infrared light radiated from the lower surface (lower surface) of the test substrate held by the susceptor 74 via the opening portion 78 through the transparent window 21 to measure the lower surface temperature of the test substrate (step ST24).

[0201] Note that temperature measurement based on the lower radiation thermometer 20 can be started before preheating based on the halogen lamps HL is started.

[0202] The lower surface temperature of the test substrate measured by the lower radiation thermometer 20 is transmitted to the control section 3. Also, the lower surface temperature of the test substrate before the test heat treatment is performed is stored in the storage section 35 as a reference temperature (auxiliary).

[0203] The control section 3 controls the output of the halogen lamps HL while monitoring whether the temperature of the test substrate raised by light irradiation from the halogen lamps HL reaches a prescribed preheating temperature Tl. That is, the control section 3 performs feedback control of the output of the halogen lamps HL based on the measured value by the lower radiation thermometer 20 to make the temperature of the test substrate the preheating temperature Tl.

[0204] Thus, the lower radiation thermometer 20 is also a temperature sensor for controlling the output of the halogen lamp HL during the preheating stage. Note that, although the lower radiation thermometer 20 measures the temperature of the lower surface of the test substrate, during the preheating stage based on the halogen lamp HL, no temperature difference is generated between the upper and lower surfaces of the test substrate, and the lower surface temperature measured by the lower radiation thermometer 20 is regarded as the temperature of the entire test substrate.

[0205] After the temperature of the test substrate reaches the preheating temperature Tl, the control section 3 temporarily holds the test substrate at this preheating temperature Tl. Specifically, at the time t2 at which the temperature of the test substrate measured by the lower radiation thermometer 20 reaches the preheating temperature Tl, the control section 3 adjusts the output of the halogen lamp HL and holds the temperature of the test substrate at approximately the preheating temperature Tl.

[0206] By performing such preheating based on the halogen lamp HL, the entire test substrate is uniformly warmed to the preheating temperature Tl. During the preheating stage based on the halogen lamp HL, there is a tendency for the temperature of the peripheral portion of the test substrate, which is more likely to generate heat dissipation, to decrease compared to the central portion, but in terms of the arrangement density of the halogen lamps HL in the halogen heating section 4, the region opposing the peripheral portion is higher than the region opposing the central portion. Therefore, the amount of light irradiated to the peripheral portion of the test substrate, which is more likely to generate heat dissipation, increases, and it is possible to make the in-plane temperature distribution of the test substrate during the preheating stage uniform.

[0207] At the time t3 at which the temperature of the test substrate reaches the preheating temperature Tl and a prescribed time has elapsed, the flash lamp FL of the flash heating section 5 performs flash irradiation to the upper surface of the test substrate held by the susceptor 74 as a test heat treatment (step ST25).

[0208] The surface temperature of the test substrate is monitored by the upper radiation thermometer 25. However, the upper radiation thermometer 25 does not measure the absolute temperature of the upper surface of the test substrate, but measures the temperature change of this upper surface. That is, the quantum-type infrared sensor 29 of the upper radiation thermometer 25 removes offset components by AC coupling or the like, and further, calculates the difference from the voltage value corresponding to the preheating temperature Tl with reference to the lower radiation thermometer 20, thereby measuring the rising temperature (jump temperature) AT of the upper surface of the test substrate from the preheating temperature Tl at the time of flash irradiation (step ST26).

[0209] Note that, although the temperature of the lower surface of the test substrate at the time of flash irradiation is also measured by the lower radiation thermometer 20, when a flash having a very short irradiation time and a high intensity is irradiated, only the vicinity of the surface of the test substrate is sharply heated, and thus a temperature difference occurs between the upper and lower surfaces of the test substrate, and the temperature of the upper surface of the test substrate cannot be measured by the lower radiation thermometer 20. Also, similarly to the lower radiation thermometer 20, since the light receiving angle of the upper radiation thermometer 25 with respect to the test substrate is also 60° or more and 89° or less, the rising temperature ΔT of the upper surface of the test substrate can be accurately measured by the upper radiation thermometer 25.

[0210] Next, the control section 3 calculates the maximum temperature reached by the upper surface of the test substrate at the time of flash irradiation (step ST27). The temperature of the lower surface of the test substrate is measured by the lower radiation thermometer 20 at least during the period from the time t2 at which the test substrate reaches a certain temperature at the time of preheating to the time t3 at which the flash is irradiated.

[0211] At the preheating stage before flash irradiation, no temperature difference occurs between the upper and lower surfaces of the test substrate, and the temperature of the lower surface of the test substrate measured by the lower radiation thermometer 20 before flash irradiation is also the temperature of the upper surface. The control section 3 adds the rising temperature ΔT of the upper surface of the test substrate at the time of flash irradiation measured by the upper radiation thermometer 25 to the temperature of the lower surface of the test substrate (preheating temperature Tl) measured by the lower radiation thermometer 20 during the period from the time t2 immediately before the flash is irradiated to the time t3, and calculates the maximum reached temperature T2 of the upper surface. The calculated maximum reached temperature T2 is stored in the storage section 35 as a reference temperature (jump). The control section 3 can also display the calculated maximum reached temperature T2 on the display section 33.

[0212] After the flash irradiation is completed, the halogen lamp HL is turned off at the time t4 after a prescribed time elapses. Thus, the test substrate is rapidly cooled from the preheating temperature Tl. The temperature of the test substrate during the cooling is measured by the lower radiation thermometer 20, and the measurement result is transmitted to the control section 3. The control section 3 monitors whether the temperature of the test substrate has been cooled to a prescribed temperature or not based on the measurement result of the lower radiation thermometer 20.

[0213] Then, after the temperature of the test substrate is cooled to a prescribed temperature or less, the pair of transfer arms 11 of the transfer mechanism 10 is moved horizontally from the retracted position to the transfer operation position and is raised again, and thus the lift pins 12 protrude from the upper surface of the pedestal 74 and receive the heat-treated test substrate from the pedestal 74. Next, the transfer opening portion 66 closed by the gate valve 185 is opened, and the test substrate placed on the lift pins 12 is carried out of the chamber 6 by a carrying robot outside the apparatus, and the preheating (auxiliary heating) and the test heat treatment of the test substrate are completed (step ST28).

[0214] Next, the test substrate is again subjected to preheating (auxiliary heating) and test heat treatment (step ST29) in the same manner (the same set values) as in steps ST21 to ST28. Also, the temperature of the lower surface of the test substrate measured by the thermal type infrared sensor 24 of the lower radiation thermometer 20 at the time of the test heat treatment is stored as the offset temperature (auxiliary) in the storage section 35, and the temperature rise (jump temperature) of the upper surface of the test substrate measured by the quantum type infrared sensor 29 of the upper radiation thermometer 25 at the time of the test heat treatment is stored as the offset temperature (jump) in the storage section 35 (step ST30).

[0215] Next, the coefficient calculation section 31 of the control section 3 calculates the correction coefficient based on the reference temperature (jump), the reference temperature (auxiliary), the offset temperature (jump), and the offset temperature (auxiliary). Specifically, as shown in the following equation (3), the correction coefficient CF is calculated based on the reference temperature T ref(as) , the reference temperature T ref(ju) , the offset temperature T shift(as) , and the offset temperature T shift(ju) (step ST31).

[0216] [Equation 3]

[0217]

[0218] Next, the semiconductor wafer W as the processing target is subjected to flash lamp annealing (step ST32) in the same manner as in steps ST21 to ST28. Here, various set values at the time of the flash lamp annealing (for example, the output value of the flash or the irradiation time of the flash, etc.) do not need to be the same as those of the preheating (auxiliary heating) and the test heat treatment.

[0219] Also, the temperature of the lower surface of the semiconductor wafer W measured by the thermal type infrared sensor 24 of the lower radiation thermometer 20 at the time of the flash lamp annealing is stored as the measured temperature (auxiliary) in the storage section 35, and the temperature rise (jump temperature) of the upper surface of the semiconductor wafer W measured by the quantum type infrared sensor 29 of the upper radiation thermometer 25 at the time of the flash lamp annealing is stored as the measured temperature (jump) in the storage section 35 (step ST33).

[0220] Next, the temperature correction section 32 of the control section 3 corrects the measured temperatures measured in step ST33 using the correction coefficient stored in the storage section 35. Specifically, as shown in the following equation (4), the measured temperature (jump) T measure(ju) and the measured temperature (auxiliary) T measure(as) are corrected to the corrected measured temperatures T' measure (step ST34) using the correction coefficient CF.

[0221] [Equation 4]

[0222] T' measure = CF x T measure(ju) + T measure(as) …(4)

[0223] According to the above-described embodiment, the control section 3 can measure the temperature of the upper surface of the semiconductor wafer W with high accuracy by referring to the correction measurement temperature T' measure Even in the case where the output voltage of the quantum-type infrared sensor 29 changes over time, the temperature of the upper surface of the semiconductor wafer W can be measured with high accuracy. Thus, it is possible to properly confirm whether the flash lamp annealing is properly performed.

[0224] Further, by taking the auxiliary temperature into consideration, only the rising temperature (jump temperature) of the upper surface of the semiconductor wafer W that is affected by the change in the output voltage of the quantum-type infrared sensor 29 is multiplied by the correction coefficient, and thus the temperature of the upper surface of the semiconductor wafer W can be measured with high accuracy. That is, the temperature measurement that also takes into consideration the change in the thermal conductivity of the semiconductor wafer W (particularly, silicon) caused by the preheating (auxiliary heating) can be performed.

[0225] <Third Embodiment>

[0226] A heat treatment apparatus and a heat treatment method in a heat treatment system according to the present embodiment will be described. Note that, in the following description, the same reference numerals are used to denote the same components as those described in the above-described embodiments, and detailed description thereof will be omitted.

[0227] The temperature correction section 32 uses the correction coefficient CF to correct the measurement temperature (jump) T measure(ju) and the measurement temperature (auxiliary) T measure(as) to the correction measurement temperature T' measure In this case, there is a case where the correction accuracy is reduced due to a difference in conditions such as a pulse waveform corresponding to the light emission time of the flash lamp FL.

[0228] Therefore, in the present embodiment, different reference temperatures T ref are obtained for each processing scheme according to the conditions of the processing scheme of the semiconductor wafer W that can be used, such as a pulse waveform, a charging voltage, an auxiliary temperature, or a zone offset value, and the like. Further, by obtaining a plurality of correction coefficients CF corresponding thereto, a deviation in the correction accuracy caused by the difference in the processing scheme is suppressed. Here, the zone offset value refers to an offset value when the charging voltage of the portion of the flash lamp FL illustrated in FIG. 8 that is disposed opposite to the central portion of the substrate W is set to be lower than the charging voltage of the portion disposed opposite to the peripheral portion of the substrate W. Figure 3

[0229] ​Additionally, the correction coefficient CF can be, for example, a pulse waveform pw as a variable of emission time, a charging voltage cv as a variable of emission intensity, and... Figure 14 The preheating temperature T1 corresponds to the auxiliary heating temperature as, and the correction coefficients CF (pw, cv, as, zo) of four variables with regional offset values ​​zo. In this case, for example, if variable pw changes, the other variables can also be fixed to predetermined reference values.

[0230] <Fourth Implementation>

[0231] The heat treatment apparatus and heat treatment method in the heat treatment system according to this embodiment will be described. It should be noted that in the following description, the same reference numerals are used to illustrate the same components as those described in the embodiments described above, and detailed descriptions thereof are omitted.

[0232] In the third embodiment, the multiple correction coefficients CF obtained can be maintained in the correction coefficient table.

[0233] Figure 15 This is a diagram illustrating an example of a correction coefficient table that maintains the correction coefficient CF for each treatment scheme. Figure 15 In this process, based on the differences in pulse waveform, charging voltage, auxiliary temperature, and regional offset value in the processing scheme, multiple correction coefficients CF are maintained corresponding to the correction coefficient number.

[0234] Furthermore, the correction coefficients CF(pw, cv, as, zo) with variables obtained in the third embodiment can be selected by specifying each variable.

[0235] Figure 16 This is a diagram showing an example of a GUI screen used to input the various variables of the correction coefficients CF(pw, cv, as, zo). Figure 16 In this system, the various variables of the correction coefficients CF (pw, cv, as, zo) can be specified in designated fields 300, 301, 302, and 303 via direct input or drop-down. The correction coefficient (or the corresponding correction coefficient number) corresponding to the input variable is displayed in designated field 304 through calculation by the control unit 3. However, the correction coefficient (or the corresponding correction coefficient number) can also be directly input into designated field 304. It should be noted that when a voltage value is specified in designated field 303, the area offset value switching display field 305 switches from the off state to the on state, but a setting button for switching area offsets can also be provided separately.

[0236] <Fifth Implementation>

[0237] The heat treatment device in the heat treatment system and the heat treatment method according to the present embodiment will be described. Note that in the following description, the same components as those described in the above-described embodiments are denoted by the same reference numerals and will not be described in detail.

[0238] The plurality of correction factors CF obtained in the third and fourth embodiments can also be stored in a library, and the control unit 3 can automatically select a correction factor CF suitable for a processing plan from the library when the processing plan is created.

[0239] The control unit 3 can also select a correction factor CF suitable for a processing plan by an optimization method. For example, correction factors CF corresponding to a plurality of patterns of charging voltage cv can be retained, and when an arbitrary charging voltage cv is input, the optimal correction factor CF can be estimated by curve fitting based on the least squares method.

[0240] In addition, the control unit 3 can also select a correction factor CF suitable for a processing plan by machine learning. For example, a neural network or the like can be used to learn four variables (pulse waveform pw, charging voltage cv, auxiliary heating temperature as, and region offset value zo) and the corresponding correction factor CF as training data, and a learned model that can output the optimal correction factor CF based on the input of the above four variables can be mounted on the control unit 3.

[0241] <Effects of the Embodiments>

[0242] Next, examples of effects produced by the above-described embodiments will be shown. Note that in the following description, the effects are described based on the specific structures exemplified in the above-described embodiments, but other specific structures exemplified in the present application specification can also be substituted within a range where the same effects are produced.

[0243] In addition, substitution can also be made across a plurality of embodiments. That is, each structure exemplified in different embodiments can be combined, and the same effects can be produced.

[0244] According to the above-described embodiment, the heat treatment apparatus is provided with the quantum-type infrared ray sensor 29, the coefficient calculation section 31, and the temperature correction section 32. The quantum-type infrared ray sensor 29 measures the temperature of the first substrate and the temperature of the second substrate. Here, the first substrate corresponds to, for example, a test substrate. In addition, the second substrate corresponds to, for example, the semiconductor wafer W. Here, the temperature of the test substrate subjected to the first heat treatment in which the flash light is irradiated, which is measured by the quantum-type infrared ray sensor 29, is set as a reference temperature. Note that the first heat treatment corresponds to, for example, a test heat treatment. In addition, the temperature of the test substrate subjected to the test heat treatment again after the test heat treatment, which is measured by the quantum-type infrared ray sensor 29, is set as a shift temperature. The coefficient calculation section 31 calculates a correction coefficient based on the reference temperature and the shift temperature. In addition, the temperature correction section 32 corrects the temperature of the semiconductor wafer W subjected to the second heat treatment in which the flash light is irradiated, which is measured by the quantum-type infrared ray sensor 29, using the correction coefficient. Here, the second heat treatment corresponds to, for example, a flash lamp anneal.

[0245] According to such a structure, by correcting the temperature of the semiconductor wafer W using the correction coefficient, even in a case where the output voltage of the quantum-type infrared ray sensor 29 changes with the passage of time, the temperature of the upper surface of the semiconductor wafer W can be measured with high accuracy. Therefore, it is possible to appropriately confirm whether the flash lamp anneal is appropriately performed.

[0246] In addition, since the measured temperature is directly corrected by the correction coefficient, the range in which the correction coefficient can be applied is also expanded to other devices and the like that do not use voltage, for example, compared to the case where the output voltage of the quantum-type infrared ray sensor 29 is corrected. For example, it is also possible to correct the output using the prescribed correction coefficient with respect to the measured temperature measured by other sensors provided in the heat treatment apparatus other than the quantum-type infrared ray sensor that calculates the prescribed correction coefficient. Furthermore, in a case where the temperature of a plurality of portions of the surface of the semiconductor wafer W is measured using a plurality of sensors provided in the heat treatment apparatus, it is also possible to correct the output of each sensor by the prescribed correction coefficient.

[0247] Note that even in a case where the above-described structure is appropriately added to the other structures exemplified in the present specification, that is, in a case where the above-described structure is appropriately added to the other structures in the present specification that are not mentioned above, the same effects can be obtained.

[0248] In addition, according to the above-described embodiment, the coefficient calculation section 31 calculates the correction coefficient based on the ratio of the reference temperature to the shift temperature. According to such a structure, by correcting the temperature of the semiconductor wafer W using the correction coefficient, even in a case where the output voltage of the quantum-type infrared ray sensor 29 changes with the passage of time, the temperature of the upper surface of the semiconductor wafer W can be measured with high accuracy.

[0249] Further, according to the above-described embodiment, at least one of the reference temperature and the offset temperature is an average of temperatures of the test substrate measured a plurality of times. According to such a configuration, the measurement accuracy of at least one of the reference temperature and the offset temperature is improved, and the accuracy of the correction coefficient can also be improved.

[0250] Further, according to the above-described embodiment, the heat treatment apparatus 160 is provided with an alarm unit 36 for issuing an alarm in a case where the difference between the reference temperature and the offset temperature exceeds a threshold value. According to such a configuration, in a case where the sensitivity offset is excessively large, it is possible to envisage a failure of the quantum-type infrared sensor 29, and further a failure of other structures in the chamber 6 (dirt of the transparent window 26, etc.).

[0251] Further, according to the above-described embodiment, the quantum-type infrared sensor 29 measures at least the temperature on the upper surface of the test substrate on which the flash light is irradiated. Further, the heat treatment apparatus 160 is provided with a lower surface thermometer for measuring at least the temperature on the lower surface of the test substrate. Here, the lower surface thermometer corresponds to the lower radiation thermometer 20, for example. Further, the temperature on the lower surface of the test substrate before the test heat treatment is performed is set as an auxiliary temperature, which is measured by the lower radiation thermometer 20. Further, the coefficient calculation unit 31 calculates the correction coefficient based on the reference temperature, the offset temperature, and the auxiliary temperature. According to such a configuration, by multiplying only the rise temperature (jump temperature) of the upper surface of the semiconductor wafer W on which the flash light is irradiated by the correction coefficient, taking into account the auxiliary temperature, it is possible to measure the temperature of the upper surface of the semiconductor wafer W with high accuracy.

[0252] Further, according to the above-described embodiment, the coefficient calculation unit 31 calculates the correction coefficient based on the ratio of the difference between the reference temperature and the auxiliary temperature and the difference between the offset temperature and the auxiliary temperature. According to such a configuration, by multiplying only the rise temperature (jump temperature) of the upper surface of the semiconductor wafer W by the correction coefficient, it is possible to measure the temperature of the upper surface of the semiconductor wafer W with high accuracy.

[0253] According to the above-described embodiment, in the heat treatment method, there are included a step of measuring the temperature of the test substrate on which the test heat treatment is performed using the quantum-type infrared sensor 29, and setting the temperature of the test substrate as the reference temperature; a step of measuring the temperature of the test substrate on which the test heat treatment is performed using the quantum-type infrared sensor 29 after the test heat treatment is performed, and setting the temperature of the test substrate as the offset temperature; and a step of correcting the temperature of the semiconductor wafer W on which the flash lamp annealing is performed, which is measured by the quantum-type infrared sensor 29, using the correction coefficient calculated based on the reference temperature and the offset temperature.

[0254] According to such a structure, by correcting the temperature of the semiconductor wafer W using the correction coefficient, even in a case where the output voltage of the quantum-type infrared sensor 29 changes over time, the temperature of the upper surface of the semiconductor wafer W can be measured with high precision.

[0255] Note that the order of the processes can be changed as appropriate without particular limitation.

[0256] Note that the same effects can be obtained even when the other structures exemplified in the present specification are appropriately added to the above-described structure, that is, when the other structures in the present specification that are not mentioned in the above-described structure are appropriately added.

[0257] <Modifications of the above-described embodiments>

[0258] In the above-described embodiments, although the material, the material, the size, the shape, the relative positional relationship, or the implementation conditions of each constituent element, or the like are described at times, these are examples in all aspects and are not limited thereto.

[0259] Therefore, an infinite number of modifications and equivalents that are not exemplified are assumed to be within the scope of the technology disclosed in the present specification. For example, cases where at least one constituent element is modified, added, or omitted, and further, cases where at least one constituent element in at least one embodiment is extracted and combined with a constituent element in another embodiment are also included.

[0260] In addition, in the above-described embodiments, in a case where a material name or the like is described without being specified particularly, other additives can be included in the material as appropriate without causing a contradiction, for example, including an alloy or the like.

[0261] Explanation of Reference Numerals

[0262] 3 control unit

[0263] 4 halogen heating unit

[0264] 5 flash heating unit

[0265] 6 chamber

[0266] 7 holding unit

[0267] 10 transfer mechanism

[0268] 11 transfer arm

[0269] 12 lift pin

[0270] 13 horizontal movement mechanism

[0271] 14 elevating mechanism

[0272] 20 lower radiation thermometer

[0273] 21, 26 transparent window

[0274] 22, 27 temperature measurement unit

[0275] 24 thermal-type infrared sensor

[0276] 25 upper radiation thermometer

[0277] 29 quantum-type infrared sensor

[0278] 31 coefficient calculation section

[0279] 32 temperature correction section

[0280] 33 display section

[0281] 34 input section

[0282] 35 storage section

[0283] 36 alarm section

[0284] 41, 51 frame

[0285] 43, 52 reflector

[0286] 53 light-emitting window

[0287] 61 chamber side

[0288] 61a, 61b, 79 through hole

[0289] 62 recess

[0290] 63 upper chamber window

[0291] 64 lower chamber window

[0292] 65 heat treatment space

[0293] 66 carrying opening

[0294] 68, 69 reflecting ring

[0295] 71 base ring

[0296] 72 connecting section

[0297] 74 pedestal

[0298] 75 holding plate

[0299] 75a holding surface

[0300] 76 guide ring

[0301] 77 substrate support pin

[0302] 78 opening portion

[0303] 81 gas supply hole

[0304] 82, 87 buffer space

[0305] 83 gas supply pipe

[0306] 84, 89, 192 valve

[0307] 85 process gas supply source

[0308] 86 gas discharge hole

[0309] 88, 191 gas discharge pipe

[0310] 100 heat treatment system

[0311] 101 indexing portion

[0312] 110 load port

[0313] 120 transfer robot

[0314] 120R, 120S, 150R arrow

[0315] 121 hand

[0316] 130, 140 cooling portion

[0317] 131 first cooling chamber

[0318] 141 second cooling chamber

[0319] 150 transfer robot

[0320] 151a, 151b transfer hand

[0321] 160 heat treatment device

[0322] 170 transfer chamber

[0323] 181, 182, 183, 184, 185 gate valve

[0324] 190 exhaust portion

[0325] 230 alignment portion

[0326] 231 alignment chamber

[0327] 300, 301, 302, 303, 304 designation field

[0328] 305 switch display bar

Claims

1. A heat treatment apparatus for heating a first substrate and a second substrate by irradiation with a flash, wherein, The heat treatment apparatus is equipped with a quantum infrared sensor for measuring the temperature of the first substrate and the temperature of the second substrate. The temperature of the first substrate, which has undergone the first heat treatment irradiated by the flash, as measured by the quantum infrared sensor, is set as the reference temperature. The temperature of the first substrate, as measured by the quantum infrared sensor and after undergoing the first heat treatment followed by a second heat treatment, is set as the offset temperature. The heat treatment apparatus further includes a temperature correction unit, which is used to correct the temperature of the second substrate, which has undergone the second heat treatment of being irradiated by the flash, as measured by the quantum infrared sensor, using a correction coefficient calculated based on the reference temperature and the offset temperature.

2. The heat treatment apparatus as described in claim 1, wherein, The correction factor is calculated based on the ratio of the reference temperature to the offset temperature.

3. The heat treatment apparatus as described in claim 1 or 2, wherein, The correction factor is calculated based on the reference temperature and the offset temperature, at least one of which is the average value of the temperature of the first substrate measured multiple times.

4. The heat treatment apparatus as described in claim 1 or 2, wherein, The heat treatment apparatus also has an alarm unit for issuing an alarm when the difference between the reference temperature and the offset temperature exceeds a threshold.

5. The heat treatment apparatus as described in claim 1 or 2, wherein, The quantum infrared sensor at least measures the temperature on the upper surface of the first substrate that is irradiated by the flash. The heat treatment apparatus further includes a lower surface thermometer for measuring at least the temperature on the lower surface of the first substrate. The temperature on the lower surface of the first substrate, measured by the lower surface thermometer, before the first heat treatment, is set as the auxiliary temperature. The temperature correction unit uses the correction coefficient calculated based on the reference temperature, the offset temperature, and the auxiliary temperature to correct the temperature of the second substrate.

6. The heat treatment apparatus as described in claim 5, wherein, The correction factor is calculated based on the ratio of the difference between the reference temperature and the auxiliary temperature to the difference between the offset temperature and the auxiliary temperature.

7. A heat treatment method comprising heating a first substrate and a second substrate by irradiation with a flash, wherein, include: The process of using a quantum infrared sensor to measure the temperature of the first substrate that has undergone the first heat treatment of being irradiated by the flash, and setting the measured temperature of the first substrate as a reference temperature. After the first heat treatment, the temperature of the first substrate that has undergone the first heat treatment is measured again using the quantum infrared sensor, and the temperature of the first substrate measured again is set as the offset temperature. as well as The process of correcting the temperature of the second substrate, which has undergone the second heat treatment irradiated by the flash, as measured by the quantum infrared sensor, using a correction coefficient calculated based on the reference temperature and the offset temperature.

Images