A fast implementation method and system for a scoreboard that supports out-of-order comparisons
By modifying the UVM base class and using converters, dual queues, and dual threads, a scoreboard supporting out-of-order comparison was implemented, solving the problems of repetitive coding and limitations of out-of-order comparison, and improving development and simulation efficiency.
Patent Information
- Application Number
- CN202210508907.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-11
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2042-05-11
AI Technical Summary
In existing technologies, verification developers need to repeatedly code scoreboard components for different projects and modules, resulting in low development efficiency. Furthermore, the scoreboard quick implementation component of the UVM verification methodology only supports sequential comparisons and cannot meet the requirements of out-of-order comparisons.
The base class provided by UVM is modified to support out-of-order comparisons. A converter is used to transform the transaction data type of the input stimulus into the expected result of the predicted output. Out-of-order comparisons are implemented using dual queues and dual threads, providing a general scoreboard implementation architecture that supports both sequential and out-of-order comparison checks.
It improves the work efficiency of verification developers, simplifies the implementation process of out-of-order comparison, and enhances simulation efficiency, especially in simulation and verification scenarios of large and complex chips.
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Figure CN114896789B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of RTL design technology, and in particular to a rapid implementation method and system for a scoreboard that supports out-of-order comparisons. Background Technology
[0002] As per the instruction manual Figure 1 As shown, to verify the architecture of the scoreboard component in the environment, we usually need to write a reference model (predictor in the figure) to check the correctness of the RTL design (design under test, i.e., DUT) function. Then, we send the same stimulus to the reference model and the DUT. After each calculation, they are sent to the comparator (evaluator in the figure) for comparison. That is, we judge the correctness of the DUT function by comparing whether the calculation results are consistent.
[0003] To verify the correctness of chip functions, we typically use the aforementioned scoring board structure for checking. However, this approach has two main drawbacks:
[0004] The first drawback is the low development efficiency caused by repetitive coding.
[0005] Verification developers need to develop their own scoreboard components for different projects and modules to check chip functionality. A complex RTL design usually contains a large number of sub-modules. Writing scoreboard components for each of these sub-modules involves a lot of repetitive coding work, which reduces the development efficiency of the entire verification team and wastes the time and energy of verification developers.
[0006] The second drawback is that the scoreboard quick implementation component (uvm_algorithmic_comparator) provided by the UVM verification methodology has its limitations.
[0007] To address the aforementioned issues, the UVM validation methodology offers a rapid implementation of a scoreboard, implemented through the uvm_algorithmic_comparator class. This can effectively improve the development efficiency of validation developers. However, it only supports sequential comparison checks between the expected and actual results of the reference model computation. In reality, many projects require out-of-order comparisons, thus limiting its usability. Summary of the Invention
[0008] To address the shortcomings of existing technologies, this invention provides a rapid implementation method for a scoreboard that supports out-of-order comparisons. This solves the technical problems of repetitive coding work for verification developers and the inability to support out-of-order comparison checks. This invention proposes a general scoreboard implementation architecture to avoid repetitive coding work, thereby improving the work efficiency of verification developers. Based on the UVM verification methodology, it improves upon the existing method to support both sequential and out-of-order comparison checks, thus breaking through the original limitations in its use.
[0009] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a method for rapidly implementing a scoreboard that supports out-of-order comparisons, comprising the following processes:
[0010] S1. Modify the base class provided by UVM to support out-of-order comparison;
[0011] S2. The transformer uses the transform method to convert the input stimulus transaction data type into the expected result transaction data type of the predicted output.
[0012] S3. Quickly implement the scoreboard function in the verification environment component;
[0013] S4. Write the stimulus sequence, and then start the verification test of the scoreboard function in the test case.
[0014] Furthermore, the transform method includes outputting a one-bit vld valid bit signal to indicate whether the expected result of the current transformation prediction output will be written into the comparator m_before_fifo buffer for checking and comparison.
[0015] Furthermore, the method for modifying the base class provided by UVM in step S1 includes the following processes:
[0016] S11. Add the enumeration data type uvm_comparator_mode_enum to the global definition file uvm_object_globals of the UVM library class to set the working mode of the algorithm comparator;
[0017] The algorithm comparator operates in two modes by default: the sequential comparison mode of UVM_COMPARATOR_IN_ORDER and the out-of-order comparison mode of UVM_COMPARATOR_OUT_OF_ORDER.
[0018] S12. Add an interface method to uvm_algorithmic_comparator for users to configure the working mode of the algorithm comparator;
[0019] Rewrite the receive write method of the broadcast port, and write it into the corresponding buffer m_before_fifo based on whether the expected result of the predicted output of the transformer output transformation is valid;
[0020] S13. Add the interface methods for obtaining local member variables, namely the cached m_before_fifo and m_after_fifo, which are to be used by uvm_in_order_class_comparator, to uvm_in_order_class_comparator.
[0021] S14. Override the run_phase method of uvm_in_order_comparator in uvm_in_order_class_comparator;
[0022] S15. Write and implement the string conversion method convert2string and the comparison method do_compare in the transaction data type monitored from the output of the design under test (DUT).
[0023] Further, in step S11,
[0024] The out-of-order comparison mode UVM_COMPARATOR_OUT_OF_ORDER is implemented through an out-of-order comparison method, which includes the following procedures:
[0025] S111. Two parallel threads continuously retrieve the transaction data of the expected result of the predicted output and the transaction data of the actual DUT operation output signal from before_fifo and after_fifo.
[0026] S112. Then, perform a search and match in the search queue search_q. If the match is successful, it means that the comparison is successful. At this time, the matched transaction data is deleted from the search queue.
[0027] S113. If no match is found, the unmatched transaction data is written to the save queue save_q.
[0028] S114. Repeat the above process until both queues are completely matched.
[0029] S115. Check if both queues have been cleared. If so, the simulation passes; otherwise, the simulation fails.
[0030] Furthermore, in step S3, the rapid implementation of the scoreboard functionality in the verification environment component includes the following processes:
[0031] S31. Instantiate transformer and uvm_algorithmic_comparator in the verification environment component;
[0032] When instantiating uvm_algorithmic_comparator, pass the transformer as an input parameter.
[0033] S32. Connect the broadcast port of the monitor to the receiving port of uvm_algorithmic_comparator.
[0034] Furthermore, in step S32, the receiving ports of uvm_algorithmic_comparator are before_export for receiving transaction data from the DUT input port and after_export for receiving transaction data from the DUT output port.
[0035] This invention also provides a system for a rapid implementation method of the above-mentioned scoreboard supporting out-of-order comparisons, the technical solution of which is as follows:
[0036] A rapid implementation system for a scoreboard that supports out-of-order comparisons includes: a driver for driving input stimuli;
[0037] The design under test (DUT) is used to input the excitation output by the driver and perform calculations to output a result signal.
[0038] An input port monitor and an algorithm comparator are provided. The input port monitor is used to monitor the signals on the input ports of the design under test and encapsulate them into transaction data, and broadcast the transaction data to the algorithm comparator provided by UVM.
[0039] A converter is used to predict the expected output using the transform method and write the expected output to m_before_fifo for caching;
[0040] The output port monitor is used to monitor the signals on the output interface of the design under test and encapsulate them into transaction data. The transaction data is then broadcast to the algorithm comparator provided by UVM and directly written into m_after_fifo for caching.
[0041] An algorithm module that supports out-of-order lookup and comparison is used to continuously obtain transaction data from m_before_fifo and m_after_fifo, and to check and compare the expected result of the converter's predicted output with the output result signal of the design under test to determine the correctness of the design under test's operation function, and write it into the corresponding cache queue.
[0042] Furthermore, the algorithm comparator includes a receive port before_export for receiving transaction data from the DUT input port, and a receive port after_export for receiving transaction data from the DUT output port.
[0043] By employing the above technical solution, the present invention provides a rapid implementation method and system for a scoreboard that supports out-of-order comparisons, which has at least the following beneficial effects:
[0044] 1. This invention proposes a general scoreboard implementation architecture to avoid repetitive coding work, thereby improving the work efficiency of verification developers. Based on the UVM verification methodology, it improves upon the existing architecture to support both sequential and out-of-order comparison checks, thus breaking through the original limitations in its use.
[0045] 2. This invention proposes a random order comparison method that can compare random orders without matching random order tag IDs, making it simpler to implement. Moreover, this method uses dual queues and dual threads for implementation, resulting in higher search and comparison efficiency.
[0046] 3. This invention utilizes the polymorphism of classes, and the proposed method is compatible with the UVM methodology. It provides a configuration interface for the comparator's working mode, which can be flexibly configured according to the actual project situation to quickly realize the sequential or out-of-order checking and comparison of the scoreboard.
[0047] 4. The method proposed in this invention can check and compare only valid output transaction data, which can greatly reduce invalid transaction data in the verification environment, improve simulation efficiency, and is particularly helpful for simulation verification scenarios of large and complex chips. Attached Figure Description
[0048] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0049] Figure 1 This is a block diagram illustrating the structural composition principle of the scoreboard in the prior art proposed in this invention;
[0050] Figure 2 This is a flowchart illustrating the steps of a fast implementation method for a scoreboard that supports out-of-order comparisons proposed in this invention.
[0051] Figure 3 This is a flowchart illustrating the steps of the method for modifying the base class provided by UVM as proposed in this invention.
[0052] Figure 4This is a flowchart of the steps of the out-of-order comparison method proposed in this invention;
[0053] Figure 5 This is a flowchart illustrating the principle of the out-of-order comparison method proposed in this invention.
[0054] Figure 6 This is a flowchart illustrating the steps for rapidly implementing a scoreboard function in a verification environment component, as proposed in this invention.
[0055] Figure 7 This is a block diagram illustrating the principle of a rapid implementation system for a scoreboard that supports out-of-order comparisons, as proposed in this invention.
[0056] Figures 8 to 27 This is a schematic diagram of the code involved in the fast implementation method of the scoreboard supporting out-of-order comparison proposed in this invention.
[0057] In the diagram: 100, driver; 200, design under test; 300, input port monitor; 400, algorithm comparator; 500, converter; 600, output port monitor; 700, algorithm module supporting out-of-order lookup and comparison. Detailed Implementation
[0058] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. This will allow for a full understanding of how the present application uses technical means to solve technical problems and achieve technical effects, and to facilitate its implementation.
[0059] Those skilled in the art will understand that all or part of the steps in the methods of the above embodiments can be implemented by a program instructing related hardware. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0060] Please refer to Figures 1-27 This illustrates a specific implementation of this embodiment, the details of which are as follows:
[0061] Please refer to Figure 2 A fast implementation method for a scoreboard that supports out-of-order comparisons includes the following steps:
[0062] S1. Modify the base class provided by UVM to support out-of-order comparison;
[0063] S2. The transformer uses the transform method to convert the transactional data type of the input stimulus into the transactional data type of the expected result of the predicted output. The transform method includes outputting a one-bit vld valid bit signal to indicate whether the expected result of this conversion prediction output will be written to the comparator m_before_fifo buffer for checking and comparison. Figure 8 The code involved in this step is shown below.
[0064] S3. Quickly implement the scoreboard function in the verification environment component;
[0065] S4. Write the stimulus sequence, and then start the verification test of the scoreboard function in the test case, such as... Figure 9 and Figure 10 The code involved in this step is shown below.
[0066] Wait for the simulation to finish, and you will eventually see that the simulation has passed.
[0067] Please refer to Figure 3 and Figure 5 In step S1, the method for modifying the base class provided by UVM includes the following procedures:
[0068] S11. Add the enumeration data type uvm_comparator_mode_enum to the global definition file uvm_object_globals of the UVM library class to set the working mode of the algorithm comparator;
[0069] The algorithm comparator operates in two modes: the default sequential comparison mode (UVM_COMPARATOR_IN_ORDER) and the out-of-order comparison mode (UVM_COMPARATOR_OUT_OF_ORDER). The code involved in this step is as follows:
[0070] / / uvm_object_globals.svh
[0071] typedefenumbit{UVM_COMPARATOR_IN_ORDER=0,UVM_COMPARATOR_OUT_OF_ORDER=1}
[0072] uvm_comparator_mode_enum;
[0073] S12. Add an interface method to the algorithm comparator uvm_algorithmic_comparator for users to configure the working mode of the algorithm comparator;
[0074] The `write` method of the broadcast port is rewritten, and the expected result of the predicted output of the transformer is written to the corresponding buffer `m_before_fifo` based on whether it is valid. This reduces the overall amount of valid transaction data in the verification environment and improves simulation efficiency. Figure 11 The code involved in this step is shown below.
[0075] S13. Add the interface methods for retrieving local member variables, namely the cached `m_before_fifo` and `m_after_fifo`, to the sequential comparator `uvm_in_order_comparator`, which are to be used by the parent class `uvm_in_order_class_comparator`. Figure 12 The code involved in this step is shown below.
[0076] S14. In the parent class uvm_in_order_class_comparator, the run_phase method of its subclass uvm_in_order_comparator is overridden, taking advantage of the polymorphism of classes.
[0077] This enables support for out-of-order comparison while maintaining compatibility with previous sequential comparison functions, which can be achieved by configuring the comparator's operating mode.
[0078] In fact, sequential comparison is a special case of out-of-order comparison. Therefore, when the algorithm comparator is configured to out-of-order comparison mode UVM_COMPARATOR_OUT_OF_ORDER, it supports both sequential and out-of-order comparison.
[0079] Here, we use the search_compare method to achieve fast out-of-order comparison, which will not be elaborated on further.
[0080] In addition, the cached queue is checked using UVM's phase mechanism during the check_phase phase, which is near the end of the simulation. This is achieved through assertions, such as... Figure 13 and Figure 14 The code involved in this step is shown below.
[0081] S15. In the transaction data type monitored from the output of the Design Under Test (DUT), write and implement the string conversion method `convert2string` and the comparison method `do_compare`, so that they can be used in the algorithm module `search_compare`, which supports out-of-order search and comparison. Figure 15 The code involved in this step is shown below.
[0082] Please refer to Figure 6 In step S3, the rapid implementation of the scoreboard function in the verification environment component includes the following processes:
[0083] S31. Instantiate the transformer and the uvm_algorithmic_comparator in the verification environment component;
[0084] When instantiating the algorithm comparator uvm_algorithmic_comparator, the transformer is passed in as an input parameter.
[0085] S32. Connect the broadcast port of the monitor to the receiving port of the algorithm comparator uvm_algorithmic_comparator.
[0086] The `uvm_algorithmic_comparator`'s `before_export` port receives transaction data from the DUT's input port, and its `after_export` port receives transaction data from the DUT's output port. Figure 16 The code involved in this step is shown below.
[0087] In step S11, the out-of-order comparison mode UVM_COMPARATOR_OUT_OF_ORDER is implemented using the out-of-order comparison method. Please refer to [link / reference]. Figure 4 and Figure 5 The out-of-order comparison method includes the following steps:
[0088] S111. Two parallel threads continuously retrieve transaction data of the expected result of the predicted output and transaction data of the actual DUT operation output signal from before_fifo and after_fifo. Here, before_fifo and after_fifo are m_before_fifo and m_after_fifo in the fast implementation system of the scoreboard that supports out-of-order comparison.
[0089] S112. Then, a search and match is performed in the search queue search_q. If a match is found, the comparison is successful. Figure 5 In the `search_q.match` step, the matched transaction data is deleted from the search queue. Figure 5 The `search_q.delete(t)` step in the code;
[0090] S113. If no match is found, the unmatched transaction data is written to the save queue save_q, i.e. Figure 5 The `save_q.push_back(t)` step is used for matching subsequent transaction data;
[0091] S114. Repeat the above process until both queues on both sides are completely matched, i.e. Figure 5 The process of repeated steps.
[0092] S115. Check if both queues have been cleared. If so, the simulation passes; otherwise, the simulation fails.
[0093] To better understand the methods proposed in the embodiments, the example design under test (DUT) and the code of other components in the verification environment are also attached here for reference.
[0094] Please refer to the sample code for the design under test. Figure 17 .
[0095] Please refer to the sample code for the verification component. Figures 18-27 .
[0096] Please refer to Figure 7 The present invention also provides a system for a fast implementation method of the above-mentioned scoreboard supporting out-of-order comparison, the specific implementation of which is as follows:
[0097] exist Figure 7 In this context, 100 represents the driver; 200 represents the design under test (DUT); and 300 represents the input port monitor.
[0098] 400. The algorithm comparator is (uvm_algorithmic_comparator); 500. The transformer is (transformer); 600. The output port monitor is (out_monitor); 700. The algorithm module that supports out-of-order search and comparison is (search_compare).
[0099] A rapid implementation system for a scoreboard supporting out-of-order comparison includes: a driver 100 for driving input stimuli; a design under test (DUT) 200 for inputting the stimuli output by the driver 100 and performing calculations to output a result signal; an input port monitor 300 for monitoring signals on the input ports of the DUT 200 and encapsulating them into transaction data, and broadcasting the transaction data to an algorithm comparator 400 provided by UVM; and a converter 500 for predicting the expected output result using the transform method and writing the predicted expected output result into m_before_fifo for buffering.
[0100] The output port monitor 600 monitors the signals on the output interface of the design under test 200 and encapsulates them into transaction data. After broadcasting the transaction data to the algorithm comparator 400 provided by UVM, it directly writes it into m_after_fifo for caching. The algorithm module 700, which supports out-of-order lookup and comparison, continuously retrieves transaction data from m_before_fifo and m_after_fifo, and performs checks and comparisons on the expected result of the converter 500's predicted output and the output result signal of the design under test 200 to determine the correctness of the design under test 200's operation function, and writes it into the corresponding cache queue.
[0101] The algorithm comparator 400 includes a receive port before_export for receiving transaction data from the DUT input port, and a receive port after_export for receiving transaction data from the DUT output port.
[0102] In the verification environment, the scoreboard components are basically the same except for the method of calculating the expected value. Therefore, a general structure can be used to reduce repetitive coding work and improve the efficiency of verification developers.
[0103] UVM provides an algorithmic comparator class, uvm_algorithmic_comparator, for fast scoreboard implementation. This class, uvm_algorithmic_comparator, is a parameterized class that accepts three parameters:
[0104] (1) BEFORE: The transaction data of the input port of the design under test (DUT) monitored by the monitor, which needs to be predicted and converted into the expected result of the output port transaction type.
[0105] (2) AFTER: The transaction data of the output port of the design under test detected by the monitor, that is, the transaction data type after conversion. The string conversion method convert2string and the comparison interface method do_compare need to be written in the transaction data type for the comparator to call for checking, comparison and printing operations.
[0106] (3)TRANSFORMER: A UVM component containing a method called transform for calculating the desired result based on the input stimulus.
[0107] The comparator described above receives transaction data from the DUT's input and output terminals via a TLM (Transaction-Level Modeling) communication port. The DUT input transaction data is then used as input parameters to the converter to calculate the expected result, which is stored in `m_before_fifo`. The DUT output transaction data is then stored in `m_after_fifo`. Finally, in the run phase, the outputs are retrieved from both buffered FIFOs and compared.
[0108] However, the above method only supports sequential comparison. If out-of-order comparison is required, the input and output transaction data need to be retrieved from the two FIFOs respectively, and then the algorithm that supports out-of-order search and comparison (search_compare) should be called to check and compare the expected result of the converter component's predicted output and the actual output result of the DUT.
[0109] The principle diagram of the algorithm (search_compare) that supports out-of-order search and comparison is shown in Figure 5:
[0110] Two parallel threads continuously retrieve the transaction data of the expected result and the actual DUT operation output from the two FIFOs. Then, they search and match the data in the lookup queue. If a match is successful, the comparison is considered successful, and the matched transaction data is deleted from the lookup queue. If no match is found, the unmatched transaction data is written to the save queue for subsequent transaction data to match. This process is repeated until both queues are fully matched. Finally, it is checked whether both queues have been cleared. If they are, the simulation succeeds; otherwise, the simulation fails.
[0111] This invention proposes a general scoreboard implementation architecture to avoid repetitive coding work, thereby improving the work efficiency of verification developers. Based on the UVM verification methodology, it improves upon the existing architecture to support both sequential and out-of-order comparison checks, thus breaking through the original limitations in its use.
[0112] This invention proposes a method for comparing out-of-order data, which can achieve the comparison of out-of-order data without matching out-of-order tag IDs, making it simpler to implement. Moreover, this method uses dual queues and dual threads for implementation, resulting in higher search and comparison efficiency.
[0113] The above embodiments provide a detailed description of the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A fast implementation method for a scoreboard supporting out-of-order comparisons, characterized in that, Includes the following processes: S1. Modify the base class provided by UVM to support out-of-order comparisons, including the following process: S11. Add the enumeration data type uvm_comparator_mode_enum to the global definition file uvm_object_globals of the UVM library class to set the working mode of the algorithm comparator; The algorithm comparator operates in two modes by default: the sequential comparison mode of UVM_COMPARATOR_IN_ORDER and the out-of-order comparison mode of UVM_COMPARATOR_OUT_OF_ORDER. The out-of-order comparison mode of UVM_COMPARATOR_OUT_OF_ORDER is implemented through an out-of-order comparison method, which includes the following steps: S111. Two parallel threads continuously retrieve the transaction data of the expected result of the predicted output and the transaction data of the actual DUT operation output signal from before_fifo and after_fifo. S112. Then, perform a search and match in the search queue search_q. If the match is successful, it means that the comparison is successful. At this time, the matched transaction data is deleted from the search queue. S113. If no match is found, the unmatched transaction data is written to the save queue save_q. S114. Repeat the above process until both queues are completely matched. S115. Check if both queues have been cleared. If so, the simulation passes; otherwise, the simulation fails. S12. Add an interface method to uvm_algorithmic_comparator for users to configure the working mode of the algorithm comparator; Rewrite the receive write method of the broadcast port, and write it into the corresponding buffer m_before_fifo based on whether the expected result of the predicted output of the transformer output transformation is valid; S13. Add the interface methods for obtaining local member variables, namely the cached m_before_fifo and m_after_fifo, which are to be used by uvm_in_order_class_comparator, to uvm_in_order_class_comparator. S14. Override the run_phase method of uvm_in_order_comparator in uvm_in_order_class_comparator; S15. Write and implement the string conversion method convert2string and the comparison method do_compare in the transaction data type monitored from the output of the design under test (DUT). S2. The transformer uses the transform method to convert the input stimulus transaction data type into the expected result transaction data type of the predicted output. S3. Quickly implement scoreboard functionality in the verification environment components. Includes the following processes: S31. Instantiate transformer and uvm_algorithmic_comparator in the verification environment component; When instantiating uvm_algorithmic_comparator, pass the transformer as an input parameter; S32. Connect the broadcast port of the monitor to the receiving port of uvm_algorithmic_comparator; S4. Write the stimulus sequence, and then start the verification test of the scoreboard function in the test case.
2. The fast implementation method of the scoreboard supporting out-of-order comparison according to claim 1, characterized in that: The transform method includes outputting a one-bit vld valid bit signal to indicate whether the expected result of the current transformation prediction output will be written into the comparator m_before_fifo buffer for checking and comparison.
3. The method for fast implementation of a scoreboard supporting out-of-order comparison according to claim 1, characterized in that: In step S32, the receiving ports of uvm_algorithmic_comparator are before_export for receiving transaction data from the DUT input port and after_export for receiving transaction data from the DUT output port.
4. A system for rapidly implementing a scoreboard supporting out-of-order comparisons, used to implement the method for rapidly implementing a scoreboard supporting out-of-order comparisons as described in any one of claims 1-3, characterized in that, include: A driver (100) for driving input stimuli; The design under test (200) is used to input the excitation output by the driver (100) and perform calculations to output the result signal; An input port monitor (300) and an algorithm comparator (400) are provided. The input port monitor (300) is used to monitor the signals on the input ports of the design under test (200) and encapsulate them into transaction data, and broadcast the transaction data to the algorithm comparator (400) provided by UVM. A converter (500) is used to predict the expected result of the output through the transform method and write the expected result of the predicted output into m_before_fifo for caching; Output port monitor (600), the output port monitor (600) is used to monitor the signals on the output interface of the design under test (200) and encapsulate them into transaction data, and broadcast the transaction data to the algorithm comparator (400) provided by UVM and then directly write it into m_after_fifo for caching; An algorithm module (700) that supports out-of-order lookup and comparison is used to continuously obtain transaction data from m_before_fifo and m_after_fifo, and to check and compare the expected result of the converter (500) prediction output with the output result signal of the design under test (200) to determine the correctness of the operation function of the design under test (200), and write it into the corresponding cache queue.
5. The system for rapid implementation of a scoreboard supporting out-of-order comparison according to claim 4, characterized in that: The algorithm comparator (400) includes a receive port before_export for receiving transaction data from the DUT input port, and a receive port after_export for receiving transaction data from the DUT output port.
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