A terminal structure of a high voltage transistor and a manufacturing method thereof

By designing a composite termination structure of a dense base ring and a field plate at the edge of the main junction of the base region of a high-voltage NPN transistor, the problems of unstable withstand voltage and increased leakage current in high-voltage NPN transistors are solved, thereby improving withstand voltage and stability.

CN114899222BActive Publication Date: 2026-07-24XIAN MICROELECTRONICS TECH INST
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
XIAN MICROELECTRONICS TECH INST
Filing Date
2022-06-20
Publication Date
2026-07-24

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Abstract

The application discloses a terminal structure of a high-voltage transistor and a manufacturing method thereof. The terminal structure comprises a substrate, an epitaxial layer arranged on the upper surface of the substrate, a base region formed by ion implantation after photoetching on the epitaxial layer, a concentrated base ring formed by ion implantation after photoetching on the base region, an emitter region formed by ion implantation after photoetching on the base region, a base and an emitter formed by depositing metal on the base region and the emitter region, a field plate structure formed by arranging a metal field plate on the edge of the base region, a composite terminal structure formed by the concentrated base ring and the field plate structure, and a collector arranged on the lower surface of the substrate. Compared with a conventional transistor structure, the device withstand voltage can be significantly improved and the reverse leakage current of the device can be reduced. The field plate mainly changes the surface potential distribution of the transistor, increases the curvature radius of the curved surface junction, suppresses the concentration of the surface electric field, and thus improves the breakdown voltage of the device.
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Description

Technical Field

[0001] This invention belongs to the field of chip manufacturing technology, specifically to a terminal structure of a high-voltage transistor and its manufacturing method. Background Technology

[0002] NPN transistors are among the most important devices in electronic circuits, with their primary functions being current amplification and switching. The breakdown voltage of an NPN transistor is a crucial electrical parameter characterizing its performance, determining its application environment. The breakdown voltage of mainstream NPN transistors typically ranges from tens of V to around 300 V. This composite termination structure is primarily used in an NPN transistor requiring a breakdown voltage exceeding 400 V; similarly, this composite termination structure can also be applied to conventional NPN transistors, improving their performance.

[0003] The main termination structure technologies for improving transistor breakdown voltage include field plate technology, grooving technology, and field ring technology. Each of these technologies has its own characteristics. Among them, field ring technology can be implemented using conventional processes, is simple to manufacture, and effectively improves breakdown voltage, making it a commonly used and effective method. However, when conventional field plate structures are applied to ultra-high voltage NPN transistors, although they improve the transistor's breakdown voltage, they also lead to increased leakage current and unstable breakdown voltage. Summary of the Invention

[0004] To address the problems existing in the prior art, this invention provides a terminal structure for a high-voltage transistor and its manufacturing method, which improves the chip's voltage withstand capability, enhances chip stability, and reduces leakage current.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] A termination structure for a high-voltage transistor, comprising a substrate;

[0007] An epitaxial layer is disposed on the upper surface of the substrate; after photolithography, ion implantation is performed on the epitaxial layer to form a base region; after photolithography, ion implantation is performed on the base region to form a dense base ring; after photolithography, ion implantation is performed on the base region to form an emitter region.

[0008] Metals are deposited in the base region and emitter region to form the base and emitter, respectively. A metal field plate is set at the edge of the base region to form a field plate structure. The concentrated base region ring and the field plate structure form a composite terminal structure.

[0009] A collector electrode is disposed on the lower surface of the substrate.

[0010] Preferably, the expansion depth of the concentrated base region ring is 1 to 2 μm.

[0011] Preferably, the width of the overlap between the concentrated base region ring and the base region ranges from 10 to 30 μm.

[0012] Preferably, the coverage range of the concentrated base region ring on the edge of the base region is 20–40 μm.

[0013] Preferably, the junction depth of the concentrated base region ring is 0.5–1.5 μm.

[0014] Preferably, the field plate structure has a coverage range of 20–70 μm in the concentrated matrix region ring.

[0015] A method for fabricating a termination structure of a high-voltage transistor includes the following steps:

[0016] The base region is photolithographically etched on the epitaxial layer on the substrate, and the base region is formed by ion implantation. Then, the dense base ring region is photolithographically etched, and the dense base ring region is formed by ion implantation.

[0017] The emitter region is photolithographically formed in the base region, and the emitter region is formed by ion implantation.

[0018] The base ohmic hole and the emitter ohmic hole are formed in the base region and the emitter region respectively by photolithography. Then, metal is deposited on the front side and then the metal is photolithographically lithographically made to form ohmic contact between the metal and the base ohmic hole and the emitter ohmic hole, forming the base and the emitter respectively. A metal field plate and a dense base ring are formed at the edge of the base region to form a composite terminal structure.

[0019] Metallization is performed on the back side of the substrate to form a collector electrode.

[0020] Preferably, the expansion depth of the base region ranges from 4 to 8 μm.

[0021] Preferably, the expansion depth of the concentrated base region ring is in the range of 1–2 μm.

[0022] Preferably, the expansion depth of the emission region is in the range of 2 to 4 μm.

[0023] Compared with the prior art, the present invention has the following beneficial technical effects:

[0024] This invention provides a termination structure for a high-voltage transistor. Compared to conventional transistor structures, this termination structure significantly improves the device's breakdown voltage and reduces its reverse leakage current. The field plate primarily alters the potential distribution on the transistor surface, increasing the radius of curvature of its curved junction and suppressing surface electric field concentration, thereby increasing the device's breakdown voltage. Furthermore, the use of a dense base ring increases the radius of curvature at the base region's main junction while reducing the side junction capacitance, suppressing electric field concentration at the curved junction. This reduces leakage current at the curved junction, lowers reverse leakage current, and improves device stability.

[0025] The composite structure of this invention combines the advantages of a dense-base ring structure and a field-plate structure. The dense-base ring significantly reduces junction leakage current and improves chip stability, while the field-plate structure significantly improves junction withstand voltage, meeting product withstand voltage design requirements. Furthermore, the structure is simple and easy to implement, making it suitable for practical product design and manufacturing. It significantly improves withstand voltage without increasing leakage current. Simultaneously, it reduces reverse leakage current and enhances chip stability. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the terminal structure of the high-voltage NPN transistor described in this invention. Detailed Implementation

[0027] The present invention will be further described in detail below with reference to specific embodiments. These descriptions are for explanation purposes only and are not intended to limit the scope of the invention.

[0028] This invention relates to a terminal structure for a high-voltage transistor. Based on a conventional transistor structure, a dense base ring structure is designed at the edge of the base region main junction to locally enrich the base region. A field plate structure is designed at the edge of the enriched base region main junction, thus forming a composite terminal structure with both a dense base ring structure and a field plate structure at the edge of the base region main junction.

[0029] The present invention discloses a high-voltage transistor termination structure, comprising a substrate; an epitaxial layer disposed on the upper surface of the substrate; a base region formed by photolithography followed by ion implantation on the epitaxial layer; a dense base region ring formed by photolithography followed by ion implantation on the base region; an emitter region formed by photolithography followed by ion implantation on the base region; metal deposition in the base region and the emitter region to form the base and emitter, respectively; a metal field plate disposed at the edge of the base region to form a field plate structure; the dense base region ring and the field plate structure forming a composite termination structure; and a collector electrode disposed on the lower surface of the substrate.

[0030] By employing this high-voltage NPN transistor termination structure design, the breakdown voltage of the device can be significantly improved and the reverse leakage current reduced compared to conventional transistor structures. The field plate primarily increases the radius of curvature of the curved junction by altering the potential distribution on the transistor surface, suppressing the concentration of the surface electric field and thus improving the device's breakdown voltage. Furthermore, the use of the P+ dense base ring increases the radius of curvature at the P+ base region main junction while reducing the side junction capacitance of the P+ base region main junction, suppressing the electric field concentration at the curved junction. This reduces leakage current at the curved junction, lowers the reverse leakage current, and improves device stability.

[0031] Compared to chips designed with this high-voltage NPN transistor termination structure, chips using this high-voltage NPN transistor termination structure can improve chip voltage withstand capability, enhance chip stability, and reduce reverse leakage current.

[0032] Example

[0033] like Figure 1 As shown, this embodiment uses a silicon wafer with an N+ substrate and N-epitaxial material as an example. In the figure, B represents the base; E represents the emitter; and C represents the collector. The main process implementation of this design is as follows:

[0034] First, the base region is photolithographically etched on an N+ substrate and an N-epitaxial silicon wafer. Then, a P+ base region is formed through boron implantation and boron annealing, with an expansion depth of 4–8 μm. Next, a dense base ring region is photolithographically etched, and a P+ dense base ring is formed through boron implantation and boron annealing, with an expansion depth of 1–2 μm. The overlap width between the dense base ring and the base region is 10–30 μm, the coverage of the dense base ring over the base region edge is 20–40 μm, and the junction depth of the dense base ring is 0.5–1.5 μm.

[0035] The emitter region is then photolithographically formed in the base expansion region, and the N+ emitter region is formed by phosphorus implantation and phosphorus annealing. The expansion depth of the N+ emitter region is 2-4 μm.

[0036] Base ohmic holes and emitter ohmic holes are formed in the base and emitter regions respectively using photolithography. Metal is then deposited on the front side, and photolithography of the metal and alloy is used to create ohmic contacts between the metal and the base and emitter ohmic holes, forming the base and emitter of the NPN transistor. Simultaneously, a metal field plate and a dense base ring constitute the composite termination structure of this high-voltage NPN transistor. The field plate structure is designed based on the dense base ring, with a coverage of 20–70 μm for the dense base ring. Finally, metallization is performed on the back side of the silicon wafer; the back side of the chip is the collector of the NPN transistor. Figure 1 As shown.

[0037] The above-mentioned composite termination structure design of high-voltage NPN transistors was applied to the actual NPN transistor chip fabrication, and the design and structure were verified through the tape-out of actual products.

[0038] The specific implementation steps are as follows: The composite termination structure design of the aforementioned high-voltage NPN transistor is applied to the layout design of the NPN transistor, followed by tape-out on the semiconductor chip production line; three schemes are used for tape-out: Scheme 1 is a conventional NPN transistor structure, Scheme 2 is an NPN transistor using a conventional field plate structure, and Scheme 3 is a chip using the composite termination structure design of this high-voltage NPN transistor, such as... Figure 1 The three methods were compared and fabricated. After fabrication, the resulting silicon wafers were tested before being shipped. The silicon wafers were tested using a five-point method, which randomly selected one die from each of the top, middle, bottom, left, and right sides of the silicon wafer for parameter testing.

[0039] Table 1 Comparison of NPN transistor fabrication results for the three schemes

[0040]

[0041] After comparing and testing chips using three different structural designs, the one using... Figure 1 The high-voltage NPN transistor structure shown in the diagram significantly improves the withstand voltage compared to the conventional NPN transistor structure shown in Scheme 1, without increasing leakage current. Compared to the chip shown in Scheme 2, it significantly improves the withstand voltage while reducing reverse leakage current and enhancing chip stability.

Claims

1. A termination structure for a high-voltage transistor, characterized in that, Including substrate; An epitaxial layer is disposed on the upper surface of the substrate; after photolithography, ion implantation is performed on the epitaxial layer to form a base region; after photolithography, ion implantation is performed on the base region to form a dense base region ring; after photolithography, ion implantation is performed on the base region to form an emitter region; the dense base region ring is a P+ region located outside the base region and partially overlapping with it; Metals are deposited in the base region and emitter region to form the base and emitter, respectively. A metal field plate is set at the edge of the base region to form a field plate structure. The concentrated base region ring and the metal field plate structure form a composite terminal structure. The metal field plate is a structure located above and partially covering the concentrated base region ring; A collector electrode is disposed on the lower surface of the substrate.

2. The termination structure of a high-voltage transistor according to claim 1, characterized in that, The expansion depth of the concentrated base region ring is 1–2 μm.

3. The termination structure of a high-voltage transistor according to claim 1, characterized in that, The width of the overlap between the concentrated base region ring and the base region ranges from 10 to 30 μm.

4. The termination structure of a high-voltage transistor according to claim 1, characterized in that, The coverage range of the concentrated base region ring on the edge of the base region is 20–40 μm.

5. The termination structure of a high-voltage transistor according to claim 1, characterized in that, The field plate structure has a coverage range of 20–70 μm in the concentrated matrix region ring.

6. A method for fabricating a termination structure of a high-voltage transistor, characterized in that, Includes the following processes, The base region is photolithographically etched on the epitaxial layer on the substrate, and the base region is formed by ion implantation. Then, the dense base ring region is photolithographically etched, and the dense base ring region is formed by ion implantation. The emitter region is photolithographically formed in the base region, and the emitter region is formed by ion implantation. The base ohmic hole and the emitter ohmic hole are formed in the base region and the emitter region respectively by photolithography. Then, metal is deposited on the front side and then the metal is photolithographically lithographically made to form ohmic contact between the metal and the base ohmic hole and the emitter ohmic hole, forming the base and the emitter respectively. A metal field plate and a dense base ring are formed at the edge of the base region to form a composite terminal structure. Metallization is performed on the back side of the substrate to form a collector electrode.

7. The method for fabricating a high-voltage transistor termination structure according to claim 6, characterized in that, The base region has an expansion depth ranging from 4 to 8 μm.

8. A method for fabricating a high-voltage transistor termination structure according to claim 6, characterized in that, The expansion depth of the concentrated base ring ranges from 1 to 2 μm.

9. A method for fabricating a high-voltage transistor termination structure according to claim 6, characterized in that, The depth of the launch zone ranges from 2 to 4 μm.