A Fault Analysis and Short-Circuit Current Suppression Method for Hybrid DC Networks

Abstract

The present invention relates to a fault analysis and short-circuit current suppression method for a hybrid DC network, including: using Laplace transform theory to analyze and obtain simple expressions for short-circuit currents on both sides during DC line faults; considering the linearization of the firing angle line on the LCC side and using the least squares method to fit an accurate expression for the short-circuit current on the LCC side; considering the component of AC current fed into the DC side and using a PI controller model to deduce the AC component fed into the DC side to obtain an accurate expression for the short-circuit current on the VSC side; obtaining expressions for short-circuit currents on both sides during DC line faults considering the grounding resistance; and limiting the short-circuit current by restricting the firing angle output on the LCC side and reducing the proportionality coefficient of the inner-loop PI controller on the VSC side.

Description

Technical Field

[0001] The invention belongs to the field of direct current power grid protection and control, and relates to a fault analysis and short-circuit current suppression method for a hybrid direct current network. Background Art

[0002] The high-voltage direct current transmission (LCC-HVDC) technology based on linear converters has been widely used in traditional HVDC transmission projects due to its advantages in long-distance and large-capacity transmission. However, the operation of the LCC-HVDC system has disadvantages such as dependence on grid phase change, consumption of more reactive power, and the need for a certain strength of AC grid support. The high-voltage direct current transmission (VSC-HVDC) technology based on voltage source converters does not rely on AC system phase change and can independently control active and reactive power. Based on this, more and more VSC-HVDC will be fed into the load center, gradually forming a hybrid transmission mode of LCC-HVDC and VSC-HVDC. When two different types of high-voltage direct current transmission systems form the same transmission network, they will exhibit fault characteristics different from those of a single-feed high-voltage direct current transmission system. Therefore, studying the fault characteristics of hybrid multi-terminal DC transmission systems and proposing corresponding DC side fault clearing measures, especially solving the analytical expressions of the fault currents on the LCC side and the VSC side when a DC side fault occurs, and proposing corresponding methods to suppress short-circuit current, have important theoretical and engineering significance for the research on hybrid multi-terminal DC transmission systems.

[0003] In order to study the fault characteristics of traditional LCC-HVDC networks, researchers have proposed a variety of methods to solve this problem. For example, some researchers use the state space method to analyze the time domain expression of short-circuit current when the DC side of the LCC-HVDC network is faulty; some researchers use the phase model conversion theory to analyze the fault characteristics of the DC side of the double-circuit LCC-HVDC network; some researchers use a simple time domain calculation method to analyze the fault current expression when the DC side is short-circuited. However, none of the above methods considers in detail the impact of the nonlinear change of the trigger angle on the fault current when the fault occurs. Similarly, researchers have also done some detailed work on the fault characteristics of the VSC-HVDC network. For example, some researchers use the Laplace transform theory to construct an equivalent model of a multi-terminal high-voltage direct current transmission network, and solve the high-frequency component of the DC side fault current and its transient average value, and then analyze the DC side fault current characteristics; some researchers use the capacitor charging and discharging theory to analyze the fault current caused by the discharge of the capacitor on the VSC side when the DC side faults. However, the above references do not consider the impact of the AC current on the VSC side fed into the DC side. Referring to the results of the above fault characteristic analysis, this patent fully considers the linearization process of the trigger angle on the LCC side and the input of the AC current on the VSC side, and proposes a DC fault transient analysis method suitable for hybrid multi-terminal transmission networks.

[0004] In addition to fault analysis, DC side fault removal technology has always been one of the research hotspots. For example, some researchers have proposed an enhanced control strategy suitable for MMC-HVDC systems, that is, introducing the variable γ into the energy equation of the upper and lower bridge arms of the MMC converter station to balance the power during asymmetric DC faults, thereby achieving short-circuit current control; some researchers have proposed an enhanced independent pole control strategy, which mainly eliminates the fault current during asymmetric DC faults by controlling the DC modulation ratio and the AC modulation ratio; some researchers have proposed a current limiting control strategy, which removes all half-bridge MMC sub-modules after a fault occurs, has a better current limiting effect, and does not require any additional equipment; some researchers have proposed that when a DC fault occurs, the DC voltage on the MMC side is controlled to zero, so that the DC fault current can be quickly cleared. Referring to the above-mentioned fault DC side fault removal technology and making full use of the above-mentioned fault transient analysis method, this patent proposes a DC side fault current suppression measure by suppressing the trigger angle on the LCC side and reducing the proportional coefficient of the inner loop PI controller on the VSC side. Summary of the invention

[0005] The purpose of the present invention is to propose a fault analysis and short-circuit current suppression method for a hybrid DC network. The present invention fully considers the linearization process of the trigger angle on the LCC side and the input of the AC current on the VSC side, obtains an accurate analytical expression of the fault transient current on both sides, and then proposes a corresponding DC side fault current suppression method based on this expression. The technical solution of the present invention is as follows:

[0006] A fault analysis and short-circuit current suppression method suitable for hybrid DC networks mainly includes the following aspects:

[0007] S1: Using Laplace transform theory, we can derive a simple expression for the short-circuit current on both sides of a DC line fault:

[0008]

[0009] Where: I dc1 (t) is the short-circuit current on the LCC side after the fault, I dc2 (t) is the short-circuit current on the VSC side after the fault, E d ' is the equivalent internal electromotive force of the converter station on the LCC side after the fault, u 0 is the voltage at the fault point, u dc ' is the DC voltage output by the VSC side after the fault, I dc0 is the initial value of the DC current, R 10 and R 20 are the equivalent resistances at both ends of the DC line, L 10 and L 20are the equivalent inductances at both ends of the DC line, and T 1 =L 10 / R 10 and T 2 =L 20 / R 20 ;

[0010] S2: Considering the individuality of the trigger angle on the LCC side, the least squares method is used to fit the precise expression of the short-circuit current on the LCC side, as shown below:

[0011]

[0012] Where: U is the effective value of the three-phase voltage of the AC grid on the LCC side, α is the trigger angle after the fault, and α 0 is the initial value of the trigger angle, k t is the transformation ratio of the converter transformer on the LCC side. The coefficient k fitted by the least squares method has the following relationship:

[0013]

[0014] S3: Consider the component of the AC current fed into the DC side, and use the PI controller model to derive the AC component fed into the DC side, and obtain the precise expression of the short-circuit current on the VSC side, as shown below:

[0015]

[0016] Where: R L and L L is the resistance and inductance of the inverter station outlet line, u dcN is the rated value of DC voltage, k p is the proportional coefficient of the PI controller, m d0 is the initial value of the modulation ratio, Δu dc is the difference of DC voltage before and after the inverter fault, T 3 =L L / (R L +k p );

[0017] S4: The short-circuit current expression on both sides of the DC line when the grounding resistance is considered:

[0018]

[0019] Where: T 1 '、T 2 '、R f1 and R f2 There is the following relationship,

[0020]

[0021] Where: R f is the grounding resistance;

[0022] S5: The short-circuit current is limited by limiting the trigger angle of the LCC side output and reducing the proportional coefficient of the inner loop PI controller on the VSC side.

[0023] In order to adapt to the development of hybrid multi-terminal DC power grid projects and the transformation of traditional DC transmission projects, the present invention proposes a fault analysis and short-circuit current suppression method for hybrid DC networks. The positive effects that the present invention can produce are: first, in terms of reference value, the DC side fault transient characteristic analysis proposed in the present invention can provide a certain theoretical reference for the DC protection principle of hybrid multi-terminal DC transmission projects; secondly, in terms of engineering application, the DC side fault current suppression method proposed in the present invention is simple and easy to implement. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 System model and equivalent circuit for three-terminal hybrid transmission network;

[0025] Figure 2 is the equivalent circuit;

[0026] Figure 3 is the equivalent Laplace transform circuit;

[0027] Figure 4 Compare the simulation value and calculated value of the simplified short-circuit current expression;

[0028] Figure 5 Compare the simulated and calculated values ​​for the precise short-circuit current expression;

[0029] Figure 6 The equivalent circuit when AC current is fed into the VSC side;

[0030] Figure 7 The equivalent Laplace transform circuit considering the effect of ground resistance;

[0031] Figure 8 It is a passive network;

[0032] Fig. 9 This is the control block diagram of the LCC side;

[0033] Fig.10 is the calculated value of the fault current on the LCC side that suppresses the trigger angle;

[0034] Fig.11 The calculated value of the fault current on the VSC side to reduce the proportional coefficient of the inner loop PI controller;

[0035] Fig.12 It is a simulation model based on MATLAB / Simulink software;

[0036] Fig.13 The simulated and calculated values ​​of the short-circuit current on both sides at 2ms and 1ms;

[0037] Fig.14 The simulation and calculation values ​​of the short-circuit current on both sides when the grounding resistance is 10Ω, 20Ω, 30Ω and 40Ω respectively;

[0038] Fig.15 is the fault current simulation value considering the suppression measures on the LCC side and the VSC side. DETAILED DESCRIPTION

[0039] The technical solution of the invention will be described in detail below with reference to implementation cases and accompanying drawings.

[0040] 1. Topology introduction and simple analytical expression of DC side short-circuit fault current

[0041] A hybrid multi-terminal DC transmission system including one LCC-HVDC subsystem and two VSC-HVDC subsystems is shown in Figure 2. Figure 1 (a) is shown. In the figure, L dc is the current limiting reactor of the DC line. Ignoring the influence of line capacitance parameters, Figure 1 (b) presents the equivalent model of a three-terminal hybrid DC transmission network. d is the equivalent internal electromotive force of the DC voltage on the LCC side, r is the equivalent internal impedance, R d and L d is the resistance and inductance of the DC line, u dc1 and u dc2 is the DC voltage on the receiving VSC side. In addition, E d and r have the following relationship:

[0042]

[0043] Where: U is the effective value of the AC system line voltage on the LCC side, k t is the transformation ratio of the converter transformer on the LCC side, α is the trigger angle of the converter station, and x t is the commutation reactance.

[0044] Figure 1 In (a), the VSC1 and VSC2 of the receiving-end power grid are completely symmetrical, so the DC voltage of the receiving-end converter station can be expressed as u dc At the same time, since the two current limiting reactors of the receiving end line are connected in parallel, the equivalent value is half of the original value. Based on the above analysis, Figure 2 This is the equivalent hybrid multi-terminal transmission network model.

[0045] When a short circuit occurs in a DC line, the entire transmission network will be divided into two circuits with different fault characteristics by the fault point. According to circuit theory, the instantaneous value of the fault current cannot change suddenly before and after the fault, that is, the initial value of the fault current is equal to the DC current of the system during steady-state operation.

[0046] Laplace transform theory can often be used to analyze complex circuits to solve for the corresponding variables. In addition, under non-zero independent initial conditions, additional power functions should be considered in the Laplace transform equivalent circuit, such as Figure 3 (a). Among them, E d ' is the equivalent internal electromotive force of the LCC side converter station after the fault, R d1 and L d1 is the resistance and inductance of the LCC side line, R d2 and L d2 is the resistance and inductance of the VSC side line, (L d1 +L dc )I dc0 is the additional power function on the LCC side, (L d2 +L dc / 2)I dc0 is the additional power function on the VSC side, u 0 is the voltage at the fault point, u dc ' is the equivalent voltage of the receiving power grid after the fault.

[0047] Let R 10 =r+R d1 , L 10 =L d1 +L dc , R 20 =R d2 , L 20 =L d2 +L dc / 2, and use the loop current method to set the loop current to I dc1 (s) and I dc2 (s).

[0048] The direction of the loop current is as follows: Figure 3 (b). Figure 3 (b) The following loop current equation can be established:

[0049]

[0050] Solving the above loop current equation, the solution to the equation in the time domain is:

[0051]

[0052] Where:

[0053]

[0054] In order to verify the correctness of the above analytical expression of fault current in time domain, Figure 4 The calculated and simulated value comparison waveforms of the fault current on the LCC side and the VSC side are given. As can be seen from the figure, there is a large difference between the simulated and calculated values ​​of the short-circuit current on the LCC side. The possible reason is that the expression of the fault current on the LCC side in equation (3) does not consider the dynamic change process of the trigger angle on the LCC side, and directly substitutes the trigger angle value after the fault. Similarly, there is a large difference between the simulated and calculated values ​​of the fault current on the VSC side. The possible reason is that the expression of the fault current on the VSC side in equation (3) does not consider the input of AC current. In summary, the expressions of the fault currents on both sides need to fully consider the linearization process of the trigger angle and the input of AC current.

[0055] 2. Accurate expression of fault current on LCC side

[0056] As we all know, the nonlinear change of the trigger angle of the converter station on the LCC side when the DC line fails will make the equivalent internal electromotive force E in formula (1) d It also presents nonlinear changes, further affecting the trend of short-circuit current changes, which is also the main reason for the error in the above short-circuit current expression. Therefore, this patent uses the least squares method to approximate the linearization of this nonlinear process to obtain an accurate LCC side fault current expression. Define the change function of the trigger angle after the fault as f(α), then the following relationship exists:

[0057] f(α)=k(α-α 0 )+cosα 0 (5)

[0058] Where: α 0 is the initial value of the trigger angle of the LCC converter station before the fault, α is the trigger angle in the steady state after the fault, and k is the coefficient of variation of the trigger angle function.

[0059] If k in equation (5) is solved, the linearization process of the firing angle will be better captured. Define the following minimum function to exist in the firing angle variation interval [α 0 α 1 ]:

[0060] minS=min||f(α)-cosα|| 2 (6)

[0061] By applying the least square method to formula (6), we can obtain:

[0062]

[0063] Taking the derivative of both sides of the above formula with respect to k, we can get:

[0064]

[0065] when Solve for k:

[0066]

[0067] In summary, the expression of the equivalent internal electromotive force after the fault is:

[0068]

[0069] According to the above analysis, Figure 5 The calculated value and simulation waveform of the fault current on the LCC side considering the firing angle linearization process are given. Figure 5 It can be seen that the error of the newly proposed short-circuit current expression is small, which verifies the correctness of the above conjecture.

[0070] 3. Accurate expression of fault current on VSC side

[0071] For in-depth analysis Figure 4 The reason for the difference between the simulated value and the calculated value of the fault current on the VSC side is Figure 6 The equivalent circuits of the DC and AC sides of the inverter-side converter station are presented. dc is the active power on the DC side, C is the voltage divider capacitor on the VSC side, u sd is the d-axis component of the AC grid voltage, R L and L L are the resistance and inductance of the inverter station outlet line, u cd is the d-axis component of the AC voltage at the converter station outlet, i sd is the d-axis component of the alternating current.

[0072] According to circuit theory, Figure 6 The equivalent circuit in has the following relationship:

[0073]

[0074] Where: m d is the modulation ratio.

[0075] Usually, the modulation ratio of the VSC side commutation is obtained by the inner loop PI controller as shown below:

[0076]

[0077] Where: u dcN is the rated value of the DC voltage, i sdref is the reference value of the d-axis component of the AC current, k i and k pare the integral coefficient and proportional coefficient of the PI controller respectively.

[0078] By establishing small signal models for formulas (11) and (12), we can obtain:

[0079]

[0080] Where: u dc0 is the initial value of the DC voltage, m d0 is the initial value of the modulation ratio.

[0081] Solving formula (13) yields:

[0082]

[0083] According to the law of conservation of power, AC power is equal to DC power, that is,

[0084]

[0085] Solving formula (15) we can get:

[0086]

[0087] Similarly, applying the small signal model to solve formula (16) yields:

[0088]

[0089] Where: i sd0 is the initial value of the d-axis component of the AC current.

[0090] Ignoring the influence of the grid-connected voltage integral term and the q-axis component, combining formulas (13), (14) and (17), we can obtain:

[0091]

[0092] Formula (18) is the AC current component of the fault current fed into the DC side. Combined with the fault current expression in (3), the complete DC side fault current expression can be obtained as follows:

[0093]

[0094] Where: T 3 =L L / (R L +k p ).

[0095] Using formula (19), we can get Figure 5The latest fault current curve considering AC current feeding in . It can be seen from the figure that when AC current feeding is considered, the difference between the simulation value and the calculated value is significantly reduced, which verifies the correctness of the above analysis.

[0096] 4. Accurate LCC / VSC side fault current expression considering ground resistance

[0097] The new short-circuit current expression proposed above is derived based on metallic faults. For grounding resistance faults, it is necessary to re-derive the corresponding analytical expression. When a DC circuit has a grounding fault through a transition resistance, Figure 3 The equivalent circuit in will be converted to Figure 7 As shown. At this time, the fault current expression on both sides is:

[0098]

[0099] Where:

[0100]

[0101] in:

[0102]

[0103] From formula (20), we can see that if we want to solve the fault current expression, we must know R f1 and R f2 Using circuit theory, we can Figure 7 The equivalent model in (b) is transformed into Figure 8 The passive circuit in the figure can be obtained by the following relationship:

[0104]

[0105] Substituting formula (23) into (22), we can obtain:

[0106]

[0107] In summary, the analytical expression of the fault current on both sides when considering the grounding resistance can be obtained.

[0108] 5. An active fault current suppression measure to suppress the trigger angle on the LCC side and reduce the proportional coefficient of the inner loop PI controller on the VSC side

[0109] According to equations (3) and (10), the improved LCC side fault current expression is mainly related to the trigger angle α. Based on the above two equations, theoretically reducing the trigger angle can effectively suppress the rising rate of the fault current. Therefore, this patent adopts the method of limiting the LCC side trigger angle obtained by constant DC current control to suppress the fault current. Its control block diagram is as follows: Fig. 9 shown.

[0110] In the above analysis, the change trends of the calculated value and the simulated value of the fault current on the LCC side are basically the same. Therefore, this patent first takes the calculated value of the fault current as an example to explore whether limiting the trigger angle can suppress the fault current. Fig.10 The fault current waveforms when the trigger angle is limited to 90°, 70°, 50° and 3° are given. It can be seen from the figure that the rising speed of the fault current can be suppressed by suppressing the trigger angle.

[0111] Similarly, from equation (19), it can be seen that reducing the proportional coefficient k of the inner loop PI controller p It can also effectively suppress the change rate of the fault current on the VSC side. Based on this idea, this patent takes the calculated value of the fault current on the VSC side as an example to explore the effect of changing k p Whether the fault current can be suppressed. Fig.11 Shows different k p Fault current distribution under the condition. As can be seen from the figure, reducing k p The rate of change of fault current can be suppressed to a certain extent.

[0112] In order to further verify the rationality of the fault transient current expression and active fault current suppression measures derived above, this patent established a multi-terminal HVDC system on MATLAB software, such as Fig.12 The simulation parameters are shown in Table 1. In the simulation, it is assumed that a short circuit fault occurs in the DC line at 0.5s. Fig.13 The simulation and calculation values ​​of the fault current on both sides are presented without considering the grounding resistance. Fig.13 (a) and Fig.13 (b) are the fault current waveforms on both sides 2ms and 1ms after the fault occurs. It can be seen from the figure that the change trends of the calculated and simulated values ​​of the fault current on both sides are basically the same, especially the error between the calculated and simulated values ​​of the fault current on the VSC side is relatively small. Fig.14 The simulation waveform within 3ms during the fault period after considering the grounding resistance is presented. It can be seen from the figure that the change trends of the calculated and simulated fault currents on both sides under different grounding resistances are basically the same, especially the average error between the calculated and simulated fault currents on the VSC side can be controlled within 100A.

[0113] Table 1

[0114]

[0115] In addition, the above analysis of the active fault suppression method is mainly based on the theoretically calculated fault current. In actual simulation, whether this measure has the same effect as the theory needs further verification. Fig.15 The simulation waveforms using the above active suppression measures are given. Fig.15(a) is a method to suppress the trigger angle on the LCC side. Fig.15 (b) is to change the proportional coefficient k of the inner loop PI controller on the VSC side p As can be seen from the figure, these two methods can indeed suppress the changing trend of short-circuit current to a certain extent, and the above theoretical analysis is basically consistent.

Claims

1. A fault analysis and short-circuit current suppression method for a hybrid DC network, including: S1: Using Laplace transform theory to analyze and obtain the simple expressions of short-circuit currents on both sides during DC line faults: Where: I dc1 (t) is the short-circuit current on the LCC side after the fault, I dc2 (t) is the short-circuit current on the VSC side after the fault, E d ' is the equivalent internal electromotive force of the converter station on the LCC side after the fault, u 0 is the voltage at the fault point, u dc ' is the DC voltage output on the VSC side after the fault, I dc0 is the initial value of the DC current, R 10 and R 20 are the equivalent resistances at both ends of the DC line respectively, L 10 and L 20 are the equivalent inductances at both ends of the DC line respectively, and T 1 = L 10 / R 10 and T 2 = L 20 / R 20 ; S2: Considering the linearization of the firing angle of the LCC side and using the least squares method to fit the accurate expression of the short-circuit current on the LCC side, as shown below: Where: U is the effective value of the three-phase AC grid voltage on the LCC side, α is the firing angle after the fault, and α 0 is the initial value of the firing angle, and k t is the transformation ratio of the commutation transformer on the LCC side. The coefficient k fitted by the least squares method has the following relationship: S3: Considering the component of the AC current fed into the DC side and using the PI controller model to deduce the AC component fed into the DC side, obtaining the accurate expression of the short-circuit current on the VSC side, as shown below: Where: R L and L L are the resistance and inductance of the line at the inverter station outlet, u dcN is the rated value of the DC voltage, k p is the proportional coefficient of the PI controller, m d0 is the initial value of the modulation ratio, Δu dc is the difference in DC voltage before and after the fault on the inverter side, T 3 = L L / (R L + k p ); S4: Expressions of short-circuit currents on both sides during DC line faults considering the grounding resistance: where: T 1 ', T 2 ', R f1 and R f2 have the following relationship Where: R f is the grounding resistance; S5: Limiting the short-circuit current by restricting the firing angle output on the LCC side and reducing the proportional coefficient of the inner-loop PI controller on the VSC side.

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