Method and device for hot migration of virtual machines

Abstract

The present application relates to the field of computer technology and provides a method and apparatus for hot migration of a virtual machine. In one embodiment, the method comprises: triggering an exception when executing an instruction in an instruction set that the destination host does not have but the source host has in a virtual machine on a destination host; capturing the exception and parsing the interrupt context of the exception by a system virtualization module; obtaining and decoding the instruction data based on the instruction address information in the interrupt context; and simulating the execution process of the instruction based on the instruction set of the destination host. The present application can implement hot migration of virtual machines across processor generations while retaining higher instruction set capabilities.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and more particularly to a method and apparatus for hot migration of a virtual machine. Background Art

[0002] The widespread problem of virtual machine live migration failure in data centers is primarily due to the deployment of processors with incompatible instruction sets, such as Intel's Broadwell and Skylake processors. While both processors belong to the same X86 architecture, Skylake processors feature the latest AVX512 instruction set, while Broadwell processors do not. This often prevents virtual machines created on a Skylake-based source node from successfully migrating to a Broadwell-based target node.

[0003] Virtual machines created using libvirt / QEMU / KVM typically have three modes: full host CPU passthrough (host-passthrough), partial host CPU passthrough (host-model), and custom host CPU (custom-model). These three modes correspond to decreasing virtual machine performance but increasing hot migration compatibility. To ensure adequate performance while also taking into account hot migration capabilities, data center deployments typically choose virtual machines in partial host CPU passthrough (host-model) mode. In this mode, the instruction set exposed by the host to the virtual machine is often smaller than the host's own instruction set. Although certain differences between the target node processor and the source node processor are allowed, these differences cannot cover the AVX512 instruction set, so hot migration will still fail.

[0004] Therefore, it is necessary to provide a hot migration method for virtual machines of cross-generation processors that retains higher instruction set capabilities. Summary of the Invention

[0005] The purpose of this application is to provide a method for hot migration of virtual machines to achieve hot migration of virtual machines across different generations of processors.

[0006] In one embodiment of the present application, a method for hot migration of a virtual machine is disclosed, comprising:

[0007] An exception is triggered when an instruction of an instruction set that the destination host does not have but the source host has is executed in a virtual machine on the destination host;

[0008] The kernel-based virtual machine module in the destination host captures the exception and parses the interrupt context of the exception;

[0009] Acquire the instruction data according to the instruction address information of the interrupt context and decode it; and

[0010] The instruction set of the destination host is used to simulate the decoding process of the instruction.

[0011] According to an embodiment of the present application, the method further includes:

[0012] creating a processor signature map in the destination host according to the simulation results;

[0013] Creating a virtual machine on the source host based on the processor feature map; and

[0014] Hot migrate the virtual machine on the source host to the destination host.

[0015] According to an embodiment of the present application, the step of simulating the decoding process of the instruction using the instruction set of the destination host further includes:

[0016] Using a binary decoding tool to simulate the decoding process of the instruction, generate simulated instructions, and establish a test case library; and

[0017] The simulation instructions are transplanted to a kernel-based virtual machine module in the target host, and regression testing is performed on the test case library.

[0018] According to an embodiment of the present application, the source host is a processor of a higher generation than that of the destination host.

[0019] According to an embodiment of the present application, the instruction set of the destination host is AVX2, and the instruction set of the destination host is AVX512.

[0020] In another embodiment of the present application, a device for hot migration of a virtual machine is disclosed, comprising:

[0021] a triggering unit configured to trigger an exception when an instruction of an instruction set that the destination host does not have but the source host has is executed in the virtual machine on the destination host;

[0022] a capture unit, provided in a kernel-based virtual machine module in the destination host, and configured to capture the exception and parse an interrupt context of the exception;

[0023] a decoding unit configured to obtain and decode the instruction data according to the instruction address information of the interrupt context; and

[0024] The simulation unit is configured to simulate the execution process of the instruction using the instruction set of the destination host.

[0025] According to one embodiment of the present application, the device further includes:

[0026] a creating unit configured to create a processor feature map in the destination host according to the simulation result, and create a virtual machine on the source host based on the processor feature map; and

[0027] The migration unit is configured to hot migrate the virtual machine on the source host to the destination host.

[0028] According to an embodiment of the present application, the step of the simulation unit simulating the decoding process of the instruction using the instruction set of the destination host further includes:

[0029] Using a binary decoding tool to simulate the decoding process of the instruction, generate simulated instructions, and establish a test case library; and

[0030] The simulation instructions are transplanted to a kernel-based virtual machine module in the target host, and regression testing is performed on the test case library.

[0031] According to an embodiment of the present application, the source host is a processor of a higher generation than that of the destination host.

[0032] According to an embodiment of the present application, the instruction set of the destination host is AVX2, and the instruction set of the destination host is AVX512.

[0033] This application can achieve hot migration of virtual machines across processor generations while retaining higher instruction set capabilities, which can slow down the cycle of data center server elimination to a certain extent, thereby reducing server deployment costs.

[0034] This specification records a large number of technical features, which are distributed in various technical solutions. If all possible combinations of technical features of this application (i.e., technical solutions) are to be listed, the specification will be too lengthy. In order to avoid this problem, the various technical features disclosed in the above invention content of this specification, the various technical features disclosed in the various embodiments and examples below, and the various technical features disclosed in the accompanying drawings can be freely combined with each other to form various new technical solutions (these technical solutions should all be deemed to have been recorded in this specification), unless such a combination of technical features is technically infeasible. For example, in one example, feature A+B+C is disclosed, and in another example, feature A+B+D+E is disclosed. Features C and D are equivalent technical means that play the same role. Technically, only one of them can be used, and it is impossible to use them at the same time. Feature E can be technically combined with feature C. Then, the solution of A+B+C+D should not be deemed to have been recorded because it is technically infeasible, while the solution of A+B+C+E should be deemed to have been recorded. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 Flowchart of a virtual machine live migration method in one embodiment of the present application.

[0036] Figure 2 Schematic diagram of the instruction set simulation process during the live migration of a virtual machine in one embodiment of the present application.

[0037] Figure 3 Schematic diagram of a virtual machine hot migration device in one embodiment of the present application. DETAILED DESCRIPTION

[0038] In the following description, many technical details are provided to help readers better understand this application. However, those skilled in the art will understand that even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in this application can be implemented.

[0039] Description of some concepts:

[0040] Kernel-based Virtual Machine (KVM): is an open source system virtualization module integrated into all major Linux distributions.

[0041] The instruction set is a collection of instructions used by the CPU to calculate and control the computer system. Each new CPU design specifies a set of instructions that work with other hardware circuits. The sophistication of the instruction set is also related to the CPU's performance and is a key indicator of CPU performance.

[0042] A virtual machine (VM) is a complete computer system that simulates the hardware functionality of a physical computer through software and runs in a completely isolated environment. Any tasks that can be performed on a physical computer can also be performed in a virtual machine.

[0043] Hot migration, also known as dynamic migration or live migration, refers to the saving and restoring of a virtual machine. This typically preserves the entire virtual machine's operating state and allows for rapid restoration to the original hardware platform, or even to a different one. After restoration, the virtual machine continues to run smoothly, and users won't notice any difference.

[0044] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0045] The first embodiment of the present application discloses a method for hot migration of a virtual machine. Figure 1 As shown, the method includes steps 110 to 140.

[0046] Step 110: When an instruction with an instruction set that the destination host does not have but the source host has is executed in a virtual machine on the destination host, an exception is triggered. In one embodiment, the source host is a processor of a higher generation than the destination host. For example, the source host is a generation higher than the destination host, the destination host is a fifth-generation Broadwell processor, and the destination host has an instruction set of AVX2, while the source host is a sixth-generation Skylake processor, and the source host has an instruction set of AVX512. It should be understood that the source host can be a processor of even higher generations than the destination host.

[0047] Step 120: The kernel-based virtual machine module in the destination host captures the exception and parses the interrupt context of the exception.

[0048] Step 130: Obtain the instruction data according to the instruction address information of the interrupt context and decode it.

[0049] Step 140: Use the instruction set of the destination host to simulate the execution process of the instruction

[0050] In one embodiment, step 140 of simulating the decoding process of the instruction using the instruction set of the destination host further includes:

[0051] Step 1401: Use a decoding tool to simulate the decoding process of the instruction, generate simulated instructions, and establish a test case library;

[0052] Step 1402: transplant the simulation instructions to the kernel-based virtual machine module in the target host, and perform regression testing on the test case library.

[0053] In some embodiments, the decoding tool in step 1401 may be a third-party open source or self-written binary decoding tool.

[0054] In one embodiment, the method further comprises:

[0055] Step 150: creating a processor feature map in the destination host according to the simulation results;

[0056] Step 160: creating a virtual machine on the source host based on the processor feature map; and

[0057] Step 170: hot migrate the virtual machine on the source host to the destination host.

[0058] This application realizes the hot migration of virtual machines across generations of processors by simulating instruction sets, which to a certain extent slows down the cycle of server elimination in data centers and thus reduces server deployment costs.

[0059] In order to better understand the technical solution of this specification, the following example is used to illustrate the hot migration of a virtual machine created based on an Intel Skylake processor to an Intel Broadwell processor. The details listed in this example are mainly for ease of understanding and are not intended to limit the scope of protection of this application.

[0060] In one embodiment, the KVM of the host operating system (host OS) on the Broadwell CPU is improved to support the simulation of the AVX512 instruction set architecture (ISA). Figure 2 As shown in the figure, the main process of emulating the AVX512 instruction set structure includes four steps: trigger (Trap), capture (Intercept), decode (Decode), and emulate (Emulate). By emulating the trigger-capture-decode-emulate process of the AVX512 instruction set structure, AVX2 instructions that emulate AVX512 instructions are generated. The generated AVX2 instructions are added to the KVM of the Broadwell CPU, which is the process of improving the KVM. The specific steps of emulating the AVX512 instruction set structure are as follows:

[0061] Trigger: The virtual machine (VM) on Broadwell CPU will trigger a #UD exception when executing AVX512 instructions;

[0062] Capture: KVM intercepts the exception and parses the exception interrupt context;

[0063] Decoding: Obtain and decode the binary data of the AVX512 instruction through the instruction address information provided in the interrupt context;

[0064] Simulation: Complete the simulation of this decoded AVX512 instruction based on the AVX2 instruction.

[0065] The interrupt context decoding of the AVX512 instruction includes the opcode and operands. During the simulation of the AVX512 instruction set structure, the opcode and operands of the AVX512 instruction that triggered the exception are obtained. This allows us to determine the AVX512 instruction that triggered the exception, the operation it performed, and the operands involved. During the simulation, the AVX2 instructions supported by the Broadwell CPU are used to complete the operation of this AVX512 instruction.

[0066] Afterwards, a custom-model host CPU mode is created on the Broadwell CPU. Based on the original Broadwell CPU features map, the processing capability characteristics of the AVX512 instructions enabled by the AVX2 simulation instructions are added to form a customized features map, namely, a "Broadwell+AVX512" CPU features map. Next, a virtual machine is created on the Skylake CPU based on the custom-model host CPU mode. The virtual machine on the Skylake CPU is hot migrated to the Broadwell CPU with the custom processor features map created. After that, executing AVX512 instructions in the Broadwell CPU virtual machine can trigger the above trigger-capture-decode-simulation process to complete the simulation of AVX512 instructions.

[0067] In a specific data center deployment, the first step is to clearly define the list of compatible server processor models and identify the instruction set differences between the CPU generations involved. By identifying the instruction set subset that needs to be supported, a customized host-model CPU feature map is generated on the target host (i.e., a relatively low-generation processor).

[0068] In one embodiment, with the help of a third-party open source or self-written binary decoding tool (binary decodetool), the simulation experiment of the required instructions is completed in the user space, and a complete test case library is established. The user space simulation instructions are transplanted to the kernel space KVM, and the above-mentioned test case library is used for regression testing. The above-mentioned customized host CPU part is transparently transmitted (host-model) to create a virtual machine on the previous and next generation CPU servers at the same time, and perform hot migration actions. The decoding tool is used to obtain the opcode and operand of the AVX512 instruction that caused the exception from the information of the exception context, so that it can be known which instruction this exception instruction is, what operation is completed, and which operands are involved. The decoding tool can be implemented using any decoding tool known in the art or known in the future, and the invention will not elaborate on this.

[0069] The above embodiment simulates the AVX512 instruction set so that a virtual machine created based on an Intel Skylake processor can be successfully hot migrated to an Intel Broadwell processor while retaining the AVX512 instruction set capability, thereby realizing hot migration of virtual machines across processor generations.

[0070] The second embodiment of the present application discloses a device for hot migration of a virtual machine. Figure 3A schematic diagram of the device is shown, which includes a trigger unit, a capture unit, a decoding unit and a simulation unit.

[0071] The triggering unit is configured to trigger an exception when an instruction of an instruction set that the destination host does not have but the source host has is executed in the virtual machine on the destination host;

[0072] The capture unit is provided in a kernel-based virtual machine module in the destination host and is configured to capture the exception and parse the interrupt context of the exception;

[0073] The decoding unit is configured to obtain data of the instruction according to the instruction address information of the interrupt context and decode the data;

[0074] The simulation unit is configured to simulate the execution process of the instruction using the instruction set of the destination host.

[0075] In one embodiment, the apparatus further comprises:

[0076] a creating unit configured to create a processor feature map in the destination host according to the simulation result, and create a virtual machine on the source host based on the processor feature map; and

[0077] The migration unit is configured to hot migrate the virtual machine on the source host to the destination host.

[0078] In one embodiment, the step of simulating the decoding process of the instruction by the simulation unit using the instruction set of the destination host further includes:

[0079] Using a decoding tool to simulate the decoding process of the instruction, generate simulated instructions, and establish a test case library; and

[0080] The simulation instructions are transplanted to a kernel-based virtual machine module in the target host, and regression testing is performed on the test case library.

[0081] In one embodiment, the source host is a higher generation processor than the destination host.

[0082] In one embodiment, the instruction set of the destination host is AVX2, and the instruction set of the source host is AVX512.

[0083] The first embodiment is a method embodiment corresponding to the present embodiment. The technical details in the first embodiment can be applied to the present embodiment, and the technical details in the present embodiment can also be applied to the first embodiment.

[0084] It should be noted that those skilled in the art should understand that the implementation functions of the various modules shown in the above-mentioned embodiments of the apparatus for live migration of virtual machines can be understood with reference to the relevant description of the aforementioned method for live migration of virtual machines. The functions of the various modules shown in the above-mentioned embodiments of the apparatus for live migration of virtual machines can be implemented by programs (executable instructions) running on a processor, or by specific logic circuits. If the apparatus for live migration of virtual machines described in the embodiments of this specification is implemented in the form of software function modules and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this specification, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this specification. The aforementioned storage medium includes various media that can store program code, such as a USB flash drive, a mobile hard drive, a read-only memory (ROM), a magnetic disk, or an optical disk. Thus, the embodiments of this specification are not limited to any specific combination of hardware and software.

[0085] It should be noted that in this patent application, relational terms such as first and second, etc., are used solely to distinguish one entity or operation from another, and do not necessarily require or imply any actual relationship or order between these entities or operations. Furthermore, the terms "comprise," "include," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. Without further limitation, an element specified by the phrase "comprising a" does not preclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element. In this patent application, reference to performing an action in accordance with an element means performing the action in accordance with at least that element, including two situations: performing the action in accordance with that element alone, and performing the action in accordance with that element and other elements. Expressions such as "plurality," "multiple times," and "many" include "two," "twice," "two kinds," and "more than two," "more than two times," and "more than two kinds."

[0086] All documents mentioned in this specification are considered to be included in their entirety in the disclosure of this specification so that they can be used as a basis for modification when necessary. In addition, it should be understood that the above description is only a preferred embodiment of this specification and is not intended to limit the scope of protection of this specification. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of one or more embodiments of this specification shall be included in the scope of protection of one or more embodiments of this specification.

[0087] In some cases, the actions or steps recited in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. Additionally, the processes depicted in the accompanying drawings do not necessarily require the particular order shown or sequential order to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

Claims

1. A method for hot migration of a virtual machine, characterized in that: include: An exception is triggered when an instruction of an instruction set that the destination host does not have but the source host has is executed in a virtual machine on the destination host; The kernel-based virtual machine module in the destination host captures the exception and parses the interrupt context of the exception; Acquire the data of the instruction according to the instruction address information of the interrupt context and decode it; as well as Simulating the execution process of the instruction using the instruction set of the destination host; The process of simulating the execution of the instruction using the instruction set of the destination host includes: Using a decoding tool to simulate the decoding process of the instruction in user space to generate a simulated instruction; as well as The simulation instructions in the user space are transplanted to a kernel-based virtual machine module in the destination host.

2. The method for hot migration of a virtual machine according to claim 1, wherein: Further including: creating a processor signature map in the destination host according to the simulation results; creating a virtual machine on the source host based on the processor feature map; as well as Hot migrate the virtual machine on the source host to the destination host.

3. The method for hot migration of a virtual machine according to claim 1, wherein: The step of simulating the execution process of the instruction using the instruction set of the destination host further includes: Build a test case library; and After the simulation instructions in the user space are transplanted to the kernel-based virtual machine module in the destination host, regression testing is performed on the test case library.

4. The method for hot migration of a virtual machine according to claim 1, wherein: The source host is a higher generation processor than the destination host.

5. The method for hot migration of a virtual machine according to claim 1, wherein: The instruction set of the destination host is AVX2, and the instruction set of the source host is AVX512.

6. A device for hot migration of a virtual machine, characterized in that: include: a triggering unit configured to trigger an exception when an instruction of an instruction set that the destination host does not have but the source host has is executed in a virtual machine on the destination host; a capture unit, provided in a kernel-based virtual machine module in the destination host, and configured to capture the exception and parse an interrupt context of the exception; a decoding unit configured to obtain data of the instruction according to the instruction address information of the interrupt context and decode the data; as well as a simulation unit configured to simulate the execution process of the instruction using the instruction set of the destination host; The process of simulating the execution of the instruction using the instruction set of the destination host includes: Using a decoding tool to simulate the decoding process of the instruction in user space to generate a simulated instruction; as well as The simulation instructions in the user space are transplanted to a kernel-based virtual machine module in the destination host.

7. The device for hot migration of a virtual machine according to claim 6, characterized in that: Further including: a creating unit configured to create a processor feature map in the destination host according to the simulation result, and create a virtual machine on the source host based on the processor feature map; as well as The migration unit is configured to hot migrate the virtual machine on the source host to the destination host.

8. The device for hot migration of a virtual machine according to claim 6, characterized in that: The step of simulating the execution process of the instruction by the simulation unit using the instruction set of the destination host further includes: Build a test case library; and After the simulation instructions in the user space are transplanted to the kernel-based virtual machine module in the destination host, regression testing is performed on the test case library.

9. The device for hot migration of a virtual machine according to claim 6, characterized in that: The source host is a higher generation processor than the destination host.

10. The device for hot migration of a virtual machine according to claim 6, characterized in that: The instruction set of the destination host is AVX2, and the instruction set of the source host is AVX512.

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