Intelligent dynamic cold plate for data center cooling systems

Abstract

A smart dynamic cold plate for a data center cooling system is disclosed, specifically a system and method for cooling a data center. In at least one embodiment, fins are located within the cold plate and are adjustable to control the amount of surface area of ​​the fins exposed to and cooled by the fluid, based at least in part on the temperature associated with a fluid or at least one computing device.

Description

Technical Field

[0001] At least one embodiment relates to a cooling system, including systems and methods for operating those cooling systems. In at least one embodiment, such a cooling system can be utilized in a data center containing one or more racks or computing servers. Background Technology

[0002] Data center cooling systems use fans to circulate air through server components. Some supercomputers or other high-capacity computers may use water or other cooling systems instead of air cooling systems to draw heat from the server components or racks within the data center to areas outside the data center. Cooling systems may include coolers within the data center area, which may include areas outside the data center itself. Additionally, areas outside the data center may include cooling towers or other external heat exchangers that receive heated coolant from the data center and dissipate the heat to the environment (or external cooling medium) via forced air or other means. The cooled coolant is then recirculated back into the data center. Coolers and cooling towers together constitute a cooling facility. Attached Figure Description

[0003] Figure 1 An exemplary data center cooling system subjected to the improvements described in at least one embodiment is shown;

[0004] Figure 2 Server-level features and cold plate details associated with an intelligent dynamic cold plate for a data center cooling system are shown according to at least one embodiment;

[0005] Figure 3A Rack-level features and cold plate details associated with an intelligent dynamic cold plate for a data center cooling system are shown according to at least one embodiment;

[0006] Figure 3B Details of a cold plate associated with a smart dynamic cold plate for a data center cooling system are shown according to at least one embodiment;

[0007] Figure 3C-3H Details of a cold plate associated with a smart dynamic cold plate for a data center cooling system are shown according to at least one embodiment;

[0008] Figure 4 Data center-level features associated with a smart dynamic cold plate for a data center cooling system are shown according to at least one embodiment;

[0009] Figure 5 The diagram illustrates a relationship according to at least one embodiment. Figure 2-4 Methods associated with data center cooling systems;

[0010] Figure 6 A distributed system according to at least one embodiment is shown;

[0011] Figure 7 An exemplary data center according to at least one embodiment is shown;

[0012] Figure 8 A client-server network according to at least one embodiment is shown;

[0013] Figure 9 A computer network according to at least one embodiment is shown;

[0014] Figure 10A A networked computer system according to at least one embodiment is shown;

[0015] Figure 10B A networked computer system according to at least one embodiment is shown;

[0016] Figure 10C A networked computer system according to at least one embodiment is shown;

[0017] Figure 11 The illustration shows one or more components of a system environment according to at least one embodiment, in which the service can be provided as a third-party network service;

[0018] Figure 12 A cloud computing environment according to at least one embodiment is shown;

[0019] Figure 13 This illustrates a set of functional abstraction layers provided by a cloud computing environment according to at least one embodiment;

[0020] Figure 14 A supercomputer at the chip level is illustrated according to at least one embodiment;

[0021] Figure 15 A supercomputer at the rack module level is shown according to at least one embodiment;

[0022] Figure 16 A supercomputer at the rack level is shown according to at least one embodiment;

[0023] Figure 17 A supercomputer at the entire system level is illustrated according to at least one embodiment;

[0024] Figure 18A The inference and / or training logic according to at least one embodiment is illustrated;

[0025] Figure 18B The inference and / or training logic according to at least one embodiment is illustrated;

[0026] Figure 19 The training and deployment of a neural network according to at least one embodiment are illustrated;

[0027] Figure 20 The architecture of a network system according to at least one embodiment is shown;

[0028] Figure 21 The architecture of a network system according to at least one embodiment is shown;

[0029] Figure 22 A control plane protocol stack according to at least one embodiment is shown;

[0030] Figure 23 A user plane protocol stack according to at least one embodiment is shown;

[0031] Figure 24 The components of a core network according to at least one embodiment are shown;

[0032] Figure 25 Components of a system supporting Network Function Virtualization (NFV) according to at least one embodiment are shown;

[0033] Figure 26 A processing system according to at least one embodiment is shown;

[0034] Figure 27 A computer system according to at least one embodiment is shown;

[0035] Figure 28 A system according to at least one embodiment is shown;

[0036] Figure 29 An exemplary integrated circuit according to at least one embodiment is shown;

[0037] Figure 30 A computing system according to at least one embodiment is shown;

[0038] Figure 31 An APU according to at least one embodiment is shown;

[0039] Figure 32 A CPU according to at least one embodiment is shown;

[0040] Figure 33 An exemplary accelerator integration slice according to at least one embodiment is shown;

[0041] Figures 34A-34B An exemplary graphics processor according to at least one embodiment is shown;

[0042] Figure 35A A graphics core according to at least one embodiment is shown;

[0043] Figure 35B A GPGPU according to at least one embodiment is shown;

[0044] Figure 36A A parallel processor according to at least one embodiment is shown;

[0045] Figure 36B A processing cluster according to at least one embodiment is shown;

[0046] Figure 36C A graphics multiprocessor according to at least one embodiment is shown;

[0047] Figure 37 A software stack of a programming platform according to at least one embodiment is shown;

[0048] Figure 38 The illustration shows an embodiment according to at least one of the embodiments. Figure 37 The CUDA implementation of the software stack;

[0049] Figure 39 The illustration shows an embodiment according to at least one of the embodiments. Figure 37 The ROCm implementation of the software stack;

[0050] Figure 40 The illustration shows an embodiment according to at least one of the embodiments. Figure 37 The OpenCL implementation of the software stack;

[0051] Figure 41 Software supported by a programming platform according to at least one embodiment is shown; and

[0052] Figure 42 A method for using at least one embodiment is shown. Figure 37-40 Compiled code executed on the programming platform. Detailed Implementation

[0053] In at least one embodiment, the following can be used: Figure 1The exemplary data center 100 shown has an improved cooling system as described herein. In at least one embodiment, numerous specific details are set forth to provide a thorough understanding, but the concepts herein can be practiced without one or more of these specific details. In at least one embodiment, the data center cooling system can respond to sudden high thermal demands caused by changes in computing load in today's computing components. In at least one embodiment, because these demands vary or tend to be different cooling needs ranging from minimum to maximum, a suitable cooling system must be used to meet these demands economically. In at least one embodiment, a liquid cooling system can be used for medium to high cooling demands. In at least one embodiment, high cooling demands are economically met through localized immersion cooling. In at least one embodiment, these different cooling demands also reflect different thermal characteristics of the data center. In at least one embodiment, the heat generated from these components, servers, and racks is cumulatively referred to as thermal characteristics or cooling demands, because cooling demands must fully address thermal characteristics.

[0054] In at least one embodiment, a data center liquid cooling system is disclosed. In at least one embodiment, the data center cooling system addresses the thermal characteristics of associated computing or data center equipment, such as graphics processing units (GPUs), switches, dual in-line memory modules (DIMMs), or central processing units (CPUs). In at least one embodiment, these components may be referred to herein as high heat-density computing components. Furthermore, in at least one embodiment, the associated computing or data center equipment may be a processing card having one or more GPUs, switches, or CPUs thereon. In at least one embodiment, each of the GPU, switch, and CPU can be a thermal characteristic of the computing device. In at least one embodiment, the GPU, CPU, or switch may have one or more cores, and each core can be a thermal characteristic.

[0055] In at least one embodiment, the cold plate includes adjustable fins forming microchannels for fluid flow. In at least one embodiment, the fins in the cold plate enable heat transfer from at least one associated computing device to fluid flowing through the microchannels formed between multiple fins. In at least one embodiment, the fins of the cold plate are dynamically and in real-time adjustable to allow more heat transfer from at least one computing device to the fluid flowing through the finned cold plate. In at least one embodiment, such fins may be adjusted by a processor or processorless system in part based on a determined (e.g., sensed) temperature of the cold plate. In at least one embodiment, the temperature may be associated with at least one computing device, the workload of at least one computing device, or the fluid at different time periods and at the inlet and outlet of the cold plate. In at least one embodiment, the processorless system may rely on the thermal properties of at least two materials used to form the fins of the cooling plate, such that such fins can react without a processor to result in more surface area exposed to the fluid. In at least one embodiment, such fins may include overlapping portions that can be exposed by the action of a control mechanism or by the properties of the at least two materials associated together to form the fins.

[0056] In at least one embodiment, the cold plate has a top plate, a bottom plate, and fins between them. In at least one embodiment, the bottom plate may be a base for the cold plate. In at least one embodiment, the top plate may be an intermediate between a cover plate of the cold plate and a bottom plate or substrate of the cold plate. In at least one embodiment, the fins may be coupled to the bottom plate or substrate and the top plate such that the top plate is movable to expose the overlapping portion of each fin and expose the overlapping portion of each fin to fluid flowing through the cold plate. In at least one embodiment, the exposure of the overlapping portion of each fin results in the previously covered surface area being exposed to the fluid and provides additional cooling to the fins of the cold plate of the associated computing device.

[0057] In at least one embodiment, multiple fins form microchannels for fluid flow therebetween. In at least one embodiment, such fins are capable of actively or passively responding to thermal feedback by modification of the microchannels, enabling the fluid to absorb more heat from at least one computing device. In at least one embodiment, the active response can be implemented by at least one processor that exposes more surface area of ​​such fins by unfolding overlapping portions of the fins. In at least one embodiment, the passive response can be implemented by the thermal properties of the material of each fin associated together to form fins that allow such fins to unfold.

[0058] In at least one embodiment, this paper addresses the problem of cold plates being static devices by means of intelligent dynamic cold plates. In at least one embodiment, the intelligent dynamic cold plate allows the cold plate (through its internal features) to respond to a temperature sensed or determined from at least one computing device. In at least one embodiment, the intelligent aspects of the intelligent dynamic cold plate, compared to a static cold plate, allow the use of sensor input to modify the fins of such a cold plate. In at least one embodiment, the microchannels formed by such fins can be altered to cause changes in fluid paths or increase the interaction surface between the fluid and each such fin. In at least one embodiment, these aspects allow more fluid to pass through certain areas or through certain regions, and allow heat to be removed from at least one computing device in those areas where high heat density occurs.

[0059] In at least one embodiment, a static cold plate for liquid cooling of GPUs, CPUs, switches, and other high heat density components may have static microchannels that allow fluid flow therethrough to remove heat from such heat dissipation components in a data center. In at least one embodiment, the static cold plate includes designs and methods for heat removal that are independent of, or do not respond to, the heat density or heat dissipation of the computing components. In at least one embodiment, some cold plates may have variable thermal behavior depending on computing, environment, and other properties, requiring dynamic behavior to achieve optimal heat removal capabilities for available resources in a liquid-cooled environment.

[0060] In at least one embodiment, the liquid-cooled indirect cooling plate may be composed of components therein. In at least one embodiment, two components may be provided, such that the bottom or base layer or component provides rigid mechanical attachment and also serves as a highly thermally conductive medium, wherein heat is conducted from computing components (GPUs, switches, and CPUs) to multiple fins forming microchannels on the bottom or base plate or component. In at least one embodiment, such fins are embedded in the base metal and may be associated with a top or upper plate or component that serves as an intermediate plate or component. In at least one embodiment, the top or upper plate or component that serves as an intermediate plate or component is non-conductive and made of a non-conductive material. In at least one embodiment, a cover plate encapsulates such components (along with the side plates) within the smart dynamic cooling plate.

[0061] In at least one embodiment, the top plate or upper plate or component, through its intermediate plate or component function, is capable of dynamically modifying the microchannel fluid path of the substrate, partly based on the instantaneous thermal behavior of the heating assembly associated with the smart dynamic cold plate. In at least one embodiment, using smart sensing, inference, and adaptive modification, the microchannels forming the fluid path can be dynamically adjusted to allow more fluid (for heat removal) to enter or flow into high heat density regions within the smart dynamic cold plate. In at least one embodiment, such features can also simultaneously reduce fluid flow to block microchannels for regions where less heat removal is required, as determined or sensed from the substrate of the smart dynamic cold plate. In at least one embodiment, overlapping portions of the fins provided within the smart dynamic cold plate can be used to block or restrict microchannels by thickening the overlapping portions between the fins of the smart dynamic cold plate. In at least one embodiment, multiple top plates can be provided to serve as intermediate plates, and each top plate can be associated with different fins. In at least one embodiment, movement of different top plates achieves different blocking, restriction, or flow redirection within the smart dynamic cold plate.

[0062] In at least one embodiment, the following can be used: Figure 1 The exemplary data center 100 shown herein has an improved cooling system. In at least one embodiment, the data center 100 may be one or more rooms 102 having racks 110 and auxiliary equipment for housing one or more servers on one or more server trays. In at least one embodiment, the data center 100 is supported by a cooling tower 104 located outside the data center 100. In at least one embodiment, the cooling tower 104 dissipates heat from within the data center 100 by acting on a main cooling circuit 106. In at least one embodiment, a cooling distribution unit (CDU) 112 is used between the main cooling circuit 106 and a second or auxiliary cooling circuit 108 to enable heat to be absorbed from the second or auxiliary cooling circuit 108 into the main cooling circuit 106. In at least one embodiment, in one aspect, the auxiliary cooling circuit 108 may have various pipes connected to the server trays as needed. In at least one embodiment, circuits 106, 108 are shown as line diagrams, but those skilled in the art will recognize that one or more pipe features may be used. In at least one embodiment, flexible polyvinyl chloride (PVC) pipes may be used with associated piping to allow fluid to move along each provided loop 106; 108. In at least one embodiment, one or more coolant pumps may be used to maintain a pressure differential within the coolant loops 106, 108 to enable coolant movement based on temperature sensors at different locations, including indoors, in one or more racks 110, and / or in server enclosures or server trays within one or more racks 110.

[0063] In at least one embodiment, the coolant in the main cooling circuit 106 and the auxiliary cooling circuit 108 may be at least water and an additive. In at least one embodiment, the additive may be ethylene glycol or propylene glycol. In operation, in at least one embodiment, each of the main cooling circuit and the auxiliary cooling circuit may have its own coolant. In at least one embodiment, the coolant in the auxiliary cooling circuit may be dedicated to the requirements of components in the server tray or associated rack 110. In at least one embodiment, the CDU 112 is capable of precise control of the coolant independently or simultaneously within the provided coolant circuits 106, 108. In at least one embodiment, the CDU may be adapted to control the flow rate of the coolant such that the coolant is appropriately distributed to absorb heat generated within the associated rack 110. In at least one embodiment, additional flexible tubes 114 are provided from the auxiliary cooling circuit 108 to enter each server tray to provide coolant to the electrical and / or computing components therein.

[0064] In at least one embodiment, the tubing 118 forming part of the auxiliary cooling circuit 108 may be referred to as a chamber manifold. Specifically, in at least one embodiment, an additional tubing 116 may extend from the row manifold tubing 118 and may also be part of the auxiliary cooling circuit 108, but may be referred to as a row manifold. In at least one embodiment, coolant tubing 114 enters the rack as part of the auxiliary cooling circuit 108, but may be referred to as a rack cooling manifold within one or more racks. In at least one embodiment, the row manifold 116 extends along rows in the data center 100 to all racks. In at least one embodiment, the piping of the auxiliary cooling circuit 108, including coolant manifolds 118, 116, and 114, may be improved by at least one embodiment herein. In at least one embodiment, a cooler 120 may be located in the main cooling circuit within the data center 102 to support cooling prior to the cooling tower. In at least one embodiment, for the purposes of this disclosure, an additional cooling circuit that may exist in the main control circuit and provide cooling outside the racks and outside the auxiliary cooling circuit may be used with the main cooling circuit and is distinct from the auxiliary cooling circuit.

[0065] In at least one embodiment, during operation, heat generated within the server trays of the provided rack 110 can be transferred via the flexible tubing of the row manifold 114 of the second cooling circuit 108 to the coolant exiting one or more racks 110. In at least one embodiment, a second coolant from the CDU 112 for cooling the provided racks 110 (in the auxiliary cooling circuit 108) moves toward one or more racks 110 via provided tubing. In at least one embodiment, the second coolant from the CDU 112 passes from one side of a chamber manifold having tubing 118, reaches one side of the rack 110 via row manifold 116, and passes through one side of the server tray via different tubing 114. In at least one embodiment, used or returned second coolant (or second coolant carrying heat exiting from the computing components) exits from the other side of the server tray (e.g., after circulating through the server tray or through components on the server tray, entering the left side of the server tray rack and exiting the right side of the rack). In at least one embodiment, the used second coolant exiting the server tray or rack 110 exits from a different side (e.g., the exit side) of the pipe 114 and moves to the exit side of the parallel, but also row, manifold 116. In at least one embodiment, from the row manifold 116, the used second coolant moves in a parallel portion of the chamber manifold 118 and advances in the opposite direction to the incoming second coolant (which may also be a newer second coolant) and toward CDU 112.

[0066] In at least one embodiment, the used second coolant exchanges heat with the main coolant in the main cooling circuit 106 via CDU 112. In at least one embodiment, the used second coolant can be refreshed (e.g., relatively cooled compared to the temperature of the used second coolant stage) and is ready to be circulated back to one or more computing components via the second cooling circuit 108. In at least one embodiment, various flow and temperature control features in CDU 112 enable control of the heat exchanged from the used second coolant or the flow rate of the second coolant in and out of CDU 112. In at least one embodiment, CDU 112 is also capable of controlling the flow rate of the main coolant in the main cooling circuit 106.

[0067] In at least one embodiment, such as Figure 2The server-level feature 200 shown can be associated with intelligent dynamic cold plates for data center cooling systems. In at least one embodiment, the server-level feature 200 includes a server tray or enclosure 202. In at least one embodiment, the server tray or enclosure 202 includes a server manifold 204 for intermediate coupling between the provided cold plates 210A-D of the server tray or enclosure 202 and a rack manifold of the rack carrying the server tray or enclosure 202. In at least one embodiment, the server tray or enclosure 202 includes one or more cold plates 210A-D associated with one or more computing or data center components or devices 220A-D.

[0068] In at least one embodiment, one or more server-level cooling loops 214A, B may be disposed between server manifold 204 and one or more cold plates 210A-D. In at least one embodiment, each server-level cooling loop 214A; B includes an inlet line 210 and an outlet line 212. In at least one embodiment, when cold plates 210A, B are configured in series, an intermediate line 216 may be provided. In at least one embodiment, one or more cold plates 210A-D may support different ports and channels for auxiliary coolant or different fluids (e.g., local coolant circulating from a preloaded source) for auxiliary cooling loops. In at least one embodiment, different ports or channels may be provided for additional flow of the same fluid or auxiliary coolant. In at least one embodiment, a cooling fluid, such as auxiliary coolant, may be provided to server manifold 204 via provided inlets and outlets 206A, 206B. In at least one embodiment, a cooling fluid may be provided to server manifold 204 via provided inlets and outlets 208A, 208B.

[0069] In at least one embodiment, server tray 202 is an immersion-cooled server tray that can be submerged in fluid. In at least one embodiment, the fluid used for the immersion-cooled server tray can be a dielectric engineering fluid that can be used in immersion-cooled servers. In at least one embodiment, an auxiliary coolant or fluid or local coolant can be used to cool the engineering fluid. In at least one embodiment, a fluid or local coolant can be used to cool the engineering fluid when the main cooling circuit associated with the auxiliary cooling circuit circulating the auxiliary coolant has failed or is failing. In at least one embodiment, at least one cold plate thus has ports for the auxiliary cooling circuit and for the local cooling circuit and can support a local coolant that is activated in the event of a failure in the main cooling circuit. In at least one embodiment, a smart dynamic cold plate can be used without an auxiliary cooling circuit and with only a local cooling circuit.

[0070] In at least one embodiment, at least one dual-cooling cold plate 210B; 250 can be configured to work in conjunction with conventional cold plates 210A, C, D. In at least one embodiment, a three-dimensional (3D) magnified view (cold plate 250) provides internal details that may include at least some features in the dual-cooling cold plate or the conventional cold plate. In at least one embodiment, a tear-through of the cold plate 250 illustrates microchannels 270 (also 270A). In at least one embodiment, different second portions can be provided side-by-side and have different microchannels 264. In at least one embodiment, the conventional cold plate may have one set of microchannels 264; 270 instead of two sets.

[0071] In at least one embodiment, the dual-cooling cold plate 250 has different paths 264, 270 (each path also referred to as a microchannel) for an auxiliary coolant for an auxiliary cooling circuit and for a fluid for a local cooling circuit, but the two paths may also provide the same fluid. In at least one embodiment, the auxiliary coolant or fluid may not be dielectric in nature. In at least one embodiment, the auxiliary coolant or fluid may have the same or similar chemical composition and may be supplied from the same source. In at least one embodiment, in the use case of an immersion cooling server, a fluid that can be a dielectric engineered fluid may be suitable for both cold plate applications and immersion cooling server tray applications. In at least one embodiment, some microchannels 270 are paths provided by fins 270A or other such aspects that rise internally and are perpendicular to the base of the cold plate portion 250B, and have gaps between them for coolant or fluid flow. In at least one embodiment, some microchannels 264 are fluid pathways in different cold plate portions of the cold plate 250.

[0072] In at least one embodiment, unless otherwise stated, reference to a cold plate, along with its dual-cooling feature, may imply a cold plate capable of supporting at least two types of cooling circuits. In at least one embodiment, both types of cold plates receive local coolant or fluid for cooling, but one type may support both an auxiliary cooling circuit and a local cooling circuit. In at least one embodiment, a standard coolant, such as facility water, may be used in the auxiliary cooling circuit.

[0073] In at least one embodiment, the fluid or local coolant may be used only for cold plates and may not be usable for immersion cooling. In at least one embodiment, each type of cold plate receives a different fluid or local coolant and auxiliary coolant from its respective local cooling circuit or an auxiliary or other cooling circuit that interfaces with the main cooling circuit. In at least one embodiment, where different fluids (e.g., coolants) are used with different coolant distribution units (CDUs) in different auxiliary circuits, then the local cooling circuit may be applicable to both cold plates and the local cooling circuit, such that different channels are available for each of the fluids or local coolants and different auxiliary coolants.

[0074] In at least one embodiment, the dual cooling plate 250 is adapted to receive two types of fluid (e.g., auxiliary coolant and local coolant) and to keep the two types of fluid distinct from each other via their different ports 252, 272; 268, 262 and their different paths 264, 270, for example, through different sections separated by gaskets and plates (e.g., in a gasket-type cooling plate). In at least one embodiment, each different path is a fluid path. In at least one embodiment, fluid (e.g., local coolant) and auxiliary coolant from a local coolant or local coolant source can be provided simultaneously to address additional cooling requirements. In at least one embodiment, the different ports and paths can support the same fluid from different or the same source, which can be provided to address higher cooling requirements from the associated computing device.

[0075] In at least one embodiment, the dual cooling plate 250 includes ports 252, 272 for receiving fluid or local coolant into and from the cooling plate 250. In at least one embodiment, the dual cooling plate 250 includes ports 268, 262 for receiving auxiliary coolant into and from the cooling plate 250. In at least one embodiment, ports 252, 272 may have valve covers 254, 260, which may be oriented and pressure-controlled to allow fluid or local coolant to flow through the cooling plate 250. In at least one embodiment, valve covers may be associated with all provided ports. In at least one embodiment, the provided valve covers 254, 260 are mechanical features of an associated flow controller, which also has corresponding electronic features (e.g., at least one processor for executing instructions stored in an associated memory and controlling the mechanical features of the associated flow controller).

[0076] In at least one embodiment, each valve may be actuated by an electronic feature of an associated flow controller. In at least one embodiment, the electronic and mechanical features of the provided flow controller are integrated. In at least one embodiment, the electronic and mechanical features of the provided flow controller are physically distinct. In at least one embodiment, a reference to the flow controller may refer to one or more or a combination of the provided electronic and mechanical features, but at least refers to a feature capable of controlling the flow of coolant or fluid through each cold plate or immersion cooling server tray or box.

[0077] In at least one embodiment, the electronic features of the provided flow controller receive control signals and control mechanical features. In at least one embodiment, the electronic features of the provided flow controller may be actuators or other similar electromechanical features or other electronic components. In at least one embodiment, a flow pump may be used as the flow controller. In at least one embodiment, an impeller, piston, or bellows may be a mechanical feature, and an electric motor and circuitry form the electronic features of the provided flow controller.

[0078] In at least one embodiment, the circuitry of the provided flow controller may include a processor, memory, a switch, sensors, and other components that collectively form the electronic characteristics of the provided flow controller. In at least one embodiment, provided ports 252, 262, 272, and 268 of the provided flow controller are adapted to allow immersion fluid to enter or exit. In at least one embodiment, flow controller 280 (capable of acting as an expansion valve) may be associated with fluid line 276 (also 256, 274), which allows fluid or localized coolant to enter and exit cooling plate 210B. In at least one embodiment, other flow controllers may similarly be associated with coolant lines 210, 216, and 212 (also 266, 258) to allow auxiliary coolant to enter and exit cooling plate 210B.

[0079] In at least one embodiment, the fluid or local coolant enters the provided fluid line 276 via dedicated fluid inlet and outlet lines 208A, B. In at least one embodiment, the server manifold 204 has channels (shown by dashed lines) therein for supporting different paths to the different fluid lines 276 (and also 256, 274) and any remaining loops 214A, B associated with the auxiliary coolant inlet and outlet lines 206A, B. In at least one embodiment, there may be multiple manifolds to support the fluid or local coolant and the auxiliary coolant differently. In at least one embodiment, for each of the fluid or local coolant and the auxiliary coolant, there may be multiple manifolds to support different inlets and outlets. In at least one embodiment, if the fluid or local coolant is used alone without an auxiliary cooling loop, at least two different flows are achieved via the same fluid path (at least within the cold plate or server tray) to the fluid source and to the coolant row manifold (e.g., row manifold 360, different from the auxiliary coolant row manifold 350 in FIG. 3).

[0080] In at least one embodiment, a first flow may allow auxiliary coolant to flow through one or more provided ports 252, 272 and associated paths 270. In at least one embodiment, the dual cooling plate 250 may have partition plate portions 250A, 250B that are submerged by fluid or local coolant and / or auxiliary coolant while being kept distinct from each other by gaskets or seals. In at least one embodiment, a second flow may allow fluid or local coolant to flow through provided ports 268, 262 and associated paths 264, through fins or microchannels 270A distributed across the base of the cooling plate portion 250B.

[0081] In at least one embodiment, the flow controller 278 may be associated with the fluid inlet 276 and outlet portions at the server manifold 204, rather than with the flow controller 280 provided at their respective cold plates. In at least one embodiment, the first flow uses only fluid or localized coolant and may be enabled if a failure is determined in the auxiliary cooling loop or the main cooling loop, such that the auxiliary coolant cannot effectively absorb heat from at least one computing device. In at least one embodiment, the failure may be that the auxiliary coolant is not adequately cooled by the CDU, and therefore it may not be able to absorb enough heat from at least one computing device through its associated cold plate.

[0082] In at least one embodiment, such as Figure 3AThe rack-level features and cold plate details 300 shown can be associated with intelligent dynamic cold plates for data center cooling systems. In at least one embodiment, the rack-level feature 300 includes a rack 302 having supports 304, 306 for suspending cooling manifolds 314A, B. In at least one embodiment, the supports 304, 306 provided for the rack are flat structures abutting against the inner wall of the rack. In at least one embodiment, the supports 304, 306 provided for the rack extend from the inner wall of the rack. In at least one embodiment, the supports 304, 306 provided for the rack are secured to the inner wall of the rack and have a plurality of mounting points facing one or more directions, including the interior of the rack or towards the rear of the rack.

[0083] In at least one embodiment, cooling manifolds 314A, B may be provided to the CDU (e.g., in the auxiliary cooling loop of the server-level feature 200 (and shown in FIG. 3 as a server tray or box 308) and the data center cooling system. Figure 4 The auxiliary coolant is transferred between CDUs (CDU406). In at least one embodiment, different CDUs may serve different racks. In at least one embodiment, different rack cooling manifolds may be part of auxiliary cooling circuits and local cooling circuits, respectively.

[0084] In at least one embodiment, row manifold 350 may be part of an auxiliary cooling circuit to feed to inlet rack manifold 314A via provided lines 310A, 310. In at least one embodiment, auxiliary coolant travels via provided line 316 to cold plate 326 to extract or absorb heat from associated computing device 324 within server 308; and proceeds via provided line 318 to outlet rack manifold 314B and through provided lines 312, 312A, and returns to the same or different row manifold 350. In at least one embodiment, intelligent dynamic cold plate may operate independently of the auxiliary cooling circuit and may cool at least one computing device associated with the (dual-cooling or single-cooling) cold plate 326 supporting fluid or local coolant via provided lines 312B, 310B for local cooling circuits, together with fluid or local coolant cooling manifolds associated with a fluid source.

[0085] In at least one embodiment, one or more splitter flow controllers 310C, 312C isolate each of the auxiliary cooling circuit and the local cooling circuit. In at least one embodiment, a fluid different from the auxiliary coolant can be used with at least one smart dynamic cold plate 326. In at least one embodiment, the provided lines 320, 322, 354 can be associated with a fluid that may be different from the auxiliary coolant and can be associated with inlet 310B and outlet 312B to engage with one or more ports of such cold plate 326.

[0086] In at least one embodiment, the data center cooling system may incorporate an intelligent dynamic cold plate 324 with fins 364, which may be adapted to a first configuration or state, a second configuration or state, and an intermediate configuration or state. In at least one embodiment, the intelligent dynamic cold plate 324 may be a dual-cooling cold plate or a regular cold plate. In at least one embodiment, a data center cooling system is provided that cools computing devices, such as GPUs, CPUs, storage components, storage enclosures, switches, network devices, and auxiliary devices, via its intelligent dynamic cold plate. In at least one embodiment, the fins 364 are disposed between a first plate 362A (also a bottom plate or substrate) and a second plate 368 (a top plate or intermediate plate), wherein a cover plate 362B encompasses the entire structure of the cold plate 324.

[0087] In at least one embodiment, the fin 364 may be two distinct fins associated with a strip or may be entirely a strip shape factor. In at least one embodiment, each fin 364 may comprise two or more horizontally associated materials or may comprise two or more vertically associated materials, wherein such materials form a multi-metallic strip (in a processorless system). In at least one embodiment, these materials respond differently to heat applied by the fluid flowing through them. In at least one embodiment, such as Figure 3A As shown, channels may exist between these fins. In at least one embodiment, the channels defined between them can dynamically change because a portion of the fins can move differently from another portion of the fins. In at least one embodiment, fluid may not be able to flow between these fins until heat from the fluid causes at least some of the material in each fin to expand differently from another material in each fin. In at least one embodiment, this different expansion causes movement of the provided fins 364 and allows the channels between them to open for fluid flow. In at least one embodiment, fluid at a higher temperature in certain portions of the cold plate 326 can cause the channels to open, while other portions of the cold plate 326 may have fins that block the channels therebetween.

[0088] In at least one embodiment, such fins 364 are individually integral structures, each fin containing a flexible material. In at least one embodiment, fins may be provided only on a substrate or base plate 362A, wherein such fins contain a material such as a bicrystalline material that is capable of changing shape or structure upon application of heat to create different microchannels in each of a first configuration, a second configuration, and an intermediate configuration. In at least one embodiment, a set of fins that is completely recessed (where the overlapping portions of such fins overlap) is referred to as the first configuration; a set of fins that is completely extended (where the overlapping portions extend but do not overlap) is referred to as the second configuration; and an intermediate position of such a set of fins may be referred to as the intermediate configuration. In at least one embodiment, the fins 364 provided by the intelligent dynamic cold plate are bent to include at least one overlapping portion, which at least in Figure 3A , Figure 3F This will be further elaborated in related discussions.

[0089] In at least one embodiment, such as Figure 3A and Figure 3F As shown, the provided fins 364 (along with 396A and 396D) can be in a first configuration with an overlapping portion 396C, such that only a first surface area (e.g., portions 369A and 396D of the fins) is exposed to the fluid flowing through it. In at least one embodiment, Figure 3A (besides Figure 3F The bottom position of the top plate 368 is shown, such that the provided fins 364 have completely overlapping overlap portions or sections. In at least one embodiment, the first surface area may be the default or main surface area, which is the outer portions on both sides of the individual fins of the fins 364 provided in the smart dynamic cold plate.

[0090] In at least one embodiment, the surface area exposed in the second configuration is greater than the default or primary surface area of ​​the fins 364 provided in the first configuration of the smart dynamic cold plate. In at least one embodiment, the surface area refers to the total surface area of ​​all provided fins 364 at a given time. In at least one embodiment, each fin of the provided fins 364 contributes to the first surface area, and the sides of all provided fins are simultaneously in a single or uniform first configuration, for example... Figure 3A The retracted configuration is shown. In at least one embodiment, different fins of the provided fins 364 of the intelligent dynamic cold plate can be associated with different top plates 368 and the different fins can change their configurations relative to each other.

[0091] In at least one embodiment, each fin has at least two inner surfaces that may overlap with a strip feature located therebetween, wherein the strip feature forms an intermediate surface on either side of itself and between the two inner surfaces of each provided fin. In at least one embodiment, because the strip feature forms the overlapping portion of the fin and overlaps with the inner surface of the fin (e.g., surface 396D), it prevents the surface area beneath the overlapping portion from being exposed to fluid flowing through the microchannels formed by such fin. In at least one embodiment, when the fin is a monolithic structure, the intermediate portion of such fin may have an intermediate surface between the inner surfaces of such a monolithic structure.

[0092] In at least one embodiment, although the inner surface of the fin base can receive some fluid from the data center liquid cooling system, this inner surface of the first configuration of the provided fins cannot properly exchange heat with such fluid. Therefore, in at least one embodiment, the provided fins 364 dissipate only a preliminary amount of heat to the fluid in the first configuration of the provided fins 364 in the smart dynamic cold plate. In at least one embodiment, the fluid flow refers to the fluid within the smart dynamic cold plate in the server chassis 308, rack 302, or data center. In at least one embodiment, the fluid can be moved by a flow controller associated with the cold plate, server chassis, or rack (via rack manifold).

[0093] In at least one embodiment, the top plate 368 may be movable relative to the bottom plate or substrate 362A and relative to the cover plate 362B. In at least one embodiment, such movement may be in a single relative direction relative to at least the substrate or bottom plate 362A. In at least one embodiment, depending on the structure of the overlapping portion of the fins, this movement may be lateral, as the overlapping portion is exposed or becomes exposed and moves toward one side of the fins before moving upwards. In at least one embodiment, a horizontal fin structure may be used, wherein the top plate moves horizontally rather than vertically, and the provided fins are horizontal fins.

[0094] In at least one embodiment, any structure provided for the fins in the intelligent dynamic cold plate is intended to dissipate more heat to the fluid when the provided fins are in an deployed configuration than when they are in a retracted configuration. In at least one embodiment, the base plate or substrate 362A may be attached to the data center device 324 directly or via an intermediate cooling surface in a suitable manner. In at least one embodiment, the interface between the cold plate 324 and the data center device 326 may be a thermally conductive grease that facilitates heat transfer from the data center device 326 to the intelligent dynamic cold plate 324. In at least one embodiment, the thermal grease is a silver-based compound. In at least one embodiment, the intermediate cooling surface may be an auxiliary cooling component in a hybrid cooling system.

[0095] In at least one embodiment, the intermediate cooling surface may be a liquid cooling component adapted to allow coolant to flow through the provided conduit. In at least one embodiment, movement relative to the base plate or substrate 362A associated with the top plate 368 is provided in the direction of the moving chamber 368B to achieve a second configuration of the smart dynamic cold plate. In at least one embodiment, a height measurement 368A, different from the moving chamber 368A, provides a measurable aspect of surface area, which can also be used to expose the fluid in the second configuration compared to the first configuration for the smart dynamic cold plate. In at least one embodiment, as the top plate 368 moves through the moving chamber 368B, it is able to provide a different intermediate configuration for the provided fins 364 until reaching a top dead center position within the moving chamber 368B, which may be defined by the cover plate 362B. In at least one embodiment, this movement causes the provided fins 364 to unfold and causes the overlapping surfaces (also referred to as inner surfaces) of the individual fins 364 to become non-overlapping with the intermediate portion or strip feature and with each other (indirectly, in at least one embodiment).

[0096] In at least one embodiment, such adaptive fins without intermediate surfaces or strip-like features are constructed such that each fin is fully bent and directly overlaps between the top and bottom of the fins by using a hinge between the top and bottom of the fins. In at least one embodiment, the expansion of the fins 364 provided in the smart dynamic cold plate causes the surface area of ​​these fins (previously in the overlapping surface) to be more compatible with... Figure 3A The outer surface on either side of the provided fin 364 is similar in manner (see also...). Figures 3F-3H The fins 364 become exposed to the fluid flowing therebetween. In at least one embodiment, the expansion of the provided fins 364 results in a second configuration (or intermediate configuration) of the provided fins 364 (and the smart dynamic cold plate). In at least one embodiment, the newly exposed and previously overlapping surface area allows additional heat to be dissipated from these fins into the fluid within the smart dynamic cold plate. In at least one embodiment, the additional heat (or accumulated heat, together with the first amount of heat already dissipated in the first configuration) may be referred to as the second amount of heat, which is greater than the first amount of heat when such fins are in the first configuration.

[0097] In at least one embodiment, the provided fins 364 are assisted or not assisted in their variation from a first configuration to a second configuration (and in any intermediate configuration). In at least one embodiment, in the assisted system, the control mechanism works with at least one computing device and includes a gear subsystem, an electromagnetic subsystem, a thermoelectric generator subsystem, a thermal reaction subsystem, or motion features 366A; 366B (in) that can be accessed via a data center cooling system. Figure 3C-3EThe pneumatic (or hydraulic) subsystem provided (as further described below) is described. In at least one embodiment, the entire base plate or substrate 362A may have more than one motion feature 366A for providing horizontal movement of the top plate or simultaneously providing equal exposure of all provided fins 364.

[0098] In at least one embodiment, motion features 366A, 366B, when there is more than one, are designed to address equal exposure of all associated overlapping surfaces of the provided fins 364. In at least one embodiment, different fins in the provided fins 364 of the intelligent dynamic cold plate can have different exposure levels because different sets of fins may be provided associated with different top plates 368. In at least one embodiment, when different top plates are involved, the overlapping surfaces restrict the microchannels between them, so that no flow occurs between the microchannels of the fins that do not extend in such overlapping portions. In at least one embodiment, for Figure 3A The reference to a single fin of fin 364 provided in other figures provided herein may be understood to be fairly applicable to all provided fins 364 provided for cold plate 326.

[0099] In at least one embodiment, a port and flow controller 370 are disposed on the side of the smart dynamic cold plate 326 to allow fluid to enter and exit through pipes or lines 372A, 374B provided for this purpose. In at least one embodiment, when a motion feature 366B is provided, one or more support features 366A may assist the motion feature 366B. In at least one embodiment, one or more support features 366A provide stability because the motion feature 366B acts on a region of the top plate 368 to raise the top plate 368 and thus expose the previously overlapping surface region of the provided fins 364 of the smart dynamic cold plate. In at least one embodiment, such support features 366A provide at least tension-based support to keep the top plate 368 stable across its four corners (or sides) when it is raised relative to the bottom plate or substrate 362A. In at least one embodiment, such tension-based support is provided by an internal spring adapted to compress when the entire load of the top plate 368 is applied to it. However, in at least one embodiment, this internal spring can remain in position when supported by an upward tension applied to the top plate 368 to reduce the load from the top plate 368.

[0100] In at least one embodiment, in the unassisted system, the data center cooling system may not include a top plate 368 for the intelligent dynamic cold plate. In at least one embodiment, the intelligent dynamic cold plate may not include motion features 366A; 366B, and may include or not include support features. In at least one embodiment, if support features 366A are provided on a base plate or bottom plate 362A, the top plate 368 may be provided as a support feature to reduce the load on the bottom plate or base plate 368 and the provided fins 364. In at least one embodiment, the unassisted system is implemented by a material contained within the entirety of one or more integrally provided fins 364 or in the strip features of one or more fins 364. In at least one embodiment, the unassisted system is implemented by at least one material contained within the entirety of one or more integrally provided fins 364 or in the strip features of one or more fins 364.

[0101] In at least one embodiment, the material may be a bipiezoelectric wafer material formed from at least two elements with different coefficients of thermal expansion, forming bi(or multi) metal strips. In at least one embodiment, this achieves a strip-like feature of one or more fins 364 or an intermediate portion of an integral structure of one or more fins 364. In at least one embodiment, the bipiezoelectric wafer material is reshaped or restructured, for example, from a curved shape or structure to a relatively straightened shape or structure. In at least one embodiment, heat from the associated data center component 324 causes the bipiezoelectric wafer material to reshape. In at least one embodiment, this change in shape or structure exposes at least more individual fins 364 to fluid compared to a curved position (overlapping position or configuration). In at least one embodiment, auxiliary and unassisted systems may be used with the bipiezoelectric wafer material to reduce load on the motion feature, or with the bipiezoelectric wafer material that first functions to deploy the provided fins 364 of the intelligent dynamic cold plate before the motion feature takes effect.

[0102] In at least one embodiment, at least one server tray or case 308 (e.g., the bottommost server tray or case 308 in rack 302) may be designated as a control system for a smart dynamic cold plate, such that if a localized coolant is used, such a system can be isolated from auxiliary cooling loops. In at least one embodiment, the control system in the server tray or case 308 may include safety features (e.g., sensors providing sensor data or appropriate functionality), communication features (for communicating with at least one flow controller in active mode and with an external monitor), power features for powering one or more flow controllers and controllers (for control mechanisms) and at least one processor (and its associated functions), and control features provided by at least one processor, which may be associated with at least one flow controller.

[0103] In at least one embodiment, such as Figure 3B The cold plate detail 380 shown can be associated with a smart dynamic cold plate used in a data center cooling system. In at least one embodiment, the top plate 368 is illustrated as being at its highest position relative to the bottom plate or substrate 362A of the smart dynamic cold plate (almost touching the cover plate 364). In at least one embodiment, the provided fins 364 are relative to... Figure 3A The provided fins 364 (shown as a first configuration) are in a second configuration. In at least one embodiment, the previously curved middle portion or strip-like feature 374 of each fin is more pronounced than when such a fin is in... Figure 3A The first configuration shown is relatively straighter. In at least one embodiment, the middle portion or strip feature 374 is part or all of the overlapping portion of the fins. In at least one embodiment, this overlapping portion 374 can be straight or curved, reaching the topmost position ( Figure 3B 368C in the middle) and the bottom position ( Figure 3A (in China) to relatively different degrees.

[0104] In at least one embodiment, when the intermediate portion 374 is a hinge or in the form of a hinge, the intermediate portion 374 does not resemble... Figure 3A , Figure 3B While the fins are as large as shown, each fin can have a surface area exposed to the fluid, especially in the second (deployed and exposed) configuration compared to the first (retracted and overlapped) configuration. In at least one embodiment, the first and second configurations (along with an intermediate configuration) can be functionally implemented by the capability or capacity of a set of fins to dissipate a first amount of heat, different from a second amount of heat, in one or more cycles of a data center device that generates a defined amount of heat. In at least one embodiment, this same functionality can be extrapolated to the intermediate configuration and the intermediate amount of heat dissipated for this intermediate configuration.

[0105] In at least one embodiment, an intermediate configuration of the provided fins between the first and second configurations may exist to provide an intermediate surface area, enabling the dissipation of a third amount of heat relative to each intermediate configuration of the provided fins 364. In at least one embodiment, in the auxiliary system, motion features 366A;B may have at least one movable portion 392D and at least one fixed portion 392E (e.g., Figure 3C-3E (As shown in the diagram). In at least one embodiment, at least one support feature may have similar fixed and movable portions. In at least one embodiment, at least one motion component is positioned within portion 392E of motion feature 366A. In at least one embodiment, at least one motion component is a component that can be associated with a gear subsystem, electromagnetic subsystem, thermoelectric generator subsystem, thermal reaction subsystem, or pneumatic (or hydraulic) subsystem discussed throughout this disclosure.

[0106] In at least one embodiment, at least one strip-shaped feature 396C is associated with the provided fins 395A-C (in...). Figure 3F-3H The fins are associated with each other so that each fin can include an overlapping portion. In at least one embodiment, the overlapping portion includes one or more surfaces 396D of each fin, which at least partially shield the fluid in a first configuration. Figure 3F ), and are separated in a second or intermediate configuration to expose the overlapping portions ( Figure 3G and Figure 3H Fluid is supplied. In at least one embodiment, at least one strip-shaped feature 396C associated with the provided fin may be partially formed of a dual piezoelectric wafer material, such that the top plate is movable relative to the bottom plate or substrate when heat acting on the dual piezoelectric wafer material is determined or sensed. In at least one embodiment, this represents the aforementioned unassisted system for moving the fin from a first configuration to a second configuration without processor instructions.

[0107] In at least one embodiment, for the pneumatic (or hydraulic) subsystem of the auxiliary system for the fins of the intelligent dynamic cold plate, the motion characteristics may utilize coolant from the cooling circuit to provide movement of the top plate relative to the bottom plate or substrate. In at least one embodiment, fluid or gas lines are capable of receiving fluid (or other media for fluid, including auxiliary coolant) from the cooling circuit of the data center hosting the data center or computing equipment. In at least one embodiment, the pneumatic subsystem operates using gas (or pressurized air), while the hydraulic subsystem uses fluid (e.g., auxiliary or local coolant) to extend the piston 392D. In at least one embodiment, this extension causes the top plate to move relative to the bottom plate or substrate and results in the exposure of the provided fin surface area in this second configuration of the fins.

[0108] In at least one embodiment, Figure 3C , Figure 3D and Figure 3E Processor-supported subsystems 390A, B, and C are shown, each capable of implementing a smart dynamic cold plate, including adaptable fins, such as those described throughout this document. In at least one embodiment, each of the processor-supported subsystems 390A, B, and C is at least with... Figure 3A , Figure 3B The associated description references a portion of or includes motion features. In at least one embodiment, as at least referenced... Figure 3A , Figure 3B As described herein, each of the processor-supported subsystems supports an auxiliary system for moving the top plate relative to the second plate. In at least one embodiment, each of the processor-supported subsystems described herein is capable of sending at least a corresponding input to a corresponding controller to cause movement of the top plate relative to the bottom plate or substrate.

[0109] In at least one embodiment, Figure 3C A processor-supported subsystem 390A is based on a mechanical gear subsystem, which is further supported by controller inputs from an electromechanical or mechanical controller 392A to a servo motor 392B. In at least one embodiment, when the processor senses or determines thermal characteristics or cooling requirements, the processor is able to determine the cooling capacity or capability of one or more associated smart dynamic cold plates. In at least one embodiment, the processor is adapted to react by at least activating a cooling circuit (if not already active) and by sending inputs to the electromechanical or mechanical controller 392A to move the fins to a second configuration or intermediate position. In at least one embodiment, the processor is able to control multiple controllers of multiple smart dynamic cold plates to move their respective fins to their respective second configurations simultaneously or independently.

[0110] In use Figure 3C In at least one embodiment of the processor-supported subsystem 390A, processor inputs are received in an electromechanical or mechanical controller 392A, which sends further control inputs to a motor, such as a servo motor 392B. In at least one embodiment, the controller 392A is electromechanical and adapted to provide signals to start, stop, and control the speed of the servo motor 392B. In at least one embodiment, the controller 392B is mechanical and adapted to apply or remove mechanical braking forces associated with gear 392C.

[0111] In at least one embodiment, a set of gears 392C converts the mechanical output of the servo motor 392B into lateral movement of the piston 392D. In at least one embodiment, the piston 392D has threads threadedly connected to at least one gear in the set of gears 392C for lateral movement of the piston 392D upwards or downwards. In at least one embodiment, the set of gears may include bevel gears for converting rotational motion into linear motion. In at least one embodiment, the top of the piston 392D may be associated with a top plate movable relative to a base plate or substrate.

[0112] In at least one embodiment, the base plate or substrate carries a support for Figure 3C The processor supports a subsystem 390A and is housed in a housing 392E containing one or all of the components 392A-D provided by the component. In at least one embodiment, the processor associated with the electromechanical or mechanical controller 392A may reside within the housing 392E and may be part of a distributed control system. In at least one embodiment, the processor may be... Figure 26 The processor 2607 contains at least one of its processor cores. In at least one embodiment, the processor is capable of performing partial heat demand detection, determining configuration requirements, and determining that the intelligent dynamic cold plate needs to be activated to... Figure 3C The -E processor supports one of the subsystems 390A, B, and C, which can be configured independently.

[0113] In at least one embodiment, Figure 3D This is a processor-supported subsystem 390B, which is based on an electromagnetic subsystem supported by processor inputs from and to an electromagnetic controller 392A and a control component 392G (e.g., an electromagnet). In at least one embodiment, when the processor senses or determines thermal characteristics or cooling requirements, the processor is able to determine the cooling capacity or capability of one or more associated smart dynamic cold plates. In at least one embodiment, the processor is adapted to react by at least activating a cooling circuit (if not already activated) and by sending an input to the electromagnetic controller 392A to cause the provided fins to move to a second configuration.

[0114] In at least one embodiment, Figure 3D In the processor-supported subsystem 390B, processor input can be received in an electromagnetic controller 392A, which sends further control inputs to one or more control components 392G, such as electromagnets. In at least one embodiment, the electromagnets convert the electrical inputs of the electromagnetic controller into magnetic attraction or repulsion forces in a sequence that causes the piston 392D to move laterally from within the tube 392F. In at least one embodiment, the top of the piston 392D can be associated with a top plate movable relative to a base plate or substrate. In at least one embodiment, the base plate or substrate carries... Figure 3DThe processor-supported subsystem 390B includes one or all of the components 392A, D, F, and G in the housing 392E. In at least one embodiment, the processor is associated with an electromagnetic controller 392A and may reside within the housing 392E and may be part of a distributed control system. In at least one embodiment, any of the provided controllers 392A is adapted to return an input to the processor or a signal in response to a query regarding the position of the piston 392D. In at least one embodiment, any of the provided controllers 392A is also adapted to return an input to the processor or a signal in response to a query regarding the state of the controller 392A.

[0115] In at least one embodiment, Figure 3E The processor-supported subsystem 390C is based on a pneumatic (or hydraulic) subsystem supported by processor inputs to and from the pneumatic (or hydraulic) controller 392A and control component 392G, such as fluid components with pumps, valves, or other flow controllers. In at least one embodiment, when the processor senses or determines thermal characteristics or cooling requirements, the processor is able to determine the cooling capacity or capability of one or more associated intelligent dynamic cold plates. In at least one embodiment, the processor is adapted to react by at least activating a cooling circuit (if not already activated) and by moving the fins to a second configuration by sending inputs to the pneumatic (or hydraulic) controller 392D.

[0116] In at least one embodiment, when the processor senses or determines thermal characteristics or cooling requirements, the processor is able to determine that the cooling capacity or capability of one or more associated smart dynamic cold plates is improved by the liquid cooling system. In at least one embodiment, the processor is adapted to react by at least activating a cooling circuit (if not already activated) and by sending an input to a pneumatic (or hydraulic) controller 392A to use fluid from the cooling circuit as an auxiliary function of the cooling circuit to move the associated fins to a second configuration. In at least one embodiment, the controller 392A is adapted to function as an electromechanical or mechanical controller, a pneumatic (or hydraulic) controller, or any other type of controller via selectable instructions within the processor, which functions as, is contained within, or includes the controller 392A.

[0117] In use Figure 3EIn at least one embodiment of the processor-supported subsystem 390C, processor input is received in a pneumatic (or hydraulic) controller 392A, which sends further control inputs via line 392I to one or more control components 392G, such as valves for fluid control. In at least one embodiment, the control input is an electro-pneumatic (or electro-hydraulic) valve forming one or more valves of the control component 392G, or a pneumatic (or hydraulic) to fully pneumatic (or fully hydraulic) valve forming one or more valves of the control component 392G. In at least one embodiment, one or more valves convert the electrical or pneumatic input of the pneumatic (or hydraulic) controller 392A into fluid within pipe 392F, thereby causing lateral movement of piston 392D.

[0118] In at least one embodiment, fluid originates from a cooling circuit, entering and exiting via lines or conduits 392H, 392J, or may be supplied via these same lines from a fin-specific liquid storage tank for the adaptive fins. In at least one embodiment, the top of piston 392D may be associated with a top plate movable relative to a base plate or substrate. In at least one embodiment, the base plate or substrate carries the fluid for… Figure 3E The processor supports one or all of the provided components 392A and housing 392E of the subsystem 390C. In at least one embodiment, the processor associated with the pneumatic (or hydraulic) controller 392A may be located within the housing 392E and may be part of a distributed control system. In at least one embodiment, the housing 392E is also capable of detecting fluid leaks and has a detector to notify the processor of fluid leaks as part of status information queried by the processor. In at least one embodiment, each of the provided pistons 392D can be returned to its initial position within the corresponding tube or housing by a spring acting on the bottom of the piston.

[0119] In at least one embodiment, for Figure 3EThe pneumatic (or hydraulic) controller 392A allows for pneumatic (or hydraulic) control actions to be provided via one or more bypass pumps or pipeline pumps on either the outlet side of the provided pipes 392H, 392J. In at least one embodiment, the pneumatic (or hydraulic) controller 392A can apply pumping actions on both the inlet and outlet sides of the provided pipes. In at least one embodiment, the pneumatic (or hydraulic) controller 392A is thus able to perform a suction action rather than a pushing action. In at least one embodiment, a check valve can be used as one or more control components for retaining fluid within fitting 392F or retaining fluid outside fitting 392F during upward or downward pumping to move from a first configuration of the smart dynamic cold plate to a second configuration or from a second configuration to a first configuration. In at least one embodiment, when the pneumatic (or hydraulic) controller 392A induces a series action, there are suction and pushing actions acting on the fluid within the provided pipes. In at least one embodiment, the induced series flow allows for higher flow rates, resulting in faster configuration switching.

[0120] In at least one embodiment, Figure 3F and Figure 3G The illustrations depict aspects of adaptive fins 395A, 395B, and 395C for a smart dynamic cold plate. In at least one embodiment, Figure 3F The illustration shows a first configuration of retracted, unexposed, or overlapping portions in fin 395A. In at least one embodiment, Figure 3G and Figure 3H The spread-out, exposed, or non-overlapping portions of fins 395B and 395C are shown. In at least one embodiment, Figure 3H The diagram shows that the fin may have multiple strip-shaped portions 396C, which can be further expanded than the fin 395B to provide a third configuration. In at least one embodiment, a first expansion may cause two portions of the fin 395C to become exposed, while a second expansion causes a third portion to become exposed, wherein such exposure refers to the passage of fluid between them.

[0121] In at least one embodiment, each of the provided fins 395A, 395B, and 395C may be a monolithic structure or a combination of portions. In at least one embodiment, each fin has a first portion 396A, a second portion 396D, and an intermediate portion 396C (also referred to as an overlapping portion or segment). In at least one embodiment, the intermediate portion 396C may be a strip-shaped feature formed of a material different from the first and second portions. In at least one embodiment, the intermediate portion 396C may be formed of the same material as the first and second portions, but may be a portion of a different size, allowing it to be more curved than the first or second portion.

[0122] In at least one embodiment, the dimensionally different portions may refer to thinner portions of the same or similar material that can be used for the first and second portions, thereby making the intermediate portion 396C a flexible strip-like feature relative to the first and second portions. In at least one embodiment, the intermediate portion 396C may be made of a dual piezoelectric wafer metal that changes shape or structure when heat is applied. In at least one embodiment, this allows the intermediate portion 396C to move relative to the second portion 396D, and also allows the attached second portion 396A to move. In at least one embodiment, the end result is that, compared to when the second portion is in the first configuration (and overlaps, thus preventing the underlying surface from being exposed), at least the inner surface of one or more of the first and second portions of the fin is exposed to dissipate at least more heat into the fluid. In at least one embodiment, this represents a smart but processorless adaptive fin for a heat sink.

[0123] In at least one embodiment, the intermediate portion 396C has two surfaces at the junction between the overlapping surfaces of the first and second portions. In at least one embodiment, various attachment materials 396B, 396E are provided to associate the fins with the top and bottom plates within the smart dynamic cold plate, for example in... Figure 3A , Figure 3B In at least one embodiment, attachment material is provided only in the bottom section or portion 396D for attaching the fins to the base plate. In at least one embodiment, this can be a case of fins without auxiliary systems, which maintain a vertical structure regardless of whether the fins are in a retracted or deployed position. In at least one embodiment, the middle portion has sufficient rigidity to change the shape or structure from curved to nearly straight without causing the fins to sag.

[0124] In at least one embodiment, each second portion 396A may have a thickness or feature that prevents fluid from flowing between portions 396A, 396D of the fin. In at least one embodiment, the fin, for example... Figure 3F The fins 395A shown may have channels 396F (also referred to as microchannels) between them. In at least one embodiment, when in a retracted configuration or state, the overlapping portion 396C in each fin (and the thickness or feature of the second portion 396A) prevents fluid from flowing through the channels 396F formed between such fins 395A. In at least one embodiment, when in an deployed configuration or state, the overlapping portion 396C (and the thickness or feature of the second portion 396A) from... Figure 3G The bottom or first portion 396D of each fin of at least adjacent fins 395B is removed. In at least one embodiment, this movement opens a channel 396F between each fin of at least adjacent fins 395B. In at least one embodiment, in Figure 3FEven if channels are shown in at least the retracted configuration or state, these channels are informational and may not exist in the implementation until an unfolded configuration or state is provided for such fins.

[0125] In at least one embodiment, the fin may be designed to maintain a vertical bottom structure and a horizontal (or diagonal) top structure. In at least one embodiment, when the fin is in a second or deployed configuration, a first portion of such a fin is vertical, while a second portion is horizontal or diagonal. In at least one embodiment, this ensures that at least the inner surface of the second portion 396D is exposed to the fluid, resulting in increased heat dissipation from the associated fin to such fluid. In at least one embodiment, the first portion of such a fin is vertical, and the second portion may also be vertical. In at least one embodiment, the topmost position in these different configurations may be the top position of the first portion 396A in a fully extended horizontal, diagonal, or vertical position.

[0126] In at least one embodiment, Figure 3G At least a second configuration of each provided fin 395B is shown, distinguishing it from... Figure 3F The first position of each provided fin 395A. In at least one embodiment, Figure 3G Also shown is a middle portion or strip-like feature 396C with a modified shape or structure. In at least one embodiment, the modified shape may be because the middle portion 396C does not conform to... Figure 3F The same intermediate portion 396C shows an angle of bend or fold as large. In at least one embodiment, even if the intermediate portion 396C still includes a curve or bend (representing shape or structure), such curve or bend is not as large as the bend or fold of the intermediate portion 396C of each provided fin 395A relative to each provided fin 395B in the unfolded or second configuration.

[0127] In at least one embodiment, this at least allows the second portion 396D of each of the provided fins 395B to expose more of its inner surface. In at least one embodiment, while the inner surface of the second portion may have some exposure to fluid flowing (or to flow) therein due to gaps that may exist in the first portion 396A in the first configuration (see the gap between the first portion 396A and the second portion 396D, the gap between fin 395A in the first configuration or state and fin 395B in the second configuration or state), even if such gaps exist, the inner surface may be obstructed by the first configuration. In at least one embodiment, the exposed inner surface is fully exposed without such obstruction or such gaps, making it possible to dissipate more heat in the second configuration of each provided fin 395B than in the first configuration of such fins.

[0128] In at least one embodiment, Figure 3C The illustration shows multiple first sections that can be positioned on top of the second section of each provided fin 395C, unlike... Figure 3F , Figure 3G The provided fins are 395A and 395B. In at least one embodiment, a plurality of first portions may be separated by one or more intermediate portions or strip features. In at least one embodiment, the material strength of each portion allows each first portion to extend (or expose its underlying surface area). In at least one embodiment, this adaptation can enable multiple intermediate configurations for the fins, such as for... Figure 3H The fins 395C. In at least one embodiment, different first portions of the fins may have different angles in their second configurations. In at least one embodiment, the different angles may include vertical, horizontal, or diagonal extension angles relative to the second portion or second plate, which is fixed and carries each provided fin 395C.

[0129] In at least one embodiment, such as Figure 4 The data center-level feature 400 shown can be associated with a smart dynamic cold plate for a data center cooling system. In at least one embodiment, the data center-level feature 400 within the data center 402 may include a rack 404 for hosting one or more server trays or enclosures; one or more CDUs 406 for heat exchange between an auxiliary cooling loop 412 and a main cooling loop 422; one or more row manifolds 410 for distributing coolant from the CDUs 406; and associated flow controllers 420, as well as inlet and outlet lines 412, 414, 416, 418. In at least one embodiment, a second CDU or reservoir 424, distinct from the auxiliary coolant from the first CDU 406, may be used to provide fluid for cooling the cold plate. In at least one embodiment, such a second CDU or reservoir 424 may have its own flow controller and its own cooling manifold, which may be distinct from the cooling manifold of the first CDU 406.

[0130] In at least one embodiment, a smart dynamic cold plate is provided in association with rack 404 in data center 402. In at least one embodiment, fluid or auxiliary coolant flows through a provided manifold 430 to reach the rack manifold or server manifold before reaching the smart dynamic cold plate, but may also be used by acting as a piston 392D (in Figure 3CThe hydraulic fluid (in E) causes a second configuration in the smart dynamic cold plate. In at least one embodiment, the fluid, as a local coolant or auxiliary coolant, provides cooling during operation of the data center cooling system. In at least one embodiment, different racks 404 of the data center cooling system collaboratively have smart dynamic cold plates for liquid cooling. In at least one embodiment, a fluid or local coolant manifold 430 can be provided to directly supply fluid or local coolant to the smart dynamic cold plate of the server tray or enclosure of rack 404.

[0131] In at least one embodiment, different manifolds 410 may be associated with different racks. In at least one embodiment, different coolants may be chemically matched or mismatched relative to the auxiliary coolant. In at least one embodiment, different fluid sources are provided as redundant features to different CDUs based on the chemical properties of the different auxiliary coolants used with each of the different provided CDUs. In at least one embodiment, one or more racks 404 do not require auxiliary cooling circuits and CDUs, but local coolant from the coolant source is sufficient to cool the racks 404. In at least one embodiment, these racks not associated with auxiliary cooling circuits can be adequately cooled by intelligent dynamic cold plates with local cooling circuits.

[0132] In at least one embodiment, rack 404 may be associated with at least one processor for operating the intelligent dynamic cold plate. In at least one embodiment, the processor may include one or more circuits. In at least one embodiment, one or more circuits of the processor may be adapted to determine the cooling requirements of the data center cooling system. In at least one embodiment, the processor may enable a first configuration or a second configuration of the intelligent dynamic cold plate to address a first cooling requirement or a second cooling requirement. In at least one embodiment, such operation may be independent of auxiliary coolant and main coolant from cooling facility 408 due to the local cooling loop associated with the intelligent dynamic cold plate.

[0133] In at least one embodiment, the processor used with the intelligent dynamic cold plate includes inputs for receiving sensor inputs from sensors associated with at least one computing device of rack 404. In at least one embodiment, the sensors may be associated simultaneously or individually with the rack, auxiliary coolant, or fluid or local coolant from the associated cold plate of the rack. In at least one embodiment, the processor may determine a first cooling requirement and a second cooling requirement in part based on sensor inputs from these associated sensors. In at least one embodiment, a first configuration or a second configuration may be enabled for the intelligent dynamic cold plate in part based on sensor inputs from these associated sensors.

[0134] In at least one embodiment, one or more neural networks may be provided within at least one processor for receiving sensor inputs and inferring first and second cooling requirements from the perspective of a computing device or data center cooling system. In at least one embodiment, one or more neural networks may infer faults in an auxiliary cooling loop or a main cooling loop. In at least one embodiment, based in part on sensor inputs associated with flow rate, volume, temperature, humidity, and leakage, one or more circuits of the processor may enable one or more flow controllers to support cooling from localized cooling loops using a second configuration enabled for intelligent dynamic cold plates.

[0135] In at least one embodiment, the processor used with rack 404 and the intelligent dynamic cold plate includes one or more circuits. In at least one embodiment, the one or more circuits of the processor can cause a first mode or a second mode of operation of the data center cooling system. In at least one embodiment, causing the first mode or the second mode refers to causing the data center cooling system to operate the intelligent dynamic cold plate in a first configuration or a second configuration. In at least one embodiment, the processor can be provided with one or more circuits for training one or more neural networks to infer cooling demand from sensor inputs of sensors associated with fluid from or from at least one cold plate of the rack. In at least one embodiment, the processor can cause the first configuration or the second configuration to be enabled for the intelligent dynamic cold plate. In at least one embodiment, the cold plate can be cooled by an auxiliary coolant associated with a primary coolant.

[0136] In at least one embodiment, the data center cooling system includes a cold plate with multiple fins. In at least one embodiment, such fins dissipate heat and are adjustable. In at least one embodiment, the amount of surface area of ​​such fins exposed to and cooled by a fluid can be adjusted. In at least one embodiment, such fins are adjusted at least in part based on the temperature associated with the fluid entering or leaving the cold plate or with at least one computing device.

[0137] In at least one embodiment, the intelligent dynamic cold plate can be associated with a control mechanism to adjust the fins provided therein. In at least one embodiment, the control mechanism may include a gear subsystem, an electromagnetic subsystem, a thermoelectric generator subsystem, a thermal reaction subsystem, a pneumatic subsystem, or a hydraulic subsystem. In at least one embodiment, the provided fins may include a flat strip shape factor, which allows the individual fins to have overlapping portions. In at least one embodiment, the overlapping portions are shielded from fluid by the intelligent dynamic cold plate in a first state or configuration. In at least one embodiment, the overlapping portions are separated to expose the overlapping portions to the fluid in a second state.

[0138] In at least one embodiment, depending on the processor or processorless application, channels can be formed by scraping after forming a block of one or more materials. In at least one embodiment, microchannels can be formed therebetween at a spacing of approximately 300 micrometers. In at least one embodiment, a heat map can be determined for at least one associated computing device. In at least one embodiment, such a heat map can be used to reconfigure or reset a cold plate by reconfiguring or resetting the channels within the cold plate. In at least one embodiment, this configuration or state change increases the fluid flow rate and the surface area of ​​the fins exposed to this fluid. In at least one embodiment, the amount of fluid in the heated region can be half the volume or flow rate compared to other regions of the heat map.

[0139] In at least one embodiment, the smart dynamic cold plate may include ports for microchannels that support the flow of auxiliary coolant in the auxiliary cooling circuit and the flow of a fluid different from the auxiliary coolant. In at least one embodiment, at least one processor may be provided to receive sensor input from a sensor associated with at least one computing device. In at least one embodiment, the at least one processor may be adapted to determine a first change in the coolant state based in part on the sensor input, and to expose a certain surface area of ​​the provided fins to the fluid. In at least one embodiment, one or more neural networks may be adapted to receive such sensor input and infer the change in the coolant state. In at least one embodiment, the change in the coolant state may include a fault in the auxiliary cooling circuit (e.g., CDU and cooling manifold) or the main cooling circuit (e.g., cooling facility, cooling manifold, and associated CDU). In at least one embodiment, such a fault may require the removal of more heat, at least by increasing the surface area exposed to the fluid flowing through the cold plate.

[0140] In at least one embodiment, the cold plate, such as a smart dynamic cold plate, includes fins made of at least two materials, enabling the fins to respond to temperature in part based on the properties of these materials, and exposing a certain amount of their surface area to fluid within the cold plate. In at least one embodiment, an intermediate configuration of the fins of the smart dynamic cold plate is enabled. In at least one embodiment, this intermediate configuration or state is between a first configuration and a second configuration of the smart dynamic cold plate. In at least one embodiment, the first configuration, the intermediate configuration, and the second configuration provide different amounts of surface area of ​​the fins that can be exposed to fluid within the cold plate, allowing different amounts of heat from the fins to be transferred to the fluid.

[0141] In at least one embodiment, a fluid line may be provided for the intelligent dynamic cold plate to receive auxiliary coolant or fluid from a cooling loop of a data center cooling system. In at least one embodiment, the fluid line supports gas or fluid for operation of the fins or plate to achieve a first state or configuration and to achieve a second state or configuration. In at least one embodiment, a hydraulic subsystem may use auxiliary coolant or fluid to extend a piston and move a movable plate (e.g., a top plate within the cold plate) relative to a bottom plate or substrate within the cold plate. In at least one embodiment, this movement enables control over the amount of surface area of ​​the provided fins to be exposed to fluid within the cold plate.

[0142] In at least one embodiment, throughout Figure 1-4 Each of the at least one processor described has inference and / or training logic 1815, which may include, but is not limited to, code and / or data storage 1801 for storing forward and / or output weights and / or input / output data, and / or other parameters to configure neurons or layers of a neural network trained and / or used for inference in one or more embodiments. In at least one embodiment, training logic 1815 may include or be coupled to code and / or data storage 1801 for storing graph code or other software to control timing and / or sequence, wherein weight and / or other parameter information may be loaded to configure logic including integer and / or floating-point units (collectively, arithmetic logic units (ALUs)). In at least one embodiment, code such as graph code loads weight or other parameter information into the processor ALU based on the architecture of the neural network to which such code corresponds. In at least one embodiment, code and / or data storage 1801 stores weight parameters and / or input / output data of each layer of a neural network trained or used in one or more embodiments during the forward propagation of input / output data, and / or weight parameters during training and / or inference using one or more embodiments. In at least one embodiment, any portion of the code and / or data storage 1801 may be included together with other on-chip or off-chip data storage, including the processor's L1, L2, or L3 cache or system memory.

[0143] In at least one embodiment, the inference and / or training logic 1815 of at least one processor may be part of a building management system (BMS) for controlling one or more flow controllers at the server, cold plate, rack, and row levels. In at least one embodiment, the determination of which flow controllers are engaged and associated with auxiliary cooling loops, intelligent dynamic cold plates, CDUs, or other cooling manifolds may be provided to one or more neural networks of the inference and / or training logic 1815 to infer which flow controllers may properly engage or disengage based on the coolant requirements of one or more cold plates, servers, or racks.

[0144] In at least one embodiment, the processor may include one or more circuits. In at least one embodiment, the one or more circuits may be adapted to determine a temperature associated with at least one computing device. In at least one embodiment, the processor may be adapted to adjust a plurality of fins within a cold plate to control the amount of surface area of ​​the fins that may be exposed to and cooled by a fluid.

[0145] In at least one embodiment, the processor may include an output that provides signals to at least one controller, such as regarding Figure 3C The controller discussed in section -E enables adjustment of the amount of surface area of ​​the provided fins to be exposed to and cooled by a fluid. In at least one embodiment, the processor's input may be adapted to receive sensor input from a sensor associated with at least one computing device, rack, auxiliary coolant, or fluid. In at least one embodiment, the processor may be adapted to determine a first cooling requirement for fins in which cooling can be provided in a retracted configuration; and may be adapted to determine a second cooling requirement for such fins in an exposed configuration. In at least one embodiment, the first or second cooling requirement may be determined in part based on the received sensor input.

[0146] In at least one embodiment, one or more neural networks may be adapted to receive sensor input and infer a first cooling demand and a second cooling demand of at least one computing device, which may be addressed by a first state or configuration or a second state or configuration of the intelligent dynamic cold plate. In at least one embodiment, one or more neural networks may be adapted to infer a failure of the auxiliary cooling circuit. In at least one embodiment, one or more circuits of the processor may enable at least one controller to adjust the amount of surface area of ​​the provided fins. In at least one embodiment, this surface area will be exposed to fluid within the intelligent dynamic cold plate. In at least one embodiment, this fluid may originate from a local cooling circuit rather than an auxiliary cooling circuit.

[0147] In at least one embodiment, the processor may include one or more circuits. In at least one embodiment, the one or more circuits may include, or may be adapted to, train one or more neural networks to infer from sensor inputs of a sensor associated with at least one computing device that a change in cooling demand has occurred. In at least one embodiment, the processor may be adapted to adjust a plurality of fins within the cold plate to control the amount of surface area of ​​such fins to be exposed to and cooled by the fluid.

[0148] In at least one embodiment, the processor's output may be adapted to signal at least one controller to enable regulation to control the amount of surface area of ​​the provided fins to be exposed to and cooled by the fluid. In at least one embodiment, one or more neural networks may be adapted to receive sensor input and be trained to infer a first cooling demand for fins within a cold plate, wherein such fins are in a retracted configuration. In at least one embodiment, one or more neural networks may be adapted to receive sensor input and be trained to infer a second cooling demand for fins within a cold plate, wherein such fins are in an exposed configuration. In at least one embodiment, one or more neural networks may be adapted to receive sensor input and be trained to infer such cooling demands in part based on the received sensor input.

[0149] In at least one embodiment, the processor's output is adapted to signal at least one controller to induce one or more different exposures of the fin surface area to address varying cooling requirements in a data center. In at least one embodiment, the processor's input may be adapted to receive sensor inputs associated with the temperature of at least one computing device, an auxiliary coolant, or a fluid passing through the cold plate. In at least one embodiment, one or more neural networks may be trained to infer, in part, that a change in cooling requirements has occurred based on such a temperature and previous temperatures. In at least one embodiment, one or more circuits may be adapted to control the amount of surface area of ​​the fins within the cooling plate that can be exposed to and cooled by the fluid.

[0150] In at least one embodiment, at least one processor may be associated with a local cooling loop and an auxiliary cooling loop. In at least one embodiment, at least one processor may be associated with a smart dynamic cooling plate. In at least one embodiment, at least one processor includes control logic, such as inference and / or training logic 1815, and is associated with at least one flow controller. In at least one embodiment, at least one flow controller may have its own processor or microcontroller. In at least one embodiment, the processor or microcontroller executes instructions sent to it from the control logic. In at least one embodiment, the control logic may be used to determine changes in the coolant state, such as a failure in the auxiliary cooling loop (e.g., CDU and cooling manifold) or the main cooling loop (e.g., cooling facility, cooling manifold, and associated CDU). In at least one embodiment, a failure may also occur in a cooling manifold that needs replacement. In at least one embodiment, the control logic may cause at least one flow controller to provide a response, for example, by engaging a local cooling loop having fluid or local coolant and a supporting smart dynamic cooling plate to provide cooling for at least one computing device.

[0151] In at least one embodiment, as part of a response to controlling the cooling of at least one computing device, the control logic may signal at least one flow controller to initiate fluid or local coolant from a local cooling loop. In at least one embodiment, the control logic may receive sensor input from a sensor associated with the auxiliary coolant, fluid, or local coolant of the CDU and / or at least one computing device. In at least one embodiment, at least one processor may determine changes in the coolant state in part based on the sensor input. In at least one embodiment, one or more neural networks of the inference and / or training logic 1815 may be adapted to receive sensor input and infer changes in the coolant state.

[0152] In at least one embodiment, at least one processor may include one or more circuitry for one or more neural networks, such as inference and / or training logic 1815. In at least one embodiment, the inference and / or training logic 1815 may be adapted to infer changes in coolant state from sensor input associated with at least one server or at least one rack, for example, coolant from the CDU becoming ineffective or retaining excessive heat upon entering the rack. In at least one embodiment, one or more circuitry may be adapted to cause at least one flow controller to provide a response from a local cooling loop and may be adapted to cause a second configuration or state of the cold plate to at least temporarily increase heat dissipation.

[0153] In at least one embodiment, control logic associated with one or more circuits can send a first signal (along with any related signals) to at least one flow controller to enable a response—from an auxiliary cooling loop or a local cooling loop with a smart dynamic cold plate. In at least one embodiment, if further cooling is required, a second signal can be provided to at least one controller of the smart dynamic cold plate to enable a second configuration or state. In at least one embodiment, the distributed or integrated architecture is implemented by one or more circuits of at least one processor. In at least one embodiment, the distributed architecture can be supported by circuits located at different locations within one or more circuits.

[0154] In at least one embodiment, one or more neural networks of the inference and / or training logic 1815 may be adapted to infer an increase or decrease in the cooling demand of at least one computing component of at least one server. In at least one embodiment, one or more circuits may be adapted to induce a first or second configuration or state of the intelligent dynamic cold plate.

[0155] In at least one embodiment, at least one processor includes one or more circuits, such as inference and / or training logic 1815, for training one or more neural networks to perform inference based on provided data. In at least one embodiment, the inference and / or training logic 1815 can infer changes in coolant state from sensor input associated with at least one server or at least one rack. In at least one embodiment, inference can be used to enable one or more circuits to provide a response to at least one flow controller of a local cooling loop or to cause at least one controller of the smart dynamic cold plate to induce a first or second configuration of such smart dynamic cold plate.

[0156] In at least one embodiment, one or more circuits may be adapted to train one or more neural networks to infer an increase or decrease in the cooling demand of at least one computing component of at least one server. In at least one embodiment, one or more circuits may be adapted to train one or more neural networks to infer an increase or decrease in the flow output of an auxiliary cooling loop in relation to an improper flow of auxiliary coolant, due to a corresponding increase or decrease in the power demand of a faulty CDU or at least one computing component of at least one server.

[0157] In at least one embodiment, one or more neural networks can be trained to infer from previously associated thermal characteristics or cooling requirements from a computing device, server, or rack, and cooling capacity or capability indicated by a fluid source of a local cooling loop, such as a smart dynamic cold plate having a specific cooling capacity exceeding that of forced air cooling. In at least one embodiment, previous cooling requirements satisfied by a second configuration of the local cooling loop and the smart dynamic cold plate can be used to enable one or more neural networks to make similar inferences about future similar cooling requirements (taking into account minor changes there) by adjusting one or more flow controllers to engage the local cooling loop or by adjusting one or more controllers to induce a first or second configuration or state of the smart dynamic cold plate.

[0158] Figure 5 The diagram illustrates a relationship according to at least one embodiment. Figure 2-4 A method 500 associated with a data center cooling system. In at least one embodiment, method 500 includes step 502, for providing a plurality of fins within a cold plate to dissipate heat to a fluid passing through the plurality of fins. In at least one embodiment, step 504 is used to determine or identify the cooling requirements of at least one computing device in a rack. In at least one embodiment, step 506 is used to verify at least one cooling requirement of at least one computing device. In at least one embodiment, step 504 enables the determination of cooling requirements in part based on the temperature associated with the fluid or at least one computing device.

[0159] In at least one embodiment, step 508 is used to make the fins within the cold plate adjustable and to receive adjustment. In at least one embodiment, step 510 is used to control the amount of surface area to be exposed to the fluid by means of the adjustment of the fins within the cooling plate available in step 508. In at least one embodiment, step 504 can be repeated if step 506 determines that there is no further cooling requirement for at least one computing device or that the existing cooling requirement has not changed.

[0160] In at least one embodiment, method 500 may include a further step or sub-step for determining a temperature associated with at least one computing device using at least one processor. In at least one embodiment, method 500 may include a further step or sub-step for determining a first cooling requirement or a second cooling requirement using the temperature associated with at least one computing device.

[0161] In at least one embodiment, method 500 may include further steps or sub-steps for inducing a control mechanism to adjust the fins within the cold plate, in part based on a first cooling demand or a second cooling demand. In at least one embodiment, such a control mechanism may include a gear subsystem, an electromagnetic subsystem, a thermoelectric generator subsystem, a thermal reaction subsystem, a pneumatic subsystem, or a hydraulic subsystem.

[0162] In at least one embodiment, method 500 may include further steps or sub-steps for receiving sensor inputs in at least one processor from sensors associated with at least one computing device, rack, auxiliary coolant, or fluid. In at least one embodiment, method 500 may include further steps or sub-steps for determining a first cooling requirement and a second cooling requirement using at least one processor, partially based on such sensor inputs. In at least one embodiment, method 500 may include further steps or sub-steps for enabling a plurality of fins to comprise at least two materials. In at least one embodiment, the at least two materials enable the plurality of fins to respond to a determined or sensed temperature and can expose a certain amount of surface area of ​​the plurality of fins to the fluid, partially based on the properties of these materials.

[0163] In at least one embodiment, method 500 may include further steps or sub-steps for implementing an intermediate configuration of the plurality of fins between a first configuration and a second configuration. In at least one embodiment, the first configuration, the intermediate configuration, and the second configuration may provide different amounts of surface area to be exposed, such that different amounts of heat from the plurality of fins can be transferred to the fluid.

[0164] Servers and data centers

[0165] The following figures illustrate, but are not limited to, systems based on exemplary network servers and data centers that can be used to implement at least one embodiment.

[0166] Figure 6 A distributed system 600 according to at least one embodiment is illustrated. In at least one embodiment, the distributed system 600 includes one or more client computing devices 602, 604, 606, and 608 configured to execute and operate client applications, such as web browsers, proprietary clients, and / or variations thereof, on one or more networks 610. In at least one embodiment, a server 612 may be communicatively coupled to remote client computing devices 602, 604, 606, and 608 via network 610.

[0167] In at least one embodiment, server 612 may be adapted to run one or more services or software applications, such as services and applications that manage session activity for single sign-on (SSO) access across multiple data centers. In at least one embodiment, server 612 may also provide other services or software applications, which may include non-virtual and virtual environments. In at least one embodiment, these services may be provided as web-based services or cloud services or under a Software as a Service (SaaS) model to users of client computing devices 602, 604, 606, and / or 608. In at least one embodiment, users operating client computing devices 602, 604, 606, and / or 608 may in turn use one or more client applications to interact with server 612 to utilize the services provided by these components.

[0168] In at least one embodiment, software components 618, 620, and 622 of system 600 are implemented on server 612. In at least one embodiment, one or more components of system 600 and / or the services provided by these components may also be implemented by one or more client computing devices 602, 604, 606, and / or 608. In at least one embodiment, a user operating a client computing device can then utilize one or more client applications to use the services provided by these components. In at least one embodiment, these components may be implemented using hardware, firmware, software, or a combination thereof. It should be understood that various different system configurations are possible and may differ from the distributed system 600. Therefore, Figure 6 The embodiments shown are at least one embodiment of a distributed system for implementing the system of the embodiments, and are not intended to be limiting.

[0169] In at least one embodiment, client computing devices 602, 604, 606, and / or 608 may include different types of computing systems. In at least one embodiment, the client computing device may include a portable handheld device (e.g., Cellular phone Computing tablets, personal digital assistants (PDAs), or wearable devices (e.g., Google) Head-mounted display), running software (such as Microsoft Windows) And / or various mobile operating systems (such as iOS, Windows Phone, Android, BlackBerry 10, Palm OS, and / or variants thereof). In at least one embodiment, the device may support different applications, such as various Internet-related applications, email, short message service (SMS) applications, and may use various other communication protocols. In at least one embodiment, the client computing device may also include a general-purpose personal computer, in at least one embodiment of which includes a general-purpose personal computer running various versions of Microsoft... Apple Personal computers and / or laptops running Linux operating systems.

[0170] In at least one embodiment, the client computing device can be running various commercially available operating systems. The client computing device may be a workstation computer operating system similar to UNIX, including but not limited to various GNU / Linux operating systems such as Google Chrome OS. In at least one embodiment, the client computing device may further include electronic devices capable of communicating over one or more networks 610, such as thin client computers, internet-enabled gaming systems (e.g., with or without...). Gesture input devices include Microsoft Xbox game consoles and / or personal messaging devices. Despite Figure 6 The distributed system 600 is shown as having four client computing devices, but can support any number of client computing devices. Other devices (such as devices with sensors) can interact with the server 612.

[0171] In at least one embodiment, network 610 in distributed system 600 can be any type of network capable of supporting data communication using any of the various available protocols, including but not limited to TCP / IP (Transmission Control Protocol / Internet Protocol), SNA (System Network Architecture), IPX (Internet Packet Switching), AppleTalk, and / or variations thereof. In at least one embodiment, network 610 can be a local area network (LAN), an Ethernet-based network, Token Ring, a wide area network (WAN), the Internet, a virtual network, a virtual private network (VPN), an intranet, an extranet, a public switched telephone network (PSTN), an infrared network, or a wireless network (e.g., in the IEEE 802.11 protocol suite). Networks operating under any of the wireless protocols (and / or any other wireless protocols), and / or any combination of these and / or other networks.

[0172] In at least one embodiment, server 612 may consist of one or more general-purpose computers, dedicated server computers (including PC (personal computer) servers in at least one embodiment), Servers (including mid-range servers, mainframe computers, rack servers, etc.), server farms, server clusters, or any other suitable arrangement and / or combination thereof. In at least one embodiment, server 612 may include one or more virtual machines running a virtual operating system or other computing architectures involving virtualization. In at least one embodiment, one or more flexible pools of logical storage devices may be virtualized to maintain virtual storage devices for the server. In at least one embodiment, the virtual network may be controlled by server 612 using software-defined networking. In at least one embodiment, server 612 may be adapted to run one or more services or software applications.

[0173] In at least one embodiment, server 612 can run any operating system, and any commercially available server operating system. In at least one embodiment, server 612 can also run any of a variety of additional server applications and / or mid-level applications, including HTTP (Hypertext Transfer Protocol) servers, FTP (File Transfer Protocol) servers, CGI (Common Gateway Interface) servers, etc. Servers, database servers, and / or variations thereof. In at least one embodiment, exemplary database servers include, but are not limited to, those commercially available from Oracle, Microsoft, Sybase, IBM (International Business Machines), and / or variations thereof.

[0174] In at least one embodiment, server 612 may include one or more applications for analyzing and merging data feeds and / or event updates received from users of client computing devices 602, 604, 606, and 608. In at least one embodiment, data feeds and / or event updates may include, but are not limited to, data received from one or more third-party information sources and continuous data streams. feed, Updates or real-time updates may include real-time events related to sensor data applications, financial quotes, network performance measurement tools (e.g., network monitoring and business management applications), clickstream analysis tools, vehicle traffic monitoring, and / or their changes. In at least one embodiment, server 612 may also include one or more applications for displaying data feeds and / or real-time events via one or more display devices of client computing devices 602, 604, 606, and 608.

[0175] In at least one embodiment, the distributed system 600 may further include one or more databases 614 and 616. In at least one embodiment, the databases may provide mechanisms for storing information such as user interaction information, usage pattern information, adaptation rule information, and other information. In at least one embodiment, databases 614 and 616 may reside in various locations. In at least one embodiment, one or more of databases 614 and 616 may reside on a non-transitory storage medium local to server 612 (and / or within server 612). In at least one embodiment, databases 614 and 616 may be located remotely from server 612 and communicate with server 612 via a network-based connection or a dedicated connection. In at least one embodiment, databases 614 and 616 may reside in a storage area network (SAN). In at least one embodiment, any necessary files for performing functions belonging to server 612 may be appropriately stored locally on server 612 and / or remotely. In at least one embodiment, databases 614 and 616 may include relational databases, such as databases adapted to store, update, and retrieve data in response to SQL-formatted commands.

[0176] Figure 7 An exemplary data center 700 according to at least one embodiment is shown. In at least one embodiment, the data center 700 includes, but is not limited to, a data center infrastructure layer 710, a framework layer 720, a software layer 730, and an application layer 740.

[0177] In at least one embodiment, such as Figure 7 As shown, the data center infrastructure layer 710 may include a resource coordinator 712, grouped computing resources 714, and node computing resources (“nodes CR”) 716(1)-716(N), where “N” represents any complete positive integer. In at least one embodiment, nodes CR 716(1)-716(N) may include, but are not limited to, any number of central processing units (“CPUs”) or other processors (including accelerators, field-programmable gate arrays (“FPGAs”), graphics processors, etc.), memory devices (e.g., dynamic read-only memory), storage devices (e.g., solid-state drives or disk drives), network input / output (“NW I / O”) devices, network switches, virtual machines (“VMs”), power modules, and cooling modules, etc. In at least one embodiment, one or more nodes CR 716(1)-716(N) may be servers having one or more of the aforementioned computing resources.

[0178] In at least one embodiment, the grouped computing resources 714 may include individual groups (not shown) of node CRs housed in one or more racks, or a plurality of racks (also not shown) housed in data centers in various geographic locations. The individual groups of node CRs within the grouped computing resources 714 may include computing, networking, memory, or storage resources that can be configured or allocated to support groups of one or more workloads. In at least one embodiment, several node CRs, including CPUs or processors, may be grouped within one or more racks to provide computing resources to support one or more workloads. In at least one embodiment, the one or more racks may also include any number of power modules, cooling modules, and network switches, in any combination.

[0179] In at least one embodiment, resource coordinator 712 may configure or otherwise control one or more nodes CR716(1)-716(N) and / or grouped computing resources 714. In at least one embodiment, resource coordinator 712 may include a Software Design Infrastructure (“SDI”) management entity for data center 700. In at least one embodiment, resource coordinator 712 may include hardware, software, or some combination thereof.

[0180] In at least one embodiment, such as Figure 7As shown, the framework layer 720 includes, but is not limited to, a job scheduler 732, a configuration manager 734, a resource manager 736, and a distributed file system 738. In at least one embodiment, the framework layer 720 may include a framework of software 752 supporting the software layer 730 and / or one or more applications 742 of the application layer 740. In at least one embodiment, the software 752 or application 742 may respectively include web-based service software or applications, such as services or applications provided by Amazon Web Services, Google Cloud, and Microsoft Azure. In at least one embodiment, the framework layer 720 may be, but is not limited to, a free and open-source software web application framework, such as Apache Spark™ (hereinafter referred to as "Spark") which can utilize the distributed file system 738 for large-scale data processing (e.g., "big data"). In at least one embodiment, the job scheduler 732 may include a Spark driver to facilitate the scheduling of workloads supported by the various layers of the data center 700. In at least one embodiment, the configuration manager 734 may be able to configure different layers, such as the software layer 730 and the framework layer 720 including Spark and the distributed file system 738 for supporting large-scale data processing. In at least one embodiment, resource manager 736 is capable of managing cluster or group computing resources mapped to or allocated to support distributed file system 738 and job scheduler 732. In at least one embodiment, cluster or group computing resources may include group computing resources 714 on data center infrastructure layer 710. In at least one embodiment, resource manager 736 may coordinate with resource coordinator 712 to manage these mapped or allocated computing resources.

[0181] In at least one embodiment, the software 752 included in the software layer 730 may include software used by at least a portion of nodes CR716(1)-716(N), grouped computing resources 714, and / or the distributed file system 738 of the framework layer 720. One or more types of software may include, but are not limited to, Internet web page search software, email virus scanning software, database software, and streaming video content software.

[0182] In at least one embodiment, one or more applications 742 included in the application layer 740 may include one or more types of applications used by at least a portion of nodes CR716(1)-716(N), grouped computing resources 714, and / or the distributed file system 738 of the framework layer 720. One or more types of applications may include, but are not limited to, CUDA applications, 5G network applications, artificial intelligence applications, data center applications, and / or variations thereof.

[0183] In at least one embodiment, any of the configuration manager 734, resource manager 736, and resource coordinator 712 can implement any number and type of self-modification actions based on any amount and type of data acquired in any technically feasible manner. In at least one embodiment, self-modification actions can mitigate potentially poor configuration decisions by data center operators of data center 700 and can prevent underutilization and / or poor performance of the data center.

[0184] Figure 8 A client-server network 804, formed by a plurality of interconnected network server computers 802, is illustrated according to at least one embodiment. In at least one embodiment, each network server computer 802 stores data accessible to other network server computers 802 and client computers 806 and networks 808 linked to the wide area network 804. In at least one embodiment, the configuration of the client-server network 804 may change over time when client computers 806 and one or more networks 808 connect and disconnect from the network 804, and when one or more backbone server computers 802 are added to or removed from the network 804. In at least one embodiment, the client-server network includes client computers 806 and networks 808 when they are connected to network server computers 802. In at least one embodiment, the term "computer" includes any device or machine capable of accepting data, applying prescribed processes to the data, and providing the results of those processes.

[0185] In at least one embodiment, the client-server network 804 stores information accessible to the network server computer 802, the remote network 808, and the client computer 806. In at least one embodiment, the network server computer 802 is formed from a mainframe computer, a minicomputer, and / or a microcomputer, each having one or more processors. In at least one embodiment, the server computer 802 is linked together via wired and / or wireless transmission media (such as wires, fiber optic cables) and / or microwave transmission media, satellite transmission media, or other conductive, optical, or electromagnetic wave transmission media. In at least one embodiment, the client computer 806 accesses the network server computer 802 via similar wired or wireless transmission media. In at least one embodiment, the client computer 806 can be linked to the client-server network 804 using a modem and standard telephone communication networks. In at least one embodiment, alternative carrier systems (such as cable and satellite communication systems) can also be used to link to the client-server network 804. In at least one embodiment, other private or time-sharing carrier systems can be used. In at least one embodiment, network 804 is a global information network, such as the Internet. In at least one embodiment, the network is a private intranet using protocols similar to the Internet but with added security measures and restricted access controls. In at least one embodiment, network 804 is a private or semi-private network using proprietary communication protocols.

[0186] In at least one embodiment, the client computer 806 is any end-user computer, and may also be a mainframe computer, minicomputer, or microcomputer with one or more microprocessors. In at least one embodiment, the server computer 802 may sometimes be used as a client computer to access another server computer 802. In at least one embodiment, the remote network 808 may be a local area network (LAN), a network added to a wide area network via an independent service provider (ISP) for the Internet, or another group of computers interconnected via wired or wireless transmission media with fixed or time-varying configurations. In at least one embodiment, the client computer 806 may independently or via a link to and access network 804.

[0187] Figure 9A computer network 908 connecting one or more computing machines is illustrated according to at least one embodiment. In at least one embodiment, network 908 can be any type of electrically connected group of computers, including, for example, the Internet, intranet, local area network (LAN), wide area network (WAN), or an interconnection combination of these network types. In at least one embodiment, the connection within network 908 can be a remote modem, Ethernet (IEEE 802.3), Token Ring (IEEE 802.5), Fiber Distributed Data Link Interface (FDDI), Asynchronous Transfer Mode (ATM), or any other communication protocol. In at least one embodiment, the computing devices linked to the network can be desktop computers, servers, portable, handheld, set-top boxes, personal digital assistants (PDAs), terminals, or any other desired type or configuration. In at least one embodiment, depending on their functionality, network-connected devices can vary widely in terms of processing power, internal memory, and other performance characteristics.

[0188] In at least one embodiment, communication within the network, as well as communication to or from computing devices connected to the network, can be wired or wireless. In at least one embodiment, network 908 may at least partially comprise the worldwide public Internet, which typically connects multiple users according to the Transmission Control Protocol / Internet Protocol (TCP / IP) specification based on a client-server model. In at least one embodiment, a client-server network is the dominant model for communication between two computers. In at least one embodiment, a client computer (“client”) issues one or more commands to a server computer (“server”). In at least one embodiment, the server fulfills client commands by accessing available network resources and returning information to the client in accordance with the client commands. In at least one embodiment, client computer systems and network resources residing on the network server are assigned network addresses for identification during communication between network elements. In at least one embodiment, communication from other network-connected systems to the server will include the network address of the relevant server / network resource as part of the communication, such that the appropriate destination of the data / request is identified as the recipient. In at least one embodiment, when network 908 includes the global Internet, the network address is an IP address in TCP / IP format, which can at least partially route data to email accounts, websites, or other Internet tools residing on the server. In at least one embodiment, information and services residing on the web server can be made available to the web browser of the client computer via a domain name (e.g., www.site.com) (which maps to the IP address of the web server).

[0189] In at least one embodiment, multiple clients 902, 904, and 906 are connected to network 908 via respective communication links. In at least one embodiment, each of these clients can access network 908 via any desired form of communication, such as via dial-up modem connection, cable link, digital subscriber line (DSL), wireless or satellite link, or any other form of communication. In at least one embodiment, each client can communicate using any machine compatible with network 908 (e.g., personal computer (PC), workstation, dedicated terminal, personal data assistant (PDA), or other similar device). In at least one embodiment, clients 902, 904, and 906 may or may not be located in the same geographical area.

[0190] In at least one embodiment, multiple servers 910, 912, and 914 are connected to network 918 to serve clients communicating with network 918. In at least one embodiment, each server is typically a powerful computer or device that manages network resources and responds to client commands. In at least one embodiment, the server includes computer-readable data storage media, such as hard disk drives and RAM memory, that store program instructions and data. In at least one embodiment, servers 910, 912, and 914 run applications that respond to client commands. In at least one embodiment, server 910 may run a web server application for responding to client requests for HTML pages and may also run a mail server application for receiving and routing emails. In at least one embodiment, other applications, such as an FTP server or media server for streaming audio / video data to clients, may also run on server 910. In at least one embodiment, different servers may be dedicated to performing different tasks. In at least one embodiment, server 910 may be a dedicated web server for managing website-related resources for different users, while server 912 may be dedicated to providing email management. In at least one embodiment, the other servers may be dedicated to a combination of two or more services typically available or provided over a network, such as media (audio, video, etc.), File Transfer Protocol (FTP), or other services. In at least one embodiment, each server may be located in the same or different location as the other servers. In at least one embodiment, multiple servers may exist to perform mirroring tasks for users, thereby mitigating congestion or minimizing traffic directed to and from a single server. In at least one embodiment, servers 910, 912, and 914 are under the control of a web hosting provider that maintains and delivers third-party content over network 918.

[0191] In at least one embodiment, the web hosting provider delivers services to two different types of clients. In at least one embodiment, one type, which may be referred to as a browser, requests content such as web pages, email messages, video clips, etc., from servers 910, 912, 914. In at least one embodiment, a second type (which may be referred to as a user) hires the web hosting provider to maintain network resources (such as websites) and make them available to the browser. In at least one embodiment, the user contracts with the web hosting provider to make memory space, processor capacity, and communication bandwidth available to the network resources they desire, according to the amount of server resources the user expects to utilize.

[0192] In at least one embodiment, in order for a web hosting provider to serve both clients, the application managing network resources hosted on the server must be properly configured. In at least one embodiment, the program configuration process involves defining a set of parameters that at least partially control the application's response to browser requests and also at least partially define the server resources available to a particular user.

[0193] In one embodiment, intranet server 916 communicates with network 908 via a communication link. In at least one embodiment, intranet server 916 communicates with server manager 918. In at least one embodiment, server manager 918 includes a database of application configuration parameters used by servers 910, 912, and 914. In at least one embodiment, a user modifies database 920 via intranet 916, and server manager 918 interacts with servers 910, 912, and 914 to modify application parameters so that they match the contents of the database. In at least one embodiment, a user logs into intranet 916 by connecting to intranet 916 via computer 902 and entering authentication information such as a username and password.

[0194] In at least one embodiment, when a user wishes to log in to a new service or modify an existing service, the intranet server 916 authenticates the user and provides the user with an interactive screen display / control panel that allows the user access to configuration parameters for a specific application. In at least one embodiment, multiple modifiable text boxes describing aspects of the user's website or other network resources are presented to the user. In at least one embodiment, if the user desires to increase the storage space reserved for their website on the server, a field is provided where the user specifies the desired storage space. In at least one embodiment, in response to receiving this information, the intranet server 916 updates the database 920. In at least one embodiment, the server manager 918 forwards the information to the appropriate server and uses the new parameters during application operation. In at least one embodiment, the intranet server 916 is configured to provide the user with access to configuration parameters of network resources (e.g., web pages, email, FTP sites, media sites, etc.) that the user has contracted with a web hosting service provider.

[0195] Figure 10A A networked computer system 1000A according to at least one embodiment is illustrated. In at least one embodiment, the networked computer system 1000A includes a plurality of nodes or personal computers (“PCs”) 1002, 1018, 1020. In at least one embodiment, the personal computer or node 1002 includes a processor 1014, memory 1016, a camera 1004, a microphone 1006, a mouse 1008, a speaker 1010, and a monitor 1012. In at least one embodiment, PCs 1002, 1018, 1020 may each run one or more desktop servers, such as those on an internal network within a given company, or may be servers on a general network not limited to a specific environment. In at least one embodiment, each PC node in the network has one server, such that each PC node in the network represents a specific network server with a specific network URL address. In at least one embodiment, each server defaults to a default webpage for the user of that server, and the default webpage itself may contain embedded URLs pointing to further subpages for that user on that server, or to pages on other servers on the network or other servers.

[0196] In at least one embodiment, nodes 1002, 1018, 1020 and other nodes of the network are interconnected via medium 1022. In at least one embodiment, medium 1022 may be a communication channel such as Integrated Services Digital Network (“ISDN”). In at least one embodiment, the individual nodes of the networked computer system may be connected via various communication media, including a local area network (“LAN”), a simple old-fashioned telephone line (“POTS”) (sometimes referred to as the Public Switched Telephone Network (“PSTN”)), and / or variations thereof. In at least one embodiment, the individual nodes of the network may also constitute users of computer systems interconnected via a network such as the Internet. In at least one embodiment, each server on the network (running from a specific node of the network at a given instance) has a unique address or identifier within the network, which may be specified according to a URL.

[0197] In at least one embodiment, multiple multipoint conferencing units (“MCUs”) can therefore be used to transmit data to and from various nodes or “endpoints” of the conferencing system. In at least one embodiment, in addition to various other communication media (such as nodes connected via the Internet), the nodes and / or MCUs may be interconnected via ISDN links or through a local area network (“LAN”). In at least one embodiment, the nodes of the conferencing system may typically be directly connected to a communication medium (such as a LAN) or connected via an MCU, and the conferencing system may include other nodes or components, such as routers, servers, and / or variations thereof.

[0198] In at least one embodiment, processor 1014 is a general-purpose programmable processor. In at least one embodiment, the processor of a node in the networked computer system 1000A can also be a dedicated video processor. In at least one embodiment, the different peripheral devices and components of a node (such as those of node 1002) can be different from those of other nodes. In at least one embodiment, nodes 1018 and 1020 can be configured to be the same as or different from node 1002. In at least one embodiment, the node can also be implemented on any suitable computer system other than a PC system.

[0199] Figure 10BA networked computer system 1000B according to at least one embodiment is illustrated. In at least one embodiment, system 1000B illustrates a network (such as LAN 1024) that can be used to interconnect various nodes that can communicate with each other. In at least one embodiment, multiple nodes, such as PC nodes 1026, 1028, and 1030, are attached to LAN 1024. In at least one embodiment, nodes may also be connected to the LAN via a network server or other means. In at least one embodiment, system 1000B includes other types of nodes or elements, including, for at least one embodiment, routers, servers, and nodes.

[0200] Figure 10C A networked computer system 1000C is illustrated according to at least one embodiment. In at least one embodiment, system 1000C illustrates a WWW system with communication across a backbone communication network (such as the Internet 1032), the backbone communication network being used to interconnect various nodes of the network. In at least one embodiment, the WWW is a set of protocols operating on top of the Internet and allows a graphical interface system to operate on it to access information via the Internet. In at least one embodiment, the Internet 1032 attached to the WWW consists of multiple nodes, such as PCs 1040, 1042, and 1044. In at least one embodiment, nodes interface with other nodes of the WWW via WWW HTTP servers (such as servers 1034 and 1036). In at least one embodiment, PC 1044 may be a PC forming a node of network 1032, and PC 1044 itself runs its server 1036, although for illustrative purposes... Figure 10C PC 1044 and server 1036 are shown separately.

[0201] In at least one embodiment, the WWW is a distributed type of application characterized by WWW HTTP, the WWW protocol, which runs on top of the Internet's Transmission Control Protocol / Internet Protocol (“TCP / IP”). In at least one embodiment, the WWW can therefore be characterized by a set of protocols running on the Internet (i.e., HTTP) as its “backbone”.

[0202] In at least one embodiment, the web browser is an application running on a node of a network in a WWW-compatible network system, allowing users of a particular server or node to view such information and thus allowing users to search for graphics and text-based documents linked together using hypertext links embedded in documents or files available from servers that understand HTTP. In at least one embodiment, when a user uses another server on a network such as the Internet to retrieve a given webpage from a first server associated with a first node, the retrieved document may have different hypertext links embedded therein, and a local copy of the page created locally by the user is also retrieved. In at least one embodiment, when a user clicks a hypertext link, locally stored information associated with the selected hypertext link is generally sufficient to allow the user's machine to open a connection over the Internet to the server indicated by the hypertext link.

[0203] In at least one embodiment, more than one user may be coupled to each HTTP server via a LAN (such as LAN 1038, as shown with respect to WWW HTTP server 1034). In at least one embodiment, system 1000C may also include other types of nodes or elements. In at least one embodiment, the WWW HTTP server is an application running on a machine such as a PC. In at least one embodiment, each user may be considered to have a unique “server,” as shown with respect to PC 1044. In at least one embodiment, a server may be considered to be a server such as WWW HTTP server 1034 that provides access to the network for a LAN or multiple nodes or multiple LANs. In at least one embodiment, there are multiple users, each user having a desktop PC or a node on the network, and each desktop PC potentially establishing a server for its users. In at least one embodiment, each server is associated with a specific network address or URL that, when accessed, provides a default webpage for that user. In at least one embodiment, the webpage may contain further links (embedded URLs) pointing to further subpages for that user on that server, or to other servers on the network or to pages on other servers on the network.

[0204] Cloud computing and services

[0205] The following figures illustrate, but are not limited to, exemplary cloud-based systems that can be used to implement at least one embodiment.

[0206] In at least one embodiment, cloud computing is a computing style in which dynamically scalable and typically virtualized resources are provided as a service over the Internet. In at least one embodiment, users do not need knowledge of, expertise in, or control over the technical infrastructure supporting them, which may be referred to as "in the cloud." In at least one embodiment, cloud computing consolidates infrastructure into services, Platform as a Service (PaaS), Software as a Service (SaaS), and other variations with common Internet-dependent themes to meet users' computing needs. In at least one embodiment, a typical cloud deployment (such as in a private cloud (e.g., an enterprise network)) or a data center (DC) in a public cloud (e.g., the Internet) may consist of thousands of servers (or alternatively, VMs), hundreds of Ethernet, Fibre Channel, or Fibre Channel over Ethernet (FCoE) ports, switching and storage infrastructure, etc. In at least one embodiment, the cloud may also consist of network service infrastructure such as IPsec VPN hubs, firewalls, load balancers, wide area network (WAN) optimizers, etc. In at least one embodiment, remote subscribers can securely access cloud applications and services via a VPN tunnel (such as an IPsec VPN tunnel).

[0207] In at least one embodiment, cloud computing is a model for enabling convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, servers, storage devices, applications, and services) that can be quickly configured and released with minimal management effort or service provider interaction.

[0208] In at least one embodiment, cloud computing is characterized by on-demand self-service, where consumers can automatically and unilaterally provision computing power, such as server time and network storage, as needed, without human interaction with each service provider. In at least one embodiment, cloud computing is characterized by broad network access, where capabilities are available on the network and accessed via standard mechanisms that facilitate use by heterogeneous thin or thick client platforms (e.g., mobile phones, laptops, and PDAs). In at least one embodiment, cloud computing is characterized by resource pooling, where a provider's computing resources are pooled to serve multiple consumers using a multi-tenant model, where different physical and virtual resources are dynamically signed and reallocated based on consumer demand. In at least one embodiment, there is a sense of location independence because consumers typically have no control or knowledge of the exact location of the resources provided, but may be able to specify the location at a higher level of abstraction (e.g., country, state, or data center).

[0209] In at least one embodiment, resources include storage, processing, memory, network bandwidth, and virtual machines. In at least one embodiment, cloud computing is characterized by rapid elasticity, where capacity can be rapidly and elastically provisioned (in some cases automatically) to scale down and up rapidly. In at least one embodiment, for consumers, the capacity available for provisioning generally appears unlimited and can be purchased at any time in any quantity. In at least one embodiment, cloud computing is characterized by measured services, where the cloud system automatically controls and optimizes resource usage by leveraging metering capabilities at some level of abstraction suitable for service types (e.g., storage, processing, bandwidth, and active user accounts). In at least one embodiment, resource usage can be monitored, controlled, and reported, thereby providing transparency to both the providers and consumers of the services utilized.

[0210] In at least one embodiment, cloud computing may be associated with various services. In at least one embodiment, cloud Software as a Service (SaaS) may refer to the ability provided to consumers as a service that uses applications from a provider running on cloud infrastructure. In at least one embodiment, applications may be accessed from different client devices via a thin client interface such as a web browser (e.g., web-based email). In at least one embodiment, consumers do not manage or control the underlying cloud infrastructure, including networks, servers, operating systems, storage, or even the capabilities of individual applications, with possible exceptions of limited user-specific application configuration settings.

[0211] In at least one embodiment, Cloud Platform as a Service (PaaS) can refer to a service in which the ability to provide consumers with the capability to deploy consumer-created or acquired applications onto cloud infrastructure, these applications being created using programming languages ​​and tools supported by the provider. In at least one embodiment, the consumer does not manage or control the underlying cloud infrastructure, including networks, servers, operating systems, or storage, but has control over the deployed applications and, possibly, the configuration of the application hosting environment.

[0212] In at least one embodiment, cloud infrastructure as a service (IaaS) can refer to a service in which the capabilities provided to consumers are processing, storage, networking, and other basic computing resources that consumers can deploy and run, including operating systems and applications. In at least one embodiment, consumers do not manage or control the underlying cloud infrastructure, but instead have control over the operating system, storage, deployed applications, and possibly limited control over selected networking components (e.g., host firewalls).

[0213] In at least one embodiment, cloud computing can be deployed in different ways. In at least one embodiment, a private cloud can refer to cloud infrastructure that is operated solely by an organization. In at least one embodiment, a private cloud can be managed by an organization or a third party and can exist on-site or off-site. In at least one embodiment, a community cloud can refer to cloud infrastructure shared by several organizations and supporting a specific community with shared concerns (e.g., mission, security requirements, policies, and compliance considerations). In at least one embodiment, a community cloud can be managed by an organization or a third party and can exist on-site or off-site. In at least one embodiment, a public cloud can refer to cloud infrastructure that is available to the general public or a large industry group and is owned by an organization providing cloud services. In at least one embodiment, a hybrid cloud can refer to cloud infrastructure that is composed of two or more clouds (private, community, or public) that remain a single entity but are bound together by standardization or proprietary technologies that enable data and application portability (e.g., cloud bursting for load balancing between clouds). In at least one embodiment, the cloud computing environment is service-oriented, focusing on statelessness, loose coupling, modularity, and semantic interoperability.

[0214] Figure 11 The diagram illustrates one or more components of a system environment 1100 according to at least one embodiment, wherein services can be provided as third-party network services. In at least one embodiment, the third-party network may be referred to as a cloud, cloud network, cloud computing network, and / or variations thereof. In at least one embodiment, system environment 1100 includes one or more client computing devices 1104, 1106, and 1108, which can be used by users to interact with a third-party network infrastructure system 1102 that provides third-party network services (which may be referred to as cloud computing services). In at least one embodiment, third-party network infrastructure system 1102 may include one or more computers and / or servers.

[0215] It should be understood that Figure 11 The third-party network infrastructure system 1102 described herein may have components other than those described. Furthermore, Figure 11 An embodiment of a third-party network infrastructure system is described. In at least one embodiment, the third-party network infrastructure system 1102 may have a greater than Figure 11 The more or fewer components depicted may be combined into two or more components, or may have different component configurations or arrangements.

[0216] In at least one embodiment, client computing devices 1104, 1106, and 1108 may be configured to operate client applications, such as web browsers, which may be used by a user of the client computing devices to interact with a third-party network infrastructure system 1102 to use proprietary client applications or other applications that provide services provided by the third-party network infrastructure system 1102. Although the exemplary system environment 1100 is shown as having three client computing devices, any number of client computing devices can be supported. In at least one embodiment, other devices, such as devices with sensors, may interact with the third-party network infrastructure system 1102. In at least one embodiment, one or more networks 1110 may facilitate communication and data exchange between client computing devices 1104, 1106, and 1108 and the third-party network infrastructure system 1102.

[0217] In at least one embodiment, the services provided by the third-party network infrastructure system 1102 may include hosting services available on demand to users of the third-party network infrastructure system. In at least one embodiment, various services may also be provided, including but not limited to online data storage and backup solutions, web-based email services, hosted office suites and document collaboration services, database management and processing, managed technical support services, and / or variations thereof. In at least one embodiment, the services provided by the third-party network infrastructure system can be dynamically expanded to meet the needs of its users.

[0218] In at least one embodiment, a specific instantiation of a service provided by the third-party network infrastructure system 1102 may be referred to as a "service instance". In at least one embodiment, generally, any service available to a user from the third-party network service provider system via a communication network (such as the Internet) is referred to as a "third-party network service". In at least one embodiment, in a public third-party network environment, the servers and systems constituting the third-party network service provider system are different from the servers and systems on the customer's own premises. In at least one embodiment, the third-party network service provider system may host applications, and users may subscribe to and use applications on demand via a communication network (such as the Internet).

[0219] In at least one embodiment, services within a third-party network infrastructure may include protected computer network access to storage, hosted databases, hosted web servers, software applications, or other services provided to users by a third-party network provider. In at least one embodiment, services may include password-protected access to remote storage devices on a third-party network via the Internet. In at least one embodiment, services may include a web-based hosted relational database and a scripting language middleware engine for private use by network developers. In at least one embodiment, services may include access to email software applications hosted on a website hosted by a third-party network provider.

[0220] In at least one embodiment, the third-party network infrastructure system 1102 may include a suite of application, middleware, and database service providers delivered to clients in a self-service, subscription-based, elastically scalable, reliable, highly available, and secure manner. In at least one embodiment, the third-party network infrastructure system 1102 may also provide “big data” related computing and analytics services. In at least one embodiment, the term “big data” is generally used to refer to extremely large datasets that can be stored and manipulated by analysts and researchers to visualize large amounts of data, detect trends, and / or otherwise interact with the data. In at least one embodiment, big data and related applications may be hosted and / or manipulated by the infrastructure system at many levels and at different scales. In at least one embodiment, dozens, hundreds, or thousands of processors linked in parallel may act on such data to present the data or simulate external forces on the data or what it represents. In at least one embodiment, these datasets may involve structured data (such as structured data organized in a database or otherwise according to a structured model) and / or unstructured data (e.g., emails, images, data blobs (binary large objects), web pages, complex event processing). In at least one embodiment, by leveraging the ability of the embodiment to focus more (or less) computing resources relatively quickly on the target, third-party network infrastructure systems can be better used to perform tasks on large datasets based on the needs of enterprises, government agencies, research organizations, private individuals, groups of like-minded individuals or organizations, or other entities.

[0221] In at least one embodiment, the third-party network infrastructure system 1102 can be adapted to automatically provide, manage, and track customer subscriptions to services provided by the third-party network infrastructure system 1102. In at least one embodiment, the third-party network infrastructure system 1102 can provide third-party network services via different deployment models. In at least one embodiment, services can be provided under a public third-party network model, wherein the third-party network infrastructure system 1102 is owned by an organization selling third-party network services, and the services are available to the general public or various industry enterprises. In at least one embodiment, services can be provided under a private third-party network model, in which the third-party network infrastructure system 1102 operates only for a single organization and can provide services to one or more entities within that organization. In at least one embodiment, third-party network services can also be provided under a community third-party network model, wherein the third-party network infrastructure system 1102 and the services provided by the third-party network infrastructure system 1102 are shared by several organizations in the relevant community. In at least one embodiment, third-party network services can also be provided under a hybrid third-party network model, which is a combination of two or more different models.

[0222] In at least one embodiment, the services provided by the third-party network infrastructure system 1102 may include one or more services offered under the Software as a Service (SaaS) category, Platform as a Service (PaaS) category, Infrastructure as a Service (IaaS) category, or other service categories that include hybrid services. In at least one embodiment, a customer may subscribe to one or more services provided by the third-party network infrastructure system 1102 via a subscription order. In at least one embodiment, the third-party network infrastructure system 1102 then performs processing to provide the services in the customer's subscription order.

[0223] In at least one embodiment, the services provided by the third-party network infrastructure system 1102 may include, but are not limited to, application services, platform services, and infrastructure services. In at least one embodiment, application services may be provided by the third-party network infrastructure system via a SaaS platform. In at least one embodiment, the SaaS platform may be configured to provide third-party network services belonging to the SaaS category. In at least one embodiment, the SaaS platform may provide the ability to build and deliver a suite of on-demand applications on an integrated development and deployment platform. In at least one embodiment, the SaaS platform may manage and control the underlying software and infrastructure used to provide SaaS services. In at least one embodiment, by utilizing the services provided by the SaaS platform, customers can utilize applications running on the third-party network infrastructure system. In at least one embodiment, customers can obtain application services without needing to purchase separate licenses and support. In at least one embodiment, a variety of different SaaS services may be provided. In at least one embodiment, this may include, but is not limited to, services providing solutions for sales performance management, enterprise integration, and business agility for large organizations.

[0224] In at least one embodiment, the platform service may be provided by a third-party network infrastructure system 1102 via a PaaS platform. In at least one embodiment, the PaaS platform may be configured to provide third-party network services belonging to the PaaS category. In at least one embodiment, the platform service may include, but is not limited to, services that enable organizations to merge existing applications on a shared public architecture, and the ability to build new applications utilizing shared services provided by the platform. In at least one embodiment, the PaaS platform may manage and control the underlying software and infrastructure used to provide the PaaS service. In at least one embodiment, customers can access the PaaS service provided by the third-party network infrastructure system 1102 without the need for customers to purchase separate licenses and support.

[0225] In at least one embodiment, by leveraging services provided by a PaaS platform, customers can employ programming languages ​​and tools supported by a third-party network infrastructure system and also control the deployed services. In at least one embodiment, the platform services provided by the third-party network infrastructure system may include database third-party network services, middleware third-party network services, and third-party network services. In at least one embodiment, the database third-party network service may support a shared service deployment model that enables organizations to aggregate database resources and provide database-as-a-service to customers in the form of a database third-party network. In at least one embodiment, within the third-party network infrastructure system, the middleware third-party network service can provide customers with a platform to develop and deploy different business applications, and the third-party network service can provide customers with a platform to deploy applications.

[0226] In at least one embodiment, various infrastructure services may be provided by an IaaS platform within a third-party network infrastructure system. In at least one embodiment, infrastructure services facilitate the management and control of underlying computing resources (such as storage, networking, and other basic computing resources) by customers utilizing services provided by SaaS and PaaS platforms.

[0227] In at least one embodiment, the third-party network infrastructure system 1102 may further include infrastructure resources 1130 for providing resources for offering various services to customers of the third-party network infrastructure system. In at least one embodiment, infrastructure resources 1130 may include a pre-integrated and optimized combination of hardware (such as servers, storage, and networking resources) for performing services provided by PaaS platforms and SaaS platforms, as well as other resources.

[0228] In at least one embodiment, resources in the third-party network infrastructure system 1102 can be shared by multiple users and dynamically reallocated as needed. In at least one embodiment, resources can be allocated to users in different time zones. In at least one embodiment, the third-party network infrastructure system 1102 can enable a first group of users in a first time zone to utilize the resources of the third-party network infrastructure system for a specified number of hours, and subsequently enable the reallocation of the same resources to another group of users located in a different time zone, thereby maximizing resource utilization.

[0229] In at least one embodiment, multiple internal shared services 1132, shared by different components or modules of the third-party network infrastructure system 1102, may be provided to enable services provided by the third-party network infrastructure system 1102. In at least one embodiment, these internal shared services may include, but are not limited to, security and identity services, integration services, enterprise library services, enterprise manager services, virus scanning and whitelisting services, high availability, backup and recovery services, services for enabling third-party network support, email services, notification services, file transfer services, and / or variations thereof.

[0230] In at least one embodiment, the third-party network infrastructure system 1102 can provide comprehensive management of third-party network services (e.g., SaaS, PaaS, and IaaS services) within the third-party network infrastructure system. In at least one embodiment, the third-party network management functionality may include the ability and / or variations thereof for provisioning, managing, and tracking customer subscriptions received by the third-party network infrastructure system 1102.

[0231] In at least one embodiment, such as Figure 11As shown, third-party network management functions can be provided by one or more modules, such as order management module 1120, order coordination module 1122, order supply module 1124, order management and monitoring module 1126, and identity management module 1128. In at least one embodiment, these modules may include or be provided using one or more computers and / or servers, which may be general-purpose computers, dedicated server computers, server farms, server clusters, or any other suitable arrangement and / or combination.

[0232] In at least one embodiment, in step 1134, a customer using a client device (such as client computing devices 1104, 1106, or 1108) interacts with the third-party network infrastructure system 1102 by requesting one or more services provided by the third-party network infrastructure system 1102 and placing an order for a subscription to one or more services provided by the third-party network infrastructure system 1102. In at least one embodiment, the customer may access a third-party network user interface (UI), such as third-party network UI 1112, third-party network UI 1114, and / or third-party network UI 1116, and place orders via these UIs. In at least one embodiment, order information received by the third-party network infrastructure system 1102 in response to a customer placing an order may include information identifying the customer and the one or more services provided by the third-party network infrastructure system 1102 that the customer wishes to subscribe to.

[0233] In at least one embodiment, in step 1136, the order information received from the customer may be stored in the order database 1118. In at least one embodiment, if this is a new order, a new record may be created for the order. In at least one embodiment, the order database 1118 may be one of several databases operated by a third-party network infrastructure system 1118 and in conjunction with other system components.

[0234] In at least one embodiment, in step 1138, the order information can be forwarded to the order management module 1120, which can be configured to perform billing and accounting functions related to the order, such as verifying the order and, after verification, booking an order.

[0235] In at least one embodiment, in step 1140, information about the order may be transmitted to an order coordination module 1122, which is configured to coordinate the provision of services and resources for orders placed by customers. In at least one embodiment, the order coordination module 1122 may use the services of the order provisioning module 1124 for provisioning. In at least one embodiment, the order coordination module 1122 enables the management of business processes associated with each order and applies business logic to determine whether an order should continue to be provisioned.

[0236] In at least one embodiment, in step 1142, upon receiving a new subscription order, the order coordination module 1122 sends a request to the order provisioning module 1124 to allocate resources and configure the resources required to satisfy the subscription order. In at least one embodiment, the order provisioning module 1124 implements resource allocation for the service ordered by the customer. In at least one embodiment, the order provisioning module 1124 provides an abstraction level between third-party network services provided by the third-party network infrastructure system 1100 and the physical implementation layer used to supply resources for providing the requested service. In at least one embodiment, this allows the order coordination module 1122 to be isolated from implementation details, such as whether services and resources are actually provisioned in real-time or pre-provisioned and allocated / assigned only upon request.

[0237] In at least one embodiment, in step 1144, once the service and resources are provided, a notification instructing the subscribing customer that the requested service is now ready for use can be sent. In at least one embodiment, information (e.g., a link) can be sent to the customer, enabling the customer to begin using the requested service.

[0238] In at least one embodiment, in step 1146, the customer's subscription order can be managed and tracked by the order management and monitoring module 1126. In at least one embodiment, the order management and monitoring module 1126 can be configured to collect usage statistics regarding customer use of the subscription service. In at least one embodiment, statistics can be collected for storage usage, data transfer volume, number of users, and the amount and / or changes in system power-on and power-off times.

[0239] In at least one embodiment, the third-party network infrastructure system 1100 may include an identity management module 1128 configured to provide identity services, such as access management and authorization services within the third-party network infrastructure system 1100. In at least one embodiment, the identity management module 1128 may control information about customers who wish to utilize services provided by the third-party network infrastructure system 1102. In at least one embodiment, such information may include information authenticating the identities of such customers and information describing which actions those customers are authorized to perform relative to various system resources (e.g., files, directories, applications, communication ports, memory segments, etc.). In at least one embodiment, the identity management module 1128 may also include managing descriptive information about each customer, as well as information about how and by whom that descriptive information can be accessed and modified.

[0240] Figure 12 A cloud computing environment 1202 according to at least one embodiment is illustrated. In at least one embodiment, the cloud computing environment 1202 includes one or more computer systems / servers 1204, with computing devices such as personal digital assistants (PDAs) or cellular phones 1206A, desktop computers 1206B, laptop computers 1206C, and / or automotive computer systems 1206N communicating with the one or more computer systems / servers 1204. In at least one embodiment, this allows infrastructure, platforms, and / or software to be provided as services from the cloud computing environment 1202 so that each client does not need to maintain such resources individually. It should be understood that... Figure 12 The types of computing devices 1206A-N shown are intended to be illustrative only, and the cloud computing environment 1202 can communicate with any type of computerized device via any type of network and / or network / addressable connectivity (e.g., using a web browser).

[0241] In at least one embodiment, the computer system / server 1204, which may be represented as a cloud computing node, may operate with many other general-purpose or special-purpose computing system environments or configurations. In at least one embodiment, computing systems, environments, and / or configurations suitable for use with the computer system / server 1204 include, but are not limited to, personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computers, and distributed cloud computing environments that include any of the aforementioned systems or devices, and / or variations thereof.

[0242] In at least one embodiment, the computer system / server 1204 can be described in the general context of computer system executable instructions (such as program modules) executed by the computer system. In at least one embodiment, the program module includes routines, programs, objects, components, logic, data structures, etc., that perform a specific task or implement a specific abstract data type. In at least one embodiment, the exemplary computer system / server 1204 can be practiced in a distributed cloud computing environment, where tasks are performed by remote processing devices linked via a communication network. In at least one embodiment, in a distributed cloud computing environment, the program module may reside in both local and remote computer system storage media, including memory storage devices.

[0243] Figure 13 The cloud computing environment 1202 according to at least one embodiment is shown. Figure 12 This provides a set of functional abstractions. It should be understood beforehand. Figure 13 The components, layers, and functions shown are intended to be illustrative only, and may vary.

[0244] In at least one embodiment, the hardware and software layer 1302 includes hardware and software components. In at least one embodiment, the hardware components include mainframes, servers based on various RISC (Reduced Instruction Set Computer) architectures, various computing systems, supercomputing systems, storage devices, networks, networking components, and / or variations thereof. In at least one embodiment, the software components include network application server software, various application server software, various database software, and / or variations thereof.

[0245] In at least one embodiment, the virtualization layer 1304 provides an abstraction layer from which exemplary virtual entities such as virtual servers, virtual storage, virtual networks (including virtual private networks), virtual applications, virtual clients, and / or variations thereof can be provided.

[0246] In at least one embodiment, the management layer 1306 provides various functionalities. In at least one embodiment, resource provisioning provides the dynamic acquisition of computing resources and other resources for performing tasks within the cloud computing environment. In at least one embodiment, metering provides usage tracking of resources within the cloud computing environment, and billing or invoicing for the consumption of these resources. In at least one embodiment, resources may include application software licenses. In at least one embodiment, security provides authentication for users and tasks, and protection for data and other resources. In at least one embodiment, the user interface provides access to the cloud computing environment for both users and system administrators. In at least one embodiment, service level management provides the allocation and management of cloud computing resources to meet required service levels. In at least one embodiment, service level agreement (SLA) management provides the pre-deployment and acquisition of cloud computing resources, anticipating future demand for those resources according to the SLA.

[0247] In at least one embodiment, workload layer 1308 provides functionality utilizing a cloud computing environment. In at least one embodiment, workloads and functions that can be provided from this layer include: mapping and navigation, software development and management, educational services, data analysis and processing, transaction processing, and service delivery.

[0248] Supercomputing

[0249] The following figures illustrate, but are not limited to, exemplary supercomputer-based systems that can be used to implement at least one embodiment.

[0250] In at least one embodiment, a supercomputer can refer to a hardware system exhibiting significant parallelism and comprising at least one chip, wherein the chips in the system are interconnected via a network and housed in a hierarchically organized enclosure. In at least one embodiment, a large hardware system filling a server room with several racks is at least one embodiment of a supercomputer, each rack comprising several board / rack modules, each board / rack module comprising several chips all interconnected by a scalable network. In at least one embodiment, a single rack of such a large hardware system is at least one other embodiment of a supercomputer. In at least one embodiment, a single chip exhibiting significant parallelism and comprising several hardware components can also be considered a supercomputer, because as feature sizes may decrease, the number of hardware components that can be incorporated into a single chip may also increase.

[0251] Figure 14A chip-level supercomputer according to at least one embodiment is illustrated. In at least one embodiment, the main computation is performed within a finite state machine (1404) referred to as a thread unit, inside an FPGA or ASIC chip. In at least one embodiment, a task and synchronization network (1402) connects to the finite state machine and is used to dispatch threads and perform operations in the correct order. In at least one embodiment, a memory network (1406, 1410) is used to access a multi-level partitioned on-chip cache hierarchy (1408, 1412). In at least one embodiment, a memory controller (1416) and an off-chip memory network (1414) are used to access off-chip memory. In at least one embodiment, an I / O controller (1418) is used for cross-chip communication when the design is not suitable for a single logic chip.

[0252] Figure 15 A supercomputer at the rack module level is illustrated according to at least one embodiment. In at least one embodiment, within the rack module, there are multiple FPGA or ASIC chips (1502) connected to one or more DRAM cells (1504) constituting the main accelerator memory. In at least one embodiment, each FPGA / ASIC chip is connected to its adjacent FPGA / ASIC chip using a wide on-board bus with differential high-speed signaling (1506). In at least one embodiment, each FPGA / ASIC chip is also connected to at least one high-speed serial communication cable.

[0253] Figure 16 A rack-level supercomputer according to at least one embodiment is shown. Figure 17 A supercomputer at the entire system level is illustrated according to at least one embodiment. In at least one embodiment, see [link to at least one embodiment]. Figure 16 and Figure 17A scalable, potentially incomplete, hypercube network is implemented between rack modules within a rack and across the entire system rack using high-speed serial optical fiber or copper cable (1602, 1702). In at least one embodiment, one of the FPGA / ASIC chips in the accelerator is connected to a host system (1704) via a PCI-Express connection. In at least one embodiment, the host system includes a host microprocessor (1708) on which the software portion of the application runs, and a memory consisting of one or more host memory DRAM cells (1706) consistent with the memory on the accelerator. In at least one embodiment, the host system may be a separate module on one of the racks or may be integrated with one of the modules of the supercomputer. In at least one embodiment, a circular topology of cube connections provides communication links to create a hypercube network for a large supercomputer. In at least one embodiment, a group of FPGA / ASIC chips on a rack module may act as a single hypercube node, increasing the total number of external links per group compared to a single chip. In at least one embodiment, a group comprises chips A, B, C, and D on a rack module having an internal wide differential bus connecting A, B, C, and D in a circular organization. In at least one embodiment, there are 12 serial communication cables connecting the rack module to the outside world. In at least one embodiment, chip A on the rack module is connected to serial communication cables 0, 1, and 2. In at least one embodiment, chip B is connected to cables 3, 4, and 5. In at least one embodiment, chip C is connected to cables 6, 7, and 8. In at least one embodiment, chip D is connected to cables 9, 10, and 11. In at least one embodiment, the entire group {A, B, C, D} constituting the rack module can form a hypercube node within a supercomputer system, containing up to 2^12 = 4096 rack modules (16384 FPGA / ASIC chips). In at least one embodiment, in order for chip A to send a message outward on link 4 of group {A, B, C, D}, the message must first be routed to chip B using an on-board differential wide bus connection. In at least one embodiment, messages arriving on link 4 from group {A, B, C, D} (i.e., to chip A) must also first be routed to the correct destination chip (A) within group {A, B, C, D}. In at least one embodiment, parallel supercomputer systems of other sizes can also be implemented.

[0254] AI

[0255] The following figures illustrate, but are not limited to, exemplary artificial intelligence-based systems that can be used to implement at least one embodiment.

[0256] Figure 18AInference and / or training logic 1815 for performing inference and / or training operations associated with one or more embodiments is shown. The following is in conjunction with... Figure 18A and / or Figure 18B Provide details regarding reasoning and / or training logic 1815.

[0257] In at least one embodiment, the inference and / or training logic 1815 may include, but is not limited to, code and / or data storage 1801 for storing forward and / or output weights and / or input / output data, and / or other parameters for configuring neurons or layers of a neural network trained and / or used for inference in aspects of one or more embodiments. In at least one embodiment, the training logic 1815 may include or be coupled to the code and / or data storage 1801 for storing graphical code or other software to control timing and / or sequence, wherein weight and / or other parameter information is loaded to configure the logic, including integer and / or floating-point units (collectively, arithmetic logic units (ALUs)). In at least one embodiment, code (such as graphical code) loads weight or other parameter information into the processor ALU based on the architecture of the neural network to which such code corresponds. In at least one embodiment, the code and / or data storage 1801 stores weight parameters and / or input / output data for each layer of a neural network that is trained or used in conjunction with one or more embodiments during forward propagation of input / output data and / or weight parameters during training and / or inference using aspects of one or more embodiments. In at least one embodiment, any portion of the code and / or data storage 1801 may be included together with other on-chip or off-chip data storage devices, including the processor's L1, L2, or L3 cache memory or system memory.

[0258] In at least one embodiment, any portion of the code and / or data storage 1801 may be internal or external to one or more processors or other hardware logic devices or circuits. In at least one embodiment, the code and / or data storage 1801 may be a cache memory, dynamic random-addressable memory (“DRAM”), static random-addressable memory (“SRAM”), non-volatile memory (e.g., flash memory), or other storage devices. In at least one embodiment, the choice of whether the code and / or data storage 1801 is internal or external to the processor, or includes DRAM, SRAM, flash memory, or some other storage type, in at least one embodiment, may depend on the available on-chip storage relative to off-chip storage, the latency requirements of the training and / or inference functions being performed, the batch size of the data used in the inference and / or training of the neural network, or some combination of these factors.

[0259] In at least one embodiment, the inference and / or training logic 1815 may include, but is not limited to, code and / or data storage 1805 for storing backpropagation and / or output weights and / or input / output data corresponding to neurons or layers of a neural network trained and / or used for inference in aspects of one or more embodiments. In at least one embodiment, the code and / or data storage 1805 stores weight parameters and / or input / output data for each layer of the neural network, which is trained or used in conjunction with one or more embodiments during backpropagation of input / output data and / or weight parameters during training and / or inference in aspects of one or more embodiments. In at least one embodiment, the training logic 1815 may include or be coupled to the code and / or data storage 1805 to store graph code or other software to control timing and / or sequencing, wherein weight and / or other parameter information is loaded to configure logic, including integer and / or floating-point units (collectively, arithmetic logic units (ALUs)).

[0260] In at least one embodiment, code (such as graph code) enables the loading of weights or other parameter information into the processor ALU based on the architecture of the neural network corresponding to such code. In at least one embodiment, any portion of the code and / or data storage 1805 may be included together with other on-chip or off-chip data storage, including the processor's L1, L2, or L3 cache or system memory. In at least one embodiment, any portion of the code and / or data storage 1805 may be internal or external to one or more processors or other hardware logic devices or circuits. In at least one embodiment, the code and / or data storage 1805 may be cache memory, DRAM, SRAM, non-volatile memory (e.g., flash memory), or other storage devices. In at least one embodiment, the choice of whether the code and / or data storage 1805 is internal or external to the processor, or includes DRAM, SRAM, flash memory, or some other storage type, may depend on the available on-chip storage relative to off-chip storage, the latency requirements of the training and / or inference functions being performed, the batch size of the data used in the inference and / or training of the neural network, or some combination of these factors.

[0261] In at least one embodiment, code and / or data storage 1801 and code and / or data storage 1805 may be separate storage structures. In at least one embodiment, code and / or data storage 1801 and code and / or data storage 1805 may be combined storage structures. In at least one embodiment, code and / or data storage 1801 and code and / or data storage 1805 may be partially combined and partially separated. In at least one embodiment, any portion of code and / or data storage 1801 and code and / or data storage 1805 may be included together with other on-chip or off-chip data storage (including the processor's L1, L2, or L3 cache or system memory).

[0262] In at least one embodiment, the inference and / or training logic 1815 may include, but is not limited to, one or more arithmetic logic units (“ALUs”) 1810, including integer and / or floating-point units, for performing logical and / or mathematical operations at least in part based on or instructed by training and / or inference code (e.g., graph code), the results of which may produce activations (e.g., output values ​​from layers or neurons within a neural network) stored in activation storage 1820, which is a function of input / output and / or weight parameter data stored in code and / or data storage 1801 and / or code and / or data storage 1805. In at least one embodiment, activations stored in activation memory 1820 are generated based on linear algebra and / or matrix-based mathematics performed by ALU 1810 in response to execution instructions or other code, wherein weight values ​​stored in code and / or data storage 1805 and / or data storage 1801 are used as operands along with other values ​​(such as bias values, gradient information, momentum values, or other parameters or hyperparameters), any or all of which may be stored in code and / or data storage 1805 or code and / or data storage 1801 or in another memory on or off the chip.

[0263] In at least one embodiment, one or more ALUs 1810 are included within one or more processors or other hardware logic devices or circuits, while in another embodiment, one or more ALUs 1810 may be external to the processor or other hardware logic devices or circuits (e.g., coprocessors) that use them. In at least one embodiment, ALUs 1810 may be included within an execution unit of a processor or otherwise within an ALU library accessible by the execution unit of the processor, which may be within the same processor or distributed among different processors of different types (e.g., central processing unit, graphics processing unit, fixed-function unit, etc.). In at least one embodiment, code and / or data storage 1801, code and / or data storage 1805, and activation storage 1820 may share a processor or other hardware logic device or circuit, while in another embodiment, they may be in different processors or other hardware logic devices or circuits, or in some combination of the same and different processors or other hardware logic devices or circuits. In at least one embodiment, any portion of the activation storage 1820 may be included together with other on-chip or off-chip data storage, including the processor's L1, L2, or L3 cache or system memory. Furthermore, inference and / or training code may be stored together with other code accessible to the processor or other hardware logic or circuitry and acquired and / or processed using the processor's fetch, decode, schedule, execute, retire, and / or other logic circuitry.

[0264] In at least one embodiment, the active memory 1820 may be a cache memory, DRAM, SRAM, non-volatile memory (e.g., flash memory), or other storage device. In at least one embodiment, the active memory 1820 may be wholly or partially within or outside one or more processors or other logic circuits. In at least one embodiment, the choice of whether the active memory 1820 is inside or outside the processor, or includes DRAM, SRAM, flash memory, or some other storage type, may depend on the available on-chip storage relative to off-chip storage, the latency requirements of the training and / or inference functions being performed, the batch size of the data used in the inference and / or training of the neural network, or some combination of these factors.

[0265] In at least one embodiment, Figure 18A The inference and / or training logic 1815 shown can be used in conjunction with an application-specific integrated circuit (“ASIC”), such as those from Google. Processing unit, from Graphcore TM Inference processing unit (IPU), or from Intel Corporation (For example, a "Lake Crest" processor. In at least one embodiment, Figure 18A The inference and / or training logic 1815 shown can be used in conjunction with central processing unit (“CPU”) hardware, graphics processing unit (“GPU”) hardware or other hardware such as field programmable gate array (“FPGA”)).

[0266] Figure 18B Inference and / or training logic 1815 according to at least one embodiment is illustrated. In at least one embodiment, the inference and / or training logic 1815 may include, but is not limited to, hardware logic in which computational resources are dedicated or otherwise exclusively used in conjunction with weight values ​​or other information corresponding to one or more neuron layers within a neural network. In at least one embodiment, Figure 18B The inference and / or training logic 1815 shown can be combined with an application-specific integrated circuit (ASIC) (such as those from Google). Processing unit, from Graphcore TM Inference processing unit (IPU), or from Intel Corporation (For example, "Lake Crest") processors are used. In at least one embodiment, Figure 18B The inference and / or training logic 1815 shown can be used in conjunction with central processing unit (CPU) hardware, graphics processing unit (GPU) hardware, or other hardware such as a field-programmable gate array (FPGA). In at least one embodiment, the inference and / or training logic 1815 includes, but is not limited to, code and / or data storage 1801 and code and / or data storage 1805, which can be used to store code (e.g., graph code), weight values, and / or other information, including bias values, gradient information, momentum values, and / or other parameter or hyperparameter information. Figure 18B In at least one embodiment described herein, each of code and / or data storage 1801 and code and / or data storage 1805 is associated with a dedicated computing resource (e.g., computing hardware 1802 and computing hardware 1806). In at least one embodiment, each of computing hardware 1802 and computing hardware 1806 includes one or more ALUs that perform mathematical functions (such as linear algebra functions) on the information stored in code and / or data storage 1801 and code and / or data storage 1805, respectively, and the results are stored in active storage 1820.

[0267] In at least one embodiment, each code and / or data store 1801 and 1805 and corresponding computing hardware 1802 and 1806 corresponds to a different layer of the neural network, such that the activation result from one storage / computation pair 1801 / 1802 of the code and / or data store 1801 and computing hardware 1802 is provided as input to the next storage / computation pair 1805 / 1806 of the code and / or data store 1805 and computing hardware 1806 to mirror the conceptual organization of the neural network. In at least one embodiment, each of the storage / computation pairs 1801 / 1802 and 1805 / 1806 may correspond to more than one neural network layer. In at least one embodiment, additional storage / computation pairs (not shown) following or paralleling the storage / computation pairs 1801 / 1802 and 1805 / 1806 may be included in the inference and / or training logic 1815.

[0268] Figure 19 The training and deployment of a deep neural network according to at least one embodiment are illustrated. In at least one embodiment, an untrained neural network 1906 is trained using a training dataset 1902. In at least one embodiment, the training framework 1904 is a PyTorch framework, while in other embodiments, the training framework 1904 is TensorFlow, Boost, Caffe, Microsoft Cognitive Toolkit / CNTK, MXNet, Chainer, Keras, Deeplearning4j, or other training frameworks. In at least one embodiment, the training framework 1904 trains the untrained neural network 1906 and enables it to be trained using the processing resources described herein to generate a trained neural network 1908. In at least one embodiment, the weights may be randomly selected or selected by pre-training using a deep belief network. In at least one embodiment, training may be performed in a supervised, partially supervised, or unsupervised manner.

[0269] In at least one embodiment, supervised learning is used to train an untrained neural network 1906, wherein the training dataset 1902 includes inputs paired with desired outputs for input, or wherein the training dataset 1902 includes inputs with known outputs, and the outputs of the neural network 1906 are manually graded. In at least one embodiment, the untrained neural network 1906 is trained in a supervised manner, and inputs from the training dataset 1902 are processed, and the resulting outputs are compared with a set of expected or desired outputs. In at least one embodiment, the error is then backpropagated through the untrained neural network 1906. In at least one embodiment, a training framework 1904 adjusts the weights controlling the untrained neural network 1906. In at least one embodiment, the training framework 1904 includes tools for monitoring how well the untrained neural network 1906 converges toward a model (such as a trained neural network 1908) adapted to generate correct answers (such as results 1914) based on input data (such as a new dataset 1912). In at least one embodiment, the training framework 1904 repeatedly trains the untrained neural network 1906 while using a loss function and tuning algorithms (such as stochastic gradient descent) to adjust the weights to refine the output of the untrained neural network 1906. In at least one embodiment, the training framework 1904 trains the untrained neural network 1906 until the untrained neural network 1906 achieves the desired accuracy. In at least one embodiment, the trained neural network 1908 can then be deployed to implement any number of machine learning operations.

[0270] In at least one embodiment, unsupervised learning is used to train an untrained neural network 1906, wherein the untrained neural network 1906 attempts to train itself using unlabeled data. In at least one embodiment, the unsupervised learning training dataset 1902 will include input data without any associated output data or "ground truth" data. In at least one embodiment, the untrained neural network 1906 can learn groupings within the training dataset 1902 and can determine how each input relates to the untrained dataset 1902. In at least one embodiment, unsupervised training can be used to generate self-organizing maps in a trained neural network 1908 capable of performing operations useful in reducing the dimensionality of the new dataset 1912. In at least one embodiment, unsupervised training can also be used to perform anomaly detection, which allows the identification of data points in the new dataset 1912 that deviate from the normal patterns of the new dataset 1912.

[0271] In at least one embodiment, semi-supervised learning can be used, which is a technique in which a mixture of labeled and unlabeled data is included in the training dataset 1902. In at least one embodiment, the training framework 1904 can be used to perform incremental learning, such as through transfer learning techniques. In at least one embodiment, incremental learning enables the trained neural network 1908 to adapt to a new dataset 1912 without forgetting the knowledge injected into the trained neural network 1408 during the initial training.

[0272] 5G network

[0273] The following figures illustrate, but are not limited to, exemplary 5G-based systems that can be used to implement at least one embodiment.

[0274] Figure 20 An architecture of a system 2000 for a network according to at least one embodiment is illustrated. In at least one embodiment, system 2000 is shown to include user equipment (UE) 2002 and UE 2004. In at least one embodiment, UE 2002 and 2004 are shown as smartphones (e.g., handheld touchscreen mobile computing devices capable of connecting to one or more cellular networks), but may also include any mobile or non-mobile computing device, such as a personal digital assistant (PDA), pager, laptop computer, desktop computer, wireless handheld device, or any computing device including a wireless communication interface.

[0275] In at least one embodiment, either UE 2002 or UE 2004 may include an Internet of Things (IoT) UE, which may include a network access layer designed for low-power IoT applications utilizing short-lived UE connections. In at least one embodiment, the IoT UE may utilize technologies such as machine-to-machine (M2M) or machine-type communication (MTC) for exchanging data with an MTC server or device via a Public Land Mobile Network (PLMN), Proximity-Based Service (ProSe), or Device-to-Device (D2D) communication, sensor networks, or the IoT network. In at least one embodiment, the M2M or MTC data exchange may be machine-initiated data exchange. In at least one embodiment, the IoT network describes interconnected IoT UEs, which may include uniquely identifiable embedded computing devices (within the Internet infrastructure) with short-lived connections. In at least one embodiment, the IoT UE may execute background applications (e.g., keep-alive messages, state updates, etc.) to facilitate connectivity to the IoT network.

[0276] In at least one embodiment, UE 2002 and UE 2004 may be configured to connect (e.g., communicatively coupled) to a radio access network (RAN) 2016. In at least one embodiment, RAN 2016 may be an evolved Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access Network (E-UTRAN), NextGen RAN (NG RAN), or some other type of RAN. In at least one embodiment, UE 2002 and UE 2004 utilize connection 2012 and connection 2014, respectively, each connection including a physical communication interface or layer. In at least one embodiment, connections 2012 and 2014 are shown as air interfaces for implementing communication coupling and may be consistent with cellular communication protocols such as the Global System for Mobile Communications (GSM) protocol, Code Division Multiple Access (CDMA) network protocol, Push-to-Talk (PTT) protocol, Cellular PTT (POC) protocol, Universal Mobile Telecommunications System (UMTS) protocol, 3GPP Long Term Evolution (LTE) protocol, 5G protocol, New Radio (NR) protocol, and variants thereof.

[0277] In at least one embodiment, UEs 2002 and 2004 may also directly exchange communication data via the ProSe interface 2006. In at least one embodiment, the ProSe interface 2006 may alternatively be referred to as a sidelink interface, which includes one or more logical channels, including but not limited to the Physical Sidelink Control Channel (PSCCH), Physical Sidelink Shared Channel (PSSCH), Physical Sidelink Discovery Channel (PSDCH), and Physical Sidelink Broadcast Channel (PSBCH).

[0278] In at least one embodiment, UE 2004 is shown configured to access access point (AP) 2010 via connection 2008. In at least one embodiment, connection 2008 may include a local wireless connection, such as a connection consistent with any IEEE 802.11 protocol, wherein AP 2010 will include Wireless Fidelity. Router. In at least one embodiment, AP 2010 is shown as a core network connected to the Internet but not to a wireless system.

[0279] In at least one embodiment, RAN 2016 may include one or more access nodes enabling connectivity between 2012 and 2014. In at least one embodiment, these access nodes (ANs) may be referred to as base stations (BS), NodeBs, evolved NodeBs (eNBs), next-generation NodeBs (gNBs), RAN nodes, etc., and may include ground stations (e.g., ground access points) or satellite stations providing coverage within a geographic area (e.g., a cell). In at least one embodiment, RAN 2016 may include one or more RAN nodes (e.g., macro RAN node 2018) for providing macrocell coverage and one or more RAN nodes (e.g., low-power (LP) RAN node 2020) for providing femtocells or picocells (e.g., cells with smaller coverage areas, smaller user capacity, or higher bandwidth compared to macrocells).

[0280] In at least one embodiment, either RAN node 2018 or 2020 can terminate the air interface protocol and can be the first contact point for UEs 2002 and 2004. In at least one embodiment, either RAN node 2018 or 2020 can implement various logical functions of RAN 2016, including but not limited to Radio Network Controller (RNC) functions such as radio bearer management, uplink and downlink dynamic radio resource management, and data packet scheduling and mobility management.

[0281] In at least one embodiment, UE 2002 and UE 2004 may be configured to communicate with each other or with either RAN node 2018 and RAN node 2020 via a multi-carrier communication channel using orthogonal frequency division multiplexing (OFDM) communication signals, according to various communication technologies such as, but not limited to, orthogonal frequency division multiple access (OFDMA) communication technology (e.g., for downlink communication) or single-carrier frequency division multiple access (SC-FDMA) communication technology (e.g., for uplink and ProSe or sidelink communication), and / or variations thereof. In at least one embodiment, the OFDM signal may include multiple orthogonal subcarriers.

[0282] In at least one embodiment, the downlink resource grid can be used for downlink transmissions from either RAN nodes 2018 and 2020 to UEs 2002 and 2004, while uplink transmissions can utilize similar techniques. In at least one embodiment, the grid can be a time-frequency grid, referred to as a resource grid or time-frequency resource grid, which represents the physical resources in the downlink within each time slot. In at least one embodiment, this time-frequency plane representation is a common practice in OFDM systems, making it intuitive for radio resource allocation. In at least one embodiment, each column and each row of the resource grid corresponds to an OFDM symbol and an OFDM subcarrier, respectively. In at least one embodiment, the duration of the resource grid in the time domain corresponds to a time slot in a radio frame. In at least one embodiment, the minimum time-frequency unit in the resource grid is represented as a resource element. In at least one embodiment, each resource grid comprises multiple resource blocks that describe the mapping of certain physical channels to resource elements. In at least one embodiment, each resource block comprises a set of resource elements. In at least one embodiment, in the frequency domain, this can represent the minimum number of resources that can currently be allocated. In at least one embodiment, there are several different physical downlink channels that use such resource blocks for transmission.

[0283] In at least one embodiment, the Physical Downlink Shared Channel (PDSCH) can carry user data and higher-layer signaling to UEs 2002 and 2004. In at least one embodiment, the Physical Downlink Control Channel (PDCCH) can carry information such as transmission format and resource allocation related to the PDSCH channel. In at least one embodiment, it can also inform UEs 2002 and 2004 of transmission format, resource allocation, and HARQ (Hybrid Automatic Repeat Request) information related to the uplink shared channel. In at least one embodiment, typically, downlink scheduling (allocating control and shared channel resource blocks to UE 2002 within the cell) can be performed at either RAN node 2018 or 2020 based on channel quality information fed back from either UE 2002 or 2004. In at least one embodiment, downlink resource allocation information can be transmitted on the PDCCH used for (e.g., allocated to) each of UEs 2002 and 2004.

[0284] In at least one embodiment, the PDCCH can use Control Channel Elements (CCEs) to transmit control information. In at least one embodiment, PDCCH complex-valued symbols can first be organized into quadruplets before being mapped to resource elements, and then permuted using a sub-block interleaver for rate matching. In at least one embodiment, one or more of these CCEs can be used to transmit each PDCCH, where each CCE can correspond to nine sets of four physical resource elements referred to as resource element groups (REGs). In at least one embodiment, four Quadrature Phase Shift Keying (QPSK) symbols can be mapped to each REG. In at least one embodiment, depending on the size of the downlink control information (DCI) and channel conditions, one or more CCEs can be used to transmit the PDCCH. In at least one embodiment, there can be four or more different PDCCH formats (e.g., aggregation levels, L = 1, 2, 4, or 8) with different numbers of CCEs as defined in LTE.

[0285] In at least one embodiment, the Enhanced Physical Downlink Control Channel (EPDCCH) using PDSCH resources can be used for control information transmission. In at least one embodiment, one or more Enhanced Control Channel Elements (ECCEs) can be used to transmit the EPDCCH. In at least one embodiment, each ECCE can correspond to nine sets of four physical resource elements referred to as Enhanced Resource Element Groups (EREGs). In at least one embodiment, the ECCE can have a different number of EREGs in some cases.

[0286] In at least one embodiment, RAN 2016 is shown communicatively coupled to core network (CN) 2038 via S1 interface 2022. In at least one embodiment, CN 2038 may be an evolved packet core (EPC) network, a NextGen packet core (NPC) network, or some other type of CN. In at least one embodiment, S1 interface 2022 is divided into two parts: S1-U interface 2026, which carries service data between RAN nodes 2018 and 2020 and serving gateway (S-GW) 2030; and S1-Mobility Management Entity (MME) interface 2024, which is the signaling interface between RAN nodes 2018 and 2020 and MME 2028.

[0287] In at least one embodiment, CN 2038 includes MME 2028, S-GW 2030, Packet Data Network (PDN) Gateway (P-GW) 2034, and Home Subscriber Server (HSS) 2032. In at least one embodiment, MME 2028 may be functionally similar to the control plane of a legacy General Packet Radio Service (GPRS) Support Node (SGSN). In at least one embodiment, MME 2028 may manage mobility aspects of access, such as gateway selection and tracking area list management. In at least one embodiment, HSS 2032 may include a database for network users, including subscription-related information to support network entities in handling communication sessions. In at least one embodiment, CN 2038 may include one or more HSS 2032s, depending on the number of mobile users, device capacity, network organization, etc. In at least one embodiment, HSS 2032 may provide support for routing / roaming, authentication, authorization, naming / addressing resolution, location dependencies, etc.

[0288] In at least one embodiment, the S-GW 2030 can terminate the S1 interface 2022 toward RAN 2016 and route data packets between RAN 2016 and CN 2038. In at least one embodiment, the S-GW 2030 can be a local mobility anchor point for inter-RAN node handover and can also provide an anchor point for inter-3GPP mobility. In at least one embodiment, other responsibilities may include lawful interception, charging, and some policy enforcement.

[0289] In at least one embodiment, P-GW 2034 may terminate the SGi interface toward the PDN. In at least one embodiment, P-GW 2034 may route data packets between EPC network 2038 and external networks (such as networks including application server 2040 (or application function (AF))) via Internet Protocol (IP) interface 2042. In at least one embodiment, application server 2040 may be an element that provides applications using IP bearer resources using a core network (e.g., UMTS Packet Service (PS) domain, LTE PS data service, etc.). In at least one embodiment, P-GW 2034 is shown communicatively coupled to application server 2040 via IP communication interface 2042. In at least one embodiment, application server 2040 may also be configured to support one or more communication services (e.g., Voice over Internet Protocol (VoIP) sessions, PTT sessions, group communication sessions, social networking services, etc.) of UE 2002 and 2004 via CN 2038.

[0290] In at least one embodiment, P-GW 2034 may also be a node for policy enforcement and charging data collection. In at least one embodiment, Policy and Charging Enforcement Function (PCRF) 2036 is the policy and charging control element of CN 2038. In at least one embodiment, in a non-roaming scenario, a single PCRF may exist in the Home Public Land Mobile Network (HPLMN) associated with the UE's Internet Protocol Connectivity Access Network (IP-CAN) session. In at least one embodiment, in a roaming scenario with local traffic breaches, two PCRFs may exist associated with the UE's IP-CAN session: the Home PCRF (H-PCRF) within the HPLMMN and the Visited PCRF (V-PCRF) within the Visited Public Land Mobile Network (VPLMN). In at least one embodiment, PCRF 2036 may be communicatively coupled to application server 2040 via P-GW 2034. In at least one embodiment, application server 2040 may signal PCRF 2036 to indicate new service flows and select appropriate Quality of Service (QoS) and charging parameters. In at least one embodiment, PCRF2036 can supply this rule to a Policy and Charging Enforcement Function (PCEF) (not shown) with an appropriate Service Flow Template (TFT) and identifier for a QoS Class (QCI), which is initiated by the application server 2040 for QoS and charging.

[0291] Figure 21 The architecture of a system 2100 of a network according to some embodiments is shown. In at least one embodiment, the system 2100 is shown to include a UE 2102, a 5G access node or RAN node (shown as (R)AN node 2108), a user plane function (shown as UPF 2104), a data network (DN 2106), which in at least one embodiment may be an operator service, an Internet access or a third-party service, and a 5G core network (5GC) (shown as CN 2110).

[0292] In at least one embodiment, CN 2110 includes authentication server functionality (AUSF 2114); core access and mobility management functionality (AMF 2112); session management functionality (SMF 2118); network exposure functionality (NEF 2116); policy control functionality (PCF 2122); network function (NF) repository functionality (NRF 2120); unified data management (UDM 2124); and application functionality (AF 2126). In at least one embodiment, CN 2110 may also include other elements not shown, such as structured data storage network functionality (SDSF), unstructured data storage network functionality (UDSF), and variations thereof.

[0293] In at least one embodiment, UPF 2104 may act as an anchor point for intra- and inter-RAT mobility, an external PDU session point interconnected to DN 2106, and a branch point supporting multi-homed PDU sessions. In at least one embodiment, UPF 2104 may also perform packet routing and forwarding, packet inspection, user plane portion of policy rule enforcement, lawful packet interception (UP collection), service usage reporting, QoS processing for the user plane (e.g., packet filtering, gating, UL / DL rate enforcement), uplink service verification (e.g., SDF-to-QoS flow mapping), transport-level packet marking in uplink and downlink, and downlink packet buffering and downlink data notification triggering. In at least one embodiment, UPF 2104 may include an uplink classifier for supporting the routing of service flows to the data network. In at least one embodiment, DN 2106 may represent various network operator services, Internet access, or third-party services.

[0294] In at least one embodiment, AUSF 2114 can store data for authentication of UE 2102 and handle authentication-related functions. In at least one embodiment, AUSF 2114 can facilitate a common authentication framework for various access types.

[0295] In at least one embodiment, AMF 2112 can be responsible for registration management (e.g., for registering UE 2102, etc.), connection management, reachability management, mobility management, and lawful interception of AMF-related events, as well as access authentication and authorization. In at least one embodiment, AMF 2112 can provide SM message transmission for SMF 2118 and act as a transparent proxy for routing SM messages. In at least one embodiment, AMF 2112 can also provide UE 2102 with SMS functionality (SMSF) (…). Figure 21 Transmission of Short Message Service (SMS) messages between (not shown). In at least one embodiment, AMF 2112 may act as a Security Anchoring Function (SEA), which may include interaction with AUSF 2114 and UE 2102 and receiving an intermediate key established as a result of the UE 2102 authentication process. In at least one embodiment, in the case of using USIM-based authentication, AMF 2112 may retrieve security material from AUSF 2114. In at least one embodiment, AMF 2112 may also include a Security Context Management (SCM) function, which receives from the SEA a key it uses to derive the access network-specific key. Furthermore, in at least one embodiment, AMF 2112 may be the termination point (N2 reference point) of the RAN CP interface, the termination point of NAS (NI) signaling, and perform NAS encryption and integrity protection.

[0296] In at least one embodiment, AMF 2112 can also support NAS signaling with UE 2102 via the N3 Interoperability Function (IWF) interface. In at least one embodiment, the N3IWF can be used to provide access to untrusted entities. In at least one embodiment, the N3IWF can be the termination point of the N2 and N3 interfaces of the control plane and user plane, respectively, thus enabling the processing of N2 signaling from the SMF and AMF for PDU sessions and QoS, encapsulation / decapsulation of IPSec and N3 tunnel packets, marking N3 user plane packets in the uplink, and implementing QoS corresponding to the N3 packet marking, taking into account the QoS requirements associated with such marking received via N2. In at least one embodiment, the N3IWF can also relay uplink and downlink control plane NAS (NI) signaling between UE 2102 and AMF 2112, and relay uplink and downlink user plane packets between UE 2102 and UPF 2104. In at least one embodiment, the N3IWF also provides a mechanism for establishing an IPsec tunnel with the UE 2102.

[0297] In at least one embodiment, the SMF 2118 may be responsible for session management (e.g., session establishment, modification, and release, including tunnel maintenance between the UPF and AN nodes); UE IP address allocation and management (including optional authorization); selection and control of UP functions; configuring traffic redirection at the UPF to route traffic to the appropriate destination; interface termination towards policy control functions; policy enforcement and QoS control portions; lawful interception (for SM events and interfaces to the LI system); termination of the SM portion of NAS messages; downlink data notification; initiator of AN-specific SM information, which is sent to the AN via the AMF on N2; and determination of the SSC mode of the session. In at least one embodiment, the SMF 2118 may include the following roaming functions: handling local implementation to apply QoS SLAB (VPLMN); charge data collection and charge interface (VPLMN); lawful interception (for SM events in the VPLMN and interface to the LI system); and supporting interaction with external DNs to transmit signaling for PDU session authorization / authentication performed by the external DNs.

[0298] In at least one embodiment, NEF 2116 can provide means for securely exposing services and capabilities provided to third parties by 3GPP network functions, internal exposure / re-exposure, application functions (e.g., AF 2126), edge computing or fog computing systems, etc. In at least one embodiment, NEF 2116 can authenticate, authorize, and / or throttle AFs. In at least one embodiment, NEF 2116 can also translate information exchanged with AF 2126 and information exchanged with internal network functions. In at least one embodiment, NEF 2116 can translate between AF service identifiers and internal 5GC information. In at least one embodiment, NEF 2116 can also receive information from other network functions (NFs) based on its ability to expose other network functions. In at least one embodiment, this information can be stored as structured data at NEF 2116 or stored at a data storage NF using a standardized interface. In at least one embodiment, the stored information can then be re-exposed by NEF 2116 to other NFs and AFs, and / or used for other purposes, such as analysis.

[0299] In at least one embodiment, the NRF 2120 may support service discovery functionality, receiving NF discovery requests from NF instances and providing information about discovered NF instances to the NF instances. In at least one embodiment, the NRF 2120 also maintains information about available NF instances and the services they support.

[0300] In at least one embodiment, the PCF 2122 may provide policy rules to control plane functions for enforcement, and may also support a unified policy framework for managing network behavior. In at least one embodiment, the PCF 2122 may also implement a front-end (FE) for accessing subscription information related to policy decisions in the UDR of the UDM 2124.

[0301] In at least one embodiment, UDM 2124 can process subscription-related information to support network entities in handling communication sessions and can store subscription data of UE 2102. In at least one embodiment, UDM 2124 may include two parts: an application FE and a user data repository (UDR). In at least one embodiment, UDM may include a UDM FE responsible for handling credentials, location management, subscription management, etc. In at least one embodiment, several different front-ends may serve the same user in different transactions. In at least one embodiment, UDM-FE accesses sub-subscription information stored in the UDR and performs authentication credential processing; user identification processing; access authorization; registration / mobility management; and subscription management. In at least one embodiment, UDR may interact with PCF 2122. In at least one embodiment, UDM 2124 may also support SMS management, wherein the SMS-FE implements similar application logic as described above.

[0302] In at least one embodiment, AF 2126 can provide application effects on service routing, access to Network Capability Exposure (NCE), and interaction with a policy framework for policy control. In at least one embodiment, NCE can be a mechanism allowing 5GC and AF 2126 to provide information to each other via NEF 2116, which can be used for edge computing implementations. In at least one embodiment, network operators and third-party services can be hosted near the attached access point of UE 2102 to achieve efficient service delivery by reducing end-to-end latency and load on the transport network. In at least one embodiment, for edge computing implementations, 5GC can select UPF 2104 close to UE 2102 and perform service bootstrapping from UPF 2104 to DN 2106 via the N6 interface. In at least one embodiment, this can be based on UE subscription data, UE location, and information provided by AF 2126. In at least one embodiment, AF 2126 can influence UPF (re)selection and service routing. In at least one embodiment, based on operator deployment, when AF 2126 is considered a trusted entity, the network operator may allow AF 2126 to interact directly with the relevant NF.

[0303] In at least one embodiment, CN 2110 may include an SMSF, which may be responsible for SMS subscription checks and authentication, and relay SM messages to / from UE 2102 to / from other entities, such as SMS-GMSC / IWMSC / SMS routers. In at least one embodiment, SMS may also interact with AMF 2112 and UDM 2124 for a notification process that UE 2102 is available for SMS delivery (e.g., setting a UE unreachable flag and notifying UDM 2124 when UE 2102 is available for SMS).

[0304] In at least one embodiment, system 2100 may include the following service-based interfaces: Namf: a service-based interface presented by AMF; Nsmf: a service-based interface presented by SMF; Nnef: a service-based interface presented by NEF; Npcf: a service-based interface presented by PCF; Nudm: a service-based interface presented by UDM; Naf: a service-based interface presented by AF; Nnrf: a service-based interface presented by NRF; and Nausf: a service-based interface presented by AUSF.

[0305] In at least one embodiment, system 2100 may include the following reference points: N1: a reference point between the UE and the AMF; N2: a reference point between the (R)AN and the AMF; N3: a reference point between the (R)AN and the UPF; N4: a reference point between the SMF and the UPF; and N6: a reference point between the UPF and the data network. In at least one embodiment, there may be more reference points and / or service-based interfaces between NF services in the NF; however, for clarity, these interfaces and reference points have been omitted. In at least one embodiment, the NS reference point may be between the PCF and the AF; the N7 reference point may be between the PCF and the SMF; the N11 reference point may be between the AMF and the SMF, and so on. In at least one embodiment, CN 2110 may include an Nx interface, which is an inter-CN interface between the MME and the AMF 2112 to enable interoperability between CN 2110 and CN 7221.

[0306] In at least one embodiment, system 2100 may include a plurality of RAN nodes (such as (R)AN nodes 2108), wherein an Xn interface is defined between two or more (R)AN nodes 2108 (e.g., gNBs) connected to 5GC 410, between (R)AN nodes 2108 (e.g., gNBs) and eNBs (e.g., macro RAN nodes) connected to CN 2110, and / or between two eNBs connected to CN 2110.

[0307] In at least one embodiment, the Xn interface may include an Xn user plane (Xn-U) interface and an Xn control plane (Xn-C) interface. In at least one embodiment, Xn-U may provide unguaranteed delivery of user plane PDUs and support / provide data forwarding and flow control functions. In at least one embodiment, Xn-C may provide management and error handling functions, functions for managing the Xn-C interface, and mobility support for UE 2102 in connected mode (e.g., CM-CONNECTED), including functions for managing UE mobility for connected modes between one or more (R)AN nodes 2108. In at least one embodiment, mobility support may include context delivery from the old (source) serving (R)AN node 2108 to the new (target) serving (R)AN node 2108; and control of user plane tunneling between the old (source) serving (R)AN node 2108 and the new (target) serving (R)AN node 2108.

[0308] In at least one embodiment, the Xn-U protocol stack may include a transport network layer built on top of the Internet Protocol (IP) transport layer and a GTP-U layer on top of UDP and / or one or more IP layers for carrying user plane PDUs. In at least one embodiment, the Xn-C protocol stack may include an application layer signaling protocol (referred to as the Xn Application Protocol (Xn-AP)) and a transport network layer built on top of the SCTP layer. In at least one embodiment, the SCTP layer may be on top of the IP layers. In at least one embodiment, the SCTP layer provides guaranteed delivery of application layer messages. In at least one embodiment, point-to-point transmission is used to deliver signaling PDUs in the transport IP layer. In at least one embodiment, the Xn-U protocol stack and / or the Xn-C protocol stack may be the same as or similar to the user plane and / or control plane protocol stacks shown and described herein.

[0309] Figure 22 This is an illustration of a control plane protocol stack according to some embodiments. In at least one embodiment, control plane 2200 is shown as a communication protocol stack between UE 2002 (or alternatively, UE 2004), RAN 2016, and MME 2028.

[0310] In at least one embodiment, PHY layer 2202 can transmit or receive information used by MAC layer 2204 through one or more air interfaces. In at least one embodiment, PHY layer 2202 can also perform link adaptive or adaptive modulation and coding (AMC), power control, cell search (e.g., for initial synchronization and handover purposes), and other measurements used by higher layers (e.g., RRC layer 2210). In at least one embodiment, PHY layer 2202 can further perform error detection, forward error correction (FEC) encoding / decoding of the transport channel, modulation / demodulation of the physical channel, interleaving, rate matching, mapping to the physical channel, and multiple-input multiple-output (MIMO) antenna processing.

[0311] In at least one embodiment, MAC layer 2204 can perform mapping between logical channels and transport channels, multiplexing MAC service data units (SDUs) from one or more logical channels onto a transport block (TB) to be delivered to the PHY via the transport channel, demultiplexing MAC SDUs from the transport block (TB) delivered from the PHY via the transport channel onto one or more logical channels, multiplexing MAC SDUs onto the TB, scheduling information reporting, error correction via hybrid automatic repeat request (HARD), and logical channel prioritization.

[0312] In at least one embodiment, the RLC layer 2206 can operate in multiple operating modes, including: Transparent Mode (TM), Unacknowledged Mode (UM), and Acknowledged Mode (AM). In at least one embodiment, the RLC layer 2206 can perform the transmission of upper-layer protocol data units (PDUs), error correction via Automatic Repeat Request (ARQ) for AM data transmission, and the concatenation, segmentation, and reassembly of RLC SDUs for UM and AM data transmission. In at least one embodiment, the RLC layer 2206 can also perform resegmentation of RLC data PDUs for AM data transmission, reordering of RLC data PDUs for UM and AM data transmission, detection of duplicate data for UM and AM data transmission, discarding of RLC SDUs for UM and AM data transmission, detection of protocol errors in AM data transmission, and performance of RLC reconstruction.

[0313] In at least one embodiment, the PDCP layer 2208 can perform header compression and decompression of IP data, maintain PDCP sequence numbers (SNs), perform intra-sequence delivery of higher-layer PDUs when reconstructing lower layers, eliminate duplication of lower-layer SDUs when reconstructing lower layers for radio bearers mapped on RLC AM, encrypt and decrypt control plane data, perform integrity protection and integrity verification of control plane data, discard data based on control timers, and perform security operations (e.g., encryption, decryption, integrity protection, integrity verification, etc.).

[0314] In at least one embodiment, the main services and functions of RRC layer 2210 may include broadcasting system information (e.g., included in a Master Information Block (MIB) or System Information Block (SIB) associated with the Non-Access Stratum (NAS), broadcasting system information associated with the Access Stratum (AS), paging, establishment, maintenance, and release of RRC connections between the UE and the E-UTRAN (e.g., RRC connection paging, RRC connection establishment, RRC connection modification, and RRC connection release), establishment, configuration, maintenance, and release of point-to-point radio bearers, including security functions for key management, inter-Radio Access Technology (RAT) mobility, and measurement configuration for UE measurement reporting. In at least one embodiment, the MIB and SIB may include one or more Information Elements (IEs), each of which may include a separate data field or data structure.

[0315] In at least one embodiment, UE 2002 and RAN 2016 may use a Uu interface (e.g., LTE-Uu interface) to exchange control plane data via a protocol stack including PHY layer 2202, MAC layer 2204, RLC layer 2206, PDCP layer 2208 and RRC layer 2210.

[0316] In at least one embodiment, a Non-Access Stratum (NAS) protocol (NAS protocol 2212) forms the highest layer of the control plane between UE 2002 and MME 2028. In at least one embodiment, NAS protocol 2212 supports the mobility and session management procedures of UE 2002 to establish and maintain an IP connection between UE 2002 and P-GW 2034.

[0317] In at least one embodiment, the Si Application Protocol (Si-AP) layer (Si-AP layer 2222) can support the functionality of the Si interface and include basic procedures (EP). In at least one embodiment, the EP is an interaction unit between RAN 2016 and CN 2028. In at least one embodiment, Si-AP layer services can include two groups: UE-associated services and non-UE-associated services. In at least one embodiment, these services perform functions, including but not limited to: E-UTRAN Radio Access Bearer (E-RAB) management, UE capability indication, mobility, NAS signaling transmission, RAN Information Management (RIM), and configuration transfer.

[0318] In at least one embodiment, the Flow Control Transmission Protocol (SCTP) layer (or alternatively, the Flow Control Transmission Protocol / Internet Protocol (SCTP / IP) layer) (SCTP layer 2220) may be partially based on the IP protocol supported by IP layer 2218 to ensure reliable delivery of signaling messages between RAN 2016 and MME 2028. In at least one embodiment, L2 layer 2216 and L1 layer 2214 may refer to the communication links (e.g., wired or wireless) used by the RAN node and MME to exchange information.

[0319] In at least one embodiment, RAN 2016 and one or more MMEs 2028 can utilize the S1-MME interface to exchange control plane data via a protocol stack including L1 layer 2214, L2 layer 2216, IP layer 2218, SCTP layer 2220 and Si-AP layer 2222.

[0320] Figure 23 This is an illustration of a user plane protocol stack according to at least one embodiment. In at least one embodiment, user plane 2300 is shown as a communication protocol stack between UE 2002, RAN 2016, S-GW 2030, and P-GW 2034. In at least one embodiment, user plane 2300 may utilize the same protocol layer as control plane 2200. In at least one embodiment, UE 2002 and RAN 2016 may utilize a Uu interface (e.g., LTE-Uu interface) to exchange user plane data via a protocol stack including PHY layer 2202, MAC layer 2204, RLC layer 2206, and PDCP layer 2208.

[0321] In at least one embodiment, the General Packet Radio Service (GPRS) Tunneling Protocol (GTP-U) layer (GTP-U layer 2304) for the user plane can be used to carry user data within the GPRS core network and between the radio access network and the core network. In at least one embodiment, the transmitted user data can be packets of any format, such as IPv4, IPv6, or PPP. In at least one embodiment, the UDP and IP Security (UDP / IP) layer (UDP / IP layer 2302) can provide checksums for data integrity, port numbers for addressing different functions at the source and destination, and encryption and authentication of selected data streams. In at least one embodiment, RAN 2016 and S-GW2030 can utilize the S1-U interface to exchange user plane data via a protocol stack including L1 layer 2214, L2 layer 2216, UDP / IP layer 2302, and GTP-U layer 2304. In at least one embodiment, the S-GW 2030 and P-GW 2034 can utilize the S5 / S8a interface to exchange user plane data via a protocol stack including L1 layer 2214, L2 layer 2216, UDP / IP layer 2302, and GTP-U layer 2304. In at least one embodiment, as described above... Figure 22 The NAS protocol discussed here supports the mobility and session management process of UE 2002 to establish and maintain an IP connection between UE 2002 and P-GW 2034.

[0322] Figure 24 A component 2400 of a core network according to at least one embodiment is illustrated. In at least one embodiment, components of CN 2038 may be implemented in a physical node or a separate physical node, the separate physical node including components for reading and executing instructions from a machine-readable medium or a computer-readable medium (e.g., a non-transitory machine-readable storage medium). In at least one embodiment, network function virtualization (NFV) is used to virtualize any or all of the aforementioned network node functions via executable instructions stored in one or more computer-readable storage media (described further in detail below). In at least one embodiment, a logical instantiation of CN 2038 may be referred to as network slice 2402 (e.g., network slice 2402 is shown as including HSS 2032, MME 2028, and S-GW 2030). In at least one embodiment, a logical instantiation of a portion of CN 2038 may be referred to as network subslice 2404 (e.g., network subslice 2404 is shown as including P-GW 2034 and PCRF 2036).

[0323] In at least one embodiment, the NFV architecture and infrastructure can be used to virtualize one or more network functions onto physical resources comprising a combination of industry-standard server hardware, storage hardware, or switches, which may alternatively be performed by dedicated hardware. In at least one embodiment, the NFV system can be used to perform virtual or reconfigurable implementations of one or more EPC components / functions.

[0324] Figure 25 This is a block diagram illustrating the components of a system 2500 for supporting Network Functions Virtualization (NFV) according to at least one embodiment. In at least one embodiment, the system 2500 is shown to include a virtualization infrastructure manager (shown as VIM 2502), a network functions virtualization infrastructure (shown as NFVI 2504), a VNF manager (shown as VNFM 2506), virtualized network functions (shown as VNF 2508), a component manager (shown as EM 2510), an NFV coordinator (shown as NFVO 2512), and a network manager (shown as NM 2514).

[0325] In at least one embodiment, VIM 2502 manages the resources of NFVI 2504. In at least one embodiment, NFVI 2504 may include physical or virtual resources and applications (including hypervisors) for performing system 2500. In at least one embodiment, VIM 2502 may utilize NFVI 2504 to manage the lifecycle of virtual resources (e.g., the creation, maintenance, and teardown of virtual machines (VMs) associated with one or more physical resources), track VM instances, track performance, fault and security of VM instances and associated physical resources, and expose VM instances and associated physical resources to other management systems.

[0326] In at least one embodiment, VNFM 2506 can manage VNF 2508. In at least one embodiment, VNF 2508 can be used to perform EPC components / functions. In at least one embodiment, VNFM 2506 can manage the lifecycle of VNF 2508 and track the performance, faults, and security of the virtual aspects of VNF 2508. In at least one embodiment, EM 2510 can track the performance, faults, and security of the functional aspects of VNF 2508. In at least one embodiment, tracking data from VNFM 2506 and EM 2510 may include, in at least one embodiment, performance measurement (PM) data used by VIM 2502 or NFVI 2504. In at least one embodiment, both VNFM 2506 and EM 2510 can scale up / down the number of VNFs in system 2500.

[0327] In at least one embodiment, NFVO 2512 can coordinate, authorize, release, and occupy resources of NFVI 2504 to provide requested services (e.g., to perform EPC functions, components, or slices). In at least one embodiment, NM 2514 can provide an end-user function package responsible for managing a network that may include network elements having VNFs, non-virtualized network functions, or both (management of VNFs may occur via EM 2510).

[0328] Computer-based systems

[0329] The following figures present, but are not limited to, exemplary computer-based systems that can be used to implement at least one embodiment.

[0330] Figure 26 A processing system 2600 according to at least one embodiment is illustrated. In at least one embodiment, the system 2600 includes one or more processors 2602 and one or more graphics processors 2608, and may be a single-processor desktop system, a multi-processor workstation system, or a server system having a large number of processors 2602 or processor cores 2607. In at least one embodiment, the processing system 2600 is a processing platform incorporated within a system-on-a-chip (SoC) integrated circuit for use in mobile, handheld, or embedded devices.

[0331] In at least one embodiment, the processing system 2600 may include or be integrated into a server-based gaming platform, including a game console, mobile game console, handheld game console, or online game console, which are game and media consoles. In at least one embodiment, the processing system 2600 is a mobile phone, smartphone, tablet computing device, or mobile internet device. In at least one embodiment, the processing system 2600 may also include components coupled to or integrated into a wearable device, such as a smartwatch wearable device, smart glasses device, augmented reality device, or virtual reality device. In at least one embodiment, the processing system 2600 is a television or set-top box device having one or more processors 2602 and a graphical interface generated by one or more graphics processors 2608.

[0332] In at least one embodiment, each of the one or more processors 2602 includes one or more processor cores 2607 to process instructions that, when executed, perform operations against the system and user software. In at least one embodiment, each of the one or more processor cores 2607 is configured to process a particular instruction set 2609. In at least one embodiment, the instruction set 2609 may facilitate Complex Instruction Set Computing (CISC), Reduced Instruction Set Computing (RISC), or computation via Very Long Instruction Word (VLIW). In at least one embodiment, the plurality of processor cores 2607 may each process a different instruction set 2609, which may include instructions that facilitate the emulation of other instruction sets. In at least one embodiment, the processor cores 2607 may also include other processing devices, such as digital signal processors (DSPs).

[0333] In at least one embodiment, processor 2602 includes cache memory 2604. In at least one embodiment, processor 2602 may have a single internal cache or multiple levels of internal caches. In at least one embodiment, the cache memory is shared among various components of processor 2602. In at least one embodiment, processor 2602 also uses an external cache (e.g., a Level 3 (L3) cache or a last-level cache (LLC)) (not shown), which can be shared among processor cores 2607 using known cache coherence techniques. In at least one embodiment, processor 2602 further includes a register file 2606, which may include different types of registers for storing different types of data (e.g., integer registers, floating-point registers, status registers, and instruction pointer registers). In at least one embodiment, register file 2606 may include general-purpose registers or other registers.

[0334] In at least one embodiment, one or more processors 2602 are coupled to one or more interface buses 2610 to transmit communication signals, such as address, data, or control signals, between the processors 2602 and other components in the system 2600. In at least one embodiment, the interface bus 2610 may be a processor bus, such as a version of the Direct Media Interface (DMI) bus. In at least one embodiment, the interface bus 2610 is not limited to the DMI bus and may include one or more peripheral component interconnect buses (e.g., PCI, PCI Express), memory buses, or other types of interface buses. In at least one embodiment, the processor 2602 includes an integrated memory controller 2616 and a platform controller hub 2630. In at least one embodiment, the memory controller 2616 facilitates communication between storage devices and other components of the processing system 2600, while the platform controller hub (PCH) 2630 provides connectivity to input / output (I / O) devices via a local I / O bus.

[0335] In at least one embodiment, memory device 2620 may be a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, a flash memory device, a phase-change memory device, or a device with suitable performance for use as processor memory. In at least one embodiment, memory device 2620 may be used as system memory of processing system 2600 to store data 2622 and instructions 2621 for use when one or more processors 2602 execute applications or processes. In at least one embodiment, memory controller 2616 is also coupled to an optional external graphics processor 2612, which may communicate with one or more graphics processors 2608 of processor 2602 to perform graphics and media operations. In at least one embodiment, display device 2611 may be connected to processor 2602. In at least one embodiment, display device 2611 may include one or more internal display devices, such as those in mobile electronic devices or portable computer devices, or external display devices connected via a display interface (e.g., DisplayPort). In at least one embodiment, the display device 2611 may include a head-mounted display (HMD), such as a stereoscopic display device for virtual reality (VR) or augmented reality (AR) applications.

[0336] In at least one embodiment, the platform controller hub 2630 enables peripheral devices to connect to the storage device 2620 and the processor 2602 via a high-speed I / O bus. In at least one embodiment, the I / O peripheral devices include, but are not limited to, an audio controller 2646, a network controller 2634, a firmware interface 2628, a wireless transceiver 2626, a touch sensor 2625, and a data storage device 2624 (e.g., a hard disk drive, flash memory, etc.). In at least one embodiment, the data storage device 2624 may be connected via a memory interface (e.g., SATA) or via a peripheral bus, such as a peripheral component interconnect bus (e.g., PCI, PCIe). In at least one embodiment, the touch sensor 2625 may include a touchscreen sensor, a pressure sensor, or a fingerprint sensor. In at least one embodiment, the wireless transceiver 2626 may be a Wi-Fi transceiver, a Bluetooth transceiver, or a mobile network transceiver, such as a 3G, 4G, or LTE transceiver. In at least one embodiment, the firmware interface 2628 enables communication with the system firmware, and in at least one embodiment, may be a Unified Extensible Firmware Interface (UEFI). In at least one embodiment, network controller 2634 may enable network connectivity to a wired network. In at least one embodiment, a high-performance network controller (not shown) is coupled to interface bus 2610. In at least one embodiment, audio controller 2646 is a multi-channel high-definition audio controller. In at least one embodiment, processing system 2600 includes an optional legacy I / O controller 2640 for coupling legacy (e.g., Personal System 2 (PS / 2)) devices to processing system 2600. In at least one embodiment, platform controller hub 2630 may also be connected to one or more Universal Serial Bus (USB) controllers 2642 that connect input devices, such as a keyboard and mouse combination 2643, a camera 2644, or other USB input devices.

[0337] In at least one embodiment, instances of the memory controller 2616 and platform controller hub 2630 may be integrated into a discrete external graphics processor, such as external graphics processor 2612. In at least one embodiment, the platform controller hub 2630 and / or the memory controller 2616 may be external to one or more processors 2602. In at least one embodiment, the processing system 2600 may include the external memory controller 2616 and the platform controller hub 2630, which may be configured as a memory controller hub and a peripheral controller hub in a system chipset communicating with the processor 2602.

[0338] Figure 27A computer system 2700 according to at least one embodiment is illustrated. In at least one embodiment, the computer system 2700 may be a system having interconnected devices and components, a System-on-a-Chip (SoC), or some combination thereof. In at least one embodiment, the computer system 2700 is formed by a processor 2702, which may include execution units for executing instructions. In at least one embodiment, the computer system 2700 may include, but is not limited to, components such as the processor 2702, which employs execution units including logic to execute algorithms for process data. In at least one embodiment, the computer system 2700 may include a processor, such as one available from Intel Corporation of Santa Clara, California. Processor family, Xeon™ XScale™ and / or StrongARM™ Core TM or Nervana TM A microprocessor may be used, although other systems (including PCs, engineering workstations, set-top boxes, etc.) with other microprocessors may also be used. In at least one embodiment, computer system 2700 may execute a version of the Windows operating system available from Microsoft Corporation of Redmond, Washington, although other operating systems (UNIX and Linux in at least one embodiment), embedded software, and / or graphical user interfaces may also be used.

[0339] In at least one embodiment, the computer system 2700 can be used in other devices, such as handheld devices and embedded applications. Some of the handheld devices in at least one embodiment include cellular phones, Internet Protocol (IP) devices, digital cameras, personal digital assistants (“PDAs”), and handheld PCs. In at least one embodiment, the embedded application can include a microcontroller, a digital signal processor (“DSP”), a SoC, a network computer (“NetPC”), a set-top box, a network hub, a wide area network (“WAN”) switch, or any other system that can execute one or more instructions according to at least one embodiment.

[0340] In at least one embodiment, computer system 2700 may include, but is not limited to, processor 2702, which may include, but is not limited to, one or more execution units 2708 configured to execute a Computational Unified Device Architecture (“CUDA”). (Developed by NVIDIA Corporation, Santa Clara, California) In at least one embodiment, the CUDA program is at least a part of a software application written in the CUDA programming language. In at least one embodiment, the computer system 2700 is a single-processor desktop or server system. In at least one embodiment, the computer system 2700 may be a multiprocessor system. In at least one embodiment, the processor 2702 may include, but is not limited to, a CISC microprocessor, a RISC microprocessor, a VLIW microprocessor, a processor implementing instruction set combinations, or any other processor device, such as a digital signal processor, in at least one embodiment. In at least one embodiment, the processor 2702 may be coupled to a processor bus 2710, which can transmit data signals between the processor 2702 and other components in the computer system 2700.

[0341] In at least one embodiment, processor 2702 may include, but is not limited to, a Level 1 (“L1”) internal cache memory (“cache”) 2704. In at least one embodiment, processor 2702 may have a single internal cache or multiple levels of internal cache. In at least one embodiment, the cache memory may reside external to processor 2702. In at least one embodiment, processor 2702 may include a combination of internal and external caches. In at least one embodiment, register file 2706 may store different types of data in various registers, including but not limited to integer registers, floating-point registers, status registers, and instruction pointer registers.

[0342] In at least one embodiment, an execution unit 2708, including but not limited to logic for performing integer and floating-point operations, is also located within processor 2702. Processor 2702 may also include a microcode (“ucode”) read-only memory (“ROM”) for storing microcode of certain macro instructions. In at least one embodiment, execution unit 2708 may include logic for processing a packaged instruction set 2709. In at least one embodiment, by including the packaged instruction set 2709 in the instruction set of general-purpose processor 2702, along with associated circuitry for executing the instructions, packaged data in general-purpose processor 2702 can be used to perform operations used by numerous multimedia applications. In at least one embodiment, many multimedia applications can be executed more quickly and efficiently by using the full width of the processor’s data bus to perform operations on the packaged data, which may eliminate the need to transfer smaller data units on the processor’s data bus to perform one or more operations on a data element at a time.

[0343] In at least one embodiment, the execution unit 2708 may also be used in a microcontroller, embedded processor, graphics device, DSP, and other types of logic circuitry. In at least one embodiment, the computer system 2700 may include, but is not limited to, the memory 2720. In at least one embodiment, the memory 2720 may be implemented as a DRAM device, an SRAM device, a flash memory device, or other storage device. The memory 2720 may store instructions 2719 and / or data 2721 represented by data signals that can be executed by the processor 2702.

[0344] In at least one embodiment, the system logic chip may be coupled to processor bus 2710 and memory 2720. In at least one embodiment, the system logic chip may include, but is not limited to, a memory controller hub (“MCH”) 2716, and processor 2702 may communicate with MCH 2716 via processor bus 2710. In at least one embodiment, MCH 2716 may provide a high-bandwidth memory path 2718 to memory 2720 for instruction and data storage, as well as for storage of graphics commands, data, and textures. In at least one embodiment, MCH 2716 may initiate data signals between processor 2702, memory 2720, and other components in computer system 2700, and bridge data signals between processor bus 2710, memory 2720, and system I / O 2722. In at least one embodiment, the system logic chip may provide a graphics port for coupling to a graphics controller. In at least one embodiment, MCH 2716 may be coupled to memory 2720 via high-bandwidth memory path 2718, and graphics / video card 2712 may be coupled to MCH 2716 via Accelerated Graphics Port (“AGP”) interconnect 2714.

[0345] In at least one embodiment, computer system 2700 may use system I / O 2722 as a proprietary hub interface bus to couple MCH 2716 to I / O controller hub (“ICH”) 2730. In at least one embodiment, ICH 2730 may provide direct connectivity to certain I / O devices via a local I / O bus. In at least one embodiment, the local I / O bus may include, but is not limited to, a high-speed I / O bus for connecting peripheral devices to memory 2720, chipset, and processor 2702. Examples may include, but are not limited to, an audio controller 2729, a firmware hub (“Flash BIOS”) 2728, a wireless transceiver 2726, data storage 2724, a conventional I / O controller 2723 including user input 2725 and a keyboard interface, a serial expansion port 2777 (e.g., USB), and a network controller 2734. Data storage 2724 may include a hard disk drive, floppy disk drive, CD-ROM device, flash memory device, or other mass storage device.

[0346] In at least one embodiment, Figure 27 A system comprising interconnected hardware devices or "chips" is shown. In at least one embodiment, Figure 27 An exemplary SoC can be shown. In at least one embodiment, Figure 27 The devices shown can be interconnected with proprietary interconnects, standardized interconnects (e.g., PCIe), or some combination thereof. In at least one embodiment, one or more components of system 2700 are interconnected using a compute fast link (CXL) interconnect.

[0347] Figure 28 A system 2800 according to at least one embodiment is illustrated. In at least one embodiment, system 2800 is an electronic device utilizing processor 2810. In at least one embodiment, system 2800 may be, but is not limited to, a laptop computer, tower server, rack server, blade server, desktop computer, tablet computer, mobile device, telephone, embedded computer, or any other suitable electronic device.

[0348] In at least one embodiment, system 2800 may include, but is not limited to, processor 2810 communicatively coupled to any suitable number or type of components, peripherals, modules, or devices. In at least one embodiment, processor 2810 is coupled using a bus or interface, such as I... 2C-bus, System Management Bus (“SMBus”), Low Pin Count (LPC) bus, Serial Peripheral Interface (“SPI”), High Definition Audio (“HDA”) bus, Serial Advanced Technology Accessory (“SATA”) bus, USB (versions 1, 2, and 3) or Universal Asynchronous Receiver / Transmitter (“UART”) bus. In at least one embodiment, Figure 28 A system is illustrated, comprising interconnected hardware devices or "chips". In at least one embodiment, Figure 28 An exemplary SoC can be shown. In at least one embodiment, Figure 28 The device shown can be interconnected with proprietary interconnects, standardized interconnects (e.g., PCIe), or some combination thereof. In at least one embodiment, Figure 28 One or more components are interconnected using Computational Fast Link (CXL) interconnects.

[0349] In at least one embodiment, Figure 28 This may include a display 2824, a touchscreen 2825, a touchpad 2830, a near-field communication unit (“NFC”) 2845, a sensor hub 2840, a thermal sensor 2846, a fast chipset (“EC”) 2835, a trusted platform module (“TPM”) 2838, a BIOS / firmware / flash memory (“BIOS, FW Flash”) 2822, a DSP 2860, a solid-state drive (“SSD”) or hard disk drive (“HDD”) 2820, a wireless local area network unit (“WLAN”) 2850, a Bluetooth unit 2852, a wireless wide area network unit (“WWAN”) 2856, a global positioning system (GPS) 2855, a camera (“USB 3.0 camera”) 2854 (e.g., a USB 3.0 camera), or a low-power double data rate (“LPDDR”) memory unit (“LPDDR3”) 2815 implemented in at least one embodiment of the LPDDR3 standard. These components may each be implemented in any suitable manner.

[0350] In at least one embodiment, other components may be communicatively coupled to processor 2810 via the components discussed above. In at least one embodiment, accelerometer 2841, ambient light sensor (“ALS”) 2842, compass 2843, and gyroscope 2844 may be communicatively coupled to sensor hub 2840. In at least one embodiment, thermal sensor 2839, fan 2837, keyboard 2846, and touchpad 2830 may be communicatively coupled to EC 2835. In at least one embodiment, speaker 2863, earphone 2864, and microphone (“mic”) 2865 may be communicatively coupled to audio unit (“audio codec and Class D amplifier”) 2864, which in turn may be communicatively coupled to DSP 2860. In at least one embodiment, audio unit 2864 may include, but is not limited to, audio encoder / decoder (“codec”) and Class D amplifier. In at least one embodiment, SIM card (“SIM”) 2857 may be communicatively coupled to WWAN unit 2856. In at least one embodiment, components such as WLAN unit 2850, Bluetooth unit 2852, and WWAN unit 2856 can be implemented as next-generation form factor (NGFF).

[0351] Figure 29 An exemplary integrated circuit 2900 according to at least one embodiment is illustrated. In at least one embodiment, the exemplary integrated circuit 2900 is a SoC (System-on-a-Chip) that can be manufactured using one or more IP cores. In at least one embodiment, the integrated circuit 2900 includes one or more application processors 2905 (e.g., CPUs), at least one graphics processor 2910, and may additionally include an image processor 2915 and / or a video processor 2920, any of which may be a modular IP core. In at least one embodiment, the integrated circuit 2900 includes peripheral or bus logic, which includes a USB controller 2925, a UART controller 2930, an SPI / SDIO controller 2935, and an I... 2 S / I 2 C controller 2940. In at least one embodiment, integrated circuit 2900 may include display device 2945 coupled to one or more of high-definition multimedia interface (HDMI) controller 2950 and mobile industrial processor interface (MIPI) display interface 2955. In at least one embodiment, storage may be provided by flash memory subsystem 2960, including flash memory and flash memory controller. In at least one embodiment, a memory interface may be provided via memory controller 2965 for accessing SDRAM or SRAM memory devices. In at least one embodiment, some integrated circuits also include embedded security engine 2970.

[0352] Figure 30A computing system 3000 according to at least one embodiment is illustrated. In at least one embodiment, the computing system 3000 includes a processing subsystem 3001 having one or more processors 3002 and a system memory 3004 communicating via an interconnect path that may include a memory hub 3005. In at least one embodiment, the memory hub 3005 may be a separate component within a chipset assembly or may be integrated within one or more processors 3002. In at least one embodiment, the memory hub 3005 is coupled to an I / O subsystem 3011 via a communication link 3006. In at least one embodiment, the I / O subsystem 3011 includes an I / O hub 3007 that enables the computing system 3000 to receive input from one or more input devices 3008. In at least one embodiment, the I / O hub 3007 may enable a display controller, included in one or more processors 3002, for providing output to one or more display devices 3010A. In at least one embodiment, one or more display devices 3010A coupled to the I / O hub 3007 may include local, internal, or embedded display devices.

[0353] In at least one embodiment, the processing subsystem 3001 includes one or more parallel processors 3012 coupled to a memory hub 3005 via a bus or other communication link 3013. In at least one embodiment, the communication link 3013 may be one of many standards-based communication link technologies or protocols, such as, but not limited to, PCIe, or may be a vendor-specific communication interface or communication architecture. In at least one embodiment, the one or more parallel processors 3012 form a compute-intensive parallel or vector processing system that may include a large number of processing cores and / or processing clusters, such as a multi-core integrated (MIC) processor. In at least one embodiment, the one or more parallel processors 3012 form a graphics processing subsystem capable of outputting pixels to one or more display devices 3010A coupled via an I / O hub 3007. In at least one embodiment, the one or more parallel processors 3012 may also include a display controller and a display interface (not shown) to enable direct connection to one or more display devices 3010B.

[0354] In at least one embodiment, system storage unit 3014 may be connected to I / O hub 3007 to provide a storage mechanism for computing system 3000. In at least one embodiment, I / O switch 3016 may be used to provide an interface mechanism to enable connectivity between I / O hub 3007 and other components, such as network adapter 3018 and / or wireless network adapter 3019 which may be integrated into the platform, and various other devices that can be added via one or more additional devices 3020. In at least one embodiment, network adapter 3018 may be an Ethernet adapter or another wired network adapter. In at least one embodiment, wireless network adapter 3019 may include one or more Wi-Fi, Bluetooth, NFC, or other network devices comprising one or more radios.

[0355] In at least one embodiment, the computing system 3000 may include other components not explicitly shown, including USB or other port connections, optical storage drives, video capture devices and / or variations thereof, and may also be connected to the I / O hub 3007. In at least one embodiment, for Figure 30 The communication paths that interconnect the various components can be implemented using any suitable protocol, such as PCI (Peripheral Component Interconnect) based protocols (e.g., PCIe), or other bus or point-to-point communication interfaces and / or protocols (e.g., NVLink high-speed interconnect or interconnect protocols).

[0356] In at least one embodiment, one or more parallel processors 3012 include circuitry optimized for graphics and video processing (including video output circuitry in at least one embodiment) and constitute a graphics processing unit (GPU). In at least one embodiment, one or more parallel processors 3012 include circuitry optimized for general-purpose processing. In at least one embodiment, components of the computing system 3000 may be integrated with one or more other system elements on a single integrated circuit. In at least one embodiment, one or more parallel processors 3012, memory hub 3005, processor 3002, and I / O hub 3007 may be integrated into a system-on-a-chip (SoC) integrated circuit. In at least one embodiment, components of the computing system 3000 may be integrated into a single package to form a system-in-package (SIP) configuration. In at least one embodiment, at least a portion of the components of the computing system 3000 may be integrated into a multi-chip module (MCM) that can interconnect with other MCMs to a modular computing system. In at least one embodiment, the I / O subsystem 3011 and display device 3010B are omitted from the computing system 3000.

[0357] Processing system

[0358] The following figures illustrate, but are not limited to, exemplary processing systems that can be used to implement at least one embodiment.

[0359] Figure 31 An accelerated processing unit (“APU”) 3100 according to at least one embodiment is illustrated. In at least one embodiment, the APU 3100 was developed by AMD Inc. of Santa Clara, California. In at least one embodiment, the APU 3100 can be configured to execute applications, such as CUDA programs. In at least one embodiment, the APU 3100 includes, but is not limited to, a core complex 3110, a graphics complex 3140, an architecture 3160, an I / O interface 3170, a memory controller 3180, a display controller 3192, and a multimedia engine 3194. In at least one embodiment, the APU 3100 can be, but is not limited to, any combination of any number of core complexes 3110, any number of graphics complexes 3140, any number of display controllers 3192, and any number of multimedia engines 3194. For illustrative purposes, multiple instances of similar objects are indicated herein by reference numerals, wherein the reference numerals identify the object, and the numbers in parentheses identify the desired instances.

[0360] In at least one embodiment, the core complex 3110 is a CPU, the graphics complex 3140 is a GPU, and the APU 3100 is a processing unit that is not limited to 3110 and 3140 integrated onto a single chip. In at least one embodiment, some tasks may be assigned to the core complex 3110, while other tasks may be assigned to the graphics complex 3140. In at least one embodiment, the core complex 3110 is configured to execute main control software associated with the APU 3100, such as an operating system. In at least one embodiment, the core complex 3110 is the main processor of the APU 3100, which controls and coordinates the operation of other processors. In at least one embodiment, the core complex 3110 issues commands to control the operation of the graphics complex 3140. In at least one embodiment, the core complex 3110 may be configured to execute host executable code derived from CUDA source code, and the graphics complex 3140 may be configured to execute device executable code derived from CUDA source code.

[0361] In at least one embodiment, the core complex 3110 includes, but is not limited to, cores 3120(1)-3120(4) and L3 cache 3130. In at least one embodiment, the core complex 3110 may include, but is not limited to, any combination of any number of cores 3120 and any number and type of cache. In at least one embodiment, the cores 3120 are configured to execute instructions of a specific instruction set architecture (“ISA”). In at least one embodiment, each core 3120 is a CPU core.

[0362] In at least one embodiment, each core 3120 includes, but is not limited to, a fetch / decode unit 3122, an integer execution engine 3124, a floating-point execution engine 3126, and an L2 cache 3128. In at least one embodiment, the fetch / decode unit 3122 fetches instructions, decodes these instructions, generates micro-operations, and dispatches individual micro-instructions to the integer execution engine 3124 and the floating-point execution engine 3126. In at least one embodiment, the fetch / decode unit 3122 may simultaneously dispatch one micro-instruction to the integer execution engine 3124 and another micro-instruction to the floating-point execution engine 3126. In at least one embodiment, the integer execution engine 3124 performs operations not limited to integer and memory operations. In at least one embodiment, the floating-point engine 3126 performs operations not limited to floating-point and vector operations. In at least one embodiment, the fetch-decode unit 3122 dispatches micro-instructions to a single execution engine, which replaces both the integer execution engine 3124 and the floating-point execution engine 3126.

[0363] In at least one embodiment, each core 3120(i) can access an L2 cache 3128(i) included in core 3120(i), where i is an integer representing a specific instance of core 3120. In at least one embodiment, each core 3120 included in core complex 3110(j) is connected to other cores 3120 included in core complex 3110(j) via an L3 cache 3130(j) included in core complex 3110(j), where j is an integer representing a specific instance of core complex 3110. In at least one embodiment, a core 3120 included in core complex 3110(j) can access all L3 caches 3130(j) included in core complex 3110(j), where j is an integer representing a specific instance of core complex 3110. In at least one embodiment, the L3 cache 3130 may include, but is not limited to, any number of slices.

[0364] In at least one embodiment, the graphics complex 3140 can be configured to perform computational operations in a highly parallel manner. In at least one embodiment, the graphics complex 3140 is configured to perform graphics pipeline operations, such as drawing commands, pixel operations, geometric calculations, and other operations associated with rendering an image to a display. In at least one embodiment, the graphics complex 3140 is configured to perform graphics-independent operations. In at least one embodiment, the graphics complex 3140 is configured to perform both graphics-related and graphics-independent operations.

[0365] In at least one embodiment, the graphics complex 3140 includes, but is not limited to, any number of computing units 3150 and an L2 cache 3142. In at least one embodiment, the computing units 3150 share the L2 cache 3142. In at least one embodiment, the L2 cache 3142 is partitioned. In at least one embodiment, the graphics complex 3140 includes, but is not limited to, any number of computing units 3150 and any number (including zero) and type of cache. In at least one embodiment, the graphics complex 3140 includes, but is not limited to, any number of dedicated graphics hardware.

[0366] In at least one embodiment, each computing unit 3150 includes, but is not limited to, any number of SIMD units 3152 and shared memory 3154. In at least one embodiment, each SIMD unit 3152 implements a SIMD architecture and is configured to execute operations in parallel. In at least one embodiment, each computing unit 3150 may execute any number of thread blocks, but each thread block executes on a single computing unit 3150. In at least one embodiment, a thread block includes, but is not limited to, any number of execution threads. In at least one embodiment, a workgroup is a thread block. In at least one embodiment, each SIMD unit 3152 executes a different warp. In at least one embodiment, a warp is a group of threads (e.g., 16 threads), where each thread in the warp belongs to a single thread block and is configured to process different datasets based on a single instruction set. In at least one embodiment, prediction can be used to disable one or more threads in a warp. In at least one embodiment, a channel is a thread. In at least one embodiment, a work item is a thread. In at least one embodiment, a wavefront is a warp. In at least one embodiment, different wavefronts in a thread block can be synchronized together and communicate via shared memory 3154.

[0367] In at least one embodiment, structure 3160 is a system interconnect that facilitates data and control transfers across core complex 3110, graphics complex 3140, I / O interface 3170, memory controller 3180, display controller 3192, and multimedia engine 3194. In at least one embodiment, in addition to or instead of structure 3160, APU 3100 may also include, but is not limited to, any number and type of system interconnects that facilitate data and control transfers across any number and type of components that may be directly or indirectly linked, either internally or externally to APU 3100. In at least one embodiment, I / O interface 3170 represents any number and type of I / O interface (e.g., PCI, PCI-Extended (“PCI-X”), PCIe, Gigabit Ethernet (“GBE”), USB, etc.). In at least one embodiment, various types of peripheral devices are coupled to I / O interface 3170. In at least one embodiment, the peripheral device coupled to the I / O interface 3170 may include, but is not limited to, a keyboard, mouse, printer, scanner, joystick or other types of game controllers, media recording devices, external storage devices, network interface cards, etc.

[0368] In at least one embodiment, the display controller AMD92 displays images on one or more display devices (e.g., liquid crystal display (LCD) devices). In at least one embodiment, the multimedia engine 240 includes, but is not limited to, any number and type of multimedia-related circuitry, such as video decoders, video encoders, image signal processors, etc. In at least one embodiment, the memory controller 3180 facilitates data transfer between the APU 3100 and the unified system memory 3190. In at least one embodiment, the core complex 3110 and the graphics complex 3140 share the unified system memory 3190.

[0369] In at least one embodiment, the APU 3100 implements a memory subsystem, including but not limited to any number and type of memory controllers 3180 and memory devices (e.g., shared memory 3154) that can be dedicated to a single component or shared among multiple components. In at least one embodiment, the APU 3100 implements a cache subsystem, including but not limited to one or more cache memories (e.g., L2 cache 2728, L3 cache 3130, and L2 cache 3142), each cache memory being component-private or shared among any number of components (e.g., core 3120, core complex 3110, SIMD unit 3152, compute unit 3150, and graphics complex 3140).

[0370] Figure 32A CPU 3200 according to at least one embodiment is illustrated. In at least one embodiment, the CPU 3200 was developed by AMD Inc. of Santa Clara, California. In at least one embodiment, the CPU 3200 can be configured to execute an application. In at least one embodiment, the CPU 3200 is configured to execute host control software, such as an operating system. In at least one embodiment, the CPU 3200 issues commands to control the operation of an external GPU (not shown). In at least one embodiment, the CPU 3200 can be configured to execute host executable code derived from CUDA source code, and the external GPU can be configured to execute device executable code derived from such CUDA source code. In at least one embodiment, the CPU 3200 includes, but is not limited to, any number of core complexes 3210, architectures 3260, I / O interfaces 3270, and memory controllers 3280.

[0371] In at least one embodiment, the core complex 3210 includes, but is not limited to, cores 3220(1)-3220(4) and L3 cache 3230. In at least one embodiment, the core complex 3210 may include, but is not limited to, any combination of any number of cores 3220 and any number and type of cache. In at least one embodiment, the cores 3220 are configured to execute instructions of a specific ISA. In at least one embodiment, each core 3220 is a CPU core.

[0372] In at least one embodiment, each core 3220 includes, but is not limited to, a fetch / decode unit 3222, an integer execution engine 3224, a floating-point execution engine 3226, and an L2 cache 3228. In at least one embodiment, the fetch / decode unit 3222 fetches instructions, decodes these instructions, generates micro-operations, and dispatches individual micro-instructions to the integer execution engine 3224 and the floating-point execution engine 3226. In at least one embodiment, the fetch / decode unit 3222 may simultaneously dispatch one micro-instruction to the integer execution engine 3224 and another micro-instruction to the floating-point execution engine 3226. In at least one embodiment, the integer execution engine 3224 performs operations not limited to integer and memory operations. In at least one embodiment, the floating-point engine 3226 performs operations not limited to floating-point and vector operations. In at least one embodiment, the fetch-decode unit 3222 dispatches micro-instructions to a single execution engine, which replaces both the integer execution engine 3224 and the floating-point execution engine 3226.

[0373] In at least one embodiment, each core 3220(i) can access an L2 cache 3228(i) included in core 3220(i), where i is an integer representing a specific instance of core 3220. In at least one embodiment, each core 3220 included in core complex 3210(j) is connected to other cores 3220 in core complex 3210(j) via an L3 cache 3230(j) included in core complex 3210(j), where j is an integer representing a specific instance of core complex 3210. In at least one embodiment, a core 3220 included in core complex 3210(j) can access all L3 caches 3230(j) included in core complex 3210(j), where j is an integer representing a specific instance of core complex 3210. In at least one embodiment, the L3 cache 3230 may include, but is not limited to, any number of slices.

[0374] In at least one embodiment, structure 3260 is a system interconnect that facilitates data and control transfers across core complexes 3210(1)-3210(N) (where N is a positive integer), I / O interface 3270, and memory controller 3280. In at least one embodiment, in addition to or instead of structure 3260, CPU 3200 may also include, but is not limited to, any number and type of system interconnects that facilitate data and control transfers across any number and type of components that may be directly or indirectly linked, either inside or outside CPU 3200. In at least one embodiment, I / O interface 3270 represents any number and type of I / O interfaces (e.g., PCI, PCI-X, PCIe, GBE, USB, etc.). In at least one embodiment, various types of peripheral devices are coupled to I / O interface 3270. In at least one embodiment, peripheral devices coupled to I / O interface 3270 may include, but are not limited to, displays, keyboards, mice, printers, scanners, joysticks or other types of game controllers, media recording devices, external storage devices, network interface cards, etc.

[0375] In at least one embodiment, memory controller 3280 facilitates data transfer between CPU 3200 and system memory 3290. In at least one embodiment, core complex 3210 and graphics complex 3240 share system memory 3290. In at least one embodiment, CPU 3200 implements a memory subsystem, which includes, but is not limited to, any number and type of memory controllers 3280 and memory devices that may be dedicated to a component or shared among multiple components. In at least one embodiment, CPU 3200 implements a cache subsystem, which includes, but is not limited to, one or more cache memories (e.g., L2 cache 3228 and L3 cache 3230), each cache memory may be component-private or shared among any number of components (e.g., core 3220 and core complex 3210).

[0376] Figure 33 An exemplary accelerator integration slice 3390 according to at least one embodiment is illustrated. As used herein, a "slice" includes a designated portion of the processing resources of an accelerator integrated circuit. In at least one embodiment, the accelerator integrated circuit provides cache management, memory access, environment management, and interrupt management services for multiple graphics processing engines among multiple graphics acceleration modules. Each graphics processing engine may comprise a separate GPU. Optionally, the graphics processing engine may include different types of graphics processing engines within the GPU, such as graphics execution units, media processing engines (e.g., video encoders / decoders), samplers, and blit engines. In at least one embodiment, a graphics acceleration module may be a GPU having multiple graphics processing engines. In at least one embodiment, the graphics processing engines may be individual GPUs integrated on a general-purpose package, line card, or chip.

[0377] The application's effective address space 3382 within system memory 3314 stores process element 3383. In one embodiment, process element 3383 is stored in response to a GPU call 3381 from an application 3380 executing on processor 3307. Process element 3383 contains the processing state of the corresponding application 3380. A job descriptor (WD) 3384 contained in process element 3383 may be a single job requested by the application or may contain pointers to job queues. In at least one embodiment, WD 3384 is a pointer to a job request queue in the application's effective address space 3382.

[0378] The graphics acceleration module 3346 and / or the various graphics processing engines may be shared by all or some processes in the system. In at least one embodiment, infrastructure may be included for establishing a processing state and sending the WD3384 to the graphics acceleration module 3346 to begin operation in a virtualized environment.

[0379] In at least one embodiment, a dedicated process programming model is used for implementation. In this model, a single process owns the graphics acceleration module 3346 or an individual graphics processing engine. Since the graphics acceleration module 3346 is owned by a single process, the hypervisor initializes the accelerator integrated circuit for the owned partition, and the operating system initializes the accelerator integrated circuit for the owned partition when the graphics acceleration module 3346 is allocated.

[0380] During operation, the WD fetch unit 3391 in the accelerator integrated slice 3390 fetches the next WD 3384, which includes instructions for the work to be performed by one or more graphics processing engines of the graphics acceleration module 3346. Data from the WD 3384 can be stored in register 3345 and used by the memory management unit (MMU) 3339, interrupt management circuitry 3347, and / or environment management circuitry 3348, as shown. At least one embodiment of the MMU 3339 includes segment / page roaming circuitry for accessing segment / page tables 3386 within the OS virtual address space 3385. The interrupt management circuitry 3347 can handle interrupt events (INT) 3392 received from the graphics acceleration module 3346. When performing graph operations, the effective address 3393 generated by the graphics processing engine is translated into an actual address by the MMU 3339.

[0381] In one embodiment, the same register set 3345 is copied for each graphics processing engine and / or graphics acceleration module 3346 and can be initialized by the hypervisor or operating system. Each of these copied registers can be included in the accelerator integration slice 3390. Exemplary registers that can be initialized by the hypervisor are shown in Table 1.

[0382] Table 1 – Registers for Supervisor Initialization

[0383] 1 Slice Control Register 2 Real Address (RA) plan processing area pointer 3 Authorization mask overwrite register 4 Interrupt vector table input offset 5 Interrupt vector table entry restrictions 6 Status Register 7 Logical partition ID 8 Real Address (RA) Manager Accelerator Utilization Record Pointer 9 Storage description register

[0384] Table 2 shows exemplary registers that can be initialized by the operating system.

[0385] Table 2 – Operating System Initialization Registers

[0386] 1 Process and thread identification 2 Valid Address (EA) Environment Save / Restore Pointer 3 Virtual Address (VA) accelerator utilization record pointer 4 Virtual address (VA) stores segment table pointers 5 mask of authority 6 Job descriptor

[0387] In one embodiment, each WD 3384 is specific to a particular graphics acceleration module 3346 and / or a particular graphics processing engine. It contains all the information required for the graphics processing engine to perform its work or to do so, or it may be a pointer to a memory location where the application has established a command queue for the work to be done.

[0388] Figures 34A-34B An exemplary graphics processor according to at least one embodiment herein is illustrated. In at least one embodiment, any exemplary graphics processor may be manufactured using one or more IP cores. In addition to the illustrations, other logic and circuitry may be included in at least one embodiment, including additional graphics processor / cores, peripheral interface controllers, or general-purpose processor cores. In at least one embodiment, the exemplary graphics processor is used within a System-on-a-Chip (SoC).

[0389] Figure 34A An exemplary graphics processor 3410 of a SoC integrated circuit according to at least one embodiment is shown, which can be manufactured using one or more IP cores. Figure 34B An additional exemplary graphics processor 3440 of a SoC integrated circuit according to at least one embodiment is shown, which can be manufactured using one or more IP cores. In at least one embodiment, Figure 34A The graphics processor 3410 is a low-power graphics processor core. In at least one embodiment, Figure 34B The graphics processor 3440 is a higher-performance graphics processor core. In at least one embodiment, each graphics processor 3410, 3440 may be... Figure 5 A variant of the 510 graphics processor.

[0390] In at least one embodiment, the graphics processor 3410 includes a vertex processor 3405 and one or more fragment processors 3415A-3415N (e.g., 3415A, 3415B, 3415C, 3415D to 3415N-1 and 3415N). In at least one embodiment, the graphics processor 3410 can execute different shader programs via separate logic, such that the vertex processor 3405 is optimized to perform operations for the vertex shader program, while one or more fragment processors 3415A-3415N perform fragment (e.g., pixel) shading operations for fragments or pixels or shader programs. In at least one embodiment, the vertex processor 3405 performs the vertex processing stage of the 3D graphics pipeline and generates primitive and vertex data. In at least one embodiment, the fragment processors 3415A-3415N use the primitive and vertex data generated by the vertex processor 3405 to generate framebuffers for display on a display device. In at least one embodiment, the fragment processors 3415A-3415N are optimized to execute fragment shader programs as provided in the OpenGL API, which can be used to perform operations similar to those of pixel shader programs provided in the Direct 3D API.

[0391] In at least one embodiment, the graphics processor 3410 additionally includes one or more MMUs 3420A-3420B, caches 3425A-3425B, and circuit interconnects 3430A-3430B. In at least one embodiment, one or more MMUs 3420A-3420B provide a virtual-to-physical address mapping for the graphics processor 3410, including for the vertex processor 3405 and / or fragment processors 3415A-3415N, which can reference vertex or image / texture data stored in memory, in addition to the vertex or image / texture data stored in one or more caches 3425A-3425B. In at least one embodiment, one or more MMUs 3420A-3420B can be synchronized with other MMUs within the system, including with... Figure 5 One or more application processors 505, image processors 515, and / or video processors 520 are associated with one or more MMUs, enabling each processor 505-520 to participate in a shared or unified virtual memory system. In at least one embodiment, one or more circuit interconnects 3430A-3430B enable the graphics processor 3410 to connect to other IP cores within the SoC via the SoC's internal bus or via a direct connection.

[0392] In at least one embodiment, the graphics processor 3440 includes Figure 34A The graphics processor 3410 includes one or more MMUs 3420A-3420B, caches 3425A-3425B, and circuit interconnects 3430A-3430B. In at least one embodiment, the graphics processor 3440 includes one or more shader cores 3455A-3455N (e.g., 3455A, 3455B, 3455C, 3455D, 3455E, 3455F, to 3455N-1 and 3455N) that provide a unified shader core architecture, wherein a single core or type of core can execute all types of programmable shader code, including shader program code for implementing vertex shaders, fragment shaders, and / or compute shaders. In at least one embodiment, the number of shader cores may vary. In at least one embodiment, the graphics processor 3440 includes an inter-core task manager 3445 that acts as a thread dispatcher to assign execution threads to one or more shader cores 3455A-3455N and a tile unit 3458 to accelerate tile-based rendering operations, wherein rendering operations of a scene are subdivided in image space, for example, to take advantage of local spatial consistency within the scene or to optimize the use of internal caches.

[0393] Figure 35AA graphics core 3500 according to at least one embodiment is shown. In at least one embodiment, the graphics core 3500 may include... Figure 24 The graphics processor 2410 is located within it. In at least one embodiment, the graphics core 3500 may be... Figure 34B The graphics core 3500 uses a unified shader core 3455A-3455N. In at least one embodiment, the graphics core 3500 includes a shared instruction cache 3502, texture units 3518, and cache / shared memory 3520, which are common to execution resources within the graphics core 3500. In at least one embodiment, the graphics core 3500 may include multiple slices 3501A-3501N or partitions of each core, and the graphics processor may include multiple instances of the graphics core 3500. Slices 3501A-3501N may include supporting logic, including local instruction caches 3504A-3504N, thread schedulers 3506A-3506N, thread dispatchers 3508A-3508N, and a set of registers 3510A-3510N. In at least one embodiment, slices 3501A-3501N may include a set of additional functional units (AFU) 3512A-3512N, floating-point units (FPU) 3514A-3514N, integer arithmetic logic units (ALU) 3516A-3516N, address calculation units (ACU) 3513A-3513N, double-precision floating-point units (DPFPU) 3515A-3515N, and matrix processing units (MPU) 3517A-3517N.

[0394] In one embodiment, the FPU 3514A-3514N can perform single-precision (32-bit) and half-precision (16-bit) floating-point operations, while the DPFPU 3515A-3515N can perform double-precision (64-bit) floating-point operations. In at least one embodiment, the ALU 3516A-3516N can perform variable-precision integer operations with 8-bit, 16-bit, and 32-bit precision, and can be configured for mixed-precision operations. In at least one embodiment, the MPU 3517A-3517N can also be configured for mixed-precision matrix operations, including half-precision floating-point operations and 8-bit integer operations. In at least one embodiment, the MPU 3517A-3517N can perform various matrix operations to accelerate CUDA programs, including enabling accelerated Generalized Matrix-to-Matrix Multiplication (GEMM). In at least one embodiment, the AFU 3512A-3512N can perform additional logical operations not supported by floating-point or integer units, including trigonometric operations (e.g., Sine, Cosine, etc.).

[0395] Figure 35BA general-purpose graphics processing unit (GPGPU) 3530 is illustrated in at least one embodiment. In at least one embodiment, the GPGPU 3530 is highly parallel and suitable for deployment on a multi-chip module. In at least one embodiment, the GPGPU 3530 can be configured to enable highly parallel computational operations to be performed by a GPU array. In at least one embodiment, the GPGPU 3530 can be directly linked to other instances of the GPGPU 3530 to create a multi-GPU cluster to improve execution time for CUDA programs. In at least one embodiment, the GPGPU 3530 includes a host interface 3532 for connection to a host processor. In at least one embodiment, the host interface 3532 is a PCIe interface. In at least one embodiment, the host interface 3532 can be a vendor-specific communication interface or communication structure. In at least one embodiment, the GPGPU 3530 receives commands from the host processor and uses a global scheduler 3534 to assign execution threads associated with those commands to a set of compute clusters 3536A-3536H. In at least one embodiment, computing clusters 3536A-3536H share cache memory 3538. In at least one embodiment, cache memory 3538 can be used as an advanced cache of cache memory within computing clusters 3536A-3536H.

[0396] In at least one embodiment, the GPGPU 3530 includes memory 3544A-3544B coupled to computing clusters 3536A-3536H via a set of memory controllers 3542A-3542B. In at least one embodiment, memory 3544A-3544B may include various types of memory devices, including dynamic random access memory (DRAM) or graphics random access memory, such as synchronous graphics random access memory (SGRAM), including graphics double data rate (GDDR) memory.

[0397] In at least one embodiment, computing clusters 3536A-3536H each include a set of graphics cores, such as Figure 35A The graphics core 3500 may include various types of integer and floating-point logic units, capable of performing computational operations at various precisions, including computations suitable for CUDA programs. In at least one embodiment, at least a subset of the floating-point units in each computing cluster 3536A-3536H may be configured to perform 16-bit or 32-bit floating-point operations, while different subsets of the floating-point units may be configured to perform 64-bit floating-point operations.

[0398] In at least one embodiment, multiple instances of the GPGPU 3530 can be configured to operate as a computing cluster. In at least one embodiment, the computing clusters 3536A-3536H can implement any technically feasible communication technology for synchronization and data exchange. In at least one embodiment, the multiple instances of the GPGPU 3530 communicate via a host interface 3532. In at least one embodiment, the GPGPU 3530 includes an I / O hub 3539 that couples the GPGPU 3530 to a GPU link 3540, enabling direct connection to other instances of the GPGPU 3530. In at least one embodiment, the GPU link 3540 is coupled to a dedicated GPU-to-GPU bridge, enabling communication and synchronization among the multiple instances of the GPGPU 3530. In at least one embodiment, the GPU link 3540 is coupled to a high-speed interconnect for sending and receiving data to and from other GPGPUs or parallel processors. In at least one embodiment, the multiple instances of the GPGPU 3530 reside in a separate data processing system and communicate via a network device accessible via the host interface 3532. In at least one embodiment, the GPU link 3540 may be configured to connect to a host processor, supplementing or replacing the host interface 3532. In at least one embodiment, the GPGPU 3530 may be configured to execute CUDA programs.

[0399] Figure 36A A parallel processor 3600 according to at least one embodiment is shown. In at least one embodiment, various components of the parallel processor 3600 may be implemented using one or more integrated circuit devices, such as programmable processors, application-specific integrated circuits (ASICs), or FPGAs.

[0400] In at least one embodiment, the parallel processor 3600 includes a parallel processing unit 3602. In at least one embodiment, the parallel processing unit 3602 includes an I / O unit 3604 that enables communication with other devices, including other instances of the parallel processing unit 3602. In at least one embodiment, the I / O unit 3604 can be directly connected to other devices. In at least one embodiment, the I / O unit 3604 is connected to other devices using a hub or switch interface (e.g., a memory hub 605). In at least one embodiment, the connection between the memory hub 605 and the I / O unit 3604 forms a communication link. In at least one embodiment, the I / O unit 3604 is connected to a host interface 3606 and a memory crossbar switch 3616, wherein the host interface 3606 receives commands for performing processing operations, and the memory crossbar switch 3616 receives commands for performing memory operations.

[0401] In at least one embodiment, when host interface 3606 receives a command buffer via I / O unit 3604, host interface 3606 can direct work operations to execute those commands to front end 3608. In at least one embodiment, front end 3608 is coupled to scheduler 3610, which is configured to assign commands or other work items to processing array 3612. In at least one embodiment, scheduler 3610 ensures that processing array 3612 is correctly configured and in an active state before assigning tasks to processing array 3612. In at least one embodiment, scheduler 3610 is implemented via firmware logic executed on a microcontroller. In at least one embodiment, the microcontroller-implemented scheduler 3610 can be configured to perform complex scheduling and work assignment operations at both coarse and fine granular levels, enabling fast preemption and context switching of threads executing on processing array 3612. In at least one embodiment, host software can demonstrate workloads scheduled on processing array 3612 via one of multiple graphics processing doorbells. In at least one embodiment, the workload can then be automatically distributed on the processing array 3612 by the scheduler 3610 logic within the microcontroller, which includes the scheduler 3610.

[0402] In at least one embodiment, the processing array 3612 may include up to "N" processing clusters (e.g., clusters 3614A, 3614B to 3614N). In at least one embodiment, each cluster 3614A-3614N of the processing array 3612 may execute a large number of concurrent threads. In at least one embodiment, the scheduler 3610 may use various scheduling and / or work allocation algorithms to allocate work to the clusters 3614A-3614N of the processing array 3612, which may vary depending on the workload generated by each type of program or computation. In at least one embodiment, scheduling may be handled dynamically by the scheduler 3610, or may be partially assisted by compiler logic during the compilation of program logic configured to be executed by the processing array 3612. In at least one embodiment, different clusters 3614A-3614N of the processing array 3612 may be assigned to process different types of programs or to perform different types of computations.

[0403] In at least one embodiment, the processing array 3612 can be configured to perform various types of parallel processing operations. In at least one embodiment, the processing array 3612 is configured to perform general-purpose parallel computing operations. In at least one embodiment, the processing array 3612 may include logic for performing processing tasks, including filtering video and / or audio data, performing modeling operations, including physical operations, and performing data transformations.

[0404] In at least one embodiment, the processing array 3612 is configured to perform parallel graphics processing operations. In at least one embodiment, the processing array 3612 may include additional logic to support the execution of such graphics processing operations, including but not limited to texture sampling logic for performing texture operations, as well as tessellation logic and other vertex processing logic. In at least one embodiment, the processing array 3612 may be configured to execute shader programs related to graphics processing, such as, but not limited to, vertex shaders, tessellation shaders, geometry shaders, and pixel shaders. In at least one embodiment, the parallel processing unit 3602 may transfer data from system memory via I / O unit 3604 for processing. In at least one embodiment, during processing, the transferred data may be stored in on-chip memory (e.g., parallel processor memory 3622) and then written back to system memory.

[0405] In at least one embodiment, when the parallel processing unit 3602 is used to perform graph processing, the scheduler 3610 may be configured to divide the processing workload into tasks of approximately equal size to better distribute graphics processing operations among the multiple clusters 3614A-3614N of the processing array 3612. In at least one embodiment, portions of the processing array 3612 may be configured to perform different types of processing. In at least one embodiment, a first portion may be configured to perform vertex shading and topology generation, a second portion may be configured to perform tessellation and geometry shading, and a third portion may be configured to perform pixel shading or other screen-space operations to generate a rendered image for display. In at least one embodiment, intermediat...

Claims

1. A data center cooling system, comprising: Multiple fins within the cold plate for heat dissipation, the multiple fins being adjustable at least in part based on the temperature associated with a fluid or at least one computing device, to control the fluid path of the fluid through multiple microchannels between the multiple fins and to transfer heat from at least one computing device to the fluid; Each fin includes an overlapping portion that shields the fluid in a first state and is separated in a second state to expose the overlapping portion to the fluid.

2. The data center cooling system as described in claim 1, further comprising: A control mechanism for adjusting the plurality of fins, the control mechanism comprising a gear subsystem, an electromagnetic subsystem, a thermoelectric generator subsystem, a thermal reaction subsystem, a pneumatic subsystem, or a hydraulic subsystem.

3. The data center cooling system as described in claim 1, further comprising: Flat strip shape factor for the plurality of fins, used to ensure that each fin includes the overlapping portion.

4. The data center cooling system as described in claim 1, further comprising: The cold plate includes ports for a plurality of microchannels within the cold plate, the plurality of microchannels supporting the flow of an auxiliary coolant for an auxiliary cooling circuit and supporting the flow of a fluid different from the auxiliary coolant.

5. The data center cooling system as described in claim 1, further comprising: At least one processor is configured to receive sensor input from a sensor associated with the at least one computing device, the at least one processor being configured to determine a first change in the state of the coolant in part based on the sensor input and to change the amount by which the surface area of ​​the plurality of fins is exposed to the fluid.

6. The data center cooling system as described in claim 5, further comprising: One or more neural networks are used to receive the sensor inputs and infer changes in the coolant state.

7. A cold plate comprising a plurality of fins for heat dissipation, the plurality of fins being adjustable at least in part based on a temperature associated with a fluid or at least one computing device to control the fluid path of the fluid through a plurality of microchannels between the plurality of fins and to transfer heat from at least one computing device to the fluid; in, Each fin includes an overlapping portion that shields the fluid in a first state and is separated in a second state to expose the overlapping portion to the fluid.

8. The cold plate as described in claim 7, further comprising: The plurality of fins comprises at least two materials, enabling the plurality of fins to respond to the temperature in part based on the properties of the at least two materials and to change the amount of surface area of ​​the plurality of fins exposed to the fluid.

9. The cold plate as described in claim 7, further comprising: The plurality of fins are configured in an intermediate configuration between a first configuration and a second configuration, the first configuration, the intermediate configuration, and the second configuration being configured to provide different amounts of surface area to be exposed to the fluid, such that different amounts of heat from the plurality of fins are transferred to the fluid.

10. The cold plate as described in claim 7, further comprising: Fluid lines for receiving auxiliary coolant or the fluid from the cooling circuit of a data center cooling system; A pneumatic or hydraulic subsystem is used to extend the piston and move the movable plate relative to the substrate within the cold plate using the auxiliary coolant or the fluid, and to control the amount of surface area of ​​the plurality of fins to be exposed to the fluid.

11. A processor comprising one or more circuits for determining a temperature associated with at least one computing device, the processor enabling a plurality of fins within a cold plate to be adjusted at least in part based on a temperature associated with a fluid or the at least one computing device to control the fluid path of the fluid through a plurality of microchannels between the plurality of fins and to enable the plurality of fins to transfer heat from the at least one computing device to the fluid; in, Each fin includes an overlapping portion that shields the fluid in a first state and is separated in a second state to expose the overlapping portion to the fluid.

12. The processor of claim 11, further comprising: The output is used to provide a signal to at least one controller to adjust the amount of surface area of ​​the plurality of fins to be exposed to the fluid.

13. The processor of claim 11, further comprising: Inputs are provided for receiving sensor inputs from sensors associated with the at least one computing device, rack, auxiliary coolant, or fluid, and the processor is configured to determine, in part based on the sensor inputs, a first cooling requirement when the plurality of fins are in a retracted configuration and a second cooling requirement when the plurality of fins are in an exposed configuration.

14. The processor of claim 13, further comprising: One or more neural networks are used to receive the sensor input and infer the first cooling demand and the second cooling demand.

15. The processor of claim 11, further comprising: One or more neural networks are used to infer faults in the auxiliary cooling circuit, the one or more circuits causing at least one controller to adjust the amount of surface area of ​​the plurality of fins to be exposed to the fluid from the local cooling circuit rather than the auxiliary cooling circuit.

16. A processor comprising one or more circuits for training one or more neural networks to infer from sensor inputs of a sensor associated with at least one computing device that a change in cooling demand has occurred, the processor being configured to enable a plurality of fins within a cold plate to be adjusted at least in part based on the change in cooling demand to control the fluid path of fluid through a plurality of microchannels between the plurality of fins and to enable the plurality of fins to transfer heat from the at least one computing device to the fluid; in, Each fin includes an overlapping portion that shields the fluid in a first state and is separated in a second state to expose the overlapping portion to the fluid.

17. The processor of claim 16, further comprising: Output for providing a signal to at least one controller to enable regulation to control the amount of surface area of ​​the plurality of fins to be exposed to the fluid.

18. The processor of claim 16, further comprising: The one or more neural networks are used to receive the sensor input and are trained to infer, in part based on the sensor input, a first cooling requirement when the plurality of fins are in a retracted configuration and a second cooling requirement when the plurality of fins are in an exposed configuration.

19. The processor of claim 16, further comprising: The output is used to provide a signal to at least one controller to cause one or more different exposures of the surface area of ​​the plurality of fins to meet different cooling requirements.

20. The processor of claim 16, further comprising: Inputs are provided for receiving sensor inputs associated with the temperature of the at least one computing device, auxiliary coolant, or the fluid, wherein the one or more neural networks are trained to infer, in part, that a change in cooling demand has occurred based on the temperature and previous temperatures, and wherein the one or more circuits are used to control the amount of surface area of ​​the plurality of fins to be exposed to the fluid.

21. A processor comprising one or more circuits, the one or more circuits including one or more neural networks, the one or more neural networks being configured to infer from sensor inputs of a sensor associated with at least one computing device that a change in cooling demand has occurred, the processor being configured to enable a plurality of fins within a cold plate to be adjusted at least in part based on the change in cooling demand to control the fluid path of fluid through a plurality of microchannels between the plurality of fins and to enable the plurality of fins to transfer heat from the at least one computing device to the fluid; in, Each fin includes an overlapping portion that shields the fluid in a first state and is separated in a second state to expose the overlapping portion to the fluid.

22. The processor of claim 21, further comprising: Output for providing a signal to at least one controller to enable regulation to control the amount of surface area of ​​the plurality of fins to be exposed to the fluid.

23. The processor of claim 21, further comprising: The one or more neural networks are configured to receive the sensor input and, in part based on the sensor input, infer a first cooling requirement for the plurality of fins to be in a retracted configuration and a second cooling requirement for the plurality of fins to be in an exposed configuration.

24. The processor of claim 21, further comprising: The output is used to provide a signal to at least one controller to cause one or more different exposures of the surface area of ​​the plurality of fins to meet different cooling requirements.

25. The processor of claim 21, further comprising: Inputs are provided for receiving sensor inputs associated with the temperature of the at least one computing device, auxiliary coolant, or the fluid, the one or more neural networks being used to infer, in part, that a change in cooling demand has occurred based on the temperature and previous temperatures, and the one or more circuits being used to control the amount of surface area of ​​the plurality of fins to be exposed to the fluid.

26. A method for a data center cooling system, comprising: Multiple fins are provided within the cold plate to dissipate heat to the fluid passing through the multiple fins; The cooling requirements associated with at least one computing device are determined at least in part based on the temperature associated with the fluid or at least one computing device. as well as The plurality of fins can be adjusted at least in part based on changes in cooling demand to control the fluid path of the fluid through the plurality of microchannels between the plurality of fins and to enable the plurality of fins to transfer heat from the at least one computing device to the fluid; Each fin includes an overlapping portion that shields the fluid in a first state and is separated in a second state to expose the overlapping portion to the fluid.

27. The method of claim 26, further comprising: The temperature associated with the at least one computing device is determined using at least one processor; The temperature is used to determine the first cooling requirement or the second cooling requirement; as well as The control mechanism adjusts the plurality of fins in part based on the first cooling requirement or the second cooling requirement. The control mechanism includes a gear subsystem, an electromagnetic subsystem, a thermoelectric generator subsystem, a thermal reaction subsystem, a pneumatic subsystem, or a hydraulic subsystem.

28. The method of claim 27, further comprising: The processor receives sensor inputs from sensors associated with the at least one computing device, rack, auxiliary coolant, or fluid. as well as The first cooling requirement and the second cooling requirement are determined, in part, based on the sensor input, using the at least one processor.

29. The method of claim 26, further comprising: The plurality of fins comprises at least two materials, which enable the plurality of fins to respond to the temperature in part based on the properties of the at least two materials, and to change the amount of surface area of ​​the plurality of fins exposed to the fluid.

30. The method of claim 26, further comprising: An intermediate configuration between a first configuration and a second configuration is achieved for the plurality of fins, the first configuration, the intermediate configuration, and the second configuration being used to provide different amounts of surface area to be exposed, such that different amounts of heat from the plurality of fins are transferred to the fluid.

Images