Thick photoresist lithography and microstructured devices

Abstract

The application discloses a thick photoresist lithography method and a microstructure device. The thick photoresist lithography method comprises the following steps: forming a photoresist layer on a substrate; the thickness of the photoresist layer is 20-100 microns; performing N times of exposure and development treatment on the substrate with the photoresist layer, wherein N is an integer greater than or equal to 2; one time of the exposure and development treatment comprises the following steps: exposing the substrate with the photoresist layer, and controlling the exposure energy to be 200-2000 mj / cm 2 ; and developing the exposed substrate, and controlling the development time to be 3-10 minutes. The method can make the hole sidewall of the photoresist layer steep, and improves the reliability of the device.

Description

Technical Field

[0001] This application relates to the field of microelectromechanical systems (MEMS) technology, and in particular to a thick photolithography method and microstructure devices. Background Technology

[0002] Photolithography technology has wide applications in MEMS (Micro-Electro-Mechanical Systems). Currently, to meet process requirements, some photolithography processes require coating relatively thick photoresist layers. For example, in electroforming, metal plating layers of tens or even hundreds of micrometers are needed. However, traditional deposition methods cannot grow such thick sacrificial layers to serve as molds. Furthermore, in the wet etching process for removing the sacrificial layer, the isotropic nature of wet etching and the small selectivity ratio between the plating and sacrificial layer etching cannot guarantee the integrity of the device structure. Therefore, photoresist molding technology has begun to develop. However, current high aspect ratio thick photoresist photolithography processes easily result in non-steep or non-vertical photoresist sidewalls, which can lead to distortion in subsequent processes, such as electroforming, and consequently affect the performance of MEMS devices. Summary of the Invention

[0003] This invention provides a thick resist photolithography method and microstructure device to solve or partially solve the technical problem that current thick resist photolithography easily produces non-steep photoresist sidewalls.

[0004] To address the aforementioned technical problems, a first aspect of this invention provides a thick resist photolithography method, comprising:

[0005] A photoresist layer is formed on a substrate; the thickness of the photoresist layer is 20–100 micrometers.

[0006] The substrate, including the photoresist layer, undergoes N exposure and development processes, where N ≥ 2 and is an integer; each exposure and development process includes: exposing the substrate including the photoresist layer to light, controlling the exposure energy to be 200–2000 mJ / cm². 2 The exposed substrate is then developed, with the development time controlled to be 3–10 minutes.

[0007] Optionally, the value of N can be in the range of 3 to 5.

[0008] Optionally, before performing N exposure and development processes on the substrate including the photoresist layer, the method further includes:

[0009] The substrate, including the photoresist layer, is subjected to a first baking process.

[0010] Optionally, the first baking of the substrate including the photoresist layer includes:

[0011] When baking the substrate including the photoresist layer, the baking temperature is controlled at 60-150°C and the baking time is 1-5 minutes.

[0012] Optionally, before developing the exposed substrate, the exposure and development process further includes:

[0013] The exposed substrate is then baked a second time.

[0014] Optionally, after performing N exposure and development processes on the substrate including the photoresist layer, the method further includes:

[0015] The substrate after exposure and development is then baked a third time.

[0016] Optionally, the third baking of the substrate after exposure and development includes:

[0017] When baking the exposed and developed substrate, the baking temperature is controlled at 60-120°C and the baking time is 5-15 minutes.

[0018] Optionally, before forming the photoresist layer on the substrate, the method further includes:

[0019] Hexamethyldisilazane is coated on the substrate;

[0020] The process of forming a photoresist layer on the substrate includes:

[0021] A photoresist layer is formed on a substrate coated with the hexamethyldisilazane.

[0022] Optionally, the coating of hexamethyldisilazane on the substrate comprises:

[0023] When coating hexamethyldisilazane on the substrate, the coating temperature is controlled at 110-130°C and the coating time is 30-50 seconds.

[0024] Based on the same inventive concept, a second aspect of the present invention provides a microstructure device, wherein the microstructure device is photolithographically ...

[0025] Through one or more technical solutions of the present invention, the present invention has the following beneficial effects or advantages:

[0026] This invention provides a thick-film photolithography method that employs multiple exposure and development processes, controlling the exposure energy to 200–2000 mJ / cm² during each exposure and development process. 2The development time is controlled between 3 and 10 minutes. The combination of these two processes develops the residual photoresist on the sidewalls of the holes at the photoresist layer and makes the sidewalls of the holes steeper. This repairs the sidewall morphology of the holes etched by the photoresist layer, ensuring the authenticity of the photolithography pattern. This is beneficial to improving the accuracy of subsequent processes, such as the size and morphology of electroforming, thereby improving the reliability of the final semiconductor device.

[0027] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below. Attached Figure Description

[0028] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings.

[0029] In the attached diagram:

[0030] Figure 1 A schematic diagram is shown where the sidewalls of the photoresist layer are not steep.

[0031] Figure 2 A schematic flowchart of a thick photoresist lithography method according to an embodiment of the present invention is shown;

[0032] Figure 3 A schematic diagram of coating a substrate with hexamethyldisilazane is shown according to an embodiment of the present invention;

[0033] Figure 4 A schematic diagram of forming a photoresist layer on a substrate according to an embodiment of the present invention is shown;

[0034] Figure 5 A schematic diagram illustrating exposure according to an embodiment of the present invention is shown;

[0035] Figure 6 A schematic diagram of development according to an embodiment of the present invention is shown;

[0036] Figure 7 A schematic diagram illustrating re-exposure according to an embodiment of the present invention is shown;

[0037] Figure 8 A schematic diagram showing the photoresist layer with steep sidewalls according to an embodiment of the present invention is shown;

[0038] Explanation of reference numerals in the attached figures:

[0039] 1. Substrate; 2. Photoresist layer; 3. Mask; 4. Hexamethyldisilazane; 5. Developer. Detailed Implementation

[0040] To enable those skilled in the art to more clearly understand this application, the technical solution of this application is described in detail below with reference to the accompanying drawings and specific embodiments. Throughout this specification, unless otherwise specified, the terminology used herein should be understood as having the meaning commonly used in the art. Therefore, unless otherwise defined, all technical and scientific terms used herein have the same meaning as generally understood by those skilled in the art. In case of any conflict, this specification takes precedence. Unless otherwise specified, all devices, etc., used in this invention can be purchased commercially or prepared by existing methods.

[0041] The current traditional thick-film photolithography process involves first coating a photoresist layer 2 onto a substrate 1, followed by focusing, exposure, and photoresist development to obtain the desired pattern. However, because the photoresist layer 2 is very thick, reaching tens of micrometers or more, the etched holes in the photoresist layer 2 are prone to developing non-steep sidewalls after development. Figure 1 As shown, the vertical cross-sectional shape of the hole is an inverted trapezoid, wider at the top and narrower at the bottom. Ideally, the sidewalls should be consistently steep or vertical. Non-steep sidewall morphology can affect subsequent processes, such as the dimensions and morphology of electroforming, leading to electroplating distortion and impacting device performance.

[0042] Currently, one possible solution to this problem is hard baking to achieve a good linewidth and sidewall morphology. However, this method is suitable for thin photoresist layers. For thick photoresist, due to the large aspect ratio, it is difficult to repair the sidewalls and achieve a steep sidewall effect through baking techniques. Moreover, the baking process window is small, and improper baking conditions can easily cause photoresist warping. Another possible solution is to enhance the development capability. However, for thick photoresist, enhanced development cannot effectively repair the non-sharp sidewall problem and may even introduce other defects. Taking positive photoresist as an example, enhanced development increases the developer's dissolving ability for positive photoresist. In practice, it has been found that enhanced development easily causes obvious undercut in the photoresist layer. That is, during the development process, the developer is more likely to embed into the bottom layer of photoresist and begin to etch the bottom of the mask pattern edge. Furthermore, a single enhanced development will result in the loss of the enhanced non-exposed photoresist film, leading to linewidth distortion and top loss. Therefore, it is also impossible to make the hole sidewalls steep.

[0043] To better address the issue of non-steep aperture walls caused by thick photoresist lithography, in one optional embodiment, such as Figure 2As shown, a thick resist photolithography method is provided, including steps S1 to S2, as detailed below:

[0044] S1: A photoresist layer 2 is formed on the substrate 1; the thickness of the photoresist layer 2 is 20-100 micrometers;

[0045] Specifically, substrate 1 can be a silicon substrate, SiC substrate, GaN substrate, etc. Unless otherwise specified, this embodiment uses a silicon substrate as an example. Since it is a thick photoresist lithography process, the thickness of the photoresist layer 2 in this embodiment is 20 to 100 micrometers (μm). For photoresist layers 2 with a thickness of less than 10 μm, it is less likely to cause the problem of non-sharp hole sidewalls.

[0046] Before spin-coating the photoresist, HMDS, i.e., hexamethyldisilazane 4, can be coated onto substrate 1 first, such as... Figure 3 As shown. When coating hexamethyldisilazane 4 on substrate 1, the coating temperature can be controlled at 110-130°C and the coating time at 30-50 seconds.

[0047] When forming the photoresist layer 2, the photoresist layer 2 can be formed on the substrate 1 or on the substrate 1 coated with hexamethyldisilazane 4 by spin coating. The substrate 1 after forming the photoresist layer 2 is as follows: Figure 4 As shown. Photoresist can be either positive or negative. Unless otherwise specified, this embodiment uses positive photoresist as an example.

[0048] In some optional embodiments, after the photoresist layer 2 is formed on the substrate 1, a first baking process can be performed on the substrate 1 including the photoresist layer 2 before exposure and development. During the first baking, the baking temperature is controlled at 60–150°C, and the baking time is 1–5 minutes. This first baking stage is also called pre-baking. Performing the first baking before exposure and development can improve the development effect and pattern resolution.

[0049] S2: Perform N exposure and development processes on the substrate 1 including the photoresist layer 2, where N ≥ 2 and is an integer; each exposure and development process includes: exposing the substrate 1 including the photoresist layer 2, controlling the exposure energy to be 200–2000 mJ / cm. 2 The exposed substrate 1 is developed, and the development time is controlled to be 3 to 10 minutes.

[0050] Specifically, to make the hole walls steeper, this embodiment employs a multi-exposure development process. The process of a single exposure development is as follows: Figure 5 and Figure 6 As shown, after covering the photoresist layer 2 with the mask 3, exposure is performed. The light source can be UV light. Then, the mask 3 is removed or retained, and the exposed area is developed using the developer 5.

[0051] It should be noted that multiple exposures and developments alone cannot effectively repair the non-steep morphology of the sidewalls. Therefore, in this embodiment, the exposure energy and exposure time are adjusted simultaneously during multiple exposures and developments to make the sidewalls of the etched holes steeper.

[0052] The reason for controlling the exposure energy to 200–2000 mJ / cm 2 This is because if the exposure energy is too high, although it is more conducive to the photochemical reaction of the photoresist, the negative effects of the excessively long exposure time will affect the morphology of the photoresist, such as some optical diffraction effects and standing wave effects.

[0053] The reason for controlling the development time to 3 to 10 minutes is that if the development time is too long, it will cause the top loss effect and also easily cause undercut on the bottom photoresist.

[0054] Next, expose again (as shown). Figure 7 As shown), through repeated exposure and development steps, the morphology of the sidewalls of the photoresist layer 2 becomes steep, as shown. Figure 8 As shown.

[0055] Current conventional photolithography processes for thick resists involve a single exposure and development cycle. The key conditions for exposure are exposure energy and focal length, while the key condition for development is development time. Exposure conditions and development time are interrelated factors; considering only a single factor cannot improve the morphology of the hole sidewalls, and a single exposure and development cycle cannot achieve satisfactory improvement. Therefore, for thick resist photolithography, this embodiment optimizes the photoresist sidewalls through multiple exposures and development cycles, adjusting the exposure energy and development time. By adjusting the exposure energy and development time as described above, repeating the exposure and development process 3-5 times is sufficient to achieve the required precision in the steepness of the hole sidewalls.

[0056] To further improve the repair effect, in some alternative embodiments, during the N-times exposure and development process, the exposure energy of the first exposure is controlled to be greater than that of the second, and the development time of the first exposure is longer than that of the second. Increasing the exposure energy is to increase the solubility of the photoresist in the developer. By controlling the first exposure energy to be higher, the development ability is stronger. The main purpose is to dissolve most of the photoresist during the development process. Subsequent exposure and development processes can be performed by adjusting the energy and development time to achieve the goal of repairing the sidewalls while simultaneously developing the desired pattern.

[0057] In some optional embodiments, the exposure and development process further includes:

[0058] The exposed substrate 1 undergoes a second baking process. This second baking, performed before the development step, accelerates the photoacid reaction and improves the subsequent development quality.

[0059] In some optional embodiments, after the substrate 1, including the photoresist layer 2, undergoes N exposure and development processes, a third baking process is further included on the exposed and developed substrate 1. During the third baking, the baking temperature can be controlled to be 60–120°C, and the baking time to be 5–15 minutes.

[0060] In summary, this embodiment employs a multiple exposure and development process for thick photoresist lithography, controlling the exposure energy between 200 and 2000 mJ / cm² during each exposure and development process. 2 (mJ / m²cm) and development time controlled between 3 and 10 minutes. The combination of these two methods develops the residual photoresist on the sidewall of the hole at photoresist layer 2 and makes the sidewall of the hole steep. This repairs the sidewall morphology of the hole etched by photoresist layer 2, ensuring the authenticity of the photolithography pattern. This is beneficial to improving the accuracy of subsequent processes, such as the size and morphology of electroforming, thereby improving the reliability of the final semiconductor device.

[0061] Based on the same inventive concept as the foregoing embodiments, in another optional embodiment, a microstructure device is provided, wherein the microstructure device is photolithographically lithographically lithographically performed using the thick-film photolithography method described in the foregoing embodiments during the thick-film photolithography stage.

[0062] Through one or more embodiments of the present invention, the present invention has the following beneficial effects or advantages:

[0063] This invention provides a thick-film photolithography method and a microstructure device. The thick-film photolithography method employs a multiple exposure and development process, controlling the exposure energy to 200–2000 mJ / cm² during each exposure and development process. 2 The development time is controlled between 3 and 10 minutes. The combination of these two processes develops the residual photoresist on the sidewalls of the holes at the photoresist layer and makes the sidewalls of the holes steeper. This repairs the sidewall morphology of the holes etched by the photoresist layer, ensuring the authenticity of the photolithography pattern. This is beneficial to improving the accuracy of subsequent processes, such as the size and morphology of electroforming, thereby improving the reliability of the final semiconductor device.

[0064] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0065] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A thick photoresist lithography method, characterized in that, The method includes: A photoresist layer is formed on a substrate; the thickness of the photoresist layer is 20~100 micrometers; The substrate, including the photoresist layer, undergoes N exposure and development processes, where N ≥ 2 and is an integer; each exposure and development process includes: exposing the substrate including the photoresist layer to light, controlling the exposure energy to be 200~2000 mJ / cm. 2 ;Develop the exposed substrate, controlling the development time to be 3~10 minutes; In the N-stage exposure and development process, the exposure energy of the first exposure is controlled to be greater than that of the second exposure, and the development time of the first exposure is longer than that of the second exposure. Before performing N exposure and development processes on the substrate including the photoresist layer, the method further includes: The substrate including the photoresist layer is subjected to a first baking; the first baking of the substrate including the photoresist layer includes: controlling the baking temperature to be 60~150℃ and the baking time to be 1~5 minutes when baking the substrate including the photoresist layer. Prior to developing the exposed substrate, the exposure and development process further includes: The exposed substrate is then baked a second time.

2. The method as described in claim 1, characterized in that, The value of N ranges from 3 to 5.

3. The method as described in claim 1, characterized in that, After performing N exposure and development processes on the substrate including the photoresist layer, the method further includes: The substrate after exposure and development is then baked a third time.

4. The method as described in claim 3, characterized in that, The third baking of the substrate after exposure and development includes: When baking the exposed and developed substrate, the baking temperature is controlled at 60~120℃ and the baking time is 5~15 minutes.

5. The method as described in claim 1, characterized in that, Prior to forming the photoresist layer on the substrate, the method further includes: Hexamethyldisilazane is coated on the substrate; The process of forming a photoresist layer on the substrate includes: A photoresist layer is formed on a substrate coated with the hexamethyldisilazane.

6. The method as described in claim 5, characterized in that, The coating of hexamethyldisilazane on the substrate includes: When coating hexamethyldisilazane on the substrate, the coating temperature is controlled at 110~130℃ and the coating time is 30~50 seconds.

7. A microstructure device, characterized in that, The microstructure device is photolithographically ...

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