Many-core routing mapping method, device, equipment and medium

Abstract

Embodiments of the present invention disclose a multi-core routing mapping method, apparatus, device, and medium. The method includes: determining a target transmission clock for data to be routed; determining, from multiple time slices, at least one target time slice to which the target transmission clock belongs; and determining, based on the currently planned routing resources corresponding to each target time slice, a routing path for the data to be routed within each target time slice for routing mapping. This technical solution performs routing path planning based on time slices, improving the utilization of on-chip network routing resources.

Description

Technical Field

[0001] Embodiments of the present invention relate to the technical field of many-core chips, and in particular to a many-core routing mapping method, apparatus, device, and medium. Background Art

[0002] In many-core (including multi-core) chip design, Network on Chip (NOC) is a common solution for inter-core communication. NOC performance is crucial for overall chip performance, and routing mapping significantly impacts NOC communication efficiency. Improving routing resource utilization is a pressing issue in many-core routing mapping. Summary of the Invention

[0003] Embodiments of the present invention provide a multi-core routing mapping method, apparatus, device, and medium to improve the utilization of routing resources during multi-core routing mapping.

[0004] In a first aspect, an embodiment of the present invention provides a multi-core routing mapping method, comprising:

[0005] Determine the target transmission clock for the data to be routed;

[0006] Determining at least one target time slice to which the target transmission clock belongs from a plurality of time slices;

[0007] According to the currently planned routing resources corresponding to each of the target time slices, a routing path of the to-be-planned routing data within each of the target time slices is determined to perform routing mapping.

[0008] In a second aspect, an embodiment of the present invention further provides a multi-core routing mapping device, including:

[0009] A transmission clock determination module is used to determine the target transmission clock of the data to be routed;

[0010] a time slice determining module, configured to determine, from a plurality of time slices, at least one target time slice to which the target transmission clock belongs;

[0011] The routing path planning module is used to determine the routing path of the to-be-planned routing data within each target time slice according to the currently planned routing resources corresponding to each target time slice, so as to perform routing mapping.

[0012] In a third aspect, an embodiment of the present invention further provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the multi-core routing mapping method described in any embodiment of the present invention is implemented.

[0013] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the multi-core routing mapping method described in any embodiment of the present invention.

[0014] In the technical solution of an embodiment of the present invention, at least one target time slice corresponding to the data to be routed is determined based on the target transmission clock of the data to be routed. Furthermore, based on the currently planned routing resources corresponding to each target time slice, the routing path for the data to be routed within each target time slice is determined for routing mapping. In this technical solution, routing path planning is performed separately according to time slices, which can avoid the phenomenon of partially blocked and partially idle routes due to different routing times. This maximizes the utilization of routing resources, improves the utilization rate of on-chip routing resources, and thus improves routing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a schematic diagram of a network on chip in an embodiment of the present invention;

[0016] Figure 2 This is a flowchart of a multi-core routing mapping method in embodiment 1 of the present invention;

[0017] Figure 3 This is a schematic diagram of time slice division and routing path planning in Example 1 of the present invention;

[0018] Figure 4 This is a flowchart of a multi-core routing mapping method in the second embodiment of the present invention;

[0019] Figure 5 This is a schematic structural diagram of a multi-core routing mapping device in Embodiment 3 of the present invention;

[0020] Figure 6 This is a schematic diagram of the hardware structure of an electronic device in Example 4 of the present invention. DETAILED DESCRIPTION

[0021] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0022] It should be noted that before discussing exemplary embodiments in more detail, some exemplary embodiments are described as processes or methods depicted as flow charts. Although the flow charts describe the various operations (or steps) as sequential processes, many of the operations therein can be implemented in parallel, concurrently, or simultaneously. In addition, the order of the various operations can be rearranged. The process can be terminated when its operation is completed, but can also have additional steps not included in the accompanying drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.

[0023] In related technologies, routing planning typically involves planning routes based on the shortest path and the principle of minimizing the amount of routing per path. In a network-on-chip (NoC), there are often multiple paths between a source core node and a target core node. The shortest path between the two is the path with the fewest core node hops, and a single path is the path between two adjacent core nodes. When there are multiple shortest paths between a source core node and a target core node, the shortest path with the least amount of routing per path can be selected as the planned path from the source core node to the target core node.

[0024] After the overall routing is planned, the routing volume between every two core nodes is almost the same. However, once the routing path is determined, during the actual data transmission process, some paths may be blocked and some may be idle due to different routing times, resulting in insufficient utilization of the routing resources of the on-chip network and low routing efficiency. Figure 1 Taking the network-on-chip (NOC) shown in Figure 1 as an example, assume the planned path from source core node A to target core node D is (each letter ABCD represents a core node on the many-core chip), the planned path from source core node S to target core node D is SAHGD, and the planned path from source core node A to target core node E is AHIFE. If the route on path ABCD completes all data transmission within the first 100 clocks (clks) and is idle in the following clocks, while the routes on paths SAHGD and AHIFE both transmit data between the 200th and 300th clocks, the two routes will be blocked between paths AH. Meanwhile, path ABCD remains idle, clearly indicating underutilization of routing resources. In this case, if the planned path from source core node S to target core node D is SABCD, routing resource utilization can be significantly improved, avoiding path congestion.

[0025] The disclosed embodiments provide a multi-core routing mapping method. By employing the technical means of "determining a target transmission clock for routing data to be planned; determining at least one target time slice to which the target transmission clock belongs from multiple time slices; and determining a routing path for the routing data to be planned within each target time slice based on currently planned routing resources corresponding to each target time slice for routing mapping," the method significantly improves the utilization of routing resources, thereby improving the communication efficiency of the multi-core system.

[0026] Example 1

[0027] Figure 2 This is a flowchart of a multi-core routing mapping method provided in the first embodiment of the present invention. This embodiment is applicable to the situation where routing path planning is performed on the on-chip network of a multi-core chip. The method can be executed by the multi-core routing mapping device provided in the embodiment of the present invention. The device can be implemented in software and / or hardware and can generally be integrated into an electronic device.

[0028] like Figure 2 As shown, the multi-core routing mapping method provided in this embodiment includes:

[0029] S110: Determine a target transmission clock for the data to be routed.

[0030] Routing data to be planned refers to data transmitted from a source core node to a destination core node on a many-core chip, requiring on-chip network routing. A core node is a node corresponding to a core in a many-core chip, and the source and destination core nodes are the starting and ending core nodes for the routing data to be planned.

[0031] The target transmission clock for the data being routed refers to the clock range occupied by the data being routed during transmission on the on-chip network. For example, this can be the transmission start and end clocks, the transmission start clock, or the transmission clock duration. The transmission clock duration can be determined based on the quotient of the data volume and the routing bandwidth. For example, if the data being routed begins transmission at clock (clk) 20, 20 clocks of transmission are required.

[0032] S120: Determine at least one target time slice to which a target transmission clock belongs from a plurality of time slices.

[0033] A time slice is obtained by dividing a clock into several parts, with each time slice containing at least one clock. For example, multiple time slices can be obtained by evenly dividing all clocks. The number of time slices is related to the number of clocks contained in each time slice. The smaller the number of clocks contained in each time slice, the greater the number of time slices.

[0034] In an optional implementation, different time slices include different numbers of clocks. Among the multiple time slices obtained by division, the numbers of clocks included in any two time slices may be the same or different.

[0035] After determining the clocks included in each time slice, the target transmission clock is compared with the clocks included in each time slice to determine the time slices to which the target transmission clock belongs. The time slices to which the target transmission clock belongs are called target time slices.

[0036] For example, if the target transmission clock is clock 20 to clock 40, the first time slice includes clocks 0 to clock 10, the second time slice includes clocks 11 to clock 30, and the third time slice includes clocks 31 to clock 40, then the target time slices to which the target transmission clock belongs are the second time slice and the third time slice.

[0037] S130 : Determine a routing path of the to-be-planned routing data within each target time slice according to the currently planned routing resources corresponding to each target time slice, so as to perform routing mapping.

[0038] When the routing data to be planned is transmitted only in part of the clock, it is only necessary to determine the routing path of the routing data to be planned in the corresponding target time slice, and there is no need to determine the routing path of the routing data to be planned in the remaining time slices, and the routing resources in the remaining time slices will not be occupied.

[0039] For each target time slice, the routing path of the data to be routed is planned separately. The routing paths planned in each target time slice are combined to form the final routing path of the data to be routed.

[0040] Optionally, when there are multiple target time slices, the routing paths of the to-be-planned routing data within different target time slices are not identical. For multiple target time slices, the routing paths of the to-be-planned routing data within any two target time slices may be identical or different. For example, the routing path of the to-be-planned routing data from source core node A to target core node D in the second time slice is ABCD, and the routing path of the to-be-planned routing data from source core node A to target core node D in the third time slice is AHGD.

[0041] The routing path of the data to be planned within each target time slice is determined by referring to the currently planned routing resources within the target time slice. The currently planned routing resources refer to the routing status at the current moment, specifically the planned routing paths and their routing quantities.

[0042] That is, when determining the routing path of the data to be routed within a target time slice, only the currently planned routing resources within the target time slice need to be considered, and the currently planned routing resources within other target time slices do not need to be considered.

[0043] When determining the routing path of the to-be-planned routing data within the target time slice based on the currently planned routing resources corresponding to the target time slice, the routing path may be selected based on the principle of minimizing the total amount of routing data on a single path, wherein a single path is a path between two adjacent cores.

[0044] Optionally, determining a routing path of the to-be-planned routing data within the target time slice according to the currently planned routing resources corresponding to the target time slice may be specifically:

[0045] Determine the total amount of currently planned routing data for each single path within the target time slice; and determine the routing path of the routing data to be planned within the target time slice according to the target path selection strategy and the total amount of currently planned routing data for each single path within the target time slice.

[0046] Among them, the total amount of currently planned routing data refers to the total amount of routing data planned at the current moment. For example, on a single path between core node A and core node H, a routing data with a data volume of 10 and a routing data with a data volume of 15 have been planned. Then, the total amount of currently planned routing data on the single path between core node A and core node H is 25.

[0047] The target path selection strategy may be any strategy for selecting a path for a planned route in the on-chip network, and is intended to improve the utilization of routing resources and avoid path congestion, which is not specifically limited in this embodiment.

[0048] Exemplarily, the target path selection strategy can prioritize paths with the smallest total amount of routing data per path based on minimizing the number of node hops between the source core node and the target core node. When planning a route between the source core node and the target core node, the general direction of the routing path can be determined based on minimizing the number of hops between the source core node and the target core node. The final routing path for the planned routing data within the target time slice can then be determined based on minimizing the total amount of routing data per path.

[0049] Specifically, according to the above target path selection strategy, each single path between the source core node and the target core node in the on-chip network of the routing data to be planned can be determined in sequence, and these single paths can be integrated as the routing path of the routing data to be planned within the target time slice.

[0050] Taking the planning of the route between the source core node A and the target core node D as an example, assuming that the number of core node hops from core node A to core node D via core node H is equal to and the least number of core node hops from core node A to core node D via core node B, then either the routing path from core node A to core node D via core node H or the routing path from core node A to core node D via core node B can be selected; when determining whether to select a single path between core node A and core node H or a single path between core node A and core node B, the single path with the smallest total amount of routing data is preferred. If the total amount of routing data from the single path between core node A and core node B is the smallest, then the single path between core node A and core node B is selected, that is, the routing path from source core node A to target core node D is planned to be the routing path from core node A to core node D via core node B.

[0051] Furthermore, according to the target path selection strategy, the routing path of the to-be-planned routing data within the target time slice is determined based on the total amount of currently planned routing data of each single path within the target time slice, which can be specifically as follows:

[0052] For a current core node involved in a routing path of the routing data to be planned within a target time slice, determining a single horizontal path and a single vertical path corresponding to the current core node;

[0053] If the total amount of currently planned routing data of the single horizontal path and the single vertical path is not equal, determining the next core node corresponding to the current core node according to the single path with the smallest total amount of currently planned routing data;

[0054] If the total amount of currently planned routing data of the horizontal single path and the vertical single path is equal, a next core node corresponding to the current core node is determined according to the horizontal single path or the vertical single path.

[0055] After determining the current core node of the routing data to be planned (the first current core node is the source core node of the routing data to be planned):

[0056] First, determine the single horizontal path and single vertical path corresponding to the current core node. A single horizontal path refers to a single horizontal path to the left or right, determined based on the principle of minimizing the number of hops between the source core node and the target core node. A single vertical path refers to a single vertical path upward or downward, determined based on the principle of minimizing the number of hops between the source core node and the target core node.

[0057] Secondly, determine whether the total amount of currently planned routing data of the horizontal single path and the vertical single path corresponding to the current core node is equal. If not, the single path with the smallest total amount of currently planned routing data is used as the planned single path, and the next core node corresponding to the current core node is determined based on the single path, and is re-used as the current core node; if so, the horizontal single path or the vertical single path is selected as the planned single path according to the pre-set priority, and the next core node corresponding to the current core node is determined based on the single path, and is re-used as the current core node.

[0058] For the newly determined current core node, the above process is repeated until the next core node corresponding to the current core node is determined to be the target core node for the routing data to be planned, thereby completing the planning of the routing path for the routing data to be planned within the target time slice.

[0059] by Figure 1 Taking the network-on-chip shown as an example, assuming that the source core node of the data to be planned is core node A, the target core node is core node D, and the routing data volume is 20, the total amount of currently planned routing data for each single path within the target time slice is as follows: the total amount of currently planned routing data for the single path between core node S and core node A is 10, the total amount of currently planned routing data for the single path between core node A and core node H is 10, the total amount of currently planned routing data for the single path between core node H and core node G is 10, and the total amount of currently planned routing data for the single path between core node G and core node D is 10. The total amount of currently planned routing data for the single path between core node A and core node B is 0, the total amount of currently planned routing data for the single path between core node B and core node C is 0, and the total amount of currently planned routing data for the single path between core node C and core node D is 0.

[0060] First, core node A is taken as the current core node. Based on the principle of minimum number of hops between the source core node and the target core node (three hops), the horizontal single path corresponding to core node A is determined to be the single path between core node A and core node H, and the vertical single path corresponding to core node A is determined to be the single path between core node A and core node B.

[0061] Secondly, since the total amount of currently planned routing data for the horizontal single path corresponding to core node A is 10, and the total amount of currently planned routing data for the vertical single path corresponding to core node A is 0, it is determined that the total amount of currently planned routing data for the horizontal single path and the vertical single path corresponding to core node A are not equal. Therefore, the vertical single path corresponding to core node A is taken as the planned single path, and the next core node B corresponding to core node A is determined based on the single path, and the current core node is updated from core node A to core node B.

[0062] In this way, after planning a single path between core node A and core node B, several single paths are planned, namely a single path between core node B and core node C, and a single path between core node C and core node D. Therefore, the routing path of the routing data to be planned within the target time slice is core node A-core node B-core node C-core node D.

[0063] On the basis of the above-mentioned target path selection strategy, the target path selection strategy may also include: if the number of node hops between the source core node and the target core node is minimized, the path with the smallest total amount of routing data on a single path is preferentially selected to meet the preset overload condition, then the number of node hops and the total amount of currently planned routing data can be comprehensively considered to re-determine the alternative routing path for the routing data to be planned, and the alternative routing paths are evaluated to select the routing path with the best evaluation result from among the alternative routing paths as the final routing path for the routing data to be planned.

[0064] The overload condition may be, for example, that the total amount of path routing data is greater than a set threshold, or that the ratio of the total amount of path routing data to the routing data to be planned reaches a set target value, etc., which is not specifically limited in this embodiment.

[0065] For example, evaluating the candidate routing paths may include scoring the candidate routing paths based on the respective ratios of the number of node hops and the total amount of currently planned routing data, and obtaining the optimal routing path based on the scoring results. Alternatively, evaluating the candidate routing paths may include scoring the candidate routing paths based on a preset evaluation function, and obtaining the optimal routing path based on the scoring results. How to evaluate the candidate routing paths can be determined based on actual applications and is not specifically limited in this embodiment.

[0066] Still Figure 1Taking the network on chip shown as an example, assuming that the source core node of the data to be planned is core node A, the target core node is core node D, and the paths with the least node hops between the source core node and the target core node are path ABCD and path AHGD, if one of the two paths, determined based on the principle of minimizing the total amount of routing data on a single path, meets the preset overload condition, such as the total amount of routing data on the path is greater than the set quantity threshold, it is necessary to comprehensively consider the number of node hops and the total amount of currently planned routing data to re-determine the alternative routing path for the data to be planned. At this time, under the premise of increasing the number of path node hops, the path with a smaller total amount of routing data on a single path can be selected as the alternative routing path, such as a path with a total amount of routing data on a single path of zero. Assuming that the selected alternative routing paths are path ASJKCD and path AHIFED, these two paths can be evaluated, and the best evaluated path will be used as the final routing path for the data to be planned.

[0067] When the target transmission clock of the data to be routed belongs to multiple target time slices, it is necessary to determine the routing path of the data to be routed in each target time slice in sequence as the data transmission path.

[0068] After planning a routing path for the data to be routed, the routing paths for other data to be routed are planned continuously until planning of all routing paths for the data to be routed is completed.

[0069] Once the overall routing path planning is completed, the total amount of routing between every two core nodes in each time slice is similar. After mapping to the multi-core chip, the corresponding data packets can be transmitted according to the determined routing path.

[0070] Furthermore, the multiple time slices may be adjusted, and the clock included in each time slice may be updated.

[0071] The smaller the time slice, the more time slices there are, resulting in more precise routing path planning and higher routing utilization. However, the number of time slices is directly related to the number of routing table entries, and the number of routing paths within each time slice is directly related to the number of routes in the routing table entries. Therefore, the time slice can be adjusted to balance the storage space occupied by routing instructions and the time slice size.

[0072] In an optional embodiment, adjusting the time slices obtained by segmentation may include: determining a target total number of time slices based on the routing table size and / or the number of routes, and splitting or merging the time slices obtained by segmentation based on the target total number.

[0073] Among them, the target total number of time slices can be determined according to the balance strategy of the storage space size occupied by routing instructions and the time slice size, and the divided time slices can be split or merged according to the difference between the current number of time slices and the target total number.

[0074] For example, two time slices with smaller task amounts can be combined into one time slice, or a larger time slice can be split into multiple times.

[0075] In another optional implementation, adjusting the time slices obtained by segmentation may include: if the routing paths planned in adjacent time slices are consistent, merging the adjacent time slices into one time slice.

[0076] If the routing paths selected in multiple adjacent time slices are exactly the same, these multiple adjacent time slices can be combined into one time slice, thereby reducing the routing table entries, optimizing the number of routes, and reducing the storage space occupied by routing instructions.

[0077] In the technical solution of an embodiment of the present invention, at least one target time slice corresponding to the data to be routed is determined based on the target transmission clock of the data to be routed. Furthermore, based on the currently planned routing resources corresponding to each target time slice, the routing path for the data to be routed within each target time slice is determined for routing mapping. In this technical solution, routing path planning is performed separately according to time slices, which can avoid the phenomenon of partially blocked and partially idle routes due to different routing times. This maximizes the utilization of routing resources, improves the utilization rate of on-chip routing resources, and thus improves routing efficiency.

[0078] For example, suppose 10 time slices are divided, such as Figure 3 As shown (only some time slices are shown in the figure), the data transmitted from core node S to core node D may be transmitted in the first time slice. In the prior art, the path in the next nine time slices (not fully shown in the figure) will also be occupied, but in fact, the routing path in the following time slices is empty. Then, based on the total data volume of all time slices, this path is exclusively occupied in all time slices, and the remaining transmission data can only be transmitted via a detour. This detour will result in additional routing resource consumption. In the technical solution provided by this embodiment, the routing path from core node S to core node D in the next nine time slices is unoccupied and can be used by other transmission data (assuming that it is transmission data from core node O to core node P) passing through core nodes S and core nodes D, thereby improving routing utilization and reducing congestion. Furthermore, the technical solution of this embodiment plans a routing path separately for each time slice, improving routing efficiency, reducing detours and congestion, reducing total routing time, and improving information throughput.

[0079] Example 2

[0080] Figure 4 A flowchart of a multi-core routing mapping method provided in the second embodiment of the present invention is provided. This embodiment is concretized on the basis of the previous embodiment, wherein the method provided by this embodiment also includes: dividing the time slice and determining the clock included in each time slice respectively.

[0081] like Figure 4 As shown, the multi-core routing mapping method provided in this embodiment includes:

[0082] S210: Determine a target transmission clock for the data to be routed.

[0083] S220: Divide the time slices and determine the clocks included in each time slice.

[0084] Before determining the target time slice to which the target transmission clock belongs, the time slice may be divided first, and the clock corresponding to each time slice may be determined.

[0085] The clock may be evenly divided to obtain multiple time slices, each of which includes the same number of clocks; or the clock may be unevenly divided to obtain multiple time slices, with different time slices including different numbers of clocks.

[0086] In an optional implementation, dividing the time slices may specifically include dividing the time slices according to the target transmission clock and data volume of each piece of the to-be-planned routing data.

[0087] Here, statistics can be collected on each piece of data to be routed, and the number of time slices can be determined according to the target transmission clock and data volume of each piece of data to be routed, thereby achieving the division of the time slices.

[0088] For example, a piece of to-be-routed data with the largest data volume may be selected, and the target transmission clock of the to-be-routed data may be divided into one time slice or multiple time slices.

[0089] For another example, several pieces of data with smaller data volumes may be selected for routing. If the target transmission clocks of these pieces of data are close or have overlapping clocks, they may be integrated into one time slice or multiple slices for segmentation based on their target transmission clocks.

[0090] For another example, if the target transmission clock of the data to be routed from core node A to core node D is the first N clocks, then the first N clocks can be divided into a time slice; if the target transmission clock of the data to be routed from core node S to core node D is the last N clocks, then the last N clocks can be divided into a time slice.

[0091] According to the target transmission clock and data volume of each piece of routing data to be planned, the method of dividing the time slices can be determined according to actual conditions, and this embodiment does not impose any specific limitation on this.

[0092] In another optional implementation, dividing the time slices may further specifically include dividing the time slices according to the target transmission clock and the starting and ending core nodes of each piece of the to-be-planned routing data.

[0093] If there are multiple routing data to be planned with the same starting and ending core nodes, that is, multiple routing data to be planned with the same source core node and target core node, the time slices can be divided according to the target transmission clocks of these multiple routing data to be planned.

[0094] For example, if the starting and ending core nodes of two pieces of routing data to be planned are the same and there is no overlap between the target transmission clocks of the two pieces of routing data to be planned, the target transmission clocks of the two pieces of routing data to be planned can be divided into a time slice respectively.

[0095] Furthermore, time slice division is performed according to the target transmission clock and the starting and ending core nodes of each of the routing data to be planned, which may include: if the starting and ending core nodes of two routing data to be planned are the same, then the overlapping clock is determined according to the target transmission clocks of the two routing data to be planned, and the overlapping clock is divided into a time slice.

[0096] If the starting and ending core nodes of two pieces of routing data to be planned are the same, and there is an overlapping clock between the target transmission clocks of the two pieces of routing data to be planned, the overlapping clocks can be split as a time slice. Furthermore, the non-overlapping clocks of the target transmission clocks of the two pieces of routing data to be planned can also be split as a time slice.

[0097] For example, the starting and ending core nodes of two routing data to be planned are both core node S and core node D. The target transmission clock of one routing data to be planned is from the 20th to the 40th clock, while the target transmission clock of the other routing data to be planned is from the 30th to the 50th clock. Therefore, the overlapping clocks of the target transmission clocks of the two routing data to be planned are from the 30th to the 40th clock. Therefore, the 30th to the 40th clock can be divided into one time slice. Alternatively, the 20th to the 30th clock can be divided into one time slice, and the 40th to the 50th clock can be divided into one time slice.

[0098] In other words, when dividing time slices, the principle is to minimize the overlap time of different routes along the same path. Furthermore, during the time slices corresponding to the 20th to 30th clock and the 40th to 50th clock, the two data to be routed can time-share the same optimal path. During the time slice corresponding to the 30th to 40th clock, only one data to be routed uses the optimal path, while the other data to be routed uses a suboptimal path.

[0099] S230: Determine at least one target time slice to which the target transmission clock belongs from the multiple time slices.

[0100] S240: Determine a routing path of the to-be-planned routing data within each target time slice according to the currently planned routing resources corresponding to each target time slice, so as to perform routing mapping.

[0101] Furthermore, the divided time slices may be adjusted to balance the storage space occupied by the routing instructions and the time slice size.

[0102] For details not explained in this embodiment, please refer to the aforementioned embodiments and will not be repeated here.

[0103] The above technical solution can reduce routing congestion while ensuring that each routing path is the shortest path, thereby improving routing efficiency.

[0104] Example 3

[0105] Figure 5 This is a schematic diagram of the structure of a multi-core routing mapping device provided by the third embodiment of the present invention. This embodiment is applicable to the case of routing path planning for a multi-core chip on-chip network. The device can be implemented in software and / or hardware and can generally be integrated into electronic devices. Figure 5 As shown, the device includes: a transmission clock determination module 310, a time slice determination module 320 and a routing path planning module 330.

[0106] in,

[0107] The transmission clock determination module 310 is used to determine the target transmission clock of the data to be routed;

[0108] a time slice determination module 320, configured to determine, from a plurality of time slices, at least one target time slice to which the target transmission clock belongs;

[0109] The routing path planning module 330 is configured to determine a routing path for the routing data to be planned within each target time slice according to the currently planned routing resources corresponding to each target time slice, so as to perform routing mapping.

[0110] In the technical solution of an embodiment of the present invention, at least one target time slice corresponding to the data to be routed is determined based on the target transmission clock of the data to be routed. Furthermore, based on the currently planned routing resources corresponding to each target time slice, the routing path for the data to be routed within each target time slice is determined for routing mapping. In this technical solution, routing path planning is performed separately according to time slices, which can avoid the phenomenon of partially blocked and partially idle routes due to different routing times. This maximizes the utilization of routing resources, improves the utilization rate of on-chip routing resources, and thus improves routing efficiency.

[0111] Optionally, there are multiple target time slices, wherein routing paths of the to-be-planned routing data in different target time slices are not completely the same.

[0112] Optionally, the above device further includes: a time slice segmentation module, configured to segment the time slices and determine the clocks included in each time slice.

[0113] Optionally, different time slices may include different numbers of clocks.

[0114] Optionally, the time slice segmentation module is specifically used to perform time slice segmentation according to the target transmission clock and data volume of each of the route data to be planned; and / or, to perform time slice segmentation according to the target transmission clock and starting and ending core nodes of each of the route data to be planned.

[0115] Optionally, the time slice segmentation module is specifically configured to determine an overlapping clock according to target transmission clocks of the two pieces of routing data to be planned, and segment the overlapping clock into a time slice if the starting and ending core nodes of the two pieces of routing data to be planned are the same.

[0116] Optionally, the above device further includes: a time slice adjustment module, configured to adjust the multiple time slices and update a clock included in each time slice.

[0117] Optionally, a time slice adjustment module is specifically used to determine the target total number of time slices based on the routing table size and / or the number of routes, and split or merge the divided time slices according to the target total number; and / or, if the routing paths planned in adjacent time slices are consistent, the adjacent time slices are merged into one time slice.

[0118] Optionally, the routing path planning module 330 is specifically used to determine the total amount of currently planned routing data for each single path within the target time slice; wherein the single path is the path between two adjacent cores; according to the target path selection strategy, based on the total amount of currently planned routing data for each single path within the target time slice, determine the routing path of the routing data to be planned within the target time slice.

[0119] Furthermore, the routing path planning module 330 is specifically used to determine the horizontal single path and the vertical single path corresponding to the current core node involved in the routing path of the to-be-planned routing data within the target time slice; if the total amount of currently planned routing data of the horizontal single path and the vertical single path are not equal, then determine the next core node corresponding to the current core node based on the single path with the smallest total amount of currently planned routing data; if the total amount of currently planned routing data of the horizontal single path and the vertical single path are equal, then determine the next core node corresponding to the current core node based on the horizontal single path or the vertical single path.

[0120] The multi-core routing mapping device can execute the multi-core routing mapping method provided by any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the multi-core routing mapping method.

[0121] Example 4

[0122] Figure 6 This is a hardware structure diagram of an electronic device provided by the fourth embodiment of the present invention. Figure 6 As shown, the electronic device includes:

[0123] one or more processors 410, Figure 6 A processor 410 is taken as an example;

[0124] Memory 420.

[0125] The processor 410 and the memory 420 in the electronic device can be connected via a bus or other means. Figure 6 The bus connection is taken as an example.

[0126] The memory 420, as a non-transitory computer-readable storage medium, may be used to store software programs and computer executable programs, such as program instructions corresponding to a multi-core routing mapping method in an embodiment of the present invention, including:

[0127] Determine the target transmission clock for the data to be routed;

[0128] Determining at least one target time slice to which the target transmission clock belongs from a plurality of time slices;

[0129] According to the currently planned routing resources corresponding to each of the target time slices, a routing path of the to-be-planned routing data within each of the target time slices is determined to perform routing mapping.

[0130] The processor 410 executes various functional applications and data processing of the chip by running the software program instructions stored in the memory 420, that is, implements a multi-core routing mapping method in any embodiment of the above method.

[0131] Memory 420 may include a program storage area and a data storage area. The program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the chip. Furthermore, memory 420 may include high-speed random access memory and non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device.

[0132] Example 5

[0133] A fifth embodiment of the present invention further provides a storage medium comprising computer-executable instructions, wherein the computer-executable instructions, when executed by a processor, are used to implement a multi-core routing mapping method, the method comprising:

[0134] Determine the target transmission clock for the data to be routed;

[0135] Determining at least one target time slice to which the target transmission clock belongs from a plurality of time slices;

[0136] According to the currently planned routing resources corresponding to each of the target time slices, a routing path of the to-be-planned routing data within each of the target time slices is determined to perform routing mapping.

[0137] Optionally, when executed by a processor, the computer executable instruction may also be used to implement the technical solution of a multi-core routing mapping method provided by any embodiment of the present invention.

[0138] Through the above description of the implementation methods, those skilled in the art can clearly understand that the present invention can be implemented with the help of software and necessary general-purpose hardware. Of course, it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as a computer floppy disk, read-only memory (ROM), random access memory (RAM), flash memory (FLASH), hard disk or optical disk, etc., and includes a number of instructions for enabling the chip to execute the methods described in each embodiment of the present invention.

[0139] It is worth noting that in the embodiment of the above-mentioned multi-core routing mapping device, the various units and modules included are only divided according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be achieved; in addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention.

[0140] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A multi-core routing mapping method, characterized in that: include: Determine the target transmission clock for the data to be routed; Determining at least one target time slice to which the target transmission clock belongs from a plurality of time slices; According to the currently planned routing resources corresponding to each target time slice, the routing path of the routing data to be planned within each target time slice is determined to perform routing mapping, wherein the currently planned routing resources include the planned routing paths and their routing quantities.

2. The method according to claim 1, characterized in that There are multiple target time slices, and the routing paths of the routing data to be planned are not completely the same in different target time slices.

3. The method according to claim 1, characterized in that Also includes: Divide the time slices and determine the clocks included in each time slice.

4. The method according to claim 3, characterized in that Different time slices contain different numbers of clocks.

5. The method according to claim 3, characterized in that The time slice division includes: Perform time slice division according to the target transmission clock and data volume of each of the route data to be planned; and / or, Time slices are divided according to the target transmission clock and the starting and ending core nodes of each piece of routing data to be planned.

6. The method according to claim 5, characterized in that Time slices are divided based on the target transmission clock and the starting and ending core nodes of each routing data to be planned, including: If the starting and ending core nodes of the two pieces of routing data to be planned are the same, an overlapping clock is determined according to the target transmission clocks of the two pieces of routing data to be planned, and the overlapping clock is divided into a time slice.

7. The method according to claim 1, characterized in that Also includes: The multiple time slices are adjusted, and a clock included in each time slice is updated.

8. The method according to claim 7, characterized in that Adjust the time slices obtained by segmentation, including: Determine a target total number of time slices based on the size of the routing table and / or the number of routes, and split or merge the time slices obtained based on the target total number; and / or, If the routing paths planned in adjacent time slices are consistent, the adjacent time slices are merged into one time slice.

9. The method according to claim 1, characterized in that Determining a routing path of the to-be-planned routing data within the target time slice according to currently planned routing resources corresponding to the target time slice includes: Determining the total amount of currently planned routing data for each single path within the target time slice; wherein the single path is a path between two adjacent cores; According to the target path selection strategy, the routing path of the to-be-planned routing data within the target time slice is determined based on the total amount of currently planned routing data of each single path within the target time slice.

10. The method according to claim 9, characterized in that Determining a routing path for the to-be-planned routing data within the target time slice according to the target path selection strategy and based on the total amount of currently planned routing data for each single path within the target time slice includes: For a current core node involved in a routing path of the routing data to be planned within the target time slice, determining a single horizontal path and a single vertical path corresponding to the current core node; If the total amount of currently planned routing data of the horizontal single path and the vertical single path is not equal, determining the next core node corresponding to the current core node according to the single path with the smallest total amount of currently planned routing data; If the total amount of currently planned routing data of the horizontal single path and the vertical single path is equal, a next core node corresponding to the current core node is determined according to the horizontal single path or the vertical single path.

11. A multi-core routing mapping device, characterized in that: include: A transmission clock determination module is used to determine the target transmission clock of the data to be routed; a time slice determining module, configured to determine, from a plurality of time slices, at least one target time slice to which the target transmission clock belongs; The routing path planning module is used to determine the routing path of the to-be-planned routing data within each target time slice based on the currently planned routing resources corresponding to each target time slice, so as to perform routing mapping, wherein the currently planned routing resources include the planned routing paths and their routing quantities.

12. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the method according to any one of claims 1 to 10 is implemented.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method according to any one of claims 1 to 10 is implemented.

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