Method, device, equipment and storage medium for presenting power grid wiring diagram
By creating a ledger and using a convolutional neural network to extract the semantic features of components in the grid wiring diagram, combined with Pareto non-dominant sorting and Hungarian matching algorithm, the problem of complex upper and lower-level relationships in the grid wiring diagram is solved, and the accuracy and correct presentation of components are achieved, and the accuracy of presentation is improved.
Patent Information
- Application Number
- CN202210391791.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-14
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2042-04-14
AI Technical Summary
The superior and inferior relationships of each component in the grid wiring diagram are complex, making it difficult to present the components in the original correct level and order.
Record component information by creating ledgers and extracting multi-dimensional semantic features of components using pre-trained convolutional neural networks. Then, a Pareto non-dominant sort is performed to determine the position and rank of the components. Finally, based on the characteristics, position, and rank matching, the components are placed into the corresponding subregion using the Hungarian matching algorithm.
The accurate identification and correct presentation of components in the power grid wiring diagram is achieved, and the accuracy of presentation is improved.
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Figure CN114996885B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of circuit diagram digitization, and in particular relates to a method, device, equipment and storage medium for presenting a power grid wiring diagram. Background Art
[0002] In the related technologies of digitizing power grid wiring diagrams, it is necessary to accurately extract the components in the power grid wiring diagram and save them in the ledger according to the correct superior-subordinate relationship, and present each component in the drawing area according to the relevant information of the component in the ledger, and ensure the correct order.
[0003] However, in actual operation, due to the complex hierarchical relationship between various components in the power grid wiring diagram, it is often difficult to present the components in their original correct level and order.
[0004] Based on this, a solution is needed that can accurately identify each component in the power grid wiring diagram and present it according to the correct component hierarchical relationship. Summary of the invention
[0005] In view of this, the purpose of the present application is to provide a method, device, equipment and storage medium for presenting a power grid wiring diagram.
[0006] Based on the above purpose, the present application provides a method for presenting a power grid wiring diagram, comprising:
[0007] Creating a ledger for the image of the power grid wiring diagram to record information of each component, and setting a plurality of feature categories for the component in the ledger;
[0008] In the power grid wiring diagram, based on the feature categories, a pre-trained convolutional neural network is used to extract multi-dimensional semantic features of each component on each busbar;
[0009] Determine the position label of each of the components, in each of the busbar component sets, for each of the components, obtain a scheduling label of the component according to the semantic feature, perform a Pareto non-dominated sorting according to the scheduling label and the position label, and obtain a Pareto level of each of the components in the busbar component set;
[0010] Dividing the presentation area of the power grid wiring diagram into a plurality of sub-areas, determining a specific target part to be filled in each of the sub-areas, and determining a target feature, a target level and a target position of the target part;
[0011] For each of the sub-regions, calculating the feature matching degree, position matching degree and level matching degree between each of the components and the target part, and determining the joint matching degree using the feature matching degree, the position matching degree and the level matching degree;
[0012] The Hungarian matching algorithm is adopted to match all the target parts and the components, and the components that are successfully matched are placed in the sub-area for presentation.
[0013] Furthermore, calculating the feature matching degree, position matching degree and grade matching degree of each of the components and the target part includes:
[0014] Based on the determined target part, a target feature matrix is established using the target features, and a target position matrix is established using the target positions;
[0015] For each of the elements, a semantic feature matrix is established using the semantic features, and a position label matrix is established using the position labels;
[0016] Calculating the feature matching degree using the target feature matrix and the semantic feature matrix;
[0017] Calculating the position matching degree using the target position matrix and the position label matrix;
[0018] The grade matching degree is calculated using the target grade and the Pareto grade.
[0019] Furthermore, calculating the feature matching degree using the semantic feature matrix and the target feature matrix includes:
[0020] The feature matching degree P1 is calculated using the following feature matching degree formula:
[0021]
[0022] Among them, P m represents the target feature matrix, P n represents the semantic feature matrix, and T is the matrix transposition symbol.
[0023] Further, calculating the position matching degree using the target position matrix and the position label matrix includes:
[0024] The position matching degree P2 is calculated using the following position matching degree formula:
[0025] P2=(D m -D n )S(D m -D n ) T
[0026] Among them, D m represents the target position matrix, D n represents the element position label matrix, S represents the covariance matrix, and T is the matrix transpose symbol.
[0027] Furthermore, the joint matching degree is calculated using the feature matching degree, the position matching degree and the level matching degree, including:
[0028] The following joint matching degree formula is used to calculate the joint matching degree:
[0029]
[0030] Wherein, P represents the joint matching degree, P1 represents the position matching degree, P2 represents the feature matching degree, and P3 represents the level matching degree. is the first weight coefficient, is the second weight coefficient.
[0031] Further, a Pareto non-dominated sort is performed according to the scheduling label and the position label to obtain the Pareto level of each component in the busbar component set, including:
[0032] In each of the busbar element sets, for each element, using the abscissa and the ordinate in the position label, according to the Pareto dominance principle, and in accordance with the strategy of minimizing the abscissa and the ordinate, each position label is sorted to obtain a position grade;
[0033] For any two given elements of the same busbar element set, the dominance relationship between the two elements is determined according to the following formula:
[0034] All have f j (q a )≤f j (q b )
[0035] All have f i (q a )≤f i (q b )
[0036] Among them, m represents the scheduling label, n represents the location level, and q a and q b represents two different said elements;
[0037] In response to the second formula being true, determine the element q a Dominant Component q b ;
[0038] In response to any of the elements dominating all of the other elements, determining the element as a non-dominated solution in the busbar element set, and defining the Pareto level of the non-dominated solution as level 1;
[0039] Using the formula again, a non-dominated solution is determined in all the remaining elements, and the Pareto level of the target component corresponding to the non-dominated solution is defined as level 2;
[0040] In response to all the elements in the busbar element set obtaining Pareto ranks, the sorting is terminated.
[0041] Based on the same inventive concept, the present application also provides a device for presenting a power grid wiring diagram, comprising:
[0042] The preprocessing module is configured to: create a ledger for the image of the power grid wiring diagram to record the information of each component, and set multiple feature categories for the components in the ledger.
[0043] The semantic feature extraction module is configured to: in the power grid wiring diagram, based on the feature category, use a pre-trained convolutional neural network to extract the multi-dimensional semantic features of each component on each bus.
[0044] The grading module is configured to: determine the position label of each of the components, obtain the scheduling label of each component in each of the bus component sets according to the semantic features, perform Pareto non-dominated sorting according to the scheduling label and the position label, and obtain the Pareto rank of each component in the bus component set.
[0045] The matching and presentation module is configured to: divide the presentation area of the power grid wiring diagram into multiple sub-areas, determine the specific target parts that need to be filled in each of the sub-areas, and determine the target characteristics, target levels and target positions of the target parts; for each of the sub-areas, calculate the feature matching degree, position matching degree and level matching degree between each of the components and the target part, and determine the joint matching degree using the feature matching degree, the position matching degree and the level matching degree; adopt the Hungarian matching algorithm to match all the target parts and the components, and place the successfully matched components in the sub-areas for presentation.
[0046] Based on the same inventive concept, the present application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method for presenting a power grid wiring diagram as described in any one of the above items is implemented.
[0047] Based on the same inventive concept, the present application also provides a non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the computer to execute the method for presenting a power grid wiring diagram as described above.
[0048] From the above, it can be seen that the method, device, equipment and storage medium for presenting a power grid wiring diagram provided by the present application are based on a multi-criteria matching scheme, which comprehensively considers the semantic features, position and Pareto level of the components describing the superior-subordinate relationship to match the components with the presentation area, and comprehensively measures the matching relationship based on feature matching, position matching and level matching, thereby achieving accurate presentation of the components to be presented in the power grid wiring diagram in the correct area, thereby improving the accuracy of the presentation. BRIEF DESCRIPTION OF THE DRAWINGS
[0049] The drawings constituting a part of the present application are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:
[0050] Figure 1 A flow chart of a method for presenting a power grid wiring diagram according to an embodiment of the present application;
[0051] Figure 2 This is a schematic diagram of the structure of a device for presenting a power grid wiring diagram according to an embodiment of the present application;
[0052] Figure 3 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION
[0053] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other without conflict.
[0054] The following detailed description is an exemplary description, which is intended to provide further detailed description of the present invention. Unless otherwise specified, all technical terms used in the present invention have the same meaning as those generally understood by those skilled in the art to which the present application belongs. The terms used in the present invention are only for describing specific embodiments, and are not intended to limit exemplary embodiments according to the present invention.
[0055] As described in the background technology section, the related methods for presenting power grid wiring diagrams are still difficult to meet the needs of actual power drawing.
[0056] In the process of implementing the present application, the applicant discovered that the main problem with the related method of presenting a power grid wiring diagram is that due to the complex hierarchical relationship between the various components in the power grid wiring diagram, it is often difficult to present the components in their original correct level and order.
[0057] The applicant also found in the study that the position of each component in the power grid wiring diagram is often measured by a single standard, while the presentation of components needs to consider multiple dimensions including position and hierarchical relationships.
[0058] It can be understood that the method can be executed by any device, equipment, platform, or device cluster having computing and processing capabilities.
[0059] The technical method of the present application is described in detail below through specific embodiments.
[0060] refer to Figure 1 A method for presenting a power grid connection diagram according to an embodiment of the present application comprises the following steps:
[0061] S101. Create a ledger for the image of the power grid wiring diagram to record information of each component, and set multiple feature categories for the components in the ledger.
[0062] In an embodiment of the present application, a ledger is first created for the power grid wiring diagram to be processed in the database, the ledger is used to record relevant information of each component in the power grid wiring diagram, and multiple feature categories are set for each component in the ledger.
[0063] In this embodiment, for further processing, each element in the power grid wiring diagram may be used as a data sample, and the multiple feature categories set above may be used as attributes of each data sample.
[0064] S102. In the power grid wiring diagram, based on the feature categories, a pre-trained convolutional neural network is used to extract multi-dimensional semantic features of each component on each bus.
[0065] In an embodiment of the present application, according to the feature categories set above, semantic features of the corresponding category are extracted for each element, wherein the semantic features extracted for each element are the same.
[0066] Specifically, a pre-trained convolutional neural network for feature extraction is used to extract the semantic features of the element. The convolutional neural network can be a DLA (Deep Learning Accelerator)-34 convolutional neural network composed of a feature extraction network and a scale feature fusion network connected in series.
[0067] Furthermore, the dimensions of the semantic features extracted by the convolutional neural network may include: shape, color, component type, text label, component name, scheduling label, angle and equipment information of the component in the power grid wiring diagram.
[0068] The dispatch label is the dispatch number of the component; the angle is the direction in which the component is placed in the power grid wiring diagram.
[0069] Furthermore, the convolutional neural network will output a semantic feature matrix corresponding to each component.
[0070] S103, determining the position label of each of the components, and in each of the busbar component sets, obtaining a scheduling label of each component according to the semantic feature, and performing Pareto non-dominated sorting according to the scheduling label and the position label to obtain the Pareto level of each of the components in the busbar component set.
[0071] In the embodiment of the present application, a coordinate system is used to determine the position label of each component.
[0072] Specifically, the power grid connection diagram may be placed in a coordinate system, and the coordinate position of each component in the coordinate system may be determined according to the coordinate system.
[0073] Furthermore, based on the coordinate position, the position label of each component is calculated using a Gaussian mask, and the position label matrix of all components is formed by splicing.
[0074] Specifically, the following formula is used for the position label of each component:
[0075]
[0076]
[0077] Wherein, d represents the location label of each component, x and y are the center coordinates of the component in the coordinate system, and w and h are the width and height of the component in the circuit wiring diagram.
[0078] Furthermore, the above-mentioned position label Gaussian masks of each element are spliced together to obtain the position label matrix D of all elements.
[0079] In this embodiment, for each busbar component set, based on the semantic feature matrix obtained above, the scheduling label of each component is extracted from the semantic feature matrix of the busbar component set.
[0080] Furthermore, the scheduling labels and the position labels are used to perform a Pareto non-dominated sorting within the busbar element set.
[0081] In this embodiment, the Pareto non-dominated sorting obtains a non-inferior solution in the busbar element set according to the position rank and scheduling label of each element, so it is necessary to determine the position rank of each element by sorting the position label of each element.
[0082] Specifically, within the same busbar element set, for each element, its horizontal coordinate and vertical coordinate are taken as the two target components of the element. In this implementation, the position labels are Pareto sorted on the principle of smaller is better, that is, the elements that reach Min(x, y) are taken as the non-dominated solutions with respect to the position label in the busbar element set. In practice, it can also be done on the principle of larger is better according to specific needs.
[0083] Furthermore, the Pareto ranking is determined based on the dominance relationship shown in the following first formula:
[0084] All have f i (p a )≤f i (p b )
[0085] All have f i (p a )≤f i (p b )
[0086] Among them, x represents the horizontal coordinate, y represents the vertical coordinate, and p a and p b represents two different elements, and i represents any one of the two target components.
[0087] Furthermore, if there is an element whose horizontal coordinate and vertical coordinate are both minimized at the same time, that is, there is no other element whose horizontal coordinate is smaller than the horizontal coordinate of this element, and there is no other element whose vertical coordinate is smaller than the vertical coordinate of this element, then it can be considered that with respect to the position label, this element can dominate all other elements, and this element can be used as the only non-dominated solution among all elements in its busbar element set, that is, a non-inferior solution, and the position level of this element is defined as level 1.
[0088] Furthermore, within the above-mentioned busbar element set, for the remaining other elements, the above-mentioned Pareto dominance principle is used to perform Pareto sorting again, non-dominated solutions are determined among the remaining elements, and the elements corresponding to the non-dominated solutions determined by the second Pareto sorting are defined as position level 2.
[0089] Furthermore, the above-mentioned Pareto non-dominated sorting is performed multiple times on the remaining elements in the above-mentioned busbar element set to determine the position level of each element one by one.
[0090] In this embodiment, since the elements on each busbar will not overlap, and in most cases all the elements on the busbar will have the same horizontal coordinate and a monotonically increasing or monotonically decreasing vertical coordinate; or have the same vertical coordinate and a monotonically increasing or monotonically decreasing horizontal coordinate, multiple Pareto non-dominated sortings can be performed to obtain the position level of each element.
[0091] Furthermore, in the busbar element set, the scheduling label of each element is different, and the scheduling label of each element shows a regular increase or decrease. For example, multiple elements on a busbar are logically arranged in 301, 302, 303, and 304. Therefore, the value of the scheduling label can be used as one of the target components in the following Pareto non-dominated sorting.
[0092] Furthermore, within the same busbar component set, for each component, the value and position level of the above-mentioned scheduling label are used to perform Pareto non-dominated sorting according to the principle of smaller is better; in practice, it can also be performed according to the principle of larger is better according to specific needs.
[0093] Specifically, the Pareto ranking is determined based on the dominance relationship shown in the following second formula:
[0094] All have f j (q a )≤f j (q b )
[0095] All have f i (q a )≤f i (q b )
[0096] Among them, m represents the scheduling label, n represents the location level, and q a and q b represents two different elements, and j represents any one of the two target components.
[0097] Furthermore, if there is an element whose position rank and scheduling label value both reach the minimum at the same time, that is, there is no other element whose position rank is smaller than the position rank of this element, and there is no other element whose scheduling label value is smaller than the scheduling label value of this element, then it can be considered that this element can dominate all other elements, and this element is used as the only non-dominated solution among all elements in its busbar element set, and the Pareto rank of this element is defined as 1.
[0098] Furthermore, within the above-mentioned busbar element set, for the remaining other elements, the above-mentioned Pareto dominance principle is used to perform Pareto sorting again, non-dominated solutions are determined among the remaining elements, and the elements corresponding to the non-dominated solutions determined by the second Pareto sorting are defined as Pareto level 2.
[0099] Furthermore, the above-mentioned Pareto non-dominated sorting is performed multiple times on the remaining elements in the above-mentioned busbar element set to determine the Pareto level of each element one by one.
[0100] Furthermore, the Pareto level of each component is saved in the ledger.
[0101] S104, dividing the presentation area of the power grid wiring diagram into a plurality of sub-areas, determining specific target parts to be filled in each of the sub-areas, and determining target features, target levels, and target positions of the target parts.
[0102] In an embodiment of the present application, the presentation area of the power grid connection diagram is divided into multiple sub-areas, and the entire presentation area is placed in a coordinate system that is the same as the above-mentioned coordinate system. According to the coordinate system, the coordinates of the center position of each sub-area are used as the coordinate position of the sub-area.
[0103] Based on the coordinate position, the sub-region position label of each sub-region is calculated using a Gaussian mask, and the sub-region position label matrix of all sub-regions is formed by splicing.
[0104] In this embodiment, each sub-region is preset to have the target characteristics and target level of the required target part, which is equivalent to the Pareto level of the element in the power grid wiring diagram, and the sub-region position label of the sub-region is used as the target position of the required target part, and the position label matrix is used as the target position matrix of the required target part.
[0105] Furthermore, for each target part, a target feature matrix about the target part is established based on the target features.
[0106] S105. For each of the sub-regions, calculate the feature matching degree, position matching degree and level matching degree between each of the components and the target component, and determine the joint matching degree using the feature matching degree, the position matching degree and the level matching degree.
[0107] In the embodiment of the present application, when the sub-area is determined, that is, when the target component and its target feature, target position and target level are determined, the target component is matched with each element in the power grid wiring diagram.
[0108] Specifically, for each component, the feature matching degree between the component and the target component is calculated using the feature matching degree formula shown below:
[0109]
[0110] Among them, P1 represents the feature matching degree between the two, P m represents the target feature matrix of the target part, P n Represents the semantic feature matrix of the component, and T is the matrix transposition symbol.
[0111] Furthermore, for each component, the position matching degree between the component and the target component is calculated using the position matching degree formula shown below:
[0112] P2=(D m -D n )S(D m -D n ) T
[0113] Among them, P2 represents the position matching degree between the two, and D m represents the target position matrix of the target part, D n represents the position label matrix of the element, S represents the covariance matrix, and T is the matrix transpose symbol.
[0114] Furthermore, for each component, the level matching degree between the component and the target component is calculated using the level matching degree formula shown below:
[0115]
[0116] Among them, P3 represents the level matching between the two, L m Indicates the target level of the target part, L n Indicates the Pareto rank of the component.
[0117] In this embodiment, based on the above-obtained level matching, position matching and feature matching, the following joint matching algorithm is used to calculate the joint matching between the determined target component and each element in the power grid wiring diagram:
[0118]
[0119] Among them, P represents the joint matching degree, P1 represents the position matching degree, P2 represents the feature matching degree, and P3 represents the level matching degree. is the first weight coefficient, is the second weight coefficient.
[0120] In this embodiment, the first weight coefficient and the second weight coefficient can be set according to needs; for each matching between the target part and each component, it is necessary to consider both the position match and the match between the upper and lower levels of the components. Therefore, flexible weights are used to calculate the joint matching degree according to the specific power grid wiring diagram.
[0121] Furthermore, for each sub-region, the joint matching degree between the target part and each component in the sub-region is calculated respectively.
[0122] S106: Using the Hungarian matching algorithm, all the target parts and the components are matched, and the successfully matched components are placed in the sub-region for presentation.
[0123] In the embodiment of the present application, based on the joint matching degree between each component and each target part obtained above, a Hungarian matching algorithm may be adopted to perform a one-to-one unique matching between each component and each target part.
[0124] In this embodiment, other matching algorithms such as KM (best complete matching) algorithm may also be adopted to achieve a one-to-one unique matching between each component and each target part.
[0125] Furthermore, the successfully matched components are placed in the sub-region corresponding to the target component that matches them, completing the presentation of the power grid wiring diagram.
[0126] It can be seen that the method for presenting a power grid wiring diagram in an embodiment of the present application is based on a multi-criteria matching scheme, which comprehensively considers the semantic features, positions and Pareto levels of the components that describe the superior-subordinate relationship to match the components with the presentation area, and comprehensively measures the matching relationship based on feature matching, position matching and level matching, thereby achieving accurate presentation of the components to be presented in the power grid wiring diagram in the correct area, thereby improving the accuracy of the presentation.
[0127] It should be noted that the method of the embodiment of the present application can be performed by a single device, such as a computer or server. The method of this embodiment can also be applied to a distributed scenario and completed by multiple devices cooperating with each other. In the case of such a distributed scenario, one of the multiple devices can only perform one or more steps in the method of the embodiment of the present application, and the multiple devices will interact with each other to complete the described method.
[0128] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
[0129] Based on the same inventive concept, corresponding to any of the above-mentioned embodiments and methods, an embodiment of the present application further provides a device for presenting a power grid wiring diagram.
[0130] refer to Figure 2 , the power grid wiring diagram presentation device comprises: a preprocessing module 201, a semantic feature extraction module 202, a level division module 203 and a matching and presentation module 204;
[0131] The preprocessing module 201 is configured to: create a ledger for the image of the power grid wiring diagram to record the information of each component, and set multiple feature categories for the component in the ledger;
[0132] The semantic feature extraction module 202 is configured to: in the power grid wiring diagram, based on the feature category, respectively extract the multi-dimensional semantic features of each component on each bus by using a pre-trained convolutional neural network;
[0133] The grading module 203 is configured to: determine the position label of each of the components, obtain the scheduling label of each component in each of the busbar component sets according to the semantic feature, perform Pareto non-dominated sorting according to the scheduling label and the position label, and obtain the Pareto rank of each component in the busbar component set;
[0134] The matching and presentation module 204 is configured to: divide the presentation area of the power grid wiring diagram into multiple sub-areas, determine the specific target parts that need to be filled in each of the sub-areas, and determine the target features, target levels and target positions of the target parts; for each of the sub-areas, calculate the feature matching, position matching and level matching of each of the components with the target part, and determine the joint matching using the feature matching, position matching and level matching; adopt the Hungarian matching algorithm to match all the target parts and the components, and place the successfully matched components in the sub-areas for presentation.
[0135] For the convenience of description, the above devices are described in terms of functions and are divided into various modules. Of course, when implementing the embodiments of the present application, the functions of each module can be implemented in the same or multiple software and / or hardware.
[0136] The device of the above embodiment is used to implement the corresponding method of presenting the power grid connection diagram in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be repeated here.
[0137] Based on the same inventive concept, corresponding to any of the above-mentioned embodiments and methods, an embodiment of the present application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method for presenting a power grid wiring diagram as described in any of the above embodiments is implemented.
[0138] Figure 3 A more specific schematic diagram of the hardware structure of an electronic device provided in this embodiment is shown, and the device may include: a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, the memory 1020, the input / output interface 1030, and the communication interface 1040 are connected to each other through the bus 1050 in the device.
[0139] The processor 1010 can be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present application.
[0140] The memory 1020 may be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 1020 may store an operating system and other application programs. When the technical solution provided in the embodiment of the present application is implemented by software or firmware, the relevant program code is stored in the memory 1020 and is called and executed by the processor 1010.
[0141] The input / output interface 1030 is used to connect the input / output module to realize information input and output. The input / output module can be configured in the device as a component (not shown in the figure), or it can be externally connected to the device to provide corresponding functions. The input device may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output device may include a display, a speaker, a vibrator, an indicator light, etc.
[0142] The communication interface 1040 is used to connect a communication module (not shown) to realize communication interaction between the device and other devices. The communication module can realize communication through a wired mode (such as USB, network cable, etc.) or a wireless mode (such as mobile network, WIFI, Bluetooth, etc.).
[0143] The bus 1050 includes a path that transmits information between the various components of the device (eg, the processor 1010, the memory 1020, the input / output interface 1030, and the communication interface 1040).
[0144] It should be noted that, although the above device only shows the processor 1010, the memory 1020, the input / output interface 1030, the communication interface 1040 and the bus 1050, in the specific implementation process, the device may also include other components necessary for normal operation. In addition, it can be understood by those skilled in the art that the above device may also only include the components necessary for implementing the embodiment of the present application, and does not necessarily include all the components shown in the figure.
[0145] The device of the above embodiment is used to implement the corresponding method of presenting the power grid connection diagram in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be repeated here.
[0146] Based on the same inventive concept, corresponding to any of the above-mentioned embodiment methods, the present application also provides a non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the computer to execute the method of presenting a power grid wiring diagram as described in any of the above embodiments.
[0147] The computer-readable medium of this embodiment includes permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device.
[0148] The computer instructions stored in the storage medium of the above embodiment are used to enable the computer to execute the method of presenting a power grid connection diagram as described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.
[0149] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.
[0150] In addition, to simplify the description and discussion, and in order not to make the embodiments of the present application difficult to understand, the known power supply / ground connection with the integrated circuit (IC) chip and other components may or may not be shown in the provided drawings. In addition, the device can be shown in the form of a block diagram to avoid making the embodiments of the present application difficult to understand, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform on which the embodiments of the present application will be implemented (that is, these details should be fully within the scope of understanding of those skilled in the art). In the case of elaborating specific details (e.g., circuits) to describe exemplary embodiments of the present application, it is obvious to those skilled in the art that the embodiments of the present application can be implemented without these specific details or when these specific details are changed. Therefore, these descriptions should be considered illustrative rather than restrictive.
[0151] Although the present application has been described in conjunction with specific embodiments of the present application, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.
[0152] It is known from common technical knowledge that the present invention can be implemented by other embodiments that do not deviate from its spirit or essential features. Therefore, the above disclosed embodiments are only illustrative in all respects and are not exclusive. All changes within the scope of the present invention or within the scope equivalent to the present invention are included in the present invention.
Claims
1. A method for presenting a power grid wiring diagram, comprising: Creating a ledger for the image of the power grid wiring diagram to record information of each component, and setting a plurality of feature categories for the component in the ledger; In the power grid wiring diagram, based on the feature categories, a pre-trained convolutional neural network is used to extract multi-dimensional semantic features of each component on each busbar; Determine the position label of each of the components, in each busbar component set, for each of the components, obtain the scheduling label of the component according to the semantic feature, perform Pareto non-dominated sorting according to the scheduling label and the position label, and obtain the Pareto level of each of the components in the busbar component set; Dividing the presentation area of the power grid wiring diagram into a plurality of sub-areas, determining a specific target part to be filled in each of the sub-areas, and determining a target feature, a target level and a target position of the target part; For each of the sub-regions, calculating the feature matching degree, position matching degree and level matching degree between each of the components and the target part, and determining the joint matching degree using the feature matching degree, the position matching degree and the level matching degree; Using the Hungarian matching algorithm, all the target parts and the components are matched, and the successfully matched components are placed in the sub-region for presentation; The step of performing a Pareto non-dominated sorting according to the scheduling label and the position label to obtain a Pareto level of each component in the busbar component set includes: In each of the busbar element sets, for each of the elements, using the abscissa and ordinate in the position label, according to the Pareto dominance principle, and in accordance with the strategy of minimizing the abscissa and the ordinate, each of the position labels is sorted to obtain a position grade; for any two elements given in the same busbar element set, the dominance relationship between the two elements is determined according to the second formula shown below: Both Both Among them, m represents the scheduling label, n represents the location level, and represents two different elements; i and j represent two target components respectively; In response to the second formula being established, determining the element Control Components ; In response to any of the elements dominating all other elements, the element is determined as a non-dominated solution in the bus element set, and the Pareto rank of the non-dominated solution is defined as 1; the second formula is used again to determine the non-dominated solution in all the remaining elements, and the Pareto rank of the target component corresponding to the non-dominated solution is defined as 2; in response to all the elements in the bus element set obtaining Pareto ranks, the sorting is terminated.
2. The method according to claim 1, characterized in that The calculating of the feature matching degree, position matching degree and grade matching degree of each component with the target part comprises: Based on the determined target part, a target feature matrix is established using the target features, and a target position matrix is established using the target positions; For each of the elements, a semantic feature matrix is established using the semantic features, and a position label matrix is established using the position labels; Calculating the feature matching degree using the target feature matrix and the semantic feature matrix; Calculating the position matching degree using the target position matrix and the position label matrix; The grade matching degree is calculated using the target grade and the Pareto grade.
3. The method according to claim 2, characterized in that The calculating the feature matching degree by using the semantic feature matrix and the target feature matrix includes: The feature matching degree is calculated using the following feature matching degree formula: : in, represents the target feature matrix, represents the semantic feature matrix, and T is the matrix transposition symbol.
4. The method according to claim 2, characterized in that: The calculating the position matching degree by using the target position matrix and the position label matrix includes: The position matching degree is calculated using the following position matching degree formula: : in, represents the target position matrix, represents the element position label matrix, S represents the covariance matrix, and T is the matrix transpose symbol.
5. The method according to claim 1, characterized in that The calculating the joint matching degree by using the feature matching degree, the position matching degree and the level matching degree comprises: The following joint matching degree formula is used to calculate the joint matching degree: Wherein, P represents the joint matching degree, represents the position matching degree, represents the feature matching degree, is the level matching degree, is the first weight coefficient, is the second weight coefficient.
6. A device for presenting a power grid wiring diagram, comprising: The preprocessing module is configured to: create a ledger for the image of the power grid wiring diagram to record information of each component, and set multiple feature categories for the component in the ledger; The semantic feature extraction module is configured to: in the power grid wiring diagram, based on the feature category, respectively extract the multi-dimensional semantic features of each of the components on each bus by using a pre-trained convolutional neural network; The grading module is configured to: determine the position label of each of the components, obtain the scheduling label of each component in each bus component set according to the semantic feature, perform Pareto non-dominated sorting according to the scheduling label and the position label, and obtain the Pareto rank of each component in the bus component set; The matching and presentation module is configured to: divide the presentation area of the power grid wiring diagram into a plurality of sub-areas, determine the specific target parts to be filled in each of the sub-areas, and determine the target features, target levels and target positions of the target parts; for each of the sub-areas, calculate the feature matching degree, position matching degree and level matching degree of each of the components with the target part, and determine the joint matching degree by using the feature matching degree, the position matching degree and the level matching degree; adopt the Hungarian matching algorithm to match all the target parts and the components, and place the successfully matched components in the sub-areas for presentation; The step of performing a Pareto non-dominated sorting according to the scheduling label and the position label to obtain a Pareto level of each component in the busbar component set includes: In each of the busbar element sets, for each of the elements, using the abscissa and ordinate in the position label, according to the Pareto dominance principle, and in accordance with the strategy of minimizing the abscissa and the ordinate, each of the position labels is sorted to obtain a position grade; for any two elements given in the same busbar element set, the dominance relationship between the two elements is determined according to the second formula shown below: Both Both Among them, m represents the scheduling label, n represents the location level, and represents two different elements; i and j represent two target components respectively; In response to the second formula being established, determining the element Control Components ; In response to any of the elements dominating all other elements, the element is determined as a non-dominated solution in the bus element set, and the Pareto rank of the non-dominated solution is defined as 1; the second formula is used again to determine the non-dominated solution in all the remaining elements, and the Pareto rank of the target component corresponding to the non-dominated solution is defined as 2; in response to all the elements in the bus element set obtaining Pareto ranks, the sorting is terminated.
7. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable by the processor, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 5 is implemented.
8. A non-transitory computer-readable storage medium, characterized in that: The non-transitory computer-readable storage medium stores computer instructions for causing a computer to execute the method according to any one of claims 1 to 5.
Citation Information
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