Display substrate and manufacturing method thereof, display panel and display device

Abstract

Embodiments of the present application provide a display substrate, a method for manufacturing the same, a display panel, and a display device. The display substrate includes a base, a source / drain electrode disposed on one side of the base, a resistance compensation structure, and a pin. The resistance compensation structure is disposed on a side of the source / drain electrode away from the base. The pin is located in a binding region. One end of the resistance compensation structure is electrically connected to the source / drain electrode, and the other end is electrically connected to the pin. The resistance of the resistance compensation structure is greater than the resistance of the metal traces of the display substrate. Embodiments of the present application utilize a resistance compensation structure to replace a portion of the low-impedance metal traces in related art. This reduces the length of the metal trace between the pin and the source / drain electrode while meeting the resistance requirements for brightness uniformity at each display position within the display panel. This reduces the space occupied by the metal trace on the display substrate, reduces the space surrounded by the metal trace in the border region of the display substrate, and thereby reduces the size of the display substrate border, achieving a narrow border.

Description

Technical Field

[0001] The present application relates to the field of display technology, and more specifically, to a display substrate and a manufacturing method thereof, a display panel, and a display device. Background Art

[0002] At room temperature, the resistance of metal conductors is non-zero. Current passing through them generates a voltage drop, a phenomenon known as IR drop. IR drop on metal traces can cause potential differences at different locations relative to the input terminal. On large-area display panels, this IR drop can cause current variations at different locations on the display panel, leading to uneven illumination and poor image quality.

[0003] To improve such problems, existing technologies often use a method of supplementing the length and width of low-impedance metal traces on the display substrate to perform resistance compensation, so that the current at different positions of the display panel is roughly consistent, thereby improving the display quality. This causes the source and drain structure traces to converge in the border area of ​​the display substrate, resulting in the display panel border being too wide. Summary of the Invention

[0004] In response to the shortcomings of existing methods, this application proposes a display substrate and its manufacturing method, a display panel and a display device to solve the technical problem in the related art that the low-impedance source and drain structure wiring converges in the border area of ​​the display substrate.

[0005] In a first aspect, an embodiment of the present application provides a display substrate, comprising a display area and a binding area located outside the display area, the display substrate comprising: a base, a source and drain electrode disposed on one side of the base, a resistance compensation structure, and a pin;

[0006] The resistance compensation structure is arranged on the side of the source and drain away from the substrate; the pins are located in the binding area;

[0007] One end of the resistance compensation structure is electrically connected to the source and drain, and the other end is electrically connected to the pin;

[0008] The resistance of the resistance compensation structure is greater than the resistance of the metal wiring of the display substrate.

[0009] Optionally, the display area includes a plurality of display partitions arranged at intervals;

[0010] At least part of the resistance compensation structure is located in the display partition;

[0011] The resistance compensation structure is electrically connected to the pins of the binding area through metal traces.

[0012] Optionally, the size of the resistance compensation structure is related to the distance between the display partition and the pin.

[0013] Optionally, the display area further includes a wiring area located at the periphery of each display subarea;

[0014] A portion of the resistance compensation structure is located in the display partition, and the other portion is located in the routing area.

[0015] Optionally, the resistance compensation structure includes at least one of indium oxide and tin oxide.

[0016] Optionally, the block resistance of the resistance compensation structure is 10-100 ohms per square.

[0017] Optionally, the display substrate further comprises: a plurality of first electrodes located on one side of the base;

[0018] The orthographic projection of the first electrode on the substrate has no overlapping area with the orthographic projection of the resistance compensation structure on the substrate.

[0019] Optionally, the first electrode and the resistance compensation structure are provided in the same layer.

[0020] Optionally, the display substrate further comprises: a protection layer located between the source and drain electrodes and the resistance compensation structure;

[0021] The protection layer has a via hole exposing the source and drain;

[0022] The resistance compensation structure is electrically connected to the source and drain through the via hole.

[0023] Optionally, the display substrate further comprises: a light emitting layer located on one side of the first electrode and a pixel defining structure located on one side of the resistance compensation structure, wherein the pixel defining structure has a plurality of pixel openings exposing the first electrode;

[0024] The pixel defining structure covers the resistance compensation structure and the protective layer;

[0025] The light emitting layer is located in the pixel opening.

[0026] In a second aspect, an embodiment of the present application further provides a display panel, comprising: any display substrate provided in the first aspect above.

[0027] In a third aspect, an embodiment of the present application further provides a display device, comprising: any display panel provided in the aforementioned second aspect.

[0028] In a fourth aspect, an embodiment of the present application further provides a method for manufacturing a display substrate, comprising:

[0029] Fabricate source and drain electrodes on one side of the substrate, as well as metal traces electrically connected to the pins in the binding area;

[0030] A resistance compensation structure is fabricated on one side of the source and drain electrodes. The source and drain electrodes are electrically connected to the metal wiring via the resistance compensation structure. The resistance of the resistance compensation structure is greater than the resistance of the metal wiring.

[0031] Optionally, a resistance compensation structure is fabricated on one side of the source and drain electrodes, the source and drain electrodes are electrically connected to the metal wiring via the resistance compensation structure, and the resistance of the resistance compensation structure is greater than the resistance of the metal wiring, including:

[0032] A protective layer is formed on one side of the source and drain electrodes, wherein the protective layer has via holes exposing the source and drain electrodes;

[0033] A conductive layer is formed on the substrate, on the protective layer, and in the via hole, and the conductive layer is patterned to obtain a resistance compensation structure located on the source and drain side of the display area and a first electrode located on the substrate side of the display subarea. The source and drain are electrically connected to the metal traces through the resistance compensation structure, and the resistance of the resistance compensation structure is greater than the resistance of the metal traces.

[0034] The beneficial technical effects brought about by the technical solution provided by the embodiment of the present application include: the display substrate provided by the embodiment of the present application includes a display area and a binding area located outside the display area, a pin is provided in the binding area, a resistance compensation structure is provided on one side of the source and drain of the display area, the source and drain are electrically connected to the pin through the resistance compensation structure, the resistance of the resistance compensation structure is greater than the resistance of the conventional metal traces in the display substrate, and the resistance compensation structure is used to replace a part of the low-impedance metal traces in the related technology. On the basis of meeting the resistance requirements required for brightness uniformity of each display position in the display panel, the length of the metal trace between the pin and the source and drain can be shortened, the space of the display substrate occupied by the metal trace can be reduced, and the space surrounded by the metal trace in the border area of ​​the display substrate can be reduced, thereby reducing the size of the display substrate border and achieving a narrow border effect.

[0035] Additional aspects and advantages of the present application will be given in part in the following description, which will become apparent from the following description, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0037] Figure 1 A schematic diagram of a film structure of a display substrate provided in an embodiment of the present application;

[0038] Figure 2 A schematic top view of a structure showing area division of a display substrate provided in an embodiment of the present application;

[0039] Figure 3 A schematic diagram of the electrical connection between the pins of a display partition and a binding area in a display substrate provided in an embodiment of the present application;

[0040] Figure 4A schematic flow chart of a method for manufacturing a display substrate provided in an embodiment of the present application;

[0041] Figure 5 A schematic flow chart of another method for manufacturing a display substrate provided in an embodiment of the present application.

[0042] Reference numerals:

[0043] 100-display substrate; 101-display area; 1011-display partition; 1011a-light-emitting unit; 1012-routing area; 102-binding area; 103-border area; 10-base; 20-source and drain; 30-resistance compensation structure; 40-pin; 50-first electrode; 60-protective layer; 70-light-emitting layer; 80-pixel defining structure; 801-pixel opening; 90-metal routing; 110-second electrode. DETAILED DESCRIPTION

[0044] The following describes the embodiments of the present application in conjunction with the accompanying drawings. It should be understood that the embodiments described below in conjunction with the accompanying drawings are exemplary descriptions for explaining the technical solutions of the embodiments of the present application and do not constitute a limitation on the technical solutions of the embodiments of the present application.

[0045] Those skilled in the art will understand that, unless expressly stated otherwise, the singular forms "a", "an", "said" and "the" used herein may also include plural forms. It should be understood that the term "comprising" used in the specification of this application refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the implementation of other features, information, data, steps, operations, elements, components and / or combinations thereof supported by the technical field. It should be understood that when we refer to an element as being "connected" or "coupled" to another element, the element may be directly connected or coupled to the other element, or it may refer to the element and the other element establishing a connection relationship through an intermediate element. The term "and / or" used herein refers to at least one of the items defined by the term, for example, "A and / or B" may be implemented as "A", or as "B", or as "A and B".

[0046] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0047] The inventors have discovered that on large-area display panels, IR Drop causes differences in current at different locations on the display panel, resulting in uneven luminescence of the display panel. Therefore, resistance compensation is required for metal traces at different locations. When the resistance compensation value is large, longer metal traces are required, and the metal traces at various locations converge in the border area of ​​the display panel, causing the border area to be too wide. Furthermore, the metal traces connecting some locations even need to be wound in the border area to meet the resistance compensation requirements, further causing the border area of ​​the display panel to be too wide.

[0048] The display substrate and its manufacturing method, display panel and display device provided in this application are intended to solve the above technical problems in related technologies.

[0049] The following is a detailed description of the technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems with specific embodiments. It should be noted that the following embodiments can refer to, draw on, or combine with each other, and the same terms, similar features, and similar implementation steps in different embodiments will not be repeated.

[0050] Please refer to Figure 1 and Figure 2 An embodiment of the present application provides a display substrate 100, including a display area 101 and a binding area 102 located outside the display area 101. The display substrate 100 includes: a substrate 10, a source and drain electrode 20 arranged on one side of the substrate 10, a resistance compensation structure 30 and a pin 40.

[0051] The resistance compensation structure 30 is disposed on a side of the source / drain 20 away from the substrate. The pins 40 are located in the bonding area 102 .

[0052] One end of the resistance compensation structure 30 is electrically connected to the source and drain 20 , and the other end is electrically connected to the pin 40 .

[0053] The resistance of the resistance compensation structure 30 is greater than the resistance of the metal trace 90 of the display substrate 100 .

[0054] In this embodiment, the display substrate 100 includes a display area 101 and a binding area 102 located outside the display area 101. A pin 40 is provided in the binding area 102. A resistance compensation structure 30 is provided on one side of the source and drain 20 of the display area 101. The source and drain 20 are electrically connected to the pin 40 through the resistance compensation structure 30. The resistance of the resistance compensation structure 30 is greater than the resistance of the conventional metal trace 90 in the display substrate 100. The resistance compensation structure 30 is used to replace a part of the metal trace in the related technology. The length of the metal trace 90 between the pin 40 and the source and drain 20 can be shortened while meeting the resistance requirements. The space of the display substrate 100 occupied by the metal trace 90 can be reduced, and the space surrounded by the metal trace 90 in the border area 103 of the display substrate 100 can be reduced, thereby reducing the size of the border area 103 of the display substrate 100 to achieve a narrow border effect.

[0055] Optionally, the pin 40 is a power input pin 40 .

[0056] Optionally, the metal trace 90 includes at least one of a signal line or a power line.

[0057] It is understandable that in order to realize dynamic display of the display panel in the related art, a display substrate 100 driven by multiple display partitions 1011 is required. However, due to the difference in the shape design of the display partitions 1011 or the difference in the distance between the partitions and the binding area 102, there will be a problem of brightness uniformity difference between the display partitions 1011. Therefore, please refer to Figure 2 The present application also provides a possible implementation method, in which the display area 101 includes a plurality of display partitions 1011 arranged at intervals.

[0058] At least a portion of the resistance compensation structure 30 is located in the display subarea 1011 .

[0059] The resistance compensation structure 30 is electrically connected to the pins 40 of the binding area 102 through the metal traces 90 .

[0060] In this embodiment, the resistance compensation structure 30 is driven and connected to the pin 40 of the binding area 102 through the metal trace 90. At least a portion of the resistance compensation structure 30 is located in the display partition 1011 and is connected to the source and drain 20 in each display partition 1011 to provide a driving signal to each display partition 1011. By designing the resistance compensation values ​​required for different display partitions 1011 and designing resistance compensation structures 30 of different lengths or widths, the current flowing through each display partition 1011 is consistent, thereby improving the brightness uniformity of each display partition 1011.

[0061] It can be understood that each display area 1011 includes a plurality of light emitting units 1011 a , and the light emitting units 1011 a are connected in parallel or in series. For details, please refer to the detailed introduction of the light emitting units 1011 a below.

[0062] Optionally, the size of the resistance compensation structure 30 is related to the distance between the display partitions 1011 and the pins 40. For example, the resistance of the resistance compensation structure 30 is related to the size (length or width) of the resistance compensation structure 30. A resistance compensation value can be calculated in advance based on the distance between each display partition 1011 and the corresponding pin 40, and the size of the resistance compensation structure 30 connected between the display partition 1011 and the corresponding pin 40 can be designed based on the compensation value. The distance is the required distance for the wiring between each display partition 1011 and the corresponding pin 40, and is not necessarily equal to the distance between each display partition 1011 and the corresponding pin 40. For example, the resistance compensation value required for each display partition 1011 can be determined by the difference in distance between each display partition 1011 and the pin 40. When the thickness and width of the resistance compensation structure 30 used are consistent, it is only necessary to adjust the length of the resistance compensation structure 30 based on the resistance compensation value. At least a portion of the originally required longer metal trace 90 can be replaced with a shorter resistance compensation structure 30 to shorten or eliminate the length of the metal trace 90, thereby achieving a narrow bezel. The embodiment of the present application has a strong pertinence by adapting a corresponding resistance compensation structure 30 to each display partition 1011 , thereby ensuring brightness uniformity of different display partitions 1011 .

[0063] Optionally, the resistance of the resistance compensation structure 30 is large enough, and the resistance compensation structure 30 is completely located in the display partition 1011 , which can meet the resistance requirement without occupying the space of the routing area 1012 , and can shorten the distance between the display partitions 1011 .

[0064] In some possible implementations, the display area 101 further includes a wiring area 1012 located outside each display subarea 1011 .

[0065] A portion of the resistance compensation structure 30 is located in the display subarea 1011 , and another portion is located in the wiring area 1012 .

[0066] In this embodiment, for a display partition 1011 that is farther from the binding area 102 or a display partition 1011 that requires a larger resistance value due to shape or other reasons, a portion of the resistance compensation structure 30 is located in the display partition 1011 and a portion extends from the display partition 1011. The resistance compensation structure 30 is evenly arranged in the wiring area 1012 within the display area 101 and then electrically connected to the pins 40 of the binding area 102 through the metal wiring 90. Figure 1 and Figure 3 , Figure 1 for Figure 3 Cross-section at line AA.

[0067] Optionally, each display partition 1011 is polygonal in shape, and the resistance compensation structure 30 extending from each display partition 1011 forms a right angle with at least one side of the display partition 1011 , which facilitates uniform wiring and improves utilization of the resistance compensation structure 30 .

[0068] Optionally, the display area 1011 is in the shape of a triangle.

[0069] It is understandable that each display partition 1011 has its corresponding pin 40 .

[0070] In some possible implementations, the resistance compensation structure 30 includes at least one of indium oxide and tin oxide.

[0071] Metal oxide has good resistivity. The resistance compensation structure 30 in this embodiment can be metal oxide or a mixture of multiple metal oxides, such as indium tin oxide (ITO).

[0072] The related art uses a method of increasing the length of source / drain traces arranged in the same layer as the source / drain electrodes 20 to compensate for resistance and address the voltage drop problem. The material of these source / drain traces is mostly a multi-layer metal structure of titanium-aluminum-titanium stacking, with a sheet resistance of approximately 0.1. To meet the display uniformity requirements of large-size display panels, the source / drain traces must be very long. The source / drain traces extend from each display sub-area 1011, pass through the border area 103, and converge into the binding area 102. This excessively occupies space in the border area 103 and the binding area 102, making it difficult to achieve a narrow border.

[0073] Optionally, the block resistance of the resistance compensation structure 30 provided in the embodiment of the present application can reach 10-100 ohms per square (including 10 ohms per square and 100 ohms per square), which is dozens or even hundreds of times the block resistance of the source and drain lines in the related art. Using the resistance compensation structure 30 provided in the embodiment of the present application to replace the longer source and drain lines in the related art can significantly shorten the length of the metal line required for the driving connection between the display area 101 and the pin 40, save space within the display panel, and ensure the brightness uniformity of each display position within the display panel.

[0074] For some possible implementations, please refer to Figure 1 The display substrate 100 further includes: a plurality of first electrodes 50 located on one side of the base 10 .

[0075] The orthographic projection of the first electrode 50 on the substrate 10 has no overlapping area with the orthographic projection of the resistance compensation structure 30 on the substrate 10 .

[0076] In this embodiment, the first electrode 50 and the resistance compensation structure 30 are insulated from each other and do not affect each other. The resistance compensation structure 30 is equivalent to being connected in series between the source and drain electrodes 20 and the pin 40. Figure 3 A schematic diagram of the connection between the resistance compensation structure 30 , the source and drain electrodes 20 and the pin 40 is shown.

[0077] In some possible implementations, the first electrode 50 is disposed in the same layer as the resistance compensation structure 30 .

[0078] In this embodiment, the first electrode 50 and the resistance compensation structure 30 can be prepared in the same preparation process without adding additional preparation steps, thus saving costs and being easy to implement.

[0079] It can be understood that being arranged on the same layer does not mean that the first electrode 50 and the resistance compensation structure 30 must be in the film layer at the same height in the film layer structure of the display substrate 100. During the film layer manufacturing process, some film layers only exist in a part of the display substrate 100 and do not exist in another part of the area. Therefore, the first electrode 50 and the resistance compensation structure 30 arranged on the same layer have different film layer structures with the substrate 10, but are manufactured in the same manufacturing process.

[0080] Optionally,

[0081] For some possible implementations, please refer to Figure 1 The display substrate 100 further includes a protection layer 60 located between the source and drain electrodes 20 and the resistance compensation structure 30 .

[0082] The protection layer 60 has via holes exposing the source and drain electrodes 20 .

[0083] The resistance compensation structure 30 is electrically connected to the source and drain electrodes 20 through vias.

[0084] In this embodiment, a protective layer 60 is provided between the source and drain electrodes 20 and the resistance compensation structure 30 to prevent a short circuit between the source and drain electrodes 20 and the resistance compensation structure 30. Vias are only provided in the protective layer 60 at specific locations so that the resistance compensation structure 30 can be electrically connected to the source and drain electrodes 20 through the vias.

[0085] For some possible implementations, please refer to Figure 1 The display substrate 100 further includes: a light emitting layer 70 located on one side of the first electrode 50 and a pixel defining structure 80 located on one side of the resistance compensation structure 30 . The pixel defining structure 80 has a plurality of pixel openings 801 exposing the first electrode 50 .

[0086] The pixel defining structure 80 covers the resistance compensation structure 30 and the protection layer 60 .

[0087] The light emitting layer 70 is located in the pixel opening 801 .

[0088] In this embodiment, the pixel-defining structure 80 covers the resistance compensation structure 30 and the protective layer 60, effectively encapsulating the resistance compensation structure 30. The resistance compensation structure 30 only needs to be located above the source and drain electrodes 20, with no overlap with the light-emitting layer 70. Therefore, no further processing is required on the pixel-defining structure 80; a conventional pixel-defining structure 80 can be used to insulate and protect the resistance compensation structure 30.

[0089] Optionally, the pixel defining structure 80 is on the first electrode 50 , the pixel opening 801 is opened on a side of the first electrode 50 away from the substrate 10 to expose the first electrode 50 , and the light emitting layer 70 is located on the first electrode 50 exposed by the pixel opening 801 .

[0090] Alternatively, refer to Figure 1 The display substrate 100 further includes: a second electrode 110 located on a side of the light-emitting layer 70 away from the first electrode 50 , and at least a portion of the second electrode 110 is located on the light-emitting layer 70 within the pixel opening 801 .

[0091] Optionally, the first electrode 50 is an anode, the second electrode 110 is a cathode, and each light-emitting unit 1011 a includes a stacked first electrode 50 , a light-emitting layer 70 , and a second electrode 110 .

[0092] Based on the same inventive concept, an embodiment of the present application further provides a display panel, comprising: any display substrate 100 provided in the aforementioned embodiment.

[0093] The display panel provided in this embodiment includes any display substrate 100 provided in the above embodiments, and its implementation principles are similar, which will not be described again here.

[0094] Based on the same inventive concept, an embodiment of the present application further provides a display device, comprising: any display panel provided in the aforementioned embodiment.

[0095] Optionally, the display device provided in the present application is driven in an active driving mode or a passive driving mode.

[0096] Based on the same inventive concept, the present embodiment also provides a method for manufacturing a display substrate 100. The flow chart of the method is as follows: Figure 4 As shown, the method includes steps S101-S102:

[0097] S101 : forming source and drain electrodes 20 and metal traces 90 electrically connected to the pins 40 in the binding region 102 on one side of the substrate 10 .

[0098] S102 : manufacturing a resistance compensation structure 30 on one side of the source and drain electrodes 20 . The source and drain electrodes 20 and the metal traces 90 are electrically connected via the resistance compensation structure 30 . The resistance of the resistance compensation structure 30 is greater than the resistance of the metal traces 90 .

[0099] In this embodiment, the source and drain electrodes 20 and the resistance compensation structure 30 are sequentially manufactured on one side of the substrate 10 , and the resistance compensation structure 30 is located on one side of the source and drain electrodes 20 . The source and drain electrodes 20 are electrically connected to the pins 40 of the binding area 102 through the resistance compensation structure 30 , so that the pins 40 of the binding area 102 provide driving signals to the display area 101 .

[0100] Optionally, the step S102 includes: forming a protection layer 60 on one side of the source and drain electrodes 20 , wherein the protection layer 60 has a via hole exposing the source and drain electrodes 20 .

[0101] A conductive layer is fabricated on the substrate 10, on the protective layer 60, and in the via hole, and the conductive layer is patterned to obtain a resistance compensation structure 30 located on one side of the source and drain electrodes 20 of the display area 101 and a first electrode 50 located on one side of the substrate 10 of the display subarea 1011. The source and drain electrodes 20 and the metal trace 90 are electrically connected via the resistance compensation structure 30, and the resistance of the resistance compensation structure 30 is greater than the resistance of the metal trace 90.

[0102] Optionally, when making the source and drain electrodes 20, source and drain wiring (equivalent to the metal wiring 90 of the present application) is simultaneously made and arranged on the same layer as the source and drain electrodes 20. The source and drain wiring is disconnected from the source and drain electrodes 20, and the disconnected area is electrically connected by making a resistance compensation structure 30. This is equivalent to using a shorter resistance compensation structure 30 to replace a part of the longer source and drain wiring in a conventional way of compensating the length of the source and drain wiring, thereby achieving an overall shortening of the wiring length or width between the source and drain electrodes 20 and the pin 40, and reducing the size of the border area 103.

[0103] Based on the same inventive concept, the embodiment of the present application also provides another method for manufacturing a display substrate 10010. The flow chart of the method is as follows: Figure 5 As shown, the method includes steps S201-S203:

[0104] S201 : forming the source and drain electrodes 20 and the metal traces 90 electrically connected to the pins 40 in the binding region 102 on one side of the substrate 10 .

[0105] Optionally, the source / drain electrodes 20 and the metal traces 90 may be manufactured simultaneously, using a common mask, thereby streamlining the manufacturing process.

[0106] S202 : forming a protection layer 60 on one side of the source and drain electrodes 20 , wherein the protection layer 60 has a via hole exposing the source and drain electrodes 20 .

[0107] Optionally, the protective layer 60 can be produced by conventional patterning processing. It is only necessary to make slight modifications to the mask for producing the protective layer 60 so that the final protective layer 60 has certain vias exposing the source and drain 20, preparing for the subsequent electrical connection between the resistance compensation structure 30 and the source and drain 20.

[0108] S203: A conductive layer is formed on the substrate 10, on the protective layer 60, and in the via hole, and the conductive layer is patterned to obtain a resistance compensation structure 30 located on the side of the source and drain electrodes 20 of the display area 101 and a first electrode 50 located on the side of the substrate 10 of the display partition 1011. The source and drain electrodes 20 and the metal wiring 90 are electrically connected through the resistance compensation structure 30, and the resistance of the resistance compensation structure 30 is greater than the resistance of the metal wiring 90.

[0109] In this step, the resistance compensation structure 30 is fabricated in the same layer and material as the first electrode 50, eliminating the need for additional fabrication steps. Only the mask used to fabricate the first electrode 50 needs to be modified, saving costs. The resistance compensation structure 30 is electrically connected to the source and drain electrodes 20 through vias.

[0110] Optionally, the resistance compensation structure 30 and the first electrode 50 are both made of indium tin oxide.

[0111] By applying some of the embodiments provided in this application, at least the following beneficial effects can be achieved:

[0112] 1. The display substrate 100 provided in some embodiments of the present application includes a display area 101 and a binding area 102 located outside the display area 101, wherein a pin 40 is provided in the binding area 102, and a resistance compensation structure 30 is provided on one side of the source and drain 20 of the display area 101, and the source and drain 20 are electrically connected to the pin 40 through the resistance compensation structure 30. The resistance of the resistance compensation structure 30 is greater than the resistance of the conventional metal trace 90 in the display substrate 100. By using the resistance compensation structure 30 to replace a part of the metal trace in the related art, the length of the metal trace 90 between the pin 40 and the source and drain 20 can be shortened while meeting the resistance requirements, and the space of the display substrate 100 occupied by the metal trace 90 can be reduced, and the space surrounded by the metal trace 90 in the border area 103 of the display substrate 100 can be reduced, thereby reducing the size of the border area 103 of the display substrate 100 and achieving a narrow border effect.

[0113] 2. In some embodiments of the present application, the resistance compensation structure 30 is driven and connected to the pin 40 of the binding area 102 through the metal trace 90. At least a portion of the resistance compensation structure 30 is located in the display partition 1011 and is connected to the source and drain 20 in each display partition 1011 to provide a driving signal to each display partition 1011. By designing the resistance compensation values ​​required for different display partitions 1011 and designing resistance compensation structures 30 of different lengths or widths, the current flowing through each display partition 1011 is consistent, thereby improving the brightness uniformity of each display partition 1011.

[0114] 3. In some embodiments of the present application, the first electrode 50 and the resistance compensation structure 30 can be prepared in the same preparation process, without adding additional preparation steps, saving costs and being easy to implement.

[0115] 4. In some embodiments of the present application, a protective layer 60 is provided between the source and drain electrodes 20 and the resistance compensation structure 30 to prevent a short circuit between the source and drain electrodes 20 and the resistance compensation structure 30. Vias are only provided in the protective layer 60 at specific locations so that the resistance compensation structure 30 can be electrically connected to the source and drain electrodes 20 through the vias.

[0116] 5. In some embodiments of the present application, the pixel-defining structure 80 can cover the resistance compensation structure 30 and the protective layer 60, effectively encapsulating the resistance compensation structure 30. The resistance compensation structure 30 only needs to be located above the source and drain electrodes 20, with no overlap with the light-emitting layer 70. Therefore, no additional processing is required on the pixel-defining structure 80; a conventional pixel-defining structure 80 can be used to insulate and protect the resistance compensation structure 30.

[0117] 6. The display substrate 100 provided in the embodiment of the present application can be prepared by simply modifying the mask for making the first electrode 50 and the mask for making the protective layer 60 in the related art without adding any extra film preparation steps.

[0118] It will be understood by those skilled in the art that the steps, measures, and schemes in the various operations, methods, and processes discussed in this application may be interchanged, modified, combined, or deleted. Other steps, measures, and schemes in the various operations, methods, and processes discussed in this application may also be interchanged, modified, rearranged, decomposed, combined, or deleted. Steps, measures, and schemes in the related art that are similar to those disclosed in this application may also be interchanged, modified, rearranged, decomposed, combined, or deleted.

[0119] In the description of this application, the directions or positional relationships indicated by words such as "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", and "outside" are exemplary directions or positional relationships based on the accompanying drawings. They are intended to facilitate or simplify the description of the embodiments of this application, and do not indicate or imply that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on this application.

[0120] The terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include one or more of such features. In the description of this application, unless otherwise specified, "at least one" means two or more.

[0121] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to direct connections, indirect connections through an intermediate medium, or internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0122] In the description of this specification, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or at least one embodiment or example.

[0123] It should be understood that, although the various steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, the order of implementation of these steps is not limited to the order indicated by the arrows. Unless otherwise clearly stated herein, in some implementation scenarios of the embodiments of the present application, the steps in each process can be performed in other orders as required. Moreover, some or all of the steps in each flowchart may include multiple sub-steps or multiple stages based on actual implementation scenarios. Some or all of these sub-steps or stages may be executed at the same time, or may be executed at different times in different scenarios at the execution time. The execution order of these sub-steps or stages may be flexibly configured as required, and the embodiments of the present application do not limit this.

[0124] The above is only part of the implementation methods of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the technical concept of the solution of the present application, other similar implementation methods based on the technical ideas of the present application also fall within the protection scope of the embodiments of the present application.

Claims

1. A display substrate comprising a display area and a binding area outside the display area, characterized in that: include: A substrate, a source and drain electrode, a resistance compensation structure and a pin arranged on one side of the substrate; The resistance compensation structure is arranged on a side of the source and drain away from the substrate; The pin is located in the binding area; One end of the resistance compensation structure is electrically connected to the source and drain, and the other end is electrically connected to the pin; The resistance of the resistance compensation structure is greater than the resistance of the metal traces of the display substrate; The display area includes a plurality of display partitions arranged at intervals. The display partitions are polygonal in shape. The resistance compensation structure extending from each display partition forms a right angle with at least one side of the display partition.

2. The display substrate according to claim 1, wherein: At least part of the resistance compensation structure is located in the display partition; The resistance compensation structure is electrically connected to the pins of the binding area through metal wiring.

3. The display substrate according to claim 2, wherein: The size of the resistance compensation structure is related to the distance between the display partition and the pin.

4. The display substrate according to claim 2, wherein: The display area further includes a wiring area located at the periphery of each of the display subareas; A portion of the resistance compensation structure is located in the display subarea, and another portion is located in the routing area.

5. The display substrate according to claim 1, wherein The resistance compensation structure includes at least one of indium oxide and tin oxide.

6. The display substrate according to claim 4, wherein: The block resistance of the resistance compensation structure is 10-100 ohms per square.

7. The display substrate according to claim 1, wherein: The display substrate further includes: a plurality of first electrodes located on one side of the base; The orthographic projection of the first electrode on the substrate has no overlapping area with the orthographic projection of the resistance compensation structure on the substrate.

8. The display substrate according to claim 7, wherein: The first electrode is arranged on the same layer as the resistance compensation structure.

9. The display substrate according to claim 7, wherein: The display substrate further includes: a protection layer located between the source and drain electrodes and the resistance compensation structure; The protection layer has a via hole exposing the source and drain; The resistance compensation structure is electrically connected to the source and drain through the via hole.

10. The display substrate according to claim 9, wherein: The display substrate further includes: a light-emitting layer located on one side of the first electrode and a pixel defining structure located on one side of the resistance compensation structure, wherein the pixel defining structure has a plurality of pixel openings exposing the first electrode; The pixel defining structure covers the resistance compensation structure and the protection layer; The light emitting layer is located in the pixel opening.

11. A display panel, characterized in that: include: The display substrate according to any one of claims 1 to 10.

12. A display device, characterized in that: include: The display panel as claimed in claim 11.

13. A method for manufacturing a display substrate according to any one of claims 1 to 10, characterized in that: include: Fabricate source and drain electrodes on one side of the substrate, as well as metal traces electrically connected to the pins in the binding area; A resistance compensation structure is fabricated on one side of the source and drain electrodes. The source and drain electrodes are electrically connected to the metal wiring via the resistance compensation structure. The resistance of the resistance compensation structure is greater than the resistance of the metal wiring.

14. The manufacturing method according to claim 13, characterized in that: A resistance compensation structure is fabricated on one side of the source and drain electrodes, the source and drain electrodes are electrically connected to the metal wiring via the resistance compensation structure, and the resistance of the resistance compensation structure is greater than the resistance of the metal wiring, including: A protective layer is formed on one side of the source and drain electrodes, wherein the protective layer has via holes exposing the source and drain electrodes; A conductive layer is formed on the substrate, on the protective layer, and in the via hole, and the conductive layer is patterned to obtain the resistance compensation structure located on the source and drain side of the display area and the first electrode located on the substrate side of the display partition. The source and drain are electrically connected to the metal wiring through the resistance compensation structure, and the resistance of the resistance compensation structure is greater than the resistance of the metal wiring.

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