Image sensor and method of forming the same

By controlling the length ratio of the photoelectric doped region to the pinning layer to be 0.55–0.65 in the image sensor, the potential difference between the photodiode and the transmission gate is solved, the image hysteresis phenomenon is improved, and the performance of the image sensor is enhanced.

CN115050766BActive Publication Date: 2026-07-10HUA HONG SEMICON WUXI LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HUA HONG SEMICON WUXI LTD
Filing Date
2022-06-07
Publication Date
2026-07-10

AI Technical Summary

Technical Problem

In existing technologies, the potential difference between the photodiode and the transmission gate causes carriers to remain during the transfer process, resulting in image lag.

Method used

In an image sensor, a first photoelectric doped region and a transmission gate covering a portion are formed on a substrate, and a first pinning layer is formed on the photoelectric doped region exposed by the transmission gate. This ensures that the doping types of the two are opposite and controls their length ratio to be 0.55 to 0.65. The width of the transmission gate is controlled to be in an appropriate proportion when the transmission gate is formed.

Benefits of technology

This significantly reduces the potential difference between the photodiode and the transmission gate edge, improves the image hysteresis of the image sensor, and enhances the performance of the image sensor.

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Abstract

An image sensor and a forming method thereof, wherein the image sensor comprises: a substrate, the substrate having a first photoelectrically doped region therein, the first photoelectrically doped region having a first type of ions therein; a transfer gate located on the substrate, the transfer gate covering part of the first photoelectrically doped region; a first pinning layer located on the first photoelectrically doped region exposed by the transfer gate, the first pinning layer having a second type of ions therein, the second type of ions being opposite to the first type of ions in the conductive type, and a ratio of a length of the first pinning layer to a length of the first photoelectrically doped region in a direction perpendicular to an extension direction of the transfer gate being 0.55-0.65. The image sensor provided by the embodiment of the present application can reduce the potential barrier between the photoelectric diode and the edge of the transfer gate, which is conducive to improving the image lag phenomenon and improving the performance of the image sensor.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to an image sensor and a method for forming the same. Background Technology

[0002] Among image sensors, contact image sensors (CIS) are image sensors made using CMOS devices. Due to their advantages such as high integration, low power supply voltage, and low technical threshold, they are widely used in fields such as photography and videography, security systems, smart mobile phones, and medical electronics.

[0003] Contact image sensors typically include a pixel array consisting of numerous pixels, each pixel having a light-sensing element, usually a photodiode (PD), which receives incident light and generates charge carriers corresponding to the amount of incident light. In the prior art, the charge carriers generated by the photodiode are transferred to a floating diffusion (FD) located at another position in the lateral direction of the semiconductor substrate. A transfer transistor is disposed between the photodiode and the floating diffusion, and the transfer transistor is controlled by a transfer gate.

[0004] However, due to some defects or manufacturing process reasons, there may be differences in doping concentration or trap level between the photodiode and the transmission gate. This can create a potential pit between the photodiode and the transmission gate, causing some of the charge carriers to remain in the photodiode during the transfer process. The remaining electrons are then transferred in subsequent frames, resulting in image lag. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide an image sensor and a method for forming the same, which can significantly reduce the potential difference between the photodiode and the transmission gate edge, thereby improving the performance of the image sensor.

[0006] To address the aforementioned technical problems, embodiments of the present invention provide an image sensor, comprising: a substrate having a first photoelectric doped region therein, the first photoelectric doped region containing a first type of ions; a transmission gate located on the substrate, the transmission gate covering a portion of the first photoelectric doped region; and a first pinning layer located on the first photoelectric doped region exposed by the transmission gate, the first pinning layer containing a second type of ions, the second type of ions having an opposite conductivity type to the first type of ions, and in an extension direction perpendicular to the transmission gate, the ratio of the length of the first pinning layer to the length of the first photoelectric doped region being 0.55 to 0.65.

[0007] Optionally, the first type of ion is an N-type ion, and the second type of ion is a P-type ion.

[0008] Optionally, the depth of the first photoelectric doped region is 0.46 to 0.69 micrometers in a direction perpendicular to the substrate surface.

[0009] Optionally, the depth of the first pinning layer is 0.09 to 0.14 micrometers in a direction perpendicular to the substrate surface.

[0010] Optionally, it also includes: a pixel isolation structure located on one side of the first photoelectric doping region, the pixel isolation structure having a second type of ions.

[0011] Optionally, it further includes: a well region located within the substrate, wherein the first photoelectric doped region is located within the well region, and the well region contains a first type of ions.

[0012] Optionally, the transmission gate includes a gate dielectric layer located on the surface of the substrate and a gate electrode layer located on the surface of the gate dielectric layer.

[0013] This invention also provides a method for forming an image sensor, comprising: providing a substrate; forming a first photoelectric doped region within the substrate, the first photoelectric doped region containing a first type of ions; forming a transmission gate on the substrate, the transmission gate covering a portion of the first photoelectric doped region; forming a first pinning layer on the first photoelectric doped region exposed by the transmission gate, the first pinning layer containing a second type of ions, the second type of ions having an opposite conductivity type to the first type of ions, and the ratio of the length of the first pinning layer to the length of the first photoelectric doped region being 0.55 to 0.65 along an extension direction perpendicular to the transmission gate.

[0014] Optionally, the first type of ion is an N-type ion, and the second type of ion is a P-type ion.

[0015] Optionally, the depth of the first photoelectric doped region is 0.46 to 0.69 micrometers in a direction perpendicular to the substrate surface.

[0016] Optionally, the depth of the first pinning layer is 0.09 to 0.14 micrometers in a direction perpendicular to the substrate surface.

[0017] Optionally, before forming the first photoelectric doped region, the method further includes: forming a pixel isolation structure within the substrate, wherein the first photoelectric doped region is located on one side of the pixel isolation structure, and the pixel isolation structure contains a second type of ions.

[0018] Optionally, after forming the pixel isolation structure and before forming the first photoelectric doped region, the method further includes: forming a well region in the substrate, the well region being located on one side of the pixel isolation structure, the first photoelectric doped region being located within the well region, and the well region having a first type of ions.

[0019] Optionally, the method of forming the first pinning layer includes: forming a first mask layer on the transmission gate, the first mask layer exposing the first photoelectric doped region not covered by the transmission gate; implanting second type ions into the substrate using the first mask layer as a mask to form the first pinning layer on the first photoelectric doped region; and removing the first mask layer.

[0020] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0021] The image sensor provided by this technical solution has a first photoelectric doped region in the substrate on one side of the transmission gate, and a first pinning layer located on the first photoelectric doped region. The doping types of the first photoelectric doped region and the first pinning layer are opposite. In the extension direction perpendicular to the transmission gate, the ratio of the length of the first pinning layer to the length of the first photoelectric doped region is 0.55 to 0.65. By controlling an appropriate ratio of the lengths of the first photoelectric doped region and the first pinning layer of the photodiode, the potential difference between the photodiode and the edge of the transmission gate can be significantly reduced, thereby improving the image hysteresis phenomenon of the image sensor.

[0022] The image sensor formation method provided by this technical solution involves forming a first photoelectric doped region within a substrate, the first photoelectric doped region containing a first type of ions; forming a transmission gate on the substrate, the transmission gate partially covering the first photoelectric doped region; and forming a first pinning layer on the first photoelectric doped region exposed by the transmission gate. The doping types of the first photoelectric doped region and the first pinning layer are opposite, and the ratio of the length of the first pinning layer to the length of the first photoelectric doped region is 0.55 to 0.65 in the extension direction perpendicular to the transmission gate. By controlling an appropriate ratio of the lengths of the first photoelectric doped region and the first pinning layer of the photodiode, the potential difference at the edges of the photodiode and the transmission gate can be significantly reduced, thereby improving the image hysteresis phenomenon of the image sensor. Attached Figure Description

[0023] Figures 1 to 13 This is a schematic diagram of the structure corresponding to each step of the image sensor formation process in one embodiment of the present invention. Detailed Implementation

[0024] As described in the background section, current contact image sensors suffer from image lag due to the potential potential between the photodiode and the transmission gate. This causes some of the signal electrons in the photodiode to remain in the photodiode during the transfer process, and the remaining electrons are transmitted in subsequent frames.

[0025] To address the aforementioned problems, embodiments of the present invention provide an image sensor and a method for forming the same. The method includes: forming a first photoelectric doped region within a substrate; forming a transmission gate on the substrate, the transmission gate partially covering the first photoelectric doped region; and forming a first pinning layer on the first photoelectric doped region exposed by the transmission gate. The first photoelectric doped region and the first pinning layer have opposite doping types, and in an extension direction perpendicular to the transmission gate, the ratio of the length of the first pinning layer to the length of the first photoelectric doped region is 0.55 to 0.65. The first photoelectric doped region and the first pinning layer constitute a photodiode. When forming the transmission gate, by controlling the width of the transmission gate, the lengths of the first pinning layer and the first photoelectric doped region are controlled to be in a suitable ratio. This avoids an excessively large ratio between the lengths of the first pinning layer and the first photoelectric doped region, leading to excessive potential, and also avoids an excessively small ratio, leading to leakage current in the pixel area. This improves the image hysteresis phenomenon of the image sensor and enhances its performance.

[0026] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0027] Figures 1 to 13 This is a schematic diagram of the structure corresponding to each step of the image sensor formation process in one embodiment of the present invention.

[0028] refer to Figure 1 Substrate 100 is provided.

[0029] In this embodiment, the substrate 100 is made of silicon.

[0030] In other embodiments, the substrate material includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator (GOI). The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP.

[0031] In this embodiment, the substrate 100 contains a second type of ions, which includes P-type ions, including boron ions, boron-fluorine ions, or indium ions.

[0032] Continue to refer to Figure 1 A pixel isolation structure 101 is formed within the substrate 100.

[0033] The pixel isolation structure 101 can prevent optical or electrical crosstalk between photodiodes of adjacent pixel units.

[0034] In this embodiment, the pixel isolation structure 101 is formed by high-energy ion implantation, and the implanted ions are second-type ions.

[0035] In this embodiment, the pixel isolation structure 101 is formed by implanting boron ions.

[0036] refer to Figure 2 After forming the pixel isolation structure 101, a well region 102 is formed in the substrate 100, and the well region 102 is located on one side of the pixel isolation structure 101.

[0037] In this embodiment, the sidewall of the well region 102 is in contact with the sidewall of the pixel isolation structure 101.

[0038] In this embodiment, the well region 102 contains a first type of ions, the first type of ions having the opposite conductivity type to the second type of ions.

[0039] In this embodiment, the first type of ion includes N-type ions, which include phosphorus ions, arsenic ions, or antimony ions.

[0040] refer to Figure 3 It also includes: forming an isolation doped region 103 within the substrate 100, wherein the isolation doped region 103 is located within the pixel isolation structure 101.

[0041] The isolation doped region 103 contains second-type ions.

[0042] The isolation doped region 103 serves as an ion implantation trap region for the transistor.

[0043] refer to Figure 4 A first doped layer 104 is formed in the substrate 100, and the first doped layer 104 is located on the surface of the isolation doped region 103 and a portion of the well region 102.

[0044] In this embodiment, the first doped layer 104 contains second type ions.

[0045] In this embodiment, the dopant ions in the first doped layer 104 are boron ions.

[0046] In this embodiment, the first doped layer 104 is used to adjust the threshold voltage of the transmission transistor.

[0047] In this embodiment, after forming the first doped layer 104, the method further includes forming a second doped layer 105 in the substrate 100, wherein the second doped layer 105 partially overlaps with the first doped layer 104 and extends outward.

[0048] In this embodiment, the second doped layer 105 contains first type ions.

[0049] In this embodiment, the dopant ions in the second doped layer 105 are arsenic ions.

[0050] In this embodiment, the second doped layer 105 and the first doped layer 104 work together to adjust the threshold voltage of the transmission transistor.

[0051] refer to Figure 5 A first photoelectric doped region 106 is formed in the substrate 100, and the first photoelectric doped region 106 is located in the well region 102.

[0052] In this embodiment, the first photoelectric doped region 106 contains a first type of ion.

[0053] In this embodiment, the dopant ions in the first photoelectric doping region 106 are arsenic ions.

[0054] The doping concentration of the first photoelectric doped region 106 is 2.1E12 to 3.1E12 cm⁻¹. -3 .

[0055] In a direction perpendicular to the surface of the substrate 100, the depth of the first photoelectric doped region 106 within the substrate 100 is 0.46 to 0.69 micrometers.

[0056] refer to Figure 6 A second photoelectric doped region 107 is formed in the substrate 100. The second photoelectric doped region 107 is located on the surface of the first photoelectric doped region 106 and extends outward.

[0057] The doped ions in the second photoelectric doped region 107 have the opposite conductivity type to the doped ions in the first photoelectric doped region 106, and the second photoelectric doped region 107 contains a second type of ions.

[0058] In this embodiment, the dopant ions in the second photoelectric doping region 107 are boron fluoride ions.

[0059] The ion doping concentration of the second photoelectric doped region 107 is 1.6E12~2.4E12cm. -3 .

[0060] refer to Figure 7A transmission gate is formed on the substrate 100, and the transmission gate covers a portion of the surface of the first photoelectric doped region 106.

[0061] The transmission gate also covers a portion of the surface of the first doped layer 104 and the second doped layer 105.

[0062] In this embodiment, the transmission gate includes a gate dielectric layer 108 and a gate electrode layer 109 located on the surface of the gate dielectric layer 108.

[0063] In this embodiment, during the formation of the transmission gate, the length of the transmission gate in the direction perpendicular to the extension of the transmission gate is controlled such that the ratio of the length of the overlapping region of the transmission gate and the first photoelectric doped region 106 to the length of the first photoelectric doped region 106 in the direction perpendicular to the extension of the transmission gate is 0.35 to 0.65.

[0064] In this embodiment, by controlling the length of the transmission gate, the length of the first pinning layer can be controlled according to the length of the first photoelectric doped region 106 exposed by the transmission gate during the subsequent formation of the first pinning layer, so that the length of the first pinning layer and the length of the first photoelectric doped region 106 are in a suitable ratio.

[0065] refer to Figure 8 After the transmission gate is formed, a first mask layer 110 is formed on the transmission gate, and the first mask layer 110 exposes the first photoelectric doped region 106 that is not covered by the transmission gate.

[0066] In this embodiment, the material of the first mask layer 110 is a photoresist material; in other embodiments, the material of the first mask layer 110 may also be SiON or silicon dioxide.

[0067] refer to Figure 9 Using the first mask layer 110 as a mask, second type ions are implanted into the substrate 100 to form a first pinning layer 111, which is located on the first photoelectric doping region 106.

[0068] The arrows in the diagram indicate the direction of ion implantation.

[0069] In this embodiment, the implanted ions are boron fluoride ions; the ion implantation concentration is 4E11~6E11cm. -3 The ion implantation energy is 24–36 keV.

[0070] In this embodiment, the first pinning layer 111 is also located within the second photoelectric doping region 107.

[0071] In this embodiment, the first pinning layer 111 has a depth of 0.09 to 0.14 micrometers in the substrate 100 in a direction perpendicular to the surface of the substrate 100.

[0072] In the direction perpendicular to the extension direction of the transmission gate, the ratio of the length d1 of the first pinning layer 111 to the length d2 of the first photoelectric doped region 106 ranges from 0.55 to 0.65. If the ratio of d1 to d2 is greater than 0.65, the potential difference at the edge of the photodiode and the transmission gate will be large, resulting in severe image hysteresis in the formed image sensor; if the ratio of d1 to d2 is less than 0.55, the leakage current in the pixel area will be relatively severe. Therefore, by controlling the lengths of the two to be in an appropriate ratio, the potential difference at the edge of the photodiode and the transmission gate can be significantly reduced, thereby improving the image hysteresis of the formed image sensor.

[0073] refer to Figure 10 After forming the first pinning layer 111, the first mask layer 110 is removed; a second mask layer 112 is formed on the transmission gate, the second mask layer 112 exposing the surface of the substrate 100 on the side of the transmission gate near the pixel isolation structure 101.

[0074] In this embodiment, the material of the second mask layer 112 is a photoresist layer; in other embodiments, the material of the second mask layer 112 may also be SiON or silicon dioxide.

[0075] refer to Figure 11 Using the second mask layer 112 as a mask, first type ions are implanted into the substrate 100 to form a third doped layer 113 in the substrate 100. The third doped layer 113 and the first pinning layer 111 are located on opposite sides of the transmission gate, respectively.

[0076] In this embodiment, the third doped layer 113 partially overlaps with the first doped layer 104 and is located within the second doped layer 105.

[0077] In this embodiment, the implanted ion is a phosphorus ion; the ion implantation concentration is 1.24E13~1.86E13cm. -3 The ion implantation energy is 16–24 keV.

[0078] In this embodiment, the third doped layer 113 serves as a lightly doped layer in the pixel region, which can reduce the hot-load ion implantation effect.

[0079] refer to Figure 12 After forming the third doped layer 113, the process further includes: removing the second mask layer 112; and forming sidewalls 114 on both sides of the transmission gate.

[0080] refer to Figure 13 It also includes: forming a second pinning layer 115 within the substrate 100, the second pinning layer 115 being located within the first pinning layer 111, and the second pinning layer 115 having a second type of ions.

[0081] In this embodiment, the doping ions of the second pinning layer 115 are boron ions, and the ion doping concentration is 1.2E13~1.8E13cm. -3 .

[0082] The second pinning layer 115 serves as the P-type region of the photodiode.

[0083] In this embodiment, a source / drain doped region 116 is formed in the substrate 100 on one side of the transmission gate.

[0084] Accordingly, embodiments of the present invention also provide an image sensor, for reference Figure 5 The image sensor includes: a substrate 100 having a first photoelectric doped region 106 therein, the first photoelectric doped region 106 containing a first type of ions; a transmission gate located on the substrate 100, the transmission gate covering a portion of the first photoelectric doped region 106; and a first pinning layer 111 located on the first photoelectric doped region 106 exposed by the transmission gate, the first pinning layer 111 containing a second type of ions, the second type of ions having the opposite conductivity type to the first type of ions, and in the extension direction perpendicular to the transmission gate, the ratio of the length d1 of the first pinning layer 111 to the length d2 of the first photoelectric doped region 106 is 0.55 to 0.65.

[0085] If the ratio of d1 to d2 is greater than 0.65, the potential difference at the edge of the photodiode and the transmission gate will be large, resulting in severe image hysteresis in the formed image sensor. If the ratio of d1 to d2 is less than 0.55, the leakage current in the pixel area will be relatively severe. Therefore, by controlling the lengths of the two to be in an appropriate ratio, the potential difference at the edge of the photodiode and the transmission gate can be significantly reduced, thereby improving the image hysteresis of the formed image sensor.

[0086] In this embodiment, the first type of ion is an N-type ion, which includes phosphorus ions, arsenic ions, or antimony ions.

[0087] In this embodiment, the second type of ion is a P-type ion, which includes boron ions, boron-fluorine ions, or indium ions.

[0088] The ion doping concentration of the first photoelectric doped region 106 is 2.1E12 to 3.1E12 cm⁻¹. -3 The ion doping concentration in the first pinning layer 111 is 4E11 to 6E11 cm⁻¹.-3 .

[0089] In a direction perpendicular to the surface of the substrate 100, the depth of the first photoelectric doped region 106 within the substrate 100 is 0.46 to 0.69 micrometers.

[0090] In a direction perpendicular to the surface of the substrate 100, the first pinning layer has a depth of 0.09 to 0.14 micrometers within the substrate 100.

[0091] In this embodiment, the transmission gate includes a gate dielectric layer 108 and a gate electrode layer 109 located on the surface of the gate dielectric layer 108.

[0092] In this embodiment, a pixel isolation structure 101 is also included, which is located within the substrate 100. The pixel isolation structure 101 is located on the side of the first photoelectric doped region 106 near the transmission gate.

[0093] In this embodiment, the pixel isolation structure 101 contains a second type of ion.

[0094] In this embodiment, it further includes: a well region 102 located within the substrate 100, the well region 102 being located on one side of the pixel isolation structure 101, and the first photoelectric doped region 106 being located within the well region 102.

[0095] In this embodiment, the sidewall of the well region 102 is in contact with the sidewall of the pixel isolation structure 101.

[0096] In this embodiment, the well region 102 contains first-type ions.

[0097] In this embodiment, it further includes: an isolation doped region 103, which is located within the pixel isolation structure 101.

[0098] The isolation doped region 103 contains second-type ions.

[0099] In this embodiment, it further includes a first doped layer 104, which is located on the surface of the isolation doped region 103 and a portion of the well region 102.

[0100] In this embodiment, the first doped layer 104 contains second type ions.

[0101] In this embodiment, it further includes a second doped layer 105, which partially overlaps with the first doped layer 104 and extends outward.

[0102] In this embodiment, the second doped layer 105 contains first type ions.

[0103] In this embodiment, a second photoelectric doped region 107 is also included, which is located on the surface of the first photoelectric doped region 106 and extends outward.

[0104] The doped ions in the second photoelectric doped region 107 have the opposite conductivity type to the doped ions in the first photoelectric doped region 106, and the second photoelectric doped region 107 contains a second type of ions.

[0105] In this embodiment, the dopant ions in the second photoelectric doping region 107 are boron fluoride ions.

[0106] The ion doping concentration of the second photoelectric doped region 107 is 1.6E12~2.4E12cm. -3 .

[0107] In this embodiment, a third doped layer 113 is further included, wherein the third doped layer 113 and the first pinning layer 111 are located on opposite sides of the transmission gate.

[0108] In this embodiment, the third doped layer 113 partially overlaps with the first doped layer 104 and is located within the second doped layer 105.

[0109] In this embodiment, the doping ions of the third doped layer 113 are phosphorus ions; the ion doping concentration is 1.24E13~1.86E13cm. -3 .

[0110] In this embodiment, it also includes: sidewalls 114, located on substrates 100 on both sides of the transmission gate.

[0111] In this embodiment, it further includes: a second pinning layer 115, which is located within the first pinning layer 111, and contains second type ions.

[0112] In this embodiment, the doping ions of the second pinning layer 115 are boron ions, and the ion doping concentration is 1.2E13~1.8E13cm. -3 .

[0113] In this embodiment, a source / drain doped region 116 is also included, located in the substrate on both sides of the transmission gate.

[0114] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. An image sensor, characterized in that, include: A substrate having a first photoelectric doped region having a first type of ions; The second photoelectric doped region is located on the surface of the first photoelectric doped region and extends outward. The dopant ions in the second photoelectric doped region have the opposite conductivity type to the dopant ions in the first photoelectric doped region. The second photoelectric doped region contains second type ions. A transmission gate is located on the substrate, and the transmission gate covers a portion of the first photoelectric doped region; A first pinning layer is located on the first photoelectric doped region exposed by the transmission gate and within the second photoelectric doped region. The first pinning layer contains second type ions with the opposite conductivity type to the first type ions. In the extension direction perpendicular to the transmission gate, the ratio of the length of the first pinning layer to the length of the first photoelectric doped region is 0.55 to 0.

65.

2. The image sensor as described in claim 1, characterized in that, The first type of ion is an N-type ion, and the second type of ion is a P-type ion.

3. The image sensor as described in claim 1, characterized in that, In a direction perpendicular to the substrate surface, the depth of the first photoelectric doped region is 0.46~0.69 micrometers.

4. The image sensor as described in claim 1, characterized in that, In a direction perpendicular to the substrate surface, the depth of the first pinning layer is 0.09 to 0.14 micrometers.

5. The image sensor as described in claim 1, characterized in that, Also includes: A pixel isolation structure is located on one side of the first photoelectric doped region, and the pixel isolation structure contains a second type of ions.

6. The image sensor as described in claim 5, characterized in that, Also includes: A well region is located within the substrate, and the first photoelectric doped region is located within the well region, wherein the well region contains ions of a first type.

7. The image sensor as claimed in claim 1, characterized in that, The transmission gate includes a gate dielectric layer located on the surface of the substrate and a gate electrode layer located on the surface of the gate dielectric layer.

8. A method for forming an image sensor, characterized in that, include: Provide substrate; A first photoelectric doped region is formed in the substrate, and the first photoelectric doped region contains a first type of ions; A second photoelectric doped region is formed in the substrate. The second photoelectric doped region is located on the surface of the first photoelectric doped region and extends outward. The dopant ions in the second photoelectric doped region have the opposite conductivity type to the dopant ions in the first photoelectric doped region. The second photoelectric doped region contains a second type of ions. A transmission gate is formed on the substrate, the transmission gate covering a portion of the first photoelectric doped region; A first pinning layer is formed on the first photoelectric doped region exposed by the transmission gate. The first pinning layer is also located within the second photoelectric doped region. The first pinning layer contains second type ions with the opposite conductivity type to the first type ions. Along the extension direction perpendicular to the transmission gate, the ratio of the length of the first pinning layer to the length of the first photoelectric doped region is 0.55 to 0.

65.

9. The method for forming an image sensor as described in claim 8, characterized in that, The first type of ion is an N-type ion, and the second type of ion is a P-type ion.

10. The method for forming an image sensor as described in claim 8, characterized in that, In a direction perpendicular to the substrate surface, the depth of the first photoelectric doped region is 0.56~0.6 micrometers.

11. The method for forming an image sensor as described in claim 8, characterized in that, In a direction perpendicular to the substrate surface, the depth of the first pinning layer is 0.11 to 0.13 micrometers.

12. The method for forming an image sensor as described in claim 8, characterized in that, Before forming the first photoelectric doped region, the method further includes: forming a pixel isolation structure within the substrate, wherein the first photoelectric doped region is located on one side of the pixel isolation structure, and the pixel isolation structure contains a second type of ions.

13. The method for forming an image sensor as described in claim 12, characterized in that, After forming the pixel isolation structure and before forming the first photoelectric doped region, the method further includes: forming a well region in the substrate, the well region being located on one side of the pixel isolation structure, the first photoelectric doped region being located within the well region, and the well region having a first type of ions.

14. The method for forming an image sensor as described in claim 8, characterized in that, The method of forming the first pinning layer includes: forming a first mask layer on the transmission gate, the first mask layer exposing the first photoelectric doped region not covered by the transmission gate; implanting second type ions into the substrate using the first mask layer as a mask to form the first pinning layer on the first photoelectric doped region; and removing the first mask layer.