An epitaxial structure of a semiconductor device and a method for manufacturing the same, and a semiconductor device

Abstract

The application discloses an epitaxial structure of a semiconductor device, a preparation method of the epitaxial structure and the semiconductor device. The epitaxial structure of the semiconductor device comprises a substrate and an epitaxial layer located on one side of the substrate. The epitaxial layer comprises at least one back barrier layer. The back barrier layer comprises AlGaN and acceptor doping ions. The acceptor doping ions are used to form acceptor energy levels in the back barrier layer. According to the application, the acceptor energy levels are formed by introducing the acceptor doping ions into the AlGaN back barrier layer, the electrons in the back barrier layer are captured, the current collapse phenomenon is effectively relieved, the leakage current is reduced, and therefore the crystal quality and the device reliability are improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an epitaxial structure of a semiconductor device and its fabrication method, and a semiconductor device. Background Technology

[0002] In recent years, high electron mobility transistors (HEMTs) based on AlGaN / GaN heterojunctions have shown great promise for applications in high-power devices.

[0003] While GaN-based HEMTs have made significant progress, crucial reliability issues persist. Current collapse remains a major obstacle limiting their effectiveness. This phenomenon is described as an increase in dynamic resistance and a decrease in output current when the device is switched on under high gate and drain voltages. Replacing the GaN buffer layer with an AlGaN back barrier layer can effectively mitigate current collapse, but this generates numerous donor dislocations at the interface between the back barrier layer and the nucleation layer. This increases leakage current, leading to a decrease in breakdown voltage and ultimately, malfunction.

[0004] Existing technologies typically improve the breakdown voltage of devices by increasing the composition of the back barrier layer. However, increasing the composition further degrades the crystal quality, leading to lower reliability of the final device. Therefore, how to alleviate current collapse while reducing leakage current has become an urgent problem to be solved. Summary of the Invention

[0005] In view of this, embodiments of the present invention provide an epitaxial structure of a semiconductor device and a method for fabricating the same, as well as a semiconductor device, to provide an epitaxial structure with good crystal quality that can both alleviate current collapse and reduce leakage current.

[0006] In a first aspect, embodiments of the present invention provide an epitaxial structure for a semiconductor device, the epitaxial structure comprising:

[0007] Substrate;

[0008] An epitaxial layer located on one side of the substrate, the epitaxial layer including at least one back barrier layer, the back barrier layer including AlGaN and acceptor doped ions, the acceptor doped ions being used to form acceptor energy levels in the back barrier layer.

[0009] Optionally, the acceptor doped ions include iron ions and / or carbon ions.

[0010] Optionally, the acceptor doped ion includes an iron ion;

[0011] The molar ratio of Al components in the back barrier layer is A, where 0 < A < 20%.

[0012] The iron ion doping concentration is C1, where 0 < C1 ≤ C2, and C2 = -5 * 10⁻⁵. 19 *A+1*10 19 .

[0013] Optionally, the acceptor doped ion includes a carbon ion;

[0014] The molar ratio of Al components in the back barrier layer is A, where 0 < A ≤ 20%;

[0015] The carbon ion doping concentration is C3, where 0 < C3 ≤ C4, and C4 = -5 * 10⁻⁵. 19 *A+1.1001*10 19 .

[0016] Optionally, the back barrier layer includes a first back barrier layer and a second back barrier layer stacked together, wherein the first back barrier layer is located on the side closer to the substrate, and the second back barrier layer is located on the side farther from the substrate.

[0017] At least the first back barrier layer includes the acceptor doped ions.

[0018] Optionally, the molar ratio of Al components in the first back barrier layer is greater than or equal to the molar ratio of Al components in the second back barrier layer.

[0019] Optionally, along the first direction, the molar ratio of the Al component in the first back barrier layer remains constant or gradually decreases;

[0020] The molar ratio of Al components in the second back barrier layer remains constant or gradually decreases;

[0021] The first direction is parallel to the direction in which the substrate points to the epitaxial layer.

[0022] Optionally, the epitaxial layer further includes a nucleation layer located on the side of the back barrier layer near the substrate;

[0023] A channel layer located on the side of the back barrier layer away from the substrate;

[0024] A spacer layer located on the side of the channel layer away from the substrate;

[0025] A barrier layer located on the side of the spacer layer away from the substrate, the barrier layer and the channel layer forming a heterojunction structure;

[0026] A capping layer located on the side of the barrier layer away from the substrate.

[0027] In a second aspect, embodiments of the present invention provide a semiconductor device comprising the epitaxial structure described in the first aspect, wherein the epitaxial structure comprises a substrate and a nucleation layer, a back barrier layer, a channel layer, a spacer layer, a barrier layer, and a capping layer sequentially located on one side of the substrate.

[0028] The semiconductor device further includes:

[0029] The source and drain are located on the side of the barrier layer away from the substrate:

[0030] A gate located on the side of the capping layer away from the substrate, the gate being situated between the source and the drain.

[0031] Thirdly, embodiments of the present invention provide a method for fabricating an epitaxial structure of a semiconductor device, used to fabricate the epitaxial structure described in the first aspect, the method comprising:

[0032] Provide substrate;

[0033] An epitaxial layer is prepared on one side of the substrate. The epitaxial layer includes at least one back barrier layer, which includes AlGaN and acceptor dopants. The acceptor dopants are used to form acceptor energy levels in the back barrier layer.

[0034] Optionally, an epitaxial layer is formed on one side of the substrate, including:

[0035] A core layer is prepared on one side of the substrate;

[0036] A back barrier layer is prepared on the side of the nucleation layer away from the substrate;

[0037] A channel layer is prepared on the side of the back barrier layer away from the substrate;

[0038] A spacer layer is prepared on the side of the channel layer away from the substrate;

[0039] A barrier layer is prepared on the side of the spacer layer away from the substrate, and the barrier layer and the channel layer form a heterojunction structure;

[0040] A capping layer is prepared on the side of the barrier layer away from the substrate.

[0041] Optionally, a back barrier layer is formed on the side of the nucleation layer away from the substrate, comprising:

[0042] A growth gas is introduced in a pulsed manner to grow a back barrier layer on the side of the nucleation layer away from the substrate.

[0043] The epitaxial structure and fabrication method of the semiconductor device provided in this invention, and the semiconductor device, by setting the epitaxial layer including at least one back barrier layer, wherein the back barrier layer includes AlGaN and acceptor dopants, the acceptor dopants are introduced into the AlGaN back barrier layer to form acceptor energy levels, trapping electrons in the back barrier layer, effectively alleviating the current collapse phenomenon and reducing leakage current, thereby improving crystal quality and device reliability. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, although the drawings described below are some specific embodiments of the present invention, those skilled in the art can extend and extend the basic concepts of the device structure, driving method and manufacturing method disclosed and indicated by various embodiments of the present invention to other structures and drawings. Undoubtedly, these should all be within the scope of the claims of the present invention.

[0045] Figure 1 This is a schematic diagram of the epitaxial structure of a semiconductor device provided in Embodiment 1 of the present invention;

[0046] Figure 2 This is a schematic diagram of the molar ratio of Al components in a first back barrier layer and a second back barrier layer along a first direction, provided in Embodiment 1 of the present invention.

[0047] Figure 3 This is a schematic diagram of the structure of a semiconductor device provided in Embodiment 2 of the present invention;

[0048] Figure 4 This is a flowchart of a method for fabricating an epitaxial structure of a semiconductor device according to Embodiment 3 of the present invention;

[0049] Figure 5 This is a flowchart of another method for preparing the epitaxial structure of a semiconductor device provided in Embodiment 3 of the present invention. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of this invention. Obviously, the described embodiments are only some embodiments of this invention, not all embodiments. Based on the basic concepts disclosed and indicated in the embodiments of this invention, all other embodiments obtained by those skilled in the art are within the scope of protection of this invention.

[0051] Example 1

[0052] Figure 1This is a schematic diagram of the epitaxial structure of a semiconductor device provided in Embodiment 1 of the present invention, as shown below. Figure 1 As shown, the epitaxial structure of the semiconductor device provided in this embodiment includes: a substrate 100; an epitaxial layer 200 located on one side of the substrate, the epitaxial layer 200 including at least one back barrier layer 220, the back barrier layer 220 including AlGaN and acceptor doped ions, the acceptor doped ions being used to form acceptor energy levels in the back barrier layer 220.

[0053] Compared to GaN, AlGaN has a larger bandgap and a higher critical breakdown electric field. Therefore, using a back barrier layer 220 including AlGaN can give the device better carrier confinement and pinch-off characteristics, thereby effectively mitigating current collapse. Furthermore, to reduce leakage current, this embodiment of the invention introduces acceptor doped ions, such as carbon ions, into the back barrier layer 220 to form acceptor energy levels. These acceptor energy levels can trap free electrons in the back barrier layer 220, thereby achieving a high-resistivity back barrier layer 220 and further reducing leakage current.

[0054] The epitaxial layer 200 may include a single back barrier layer 220 or multiple back barrier layers 220. Those skilled in the art can choose to configure it according to actual needs, and the embodiments of the present invention do not limit it in this regard.

[0055] Furthermore, the specific types of the substrate 100 and the epitaxial layer 200 are not limited. For example, the substrate 100 can be one or more of gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, indium phosphide, gallium arsenide, silicon carbide, diamond, sapphire, germanium, and silicon, or any other material capable of growing group III nitrides. The epitaxial layer 200 can include semiconductor materials based on group III-V compounds.

[0056] The epitaxial structure of the semiconductor device provided in this embodiment of the invention includes at least one back barrier layer in the epitaxial layer, and the back barrier layer includes AlGaN and acceptor doped ions. Acceptor doped ions are introduced into the AlGaN back barrier layer to form acceptor energy levels, which capture electrons in the back barrier layer, effectively alleviate the current collapse phenomenon and reduce leakage current, thereby improving crystal quality and device reliability.

[0057] Optionally, the acceptor doped ions may include iron ions and / or carbon ions.

[0058] The acceptor doped ions in the back barrier layer 220 can be either iron ions or carbon ions, or a combination of iron ions and carbon ions. By adjusting the doping concentration or concentration ratio of iron ions and carbon ions, acceptor energy levels can be formed in the back barrier layer 220, thereby capturing free electrons in the back barrier layer 220, increasing the breakdown voltage, and reducing leakage current.

[0059] It should be noted that the acceptor doped ions in this embodiment of the invention are only used as examples of iron ions and carbon ions and are not limited thereto. The acceptor doped ions can also be other ions, as long as an acceptor energy level is formed in the back barrier layer 220, which can capture free electrons in the back barrier layer 220. This embodiment of the invention does not limit the specific type of acceptor doped ions.

[0060] Optionally, the acceptor dopant ion may include iron ions; the molar ratio of Al components in the back barrier layer 220 is A, 0 < A < 20%; the doping concentration of iron ions is C1, where 0 < C1 ≤ C2, and C2 = -5 * 10⁻⁵. 19 *A+1*10 19 .

[0061] For example, setting the molar ratio A of the Al component in the back barrier layer 220 to satisfy 0 < A < 20% can effectively buffer current collapse and ensure that the epitaxial structure of the semiconductor device has good carrier confinement and pinch-off characteristics. Furthermore, setting the iron ion doping concentration C1 to satisfy 0 < C1 ≤ -5 * 10⁻⁵ 19 *A+1*10 19 This ensures that an appropriate number of acceptor dopant ions are introduced into the back barrier layer 220 to form acceptor energy levels. These acceptor energy levels can trap free electrons in the back barrier layer 220, increasing the breakdown voltage of the epitaxial structure, reducing leakage current, and further improving the performance of the semiconductor device. It should be noted that the specific doping concentration of iron ions is not limited in this embodiment of the invention; it is only necessary to ensure that the molar ratio A of the iron ion doping concentration C1 to the Al component satisfies 0 < C1 ≤ -5 * 10⁻⁵. 19 *A+1*10 19 For example, the iron ion doping concentration C1 can be 2*10. 18 Or 5*10 18 wait.

[0062] Optionally, the acceptor dopant ion may include carbon ions; the molar ratio of Al components in the back barrier layer 220 is A, where 0 < A ≤ 20%; the carbon ion doping concentration is C3, where 0 < C3 ≤ C4, and C4 = -5 * 10⁻⁵. 19 *A+1.1001*10 19 .

[0063] For example, setting the molar ratio A of the Al component in the back barrier layer 220 to satisfy 0 < A ≤ 20% can effectively buffer current collapse and ensure that the epitaxial structure of the semiconductor device has good carrier confinement and pinch-off characteristics. Furthermore, setting the carbon ion doping concentration C3 to satisfy 0 < C3 ≤ -5 * 10⁻⁵ 19 *A+1.1001*10 19This ensures that an appropriate number of acceptor dopant ions are introduced into the back barrier layer 220 to form acceptor energy levels. These acceptor energy levels can trap free electrons in the back barrier layer 220, increasing the breakdown voltage of the epitaxial structure, reducing leakage current, and further improving the performance of the semiconductor device. It should be noted that the specific doping concentration of carbon ions is not limited in this embodiment of the invention; it is only necessary to ensure that the molar ratio A of the carbon ion doping concentration C3 to the Al component satisfies 0 < C3 ≤ -5 * 10⁻⁵. 19 *A+1.1001*10 19 For example, the carbon ion doping concentration C3 can be 1*10. 16 Or 4*10 15 wait.

[0064] The specific film structure of the back barrier layer 220 will be described next.

[0065] Optionally, the back barrier layer 220 may include a first back barrier layer 221 and a second back barrier layer 222 stacked together, with the first back barrier layer 221 located on the side closer to the substrate 100 and the second back barrier layer 222 located on the side away from the substrate 100; at least the first back barrier layer 221 includes acceptor doped ions.

[0066] refer to Figure 1 In this embodiment, the back barrier layer 220 includes a first back barrier layer 221 and a second back barrier layer 222 stacked sequentially. Both the first back barrier layer 221 and the second back barrier layer 222 contain AlGaN, which can effectively alleviate current collapse and improve the device pinch-off characteristics. Compared with the second back barrier layer 222, the first back barrier layer 221, which is closer to the substrate 100, has more dislocations and more free electrons, making it prone to leakage. Therefore, the first back barrier layer 221 needs to introduce acceptor doped ions to increase the breakdown voltage and reduce leakage.

[0067] Furthermore, since the leakage current has been reduced after the first back barrier layer 221 is doped, there are fewer free electrons in the second back barrier layer 222. Moreover, the more doped, the worse the crystal quality, which affects the reliability of subsequent devices. Therefore, the second back barrier layer 222 can be doped with a small amount or even not doped. Those skilled in the art can comprehensively consider the leakage current effect and crystal quality issues and reasonably set the concentration of acceptor doped ions in the second back barrier layer 222. This embodiment of the invention does not limit this.

[0068] In addition, when the epitaxial layer 200 includes only one back barrier layer 220, the region of the back barrier layer 220 near the substrate 100 may include acceptor doped ions, and the region of the back barrier layer 220 away from the substrate 100 may be lightly doped or undoped, that is, the region of the back barrier layer 220 near the substrate 100 may include acceptor doped ions.

[0069] In this embodiment, by setting a first back barrier layer 221 near the substrate 100 including acceptor doped ions and a second back barrier layer 222 away from the substrate 100 with little or no doping, the doping is minimized while solving the leakage problem, which can further improve the crystal quality and enhance the reliability of the device.

[0070] Optionally, the molar ratio of the Al component in the first back barrier layer 221 is greater than or equal to the molar ratio of the Al component in the second back barrier layer 222.

[0071] Specifically, a channel layer 230 is typically disposed on the side of the back barrier layer 220 away from the substrate 100 to improve the interface quality at the two-dimensional electron gas channel, thereby obtaining better two-dimensional electron gas concentration and mobility. If the Al content in the back barrier layer 220 near the channel layer 230 is too high, the mobility of the two-dimensional electron gas will be significantly reduced; if the Al content in the back barrier layer 220 is too low, it will reduce the bandgap of the back barrier layer 220, which is not conducive to increasing the confinement capability of the two-dimensional electron gas, resulting in leakage. Therefore, the Al composition of the second back barrier layer 222 on the side closer to the channel layer 230 in the back barrier layer 220 can be set to be lower, and the Al composition of the first back barrier layer 221 on the side farther from the channel layer 230 can be set to be higher. That is, the molar ratio of Al composition in the first back barrier layer 221 is set to be greater than the molar ratio of Al composition in the second back barrier layer 222. This improves the confinement capability of the two-dimensional electron gas, reduces the leakage current of the back barrier layer 220 of the semiconductor device and increases the breakdown voltage, while reducing lattice strain, reducing piezoelectric polarization, preventing the performance degradation of the semiconductor device, and thus improving the stability and reliability of the semiconductor device.

[0072] Furthermore, to simplify the process and enhance its controllability, the molar ratio of the Al component in the first back barrier layer 221 can be set to be equal to the molar ratio of the Al component in the second back barrier layer 222. Those skilled in the art can choose to set this according to actual conditions and needs.

[0073] Based on the above embodiments, along the first direction, the molar ratio of Al components in the first back barrier layer 221 remains unchanged or gradually decreases; the molar ratio of Al components in the second back barrier layer 222 remains unchanged or gradually decreases; the first direction is parallel to the direction from the substrate 100 to the epitaxial layer 200.

[0074] Provided that the molar ratio of Al components in the first back barrier layer 221 is greater than or equal to the molar ratio of Al components in the second back barrier layer 222, along the first direction (parallel to the direction from the substrate 100 to the epitaxial layer 200), the molar ratios of Al components in the first back barrier layer 221 and the second back barrier layer 222 can also be set to remain constant and equal to simplify the process and enhance controllability; or the molar ratio of Al components in at least one of the first back barrier layer 221 and the second back barrier layer 222 can be set to gradually decrease to reduce the Al component in the back barrier layer 220, improve crystal quality, and enhance device reliability. For example, Figure 2 This is a schematic diagram of the molar ratio of Al components in the first back barrier layer 221 and the second back barrier layer 222 along the first direction, provided in Embodiment 1 of the present invention. (Refer to...) Figure 2 Along the first direction, the molar ratio of Al components in the first back barrier layer 221 remains unchanged at 10%, while the molar ratio of Al components in the second back barrier layer 222 decreases linearly from 10% to 0.

[0075] Based on the above embodiments, the epitaxial layer 200 further includes a nucleation layer 210 located on the side of the back barrier layer 220 close to the substrate 100; a channel layer 230 located on the side of the back barrier layer 220 away from the substrate 100; a spacer layer 240 located on the side of the channel layer 230 away from the substrate 100; a barrier layer 250 located on the side of the spacer layer 240 away from the substrate 100, wherein the barrier layer 250 and the channel layer 230 form a heterojunction structure; and a capping layer 260 located on the side of the barrier layer 250 away from the substrate 100.

[0076] refer to Figure 1 Along the direction from the substrate 100 to the epitaxial layer 200, the epitaxial layer 200 includes a nucleation layer 210, a back barrier layer 220, a channel layer 230, a spacer layer 240, a barrier layer 250, and a capping layer 260 stacked sequentially.

[0077] The nucleation layer 210 affects the crystal quality, surface morphology, and electrical properties of other films located above the nucleation layer 210 in the epitaxial layer 200. The nucleation layer 210 mainly serves to match the semiconductor material layer in the heterojunction structure of the substrate 100 and the epitaxial layer 200.

[0078] The channel layer 230 can be a GaN channel layer, which is used to improve the interface quality at the two-dimensional electron gas channel to obtain better two-dimensional electron gas concentration and mobility.

[0079] Spacer layer 240 can be an AlN spacer layer, and spacer layer 123 can raise the potential barrier, increase the confinement of the two-dimensional electron gas, reduce alloy scattering, and improve mobility.

[0080] The barrier layer 250 can be an AlGaN barrier layer. The barrier layer 250 and the channel layer 230 together form a heterojunction structure, so that the channel layer 230 can provide a channel for the movement of two-dimensional electron gas.

[0081] The main function of the capping layer 260 is to reduce surface states, reduce surface leakage current in subsequent semiconductor devices, and suppress current collapse, thereby improving the performance and reliability of the epitaxial structure and semiconductor devices. Optionally, the material of the capping layer 260 is a group III nitride, preferably p-type doped gallium nitride (P-GaN). The P-GaN structure can effectively reduce the barrier height of the AlGaN layer.

[0082] Example 2

[0083] Based on the same inventive concept, embodiments of the present invention also provide a semiconductor device, which includes the epitaxial structure of the semiconductor device provided in any embodiment of the present invention. Figure 3 This is a schematic diagram of the structure of a semiconductor device provided in Embodiment 2 of the present invention, as shown below. Figure 3 As shown, the epitaxial structure of the semiconductor device includes a substrate 100 and a nucleation layer 210, a back barrier layer 220, a channel layer 230, a spacer layer 24, a barrier layer 250, and a capping layer 260 sequentially located on one side of the substrate 100; the semiconductor device also includes a source 300 and a drain 400 located on the side of the barrier layer 250 away from the substrate 100; and a gate 500 located on the side of the capping layer 260 away from the substrate 100, with the gate 500 located between the source 300 and the drain 400.

[0084] For example, source 300 and drain 400 are located on the side of barrier layer 250 away from substrate 100, and source 300 and drain 400 form ohmic contacts with barrier layer 250, respectively. Gate 500 is located between source 300 and drain 400, and on the side of capping layer 260 away from substrate 100, and gate 500 forms a Schottky contact with capping layer 260.

[0085] It should be understood that the embodiments of the present invention improve the crystal quality of the nucleation layer from the perspective of semiconductor device structure design, while ensuring that the thermal resistance of the nucleation layer in the semiconductor device remains unchanged. Semiconductor devices include, but are not limited to: high-power gallium nitride high electron mobility transistors (HEMTs) operating under high voltage and high current conditions; silicon-on-insulator (SOI) transistors; gallium arsenide (GaAs)-based transistors; and metal-oxide-semiconductor field-effect transistors (MOSFETs), metal-insulator-semiconductor field-effect transistors (MISFETs), double heterojunction field-effect transistors (DHFETs), junction field-effect transistors (JFETs), metal-semiconductor field-effect transistors (MESFETs), and metal-insulator-semiconductor heterojunction field-effect transistors (MESFETs). Transistor (MISHFET) or other field-effect transistors.

[0086] The semiconductor device provided in this invention comprises an epitaxial layer including at least one back barrier layer, wherein the back barrier layer includes AlGaN and acceptor dopants. Acceptor dopants are introduced into the AlGaN back barrier layer to form acceptor energy levels, trapping electrons in the back barrier layer. This effectively alleviates current collapse and reduces leakage current, thereby improving crystal quality and device reliability. A nucleation layer matches the substrate material and the semiconductor material layer in the heterojunction structure of the epitaxial layer. A channel layer improves the interface quality at the two-dimensional electron gas channel, obtaining better two-dimensional electron gas concentration and mobility. A spacer layer raises the barrier, increasing the confinement of the two-dimensional electron gas while reducing alloy scattering and improving mobility. The barrier layer and channel layer together form a heterojunction structure, creating a channel for the movement of the two-dimensional electron gas. A capping layer reduces surface states, decreasing surface leakage current in the subsequent semiconductor device and suppressing current collapse, thereby improving the performance and reliability of the epitaxial structure and the semiconductor device.

[0087] Example 3

[0088] Based on the same inventive concept, this invention also provides a method for preparing an epitaxial structure of a semiconductor device, which can prepare the epitaxial structure of the semiconductor device provided in any embodiment of this invention. Figure 4 This is a flowchart of a method for fabricating an epitaxial structure of a semiconductor device according to Embodiment 3 of the present invention, as shown below. Figure 4 As shown, the preparation method includes:

[0089] S100, provides a substrate.

[0090] The substrate fabrication method and material are not limited. For example, the substrate fabrication method may be atmospheric pressure chemical vapor deposition, sub-atmospheric pressure chemical vapor deposition, organometallic compound vapor deposition, low-pressure chemical vapor deposition, high-density plasma chemical vapor deposition, ultra-high vacuum chemical vapor deposition, plasma-enhanced chemical vapor deposition, catalytic chemical vapor deposition, hybrid physical-chemical vapor deposition, rapid thermochemical vapor deposition, vapor phase epitaxy, pulsed laser deposition, ion layer epitaxy, molecular beam epitaxy, sputtering, or evaporation. The substrate material may be one or more combinations of gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, indium phosphide, gallium arsenide, silicon carbide, diamond, sapphire, germanium, and silicon, or any other material capable of growing group III nitrides.

[0091] S200. An epitaxial layer is prepared on one side of the substrate. The epitaxial layer includes at least one back barrier layer. The back barrier layer includes AlGaN and acceptor dopants. The acceptor dopants are used to form acceptor energy levels in the back barrier layer.

[0092] The back barrier layer, comprising AlGaN, effectively mitigates current collapse and enhances the pinch-off characteristics of the device. Furthermore, acceptor doped ions are introduced into the back barrier layer to form acceptor energy levels. These acceptor energy levels can trap free electrons in the back barrier layer, thereby achieving a high-resistivity back barrier layer and reducing leakage current.

[0093] The method for fabricating the epitaxial structure of a semiconductor device provided in this invention involves setting the epitaxial layer of the semiconductor device to include at least one back barrier layer, wherein the back barrier layer includes AlGaN and acceptor dopants. Acceptor dopants are introduced into the AlGaN back barrier layer to form acceptor energy levels, thereby trapping electrons in the back barrier layer. This effectively alleviates the current collapse phenomenon and reduces leakage current, thereby improving crystal quality and device reliability.

[0094] Figure 5 This is a flowchart of another method for fabricating the epitaxial structure of a semiconductor device provided in Embodiment 3 of the present invention, referred to... Figure 5 Optionally, in step S200, an epitaxial layer is prepared on one side of the substrate, including:

[0095] S210, A nucleation layer is prepared on one side of the substrate.

[0096] S220. Prepare a back barrier layer on the side of the nucleation layer away from the substrate.

[0097] S230. Prepare a channel layer on the side of the back barrier layer away from the substrate.

[0098] S240. Prepare a spacer layer on the side of the channel layer away from the substrate.

[0099] S250. A barrier layer is prepared on the side of the spacer layer away from the substrate, and the barrier layer and the channel layer form a heterojunction structure.

[0100] S260. Prepare a capping layer on the side of the barrier layer away from the substrate.

[0101] The method for fabricating the epitaxial structure of a semiconductor device provided in this invention involves: matching the substrate material with the nucleation layer and the semiconductor material layer in the heterojunction structure of the epitaxial layer; effectively mitigating current collapse and reducing leakage current through the back barrier layer, thereby improving crystal quality and device reliability; improving the interface quality at the two-dimensional electron gas channel through the channel layer, resulting in better two-dimensional electron gas concentration and mobility; raising the barrier through the spacer layer, increasing the confinement of the two-dimensional electron gas, and reducing alloy scattering, thereby improving mobility; forming a heterojunction structure together with the barrier layer and the channel layer, forming a movement channel for the two-dimensional electron gas; and reducing surface states through the capping layer, thereby reducing surface leakage current in the subsequent semiconductor device and suppressing current collapse, thus improving the performance and reliability of the epitaxial structure and the semiconductor device.

[0102] Optionally, a back barrier layer is prepared on the side of the nucleation layer away from the substrate, including:

[0103] Growth gas is introduced in a pulsed manner to grow a back barrier layer on the side of the nucleation layer away from the substrate.

[0104] During the fabrication of the back barrier layer, the growth gas, such as ammonia, is introduced into the cavity in a pulsed manner, which can effectively improve the crystal quality of the AlGaN back barrier layer, thereby improving the performance and reliability of the epitaxial structure and device.

[0105] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. An epitaxial structure for a semiconductor device, characterized in that, include: Substrate; An epitaxial layer located on one side of the substrate, the epitaxial layer including at least one back barrier layer, the back barrier layer including AlGaN and acceptor doped ions, the acceptor doped ions being used to form acceptor energy levels in the back barrier layer; When the acceptor doped ion includes an iron ion: The molar ratio of Al components in the back barrier layer is A, where 0 < A < 20%; The iron ion doping concentration is C1, where 0 < C1 ≤ C2, and C2 = -5 × 10⁻⁵. 19 ×A+1×10 19 ;or, When the acceptor doped ion includes a carbon ion: The molar ratio of Al components in the back barrier layer is A, where 0 < A ≤ 20%; The carbon ion doping concentration is C3, where 0 < C3 ≤ C4, and C4 = -5 × 10⁻⁵. 19 ×A+1.1001×10 19 ; The back barrier layer includes a first back barrier layer and a second back barrier layer stacked together. The first back barrier layer is located on the side closer to the substrate, and the second back barrier layer is located on the side farther from the substrate. The molar ratio of Al components in the first back barrier layer is greater than the molar ratio of Al components in the second back barrier layer. Along a first direction, the molar ratio of Al components in the first back barrier layer remains constant or gradually decreases. The molar ratio of Al components in the second back barrier layer remains constant or gradually decreases. The first direction is parallel to the direction from the substrate to the epitaxial layer.

2. The epitaxial structure according to claim 1, characterized in that, The acceptor doped ions include iron ions and / or carbon ions.

3. The epitaxial structure according to claim 1, characterized in that, At least the first back barrier layer includes the acceptor doped ions.

4. The epitaxial structure according to claim 1, characterized in that, The epitaxial layer also includes a nucleation layer located on the side of the back barrier layer near the substrate; A channel layer located on the side of the back barrier layer away from the substrate; A spacer layer located on the side of the channel layer away from the substrate; A barrier layer located on the side of the spacer layer away from the substrate, the barrier layer and the channel layer forming a heterojunction structure; A capping layer located on the side of the barrier layer away from the substrate.

5. A semiconductor device, characterized in that, The epitaxial structure includes any one of claims 1-4, wherein the epitaxial structure includes a substrate and a nucleation layer, a back barrier layer, a channel layer, a spacer layer, a barrier layer and a capping layer sequentially located on one side of the substrate; The semiconductor device further includes: The source and drain are located on the side of the barrier layer away from the substrate: A gate located on the side of the capping layer away from the substrate, the gate being situated between the source and the drain.

6. A method for fabricating an epitaxial structure of a semiconductor device, used to fabricate the epitaxial structure according to any one of claims 1-4, characterized in that, include: Provide substrate; An epitaxial layer is prepared on one side of the substrate. The epitaxial layer includes at least one back barrier layer, which includes AlGaN and acceptor dopants. The acceptor dopants are used to form acceptor energy levels in the back barrier layer.

7. The preparation method according to claim 6, characterized in that, An epitaxial layer is prepared on one side of the substrate, including: A core layer is prepared on one side of the substrate; A back barrier layer is prepared on the side of the nucleation layer away from the substrate; A channel layer is prepared on the side of the back barrier layer away from the substrate; A spacer layer is prepared on the side of the channel layer away from the substrate; A barrier layer is prepared on the side of the spacer layer away from the substrate, and the barrier layer and the channel layer form a heterojunction structure; A capping layer is prepared on the side of the barrier layer away from the substrate.

8. The preparation method according to claim 7, characterized in that, A back barrier layer is prepared on the side of the nucleation layer away from the substrate, comprising: A growth gas is introduced in a pulsed manner to grow a back barrier layer on the side of the nucleation layer away from the substrate.

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