Reference voltage generator within an integrated assembly

Abstract

This application relates to reference voltage generators within integrated assemblies. Some embodiments include an integrated assembly having a memory region with memory cells and sense / access lines configured for addressing the memory cells, and having a reference voltage generator proximate to the memory region. The reference voltage generator includes resistive elements configured substantially the same as the sense / access lines. Some embodiments include an integrated assembly having a memory region with memory cells, digit lines, and word lines. Each of the memory cells is uniquely addressed with one of the word lines and one of the digit lines. The word lines are coupled with driver circuitry, and the digit lines are coupled with sense circuitry. A reference voltage generator is proximate to the memory region. The reference voltage generator includes resistive elements configured substantially the same as the word lines, and / or includes resistive elements configured substantially the same as the digit lines.

Description

Technical Field

[0001] This application relates to integrated assemblies and reference voltage generators. Background Technology

[0002] Integrated circuits can use reference voltages in many applications. For example, reference voltages can be coupled to capacitor plates, shielding wires, data sensing amplifiers, etc.

[0003] A suitable method may be needed to generate a reference voltage (VREF) so that the reference voltage is accurate and controllable. Refer to Figure 1 for an example reference voltage generator 1000.

[0004] The reference voltage generator 1000 includes several resistor assemblies 1002 arranged in series between the VDD power supply terminal 1004 and the VSS power supply terminal 1006. The resistor assemblies are coupled to a feed line 1010 associated with a gain buffer 1012 via a switch 1008. VREF is the output from the gain buffer.

[0005] Switch 1008 can be used to control the number of resistor components 1002 electrically coupled to feeder 1010, and thus control the VREF output from gain buffer 1012. Switch 1008, feeder 1010 and gain buffer 1012 can be considered as an example of a reference voltage generation circuit system; or in other words, an example of a circuit system coupled to resistor components 1002 within reference voltage generator 1000.

[0006] In some applications, integrated circuits may include memory. (Reference) Figures 2 to 6 Describe an example of existing technology memory configuration.

[0007] Figure 2 This section shows the area of ​​memory configuration 1100. The example area contains memory cell 1110 on digital line 1112.

[0008] The memory cell includes a capacitor 1108 coupled to a transistor (access device) 1106.

[0009] Transistor 1106 includes a semiconductor pillar 1104 and a gate structure 1102 adjacent to the pillar 1104. Structure 1102 is spaced apart from the pillar 1104 by a gate dielectric material 1105.

[0010] Pillar 1104 comprises a semiconductor material, such as silicon. Gating structure 1102 selectively controls the current passing through pillar 1104, and thus controls the electrical coupling between capacitor 1108 and digital line 1112.

[0011] Gating structure 1102 along relative to Figure 2 The cross-section extends into and out of the page's text lines 1114. Figure 2AA top view of memory configuration 1100 is shown, illustrating the relationship between word line 1114 and digital line 1112; specifically, it is shown that word line 1114 may correspond to a first series of linear structures extending along a first direction, and digital line 1112 may correspond to a second series of linear structures extending along a second direction, the second direction being substantially orthogonal to the first direction (where the term "substantially orthogonal" means orthogonal within reasonable manufacturing and measurement tolerances). Digital line 1112 in... Figure 2A The dashed line view is shown in the middle to indicate that it is below the word line 1114.

[0012] It should be noted that Figure 2 An example word line 1114 is shown, branching into two segments on opposite sides of semiconductor pillar 1104. In other applications, word lines may have other configurations, including, for example, a full-around-the-gate configuration, a word line configuration that runs only along one side of the semiconductor pillar, etc. Figure 2A To simplify the configuration of the character line 1114, each character line comprises a single segment rather than Figure 2 The forked segment. However, it should be understood that... Figure 2A The simplified configuration can generally represent any suitable word line configuration, including, for example... Figure 2 The configuration of the forked segments.

[0013] Figure 2A Memory cell 1110 is not shown in the diagram for simplification. However, it should be understood that each memory cell will be uniquely addressed by one of the digital lines 1112 combined with one of the word lines 1114. In practice, memory configuration 1100 may correspond to a memory array comprising hundreds, thousands, hundreds of thousands, millions, or even hundreds of millions of memory cells 1110, and including a suitable number of digital lines 1112 and word lines 1114. Figure 2A The number line 1112 and word line 1114 can be understood as extending in a generally horizontal direction, with word line 1114 extending along the described x-axis direction and number line 1112 extending along the described y-axis direction.

[0014] Figure 2B A portion of memory area 1100 is shown along a cross-sectional side view, where word line 1114 is illustrated separately from digital line 1112. Similar to... Figure 2A The representation used in the text, individual word lines 1114 in Figure 2B It is displayed as a single fragment.

[0015] Word line 1114 is supported above substrate 1116. Such substrate may include insulating material, and in some embodiments, may include insulating material above a semiconductor substrate (as described below). Figure 4Define the term "semiconductor substrate". The substrate 1116 extends in a generally horizontal direction. The word line 1114 also extends in a generally horizontal direction, wherein this direction is relative to... Figure 2B The view enters and exits the page. In some applications, Figure 2B The word lines 1114 can be considered in a planar orientation, where all the word lines are along a horizontal plane that is substantially the same as each other.

[0016] Figure 3 illustrates another example of a memory configuration 1200. A transistor (access device) 1206 comprises horizontally extending segments of semiconductor material 1204, wherein such segments include source / drain regions 1238 and 1240 and a channel region 1242. A capacitor 1208 is coupled to the transistor 1206 via conductive interconnects 1244. In some applications, the conductive interconnects may be considered as part of the capacitor and, for example, as part of a storage node of such a capacitor.

[0017] Memory cell 1210 includes transistor 1206 and capacitor 1208. The memory cells are arranged within a memory configuration (memory array) 1200, wherein such an array has rows 1224 extending along the illustrated z-axis direction and columns 1246 extending along the illustrated x-axis direction. Digital lines 1212 extend along column 1246 and are coupled to the source / drain regions 1238 of transistor 1206. Word lines 1214 extend along row 1224 of the memory array and are adjacent to the channel region 1242 of transistor 1206. In the illustrated embodiment, each of the word lines includes two segments located on opposite sides of the channel region 1242. In other embodiments, word lines may include other suitable configurations and may, for example, include a single component only on one side of the channel region, or may include a full-around-gate configuration, etc.

[0018] Word line 1214 can be accessed through a similar method Figure 2 The gate dielectric material of material 1105 is spaced apart from the channel region 1242, but such gate dielectric material is not shown in FIG3 for the sake of simplifying the diagram.

[0019] The body region (channel region) 1242 of transistor 1206 is coupled to a conductive plate 1248. Such a plate can be used to allow excess carriers (e.g., holes) to drain from the body region 1242 during some operating modes of memory cell 1210.

[0020] Figure 4 The figure shows a cross-sectional side view of assembly 1200 along the y-axis, illustrating some of the structures described above with reference to Figure 3. Transistor 1206 is shown extending horizontally along the y-axis. Word line 1214 is shown extending vertically along the z-axis, and digital line 1212 is shown relative to... Figure 4The cross-sectional view extends horizontally into and out of the page. Figure 4 The conductive plate 1248 (Figure 3) is not shown in the figure to simplify the illustration.

[0021] The capacitors 1208 of the horizontally adjacent memory cells 1210 are shown as shared. Figure 4 The plate electrode 1250 in the memory configuration 1200.

[0022] Substrate 1216 supports components of memory configuration 1200. Such substrates may include semiconductor materials and may include, for example, monocrystalline silicon, be primarily composed of monocrystalline silicon, or be composed entirely of monocrystalline silicon. Substrate 1216 may be referred to as a semiconductor substrate. The term "semiconductor substrate" means any construction comprising a semiconducting material, including, but not limited to: bulk semiconducting material, such as a semiconducting wafer (alone or in a combination of other materials); and a layer of semiconducting material (alone or in a combination of other materials). The term "substrate" means any support structure, including, but not limited to, the semiconductor substrate described above. In some applications, substrate 1216 may correspond to a semiconductor substrate containing one or more materials associated with integrated circuit manufacturing. Such materials may include, for example, one or more of refractory metal materials, barrier materials, diffusion materials, insulating materials, etc.

[0023] Figure 5 Another example of memory configuration 1300 is shown. Transistor (access device) 1306 includes horizontally extending segments of semiconductor material 1304, wherein such segments include source / drain regions 1338 and 1340 and a channel region 1342. Capacitor 1308 is coupled to transistor 1306 via conductive interconnect 1344. In some applications, the conductive interconnect may be considered as part of the capacitor, and may be considered, for example, as part of a storage node of such a capacitor.

[0024] Memory cell 1310 includes transistor 1306 and capacitor 1308. The memory cell is arranged within a memory configuration (memory array) 1300. Digital line 1312 extends along a column of the memory array and is coupled to the source / drain region 1338 of transistor 1306. The digital line extends vertically along the z-axis.

[0025] Word line 1314 extends along the rows of the memory array and is adjacent to the channel region 1342 of transistor 1306. Word line 1314 is spaced apart from channel region 1342 by gate dielectric material 1305.

[0026] The body region (channel region) 1342 of transistor 1306 is coupled to a conductive plate 1348. Such a plate can be used to allow excess carriers (e.g., holes) to drain from the body region 1342 during some operating modes of memory cell 1310.

[0027] Figure 6 exhibit Figure 5 The cross-sectional side view of assembly 1300 along the x-axis direction, and the illustration above. Figure 5 Some of the structures described. Transistor 1306 is shown extending horizontally along the x-axis. Digital line 1312 is shown extending vertically along the z-axis, and word line 1314 is shown relative to... Figure 6 The cross-sectional view extends horizontally into and out of the page.

[0028] The capacitors 1308 of the horizontally adjacent memory cells 1310 are shown as sharing a plate electrode 1350.

[0029] The illustrated components of memory configuration 1300 are shown supported by substrate 1316. Such substrate may be a semiconductor substrate.

[0030] A continuous goal during the fabrication of integrated assemblies is to increase package density and thereby save valuable semiconductor footprint. There is a desire to develop improved reference voltage generators that can be packaged into a much denser footprint compared to conventional reference voltage generators. Summary of the Invention

[0031] This disclosure relates to an integrated assembly with a reference voltage generator.

[0032] In one embodiment, an integrated assembly is provided. The integrated assembly includes a memory region and a reference voltage generator. The memory region includes memory cells and sense / access lines configured for addressing the memory cells. The reference voltage generator is located adjacent to the memory region, and the reference voltage generator includes resistor cells configured substantially the same as those on the sense / access lines.

[0033] In one embodiment, an integrated assembly is provided. The integrated assembly includes a memory region and a reference voltage generator. The memory region includes memory cells, digital lines, and word lines, wherein each memory cell is uniquely addressed using one of the word lines and one of the digital lines, and the word lines are coupled to a driver circuitry. The reference voltage generator is located adjacent to the memory region, and the reference voltage generator includes resistor cells configured substantially the same as those on the word lines.

[0034] In one embodiment, an integrated assembly is provided. The integrated assembly includes a memory region and a reference voltage generator. The memory region includes memory cells, digital lines, and word lines, wherein each memory cell is uniquely addressed using one of the word lines and one of the digital lines, and the digital lines are coupled to a sensing circuitry system. The reference voltage generator is located adjacent to the memory region, and the reference voltage generator includes resistor units configured substantially the same as those of the digital lines. Attached Figure Description

[0035] Figure 1 is a schematic diagram of a prior art reference voltage generator.

[0036] Figure 2 A schematic cross-sectional side view of a region of a prior art assembly including prior art memory cells. Figure 2A A top-down diagram of a region of a prior art assembly including word lines and number lines. Figure 2B A schematic cross-sectional side view of a region of a prior art assembly including word lines.

[0037] Figure 3 is a schematic three-dimensional view of the area of ​​the existing technology integrated assembly.

[0038] Figure 4 This is a schematic cross-sectional side view of a region of a prior art assembly similar to the assembly in Figure 3.

[0039] Figure 5 A graphical 3D view of the area of ​​the integrated assembly of existing technologies.

[0040] Figure 6 To and Figure 5 A schematic cross-sectional side view of a region similar to that of an existing technology assembly.

[0041] Figure 7 A schematic diagram of the area for integrating components in an instance.

[0042] Figure 8 A schematic diagram of the area for integrating components in an instance.

[0043] Figure 9 A schematic diagram of the area for integrating components in an instance.

[0044] Figure 10 A schematic diagram of the area for integrating components in an instance.

[0045] Figure 11 A top-down diagram of the area for integrating components in an instance.

[0046] Figure 11A To and Figure 11A diagrammatic side view of the area of ​​an integrated assembly, similar to the example of an assembly.

[0047] Figure 12 This is a schematic diagram of the area of ​​the reference voltage generator.

[0048] Figure 13 This is a schematic diagram of the region of a reference voltage generator for another example.

[0049] Figure 14 A diagrammatic side view of the area of ​​the instance integration assembly.

[0050] Figure 15 A diagrammatic side view of the area of ​​the instance integration assembly.

[0051] Figure 16 A diagrammatic side view of the area of ​​the instance integration assembly. Detailed Implementation

[0052] Some embodiments include a reference voltage generator configured to be incorporated into an integrated assembly. See below for further details. Figures 7 to 16 Describe an example implementation.

[0053] In some embodiments, the memory region (memory array) can be considered to include memory cells and sense / access lines configured for addressing the memory cells (wherein the term "sense / access line" is generic for both word lines and digital lines). A reference voltage generator can be formed in proximity to the memory region and can utilize resistive cells matched to the sense / access lines of the memory array. Therefore, the resistive cells can be advantageously formed and patterned during the formation and patterning of the sense / access lines, which simplifies the fabrication of the reference voltage generator and thereby saves time and cost compared to conventional methods of fabricating reference voltage generators. Furthermore, the reference voltage generator described herein can be highly integrated into an integrated assembly, thereby saving valuable semiconductor footprint.

[0054] Figures 7 to 10 This section describes an example application where the resistor cells of a reference voltage generator are matched with the sense / access lines of a memory array (i.e., the resistor cells of the reference voltage generator are configured to be substantially identical to the sense / access lines), where... Figure 7 and 8 This illustrates an example application of matching the resistor cells of a reference voltage generator with the word lines of a memory array, where... Figure 9 and 10 This section illustrates an example application of matching the resistor unit of the reference voltage generator with the digital lines of the memory array.

[0055] refer to Figure 7 The reference voltage generator 4 is shown as being formed close to the memory array 2 within the integrated assembly.

[0056] Memory array 2 includes memory cells (MCs) 10 and includes digital lines 12 and word lines 14 configured for addressing the memory cells. Each memory cell 10 is uniquely addressed using one of the word lines 14 and one of the digital lines 12. In the illustrated embodiment, the word lines are labeled WL1 to WL6, and the digital lines are labeled DL1 to DL6. The illustrated memory cells, digital lines, and word lines may represent a large number of memory cells, digital lines, and word lines associated with memory array 2. For example, the memory array may include thousands, hundreds of thousands, millions, hundreds of millions, or even hundreds of millions of memory cells 10; and therefore may also include thousands, hundreds of thousands, millions, hundreds of millions, or even hundreds of millions of digital lines 12 and word lines 14.

[0057] Digital line 12 is coupled to sensing circuitry 20 (e.g., sensing amplifier circuitry), and word line 14 is coupled to driver circuitry 22.

[0058] Reference voltage generator 4 is shown as including resistor cells 26 aligned with word lines 14 of the memory array. Resistor cells 26 may be manufactured concurrently with word lines 14 and may be configured substantially identically to word lines 14. For example, resistor cells 26 may include the same composition, thickness, height, etc., as word lines 14. The common composition of resistor cells 26 and word lines 14 may include any suitable conductive composition; such as one or more of various metals (e.g., titanium, tungsten, cobalt, nickel, platinum, ruthenium, etc.), metal-containing compositions (e.g., metal silicides, metal nitrides, metal carbides, etc.), and / or conductive doped semiconductor materials (e.g., conductive doped silicon, conductive doped germanium, etc.).

[0059] The length of resistor unit 26 may be different relative to word line 14, and the length of resistor unit 26 may be customized to achieve the desired resistance within such resistor unit.

[0060] exist Figure 7 In one embodiment, structure 24 is associated with resistor unit 26, wherein such structure is substantially identical to memory cell 10 of memory array 2 (e.g., structure 24 may include a capacitor). Structure 24 is not used as a memory cell, but it may be manufactured together with memory cell 10 if doing so simplifies the manufacturing process during the formation of reference voltage generator 4 and memory array 2. Furthermore, structure 28 is associated with reference voltage generator 4, wherein such structure is substantially identical to digital line 12 of memory array. Structure 28 is not used as a digital line, but it may be manufactured together with digital line 12 if doing so simplifies the manufacturing process during the formation of reference voltage generator 4 and memory array 2.

[0061] Pairs of resistor units 26 are shown coupled in series with each other via conductive interconnects 30. The paired resistor units together form resistor assemblies 32 (in other embodiments (not shown), at least some of resistor assemblies 32 may include more than two resistor units). The illustrated embodiment includes three such resistor assemblies, which may be referred to as a first resistor assembly 32a, a second resistor assembly 32b, and a third resistor assembly 32c. The first resistor assembly 32a and the second resistor assembly 32b are coupled in series with each other via conductive interconnect 34a, and the second resistor assembly 32b and the third resistor assembly 32c are coupled in series with each other via conductive interconnect 34b. In some embodiments, conductive interconnects 34a and 34b may be referred to as a first conductive interconnect and a second conductive interconnect, respectively. Such conductive interconnects are coupled to a reference voltage generation circuit system 40. References below... Figure 12 and 13 Describe an example configuration of a reference voltage generation circuit system.

[0062] Figure 7 The reference voltage generator 4 is shown coupled to a first voltage power supply terminal 36 and a second voltage power supply terminal 38. In the illustrated embodiment, the voltage power supply terminals are respectively at voltages corresponding to VSS and Vout. Those skilled in the art can easily determine the appropriate voltages for VSS and Vout for the intended application.

[0063] Figure 8 Display and Figure 7 The configuration is similar, but structures 24 and 28 are omitted from reference voltage generator 4. Figure 7 Compared to the previous embodiment, Figure 8 The embodiments can save materials (and thus save the cost of such materials), and can be relative to Figure 7 The preferred embodiment is characterized by the condition that it is in the manufacturing process. Figure 8 The costs associated with the additional complexity introduced during the implementation of the embodiments (e.g., additional masking steps, etc.) are offset by the savings associated with the reduced material costs.

[0064] Figure 9 Another example embodiment is shown where the reference voltage generator 4 is positioned close to the memory array 2. Figure 9 Implementation examples and Figure 7 The difference in the embodiments is that, Figure 9 The resistor unit 26 is essentially the same as the digital line 12 of the memory array, but not essentially the same as the word line 14. Figure 9 The configuration includes the above reference. Figure 7 The described additional structure 24, and includes with Figure 7 The additional structure 28a is similar to structure 28; but Figure 9 Structure 28a matches word lines 14 of the memory array, while Figure 7 Structure 28 matches the digital line 12 of the memory array.

[0065] Resistor unit 26 may be manufactured concurrently with digital line 12 and may be configured substantially the same as digital line 12. For example, resistor unit 26 may include the same composition, thickness, height, etc. as digital line 12. The common composition of resistor unit 26 and digital line 12 may include any suitable conductive composition; such as one or more of various metals (e.g., titanium, tungsten, cobalt, nickel, platinum, ruthenium, etc.), metal-containing compositions (e.g., metal silicides, metal nitrides, metal carbides, etc.), and / or conductive doped semiconductor materials (e.g., conductive doped silicon, conductive doped germanium, etc.).

[0066] Figure 10 Display and Figure 9 The embodiments are similar to those of the reference voltage generator 4, but the additional structures 24 and 28a are omitted.

[0067] Figures 7 to 10 The memory array 2 can be, for example, a dynamic random access memory (DRAM) array, a ferroelectric random access memory (FeRAM) array, etc. Figures 7 to 10 The reference voltage generator 4 can be located in any suitable position relative to the associated memory array 2, and can be offset, for example, laterally from the memory array and / or vertically from the memory array.

[0068] Figure 11 and 11A This demonstrates an example application of a reference voltage generator 4 configured to include a resistor unit 26, which is connected to... Figures 2 to 2B The sensing / access lines of the memory array 1100 are substantially the same (e.g., the resistor cells are substantially the same as the word lines 1114 of the memory array). Figure 11 The diagram is a top-down view of the reference voltage generator 4, and Figure 11A For along Figure 11 A schematic cross-sectional side view of line AA. As described above, Figures 2 to 2B The memory array 1100 can be viewed as having sensing / access lines (e.g., word lines 1114) extending primarily horizontally relative to the underlying support substrate 1116. Because... Figure 11 and 11A The resistor cell 26 of the reference voltage generator 4 is matched with the sensing / access line (e.g., word line 1114) of the memory array 1100, so such resistor cells can also extend horizontally mainly relative to the underlying support substrate. Figure 11 and 11A The resistor unit 26 is shown extending primarily along the illustrated y-axis; and this y-axis can correspond to Figure 2A The x-axis or y-axis, depending on Figure 11and 11A The resistor unit 26 is with Figure 2A The number line 1112 or the word line 1114 is matched.

[0069] Figure 11 and 11A The embodiment illustrates paired resistor units incorporated into resistor assemblies 32a to 32e. Paired resistor units 26 are coupled to each other via conductive interconnects 30, and resistor assemblies 32a to 32e are coupled in series with each other via conductive interconnects 34a to 34d. Conductive interconnects 34a to 34d are coupled to a reference voltage generation circuit system 40.

[0070] The conductive interconnects 30 and 34 can be positioned in any suitable location relative to the resistor assembly 26. In some embodiments, the resistor assembly may extend laterally, and the conductive interconnects 30 and 34 may be laterally outside such conductive interconnects, such as... Figure 11 The diagram illustrates this. Alternatively, the conductive interconnect 30 may be disposed above the laterally extending resistor unit 26 (e.g., Figure 11A (as illustrated in the diagram), and / or conductive interconnect 34 may be disposed below the laterally extending resistor unit 26 (e.g.) Figure 11A (Illustrated in the figure). The reference voltage generation circuit system 40 may include components located laterally outside the laterally extending resistor unit 26, and / or may include components vertically offset from the laterally extending resistor unit 26 (e.g., directly below a region of such a laterally extending resistor unit).

[0071] Figure 11 and 11A The voltage reference generator 4 is shown as including the reference mentioned above. Figures 7 to 10 The power supply terminals 36 and 38 are described. These power supply terminals can be operated at any suitable voltage.

[0072] The reference voltage generation circuit system 40 may include any suitable configuration. Figure 12 and 13 Describe the instance configuration.

[0073] refer to Figure 12 The reference voltage generation circuit system 40 has a configuration similar to that described above with reference to FIG1. ​​Specifically, the circuit system 40 includes a plurality of switches 42 coupled to a gain buffer 44, and the reference voltage (VREF) is the output from the gain buffer (wherein the reference voltage output is labeled 45). The switches 42 can be collectively regarded as a switching circuit system 46, which is configured to selectively couple interconnects 34a to 34d to the reference voltage output 45.

[0074] The switching circuit system 46 can be positioned in any suitable location relative to the resistor components 32a to 32e, and in some embodiments may be located below the resistor components, laterally offset relative to the resistor components, etc.

[0075] refer to Figure 13 The switching circuit system 46 may correspond to a switching controller 48, which effectively functions as a variable resistor 50 coupled to a reference voltage output 45. In the illustrated embodiment, the variable resistor 50 is arranged in series with another variable resistor 52 coupled to a power supply terminal 54. The power supply terminal 54 is shown to provide a VSS voltage. A gain buffer 44 is coupled to the variable resistors 50 and 52. A feedback voltage (Vfb) extends from the negative terminal of the gain buffer to the node coupled to the variable resistors 50 and 52, and an input voltage (Vin) is coupled to the positive terminal of the gain buffer. Those skilled in the art can readily determine the input voltage and the feedback voltage.

[0076] Figure 13 The switching circuit system 46 can be positioned in any suitable location relative to the resistor components 32a to 32e, and in some embodiments may be located below the resistor components, laterally offset relative to the resistor components, etc.

[0077] Figure 12 and 13 The example configuration provided is for illustrative purposes only and is intended to transmit example components of the example reference voltage generation circuit system to the reader. It should be understood that other configurations may be used, and / or modified. Figure 12 and 13 The configuration is tailored to the specific application. Additionally, it should be noted that... Figure 13 VREF can be at the same voltage as Vout, and in some applications it can be considered electrically coupled to Vout (or even shorted to Vout).

[0078] Figure 11 and 11A The resistor element 26 is described as extending primarily horizontally relative to the underlying substrate. In other embodiments, the resistor element may extend primarily vertically relative to the underlying substrate. Such embodiments may be associated with memory arrays of the type described above with reference to Figures 3 through 6.

[0079] Figure 14 Diagrammatic Explanation and References Above Figure 11The described reference voltage generator is similar to reference voltage generator 4, but the resistor elements 26 extend along the vertical z-axis instead of the horizontal y-axis. Conductive interconnects 30 between paired resistor elements 26 may be located above the resistor elements 26, and conductive interconnects 34a to 34d may be located below the resistor elements. Reference voltage generation circuitry 40 may be positioned relative to the resistor elements 26 in any suitable location, and in some embodiments, at least some of the reference voltage generation circuitry 40 may be located directly below the resistor elements 26 and associated with a support substrate 60 similar to substrates 1216 and 1316 described above with reference to the prior art.

[0080] The vertically extending resistor unit 26 can be associated with word lines (e.g., with) the memory array. Figure 4 The word lines (similar to word lines 1214) are essentially the same, or may be associated with the same memory array (e.g., with...). Figure 6 The number lines 1312 and similar number lines are basically the same. Figure 15 Showing a section of the reference voltage generator 4, in which the resistor unit 26 is configured to... Figure 4 The vertically extending character lines 1214 are basically the same, and Figure 16 Showing a section of the reference voltage generator 4, in which the resistor unit 26 is configured to... Figure 6 The vertically extending number lines 1312 are basically the same.

[0081] Figure 15 and 16 Each of the reference voltage generators 4 is shown as having a structure 24 associated with a resistor unit 26, wherein such a structure is substantially the same as a memory cell of the associated memory array (e.g., structure 24 may include the same as described above regarding...). Figure 4 and 6 (Similar to capacitors described in existing technology). Figure 15 and 16 In the illustrated embodiments, the resistor unit 26 extends vertically (or at least primarily vertically), and the capacitor within the structure 24 extends horizontally (or at least primarily horizontally). The term "primarily vertical" means that the overall indicating direction is more vertical than horizontal, and the term "primarily horizontal" means that the indicating direction is more horizontal than vertical. In some embodiments, the term "primarily vertical" may mean substantially vertical, where "substantially vertical" means vertical within reasonable manufacturing and measurement tolerances; and the term "primarily horizontal" may mean substantially horizontal, where "substantially horizontal" means horizontal within reasonable manufacturing and measurement tolerances.

[0082] In some embodiments, Figure 15 and 16Structure 24 (e.g., the horizontally extended capacitor shown) can be considered as arranged in groups within the resistor assembly 32. Specifically, the first group of structures 24a can be considered as one of the resistor units along the resistor assembly 32, and the second group of structures 24b can be considered as another along the resistor unit along the resistor assembly 32. Figure 15 and 16 In the illustrated embodiment, structures 24a and 24b share a capacitor plate 62 between them.

[0083] It should be noted that Figure 16 The embodiment shows a conductive plate 64 within a reference voltage generator 4, wherein such a conductive plate is similar to the one described above. Figure 5 and 6 The described board 1348. Similar boards are available. Figure 15 The reference voltage generator 4 contains a board similar to board 1248 in Figure 3. Alternatively, it can be omitted. Figure 16 Board 64, and can be obtained from Figure 15 A similar board is omitted from the reference voltage generator. Furthermore, it should be noted that, similar to the reference above... Figure 8 and 10 The described embodiments may be found in some embodiments from Figure 15 and 16 Structures 24 and 28 are omitted in the reference voltage generator.

[0084] The assemblies and structures discussed above can be utilized within integrated circuits (where the term "integrated circuit" refers to electronic circuits supported by a semiconductor substrate); and can be incorporated into electronic systems. Such electronic systems can be used in, for example, memory modules, device drivers, power modules, communication modems, processor modules, and special-purpose modules, and can comprise multi-layered, multi-chip modules. Electronic systems can be any of the following wide range of systems: for example, cameras, wireless devices, displays, chipsets, set-top boxes, games, lighting, vehicles, clocks, televisions, cellular phones, personal computers, automobiles, industrial control systems, aircraft, etc.

[0085] Unless otherwise specified, the various materials, substances, compositions, etc. described herein may be formed by any suitable method now known or yet to be developed, including, for example, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etc.

[0086] The terms “dielectric” and “insulating” are used to describe materials having insulating electrical properties. These terms are considered synonymous in this disclosure. The use of the term “dielectric” in some instances and the term “insulating” (or “electrically insulating”) in others may be for the purpose of providing linguistic variation within this disclosure to simplify the premises in the appended claims, rather than to indicate any significant chemical or electrical differences.

[0087] The terms "electrical connection" and "electrical coupling" are both used in this disclosure. The terms are considered synonymous. The use of one term in some cases and another in others may be to provide linguistic variation within this disclosure to simplify the premises of the appended claims.

[0088] The specific orientations of the various embodiments in the figures are for illustrative purposes only, and in some applications, embodiments may be rotated relative to the shown orientation. The descriptions provided herein and the appended claims relate to any structure having the described relationships between various features, regardless of whether the structure is in the specific orientation of the figures or rotated relative to such orientation.

[0089] Unless otherwise specified, the accompanying cross-sectional drawings show only the features within the cross-sectional plane and not the material behind the cross-sectional plane in order to simplify the drawings.

[0090] When a structure is referred to above as "on another structure," "adjacent to another structure," or "against another structure," the structure may be directly on the other structure or there may be intervening structures. In contrast, when a structure is referred to as "directly on another structure," "directly adjacent to another structure," or "directly against another structure," there are no intervening structures. The terms "directly below," "directly above," etc., do not indicate direct physical contact (unless otherwise explicitly stated), but instead indicate upright alignment.

[0091] A structure (e.g., a layer, material, etc.) may be referred to as “vertically extending” to indicate that the structure extends substantially upward from the underlying substrate (e.g., a base plate). A vertically extending structure may or may not extend substantially orthogonally relative to the upper surface of the substrate. The term “substantially vertical” means vertical within reasonable manufacturing and measurement tolerances. In some embodiments, a vertically extending structure may extend to a degree that is vertical relative to the horizontal surface of the underlying substrate within ±10°.

[0092] A structure (e.g., a layer, material, etc.) may be referred to as “horizontally extending” to indicate that the structure is generally aligned with the horizontal upper surface of the underlying substrate (e.g., a base plate). A horizontally extending structure may or may not extend substantially parallel to the upper surface of the substrate. The term “substantially parallel” means parallel within reasonable manufacturing and measurement tolerances. In some embodiments, the horizontally extending structure may extend to a degree of verticality relative to the horizontal surface of the underlying substrate within ±10°.

[0093] Some embodiments include an integrated assembly having a memory region comprising memory cells and sense / access lines configured for addressing the memory cells, and a reference voltage generator proximate to the memory region. The reference voltage generator includes resistor cells configured substantially the same as the sense / access lines.

[0094] Some embodiments include an integrated assembly having a memory region comprising memory cells, digital lines, and word lines. Each memory cell is uniquely addressed using one of the word lines and one of the digital lines. The word lines are coupled to a driver circuitry. A reference voltage generator is located adjacent to the memory region. The reference voltage generator includes resistor cells configured substantially the same as the word lines.

[0095] Some embodiments include an integrated assembly having a memory region comprising memory cells, digital lines, and word lines. Each memory cell is uniquely addressed using one of the word lines and one of the digital lines. The digital lines are coupled to a sensing circuitry system. A reference voltage generator is located adjacent to the memory region. The reference voltage generator includes resistor cells configured substantially the same as the digital lines.

[0096] As specified, the subject matter disclosed herein has been described with respect to structural and methodological features in more or less specific language. However, it should be understood that the claims are not limited to the specific features shown and described, as the components disclosed herein include exemplary embodiments. Therefore, the claims have the full scope as stated in writing and should be properly interpreted in accordance with the principle of equivalence.

Claims

1. An integrated assembly comprising: A memory region, comprising memory cells and sensing / access lines configured for addressing the memory cells; as well as A reference voltage generator is located near the memory area; The reference voltage generator includes resistor units configured substantially the same as the sensing / access line, the resistor units including a first resistor unit and a second resistor unit coupled to the first resistor unit via conductive interconnects.

2. The integrated assembly of claim 1, wherein the sensing / access line extends primarily horizontally relative to the underlying support substrate.

3. The integrated assembly of claim 1, wherein the sensing / access line extends primarily vertically relative to the underlying support substrate.

4. The integrated assembly of claim 1, wherein the sensing / access line is a word line.

5. The integrated assembly of claim 1, wherein the sensing / access line is a digital line.

6. The integrated assembly of claim 1, wherein a structure substantially identical to that of the memory cell is associated with the resistor cell.

7. An integrated assembly comprising: A memory region, comprising memory cells and sensing / access lines configured for addressing the memory cells; A reference voltage generator is located near the memory area; The reference voltage generator includes resistor units configured substantially the same as those on the sensing / access line; A resistor assembly, each configured to include two resistor units paired with each other; There are at least three resistor components, wherein the three resistor components are a first resistor component, a second resistor component, and a third resistor component; A first conductive interconnect that couples the first resistor assembly in series to the second resistor assembly; A second conductive interconnect that couples the second resistor assembly in series to the third resistor assembly; as well as A switching circuit system configured to selectively couple the first conductive interconnect and the second conductive interconnect to a reference voltage output.

8. The integrated assembly of claim 7, wherein the capacitor is located between paired resistor units of each of the resistor assemblies; the capacitor extends horizontally and the resistor units extend vertically.

9. The integrated assembly of claim 7, wherein a capacitor is located between paired resistor units of each of the resistor assemblies; wherein the capacitor is arranged to include a first group along one of the resistor units in the paired resistor units and a second group along the other of the resistor units in the paired resistor units; and wherein the first group and the second group share a common plate electrode.

10. An integrated assembly comprising: The memory area includes memory cells, digital lines, and word lines; Each of the memory cells is uniquely addressed using one of the word lines and one of the digital lines; The word line is coupled to the driver circuit system; as well as A reference voltage generator is located near the memory region; the reference voltage generator includes resistor cells configured substantially the same as the word lines, the resistor cells including a first resistor cell and a second resistor cell coupled to the first resistor cell via conductive interconnects.

11. The integrated assembly of claim 10, wherein the word lines extend primarily horizontally relative to the underlying support substrate.

12. The integrated assembly of claim 10, wherein the letter lines extend primarily vertically relative to the underlying support substrate.

13. The integrated assembly of claim 10, wherein the word line has a first length and the resistor unit has a second length different from the first length.

14. The integrated assembly of claim 10, wherein the word line and the resistor unit comprise a common conductive composition.

15. The integrated assembly of claim 14, wherein the common conductive composition comprises a metal.

16. The integrated assembly of claim 10, wherein a structure substantially identical to that of the digital line is associated with the resistor unit.

17. The integrated assembly of claim 10, wherein a structure substantially identical to that of the memory cell is associated with the resistor cell.

18. The integrated assembly of claim 17, wherein the structure comprises a capacitor.

19. An integrated assembly comprising: The memory area includes memory cells, digital lines, and word lines; Each of the memory cells is uniquely addressed using one of the word lines and one of the digital lines; The word line is coupled to the driver circuit system; A reference voltage generator is located near the memory area; the reference voltage generator includes resistor cells configured substantially the same as those of the word lines; A resistor assembly, each configured to include two or more resistor units coupled in series with each other; There are at least three resistor components, wherein the three resistor components are a first resistor component, a second resistor component, and a third resistor component; A first conductive interconnect that couples the first resistor assembly in series to the second resistor assembly; A second conductive interconnect that couples the second resistor assembly in series to the third resistor assembly; as well as A switching circuit system configured to selectively couple the first conductive interconnect and the second conductive interconnect to a reference voltage output.

20. The integrated assembly of claim 19, wherein the switching circuitry is located below the resistor assembly.

21. An integrated assembly comprising: The memory area includes memory cells, digital lines, and word lines; Each of the memory cells is uniquely addressed using one of the word lines and one of the digital lines; The digital line is coupled to the sensing circuit system; as well as A reference voltage generator is located near the memory area; the reference voltage generator includes resistor units configured substantially the same as the digital lines, the resistor units including a first resistor unit and a second resistor unit coupled to the first resistor unit via conductive interconnects.

22. The integrated assembly of claim 21, wherein the digital line and the resistor unit comprise a common metal-containing composition.

23. The integrated assembly of claim 21, wherein the digital line extends primarily horizontally relative to the underlying support substrate.

24. The integrated assembly of claim 21, wherein the digital line extends primarily vertically relative to the underlying support substrate.

25. The integrated assembly of claim 21, wherein a structure substantially identical to the word line is associated with the resistor unit.

26. The integrated assembly of claim 21, wherein a structure substantially identical to that of the memory cell is associated with the resistor cell.

27. The integrated assembly of claim 26, wherein the structure includes a capacitor.

28. The integrated assembly of claim 27, wherein the resistive unit extends primarily vertically and the capacitor extends primarily horizontally.

29. An integrated assembly comprising: The memory area includes memory cells, digital lines, and word lines; Each of the memory cells is uniquely addressed using one of the word lines and one of the digital lines; The digital line is coupled to the sensing circuit system; A reference voltage generator is located near the memory area; the reference voltage generator includes resistor units configured substantially the same as those of the digital lines; A resistor assembly, each configured to include two or more resistor units coupled in series with each other; there are at least three resistor assemblies, wherein the three resistor assemblies are a first resistor assembly, a second resistor assembly, and a third resistor assembly; A first conductive interconnect that couples the first resistor assembly in series to the second resistor assembly; A second conductive interconnect that couples the second resistor assembly in series to the third resistor assembly; as well as A switching circuit system configured to selectively couple the first conductive interconnect and the second conductive interconnect to a reference voltage output.

30. The integrated assembly of claim 29, wherein the switching circuitry is located below the resistor assembly.

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