Analog switch circuit and control circuit and control method thereof

Abstract

Analog switch circuit, control circuit and control method thereof. The analog switch circuit includes a switch unit and a control circuit. The control circuit includes a sensing circuit and a gate-source voltage adjusting circuit. The switch unit is used to operate a first switch therein according to a first gate-source voltage to convert an input signal at an input terminal into an output signal at an output terminal. The sensing circuit is coupled between the input terminal and the output terminal and is used to generate a sensing signal according to a voltage difference between the output signal and the input signal. The gate-source voltage adjusting circuit is coupled with the sensing circuit and is used to adaptively adjust the first gate-source voltage according to the sensing signal so that a channel resistance of the switch unit remains at a fixed value when the voltage difference changes.

Description

Technical Field

[0001] This invention relates to an analog switching circuit, and more particularly to an analog switching circuit that can improve harmonic distortion. This invention also relates to a control method for the analog switching circuit. Background Technology

[0002] Figure 1 This diagram shows a prior art analog switch circuit 10. The analog switch circuit 10 includes a first switch Q1 and a second switch Q2 connected in series between an input signal Vin and an output signal Vout. The first switch Q1 and the second switch Q2 have a channel resistance R0, and when the first switch Q1 and the second switch Q2 operate to convert the input signal Vin into the output signal Vout, there is a channel resistance change ΔR. The channel resistance change ΔR is related to changes in the input signal Vin and the output signal Vout, as well as changes in ambient temperature, etc. Furthermore, the analog switch circuit 10 has a parasitic resistance Rp. The output signal Vout is applied to a load resistor RL electrically connected to ground potential, and its output signal Vout can be simply expressed as:

[0003]

[0004] Through Fourier expansion, we can obtain:

[0005]

[0006] in

[0007] When the input signal Vin is a sine wave, V in =sin(2πft), we can get:

[0008]

[0009]

[0010]

[0011]

[0012]

[0013] Therefore, it can be concluded that ΔR / R L The smaller the value, the milder the harmonic distortion; conversely, a lower load resistance RL will exacerbate harmonic distortion. Therefore, reducing harmonic distortion under low load conditions (low load resistance RL) is a challenging task.

[0014] Figure 2AThis diagram shows an analog switching circuit 20 composed of PMOS / NMOS elements. Figure 2B This displays the harmonic distortion of the output signal Vout of the analog switch circuit 20. In the analog switch circuit 20, since the gate voltages of both the PMOS and NMOS elements are fixed at Vg, the gate-source voltages of the PMOS and NMOS elements change with the input signal Vin. Due to the characteristics of the PMOS / NMOS elements, this also causes the channel resistance of the analog switch circuit 20 to change, and this change in channel resistance directly leads to severe harmonic distortion of the output signal Vout. The harmonic distortion of the analog switch circuit 20 is shown below. Figure 2B The meaning is shown. (By) Figure 2B It can be seen that, Figure 2A The analog switching circuit 20, composed of PMOS / NMOS elements shown, can only provide low harmonic distortion performance of about -90dB.

[0015] Figure 3A This is a circuit diagram of a prior art analog switch circuit 30. Figure 3B This is a schematic diagram of the electrical simulation of a prior art analog switch circuit 30. Figure 3C This displays the harmonic distortion of the output signal Vout of the analog switching circuit 30. For example... Figure 3A As shown, by providing a fixed voltage Vgs as the gate-source voltage of the MOS element in the analog switching circuit 30, the gate-source voltage of the MOS element is prevented from changing with the input voltage Vin. However, as... Figure 3B As shown, with a fixed gate-source voltage Vgs, the channel voltage VRon, channel resistance Ron, and load current ILoad still exhibit significant variations as the input signal Vin changes. This directly impacts harmonic distortion performance, such as... Figure 3C As shown, although analog switch circuit 30 can provide better harmonic distortion performance (up to -110dB) compared to analog switch circuit 20 and analog switch circuit 10, this architecture still cannot meet the current application requirements.

[0016] It should be noted that the gate-source voltage refers to the voltage difference between the gate and the source, the drain-source voltage refers to the voltage difference between the drain and the source, and the drain-source current refers to the current flowing between the drain and the source. The same applies below.

[0017] Compared to the aforementioned prior art, the present invention proposes an analog switching circuit and its control method that adaptively adjusts the gate-source voltage according to changes in channel voltage so that the channel resistance remains at a fixed value when the channel voltage changes. Summary of the Invention

[0018] From one perspective, the present invention provides an analog switching circuit comprising: a switching unit including a first switch coupled to a current path between an input terminal and an output terminal, for converting an input signal at the input terminal into an output signal at the output terminal based on a first gate-source voltage; and a control circuit including: a sensing circuit coupled between the input terminal and the output terminal, the sensing circuit being configured to generate a sensing signal based on a voltage difference between the output signal and the input signal; and a gate-source voltage adjustment circuit coupled to the sensing circuit, for generating and adaptively adjusting the first gate-source voltage based on the sensing signal, so that a conduction resistance of the switching unit remains at a fixed value when the voltage difference changes.

[0019] From another perspective, the present invention also provides a control circuit for an analog switching circuit, comprising: a sensing circuit coupled between an input terminal and an output terminal, for generating a sensing signal based on a voltage difference between an output signal at the output terminal and an input signal at the input terminal; and a gate-source voltage adjustment circuit coupled to the sensing circuit, for generating and adaptively adjusting a first gate-source voltage based on the sensing signal to operate a first switch of a switching unit of the analog switching circuit, thereby converting the input signal into the output signal, and maintaining a fixed value for an on-resistance of the switching unit when the voltage difference changes; wherein the first switch is coupled to the current path between the input terminal and the output terminal.

[0020] From another perspective, the present invention also provides a control method for an analog switching circuit, comprising: operating a first switch of an analog switching circuit according to a first gate-source voltage to convert an input signal at an input terminal into an output signal at an output terminal; generating a sensing signal according to a voltage difference between the output signal and the input signal; and adaptively adjusting the first gate-source voltage according to the sensing signal so that a conduction resistance of the switching unit remains at a fixed value when the voltage difference changes; wherein the first switch is coupled to the current path between the input terminal and the output terminal.

[0021] In a preferred embodiment, the control circuit further includes a voltage divider circuit coupled between the input terminal and the output terminal to provide a base-source voltage divider for the voltage difference, such that the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the base-source voltage divider.

[0022] In a preferred embodiment, the switching unit further includes a second switch, and the first switch and the second switch are connected in series between the input terminal and the output terminal.

[0023] In a preferred embodiment, the relationship between the first gate-source voltage and the voltage difference is as follows:

[0024] Vgs=Vgs1+K×Vdif

[0025] Wherein, Vgs is the first gate-source voltage, Vgs1 is a fixed voltage, Vdif is the voltage difference, and K is a parameter; where the parameter is a real number greater than 1.

[0026] In a preferred embodiment, the gate-source voltage regulation circuit also generates a second gate-source voltage based on the sensing signal to control the second switch, so that the on-resistance remains at the fixed value when the voltage difference changes.

[0027] In a preferred embodiment, the control circuit further includes a voltage divider circuit coupled between the input terminal and the output terminal to provide a base-source voltage divider for the voltage difference, such that the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the base-source voltage divider.

[0028] In a preferred embodiment, the sensing circuit includes: an amplifier circuit having a first input terminal and a second input terminal coupled to the input terminal and the output terminal respectively, the amplifier circuit adjusting the voltages of the first input terminal and the second input terminal to the same level by negative feedback control; a first resistor coupled between the first input terminal and the second input terminal; and a second resistor coupled between the second input terminal and the output terminal; wherein the amplifier circuit generates an amplified current, and the sensing signal is proportional to the amplified current.

[0029] In a preferred embodiment, the sensing circuit further includes a current mirror circuit for replicating and amplifying the amplified current to generate the sensing signal.

[0030] In a preferred embodiment, the amplifier circuit includes a first super source follower.

[0031] In a preferred embodiment, the gate-source voltage regulation circuit includes a first impedance circuit coupled between a first gate and a first source of the first switch, for adaptively adjusting the first gate-source voltage according to the sensing signal.

[0032] In a preferred embodiment, the gate-source voltage regulation circuit further includes: a second super source follower coupled between the sensing circuit and the first impedance circuit, for generating a summed current based on a sensing current and a fixed current related to the sensing signal; and a second impedance circuit coupled to the second super source follower; wherein the summed current flows through the first impedance circuit and the second impedance circuit respectively, thereby adaptively regulating the first gate-source voltage.

[0033] In a preferred embodiment, the first switch includes a first metal oxide semiconductor (MOS) element, and the voltage difference is related to the source-drain voltage of the first MOS element, and the on-resistance is related to the channel resistance when the first MOS element is turned on; wherein the sensed signal is proportional to the source-drain current when the first MOS element is turned on; wherein the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the voltage difference change to maintain the channel resistance when the first MOS element is turned on at the fixed value.

[0034] In a preferred embodiment, the first switch includes a first metal oxide semiconductor (MOS) element, the second switch includes another MOS element, and the voltage difference is related to the sum of the source-drain voltage of the first MOS element and the source-drain voltage of the second MOS element; wherein the on-resistance is related to the sum of the channel resistance when the first MOS element is on and the channel resistance when the second MOS element is on; wherein the sensing signal is proportional to the source-drain current when the first MOS element is on; wherein the gate-source voltage regulation circuit adaptively adjusts the first gate-source voltage according to the voltage difference change to maintain the sum of the channel resistances at the fixed value.

[0035] The following detailed description through specific embodiments will make it easier to understand the purpose, technical content, features, and effects achieved by the present invention. Attached Figure Description

[0036] Figure 1 This diagram shows a prior art analog switch circuit 10.

[0037] Figure 2A This diagram shows a prior art analog switching circuit 20 composed of PMOS / NMOS elements.

[0038] Figure 2B This displays the harmonic distortion of the output signal Vout of the analog switch circuit 20.

[0039] Figure 3A A schematic diagram of a prior art analog switch circuit 30 is shown.

[0040] Figure 3B This is a schematic diagram of the electrical simulation of a prior art analog switch circuit 30.

[0041] Figure 3C This demonstrates the harmonic distortion of the output signal Vout of the existing analog switching circuit 30.

[0042] Figure 4AThis diagram shows an analog switch circuit 40 according to the present invention.

[0043] Figure 4B This shows the simulation results of the harmonic distortion of the output signal Vout of the analog switching circuit according to the present invention.

[0044] Figure 5 A schematic diagram of the analog switching circuit 50 according to the present invention is shown.

[0045] Figure 6 A schematic diagram of a more specific embodiment of the analog switching circuit 60 according to the present invention is shown.

[0046] Figure 7 A schematic diagram of the analog switch circuit 70 according to the present invention is shown.

[0047] Figure 8 A schematic diagram of an analog switch circuit 80 according to the present invention is shown.

[0048] Figure 9 A schematic diagram of an analog switch circuit 90 according to the present invention is shown.

[0049] Figure 10 A schematic diagram of an analog switch circuit 100 according to the present invention is shown.

[0050] Figure 11 A schematic diagram of a more specific embodiment of the sensing circuit 103 according to the present invention is shown.

[0051] Figures 12A-12E The results of Fast Fourier Transform (FFT) simulations of the harmonic distortion of the output signal Vout of the analog switching circuit according to the present invention are shown.

[0052] Explanation of symbols in the diagram

[0053] 10, 20, 40, 50, 60, 70, 80, 90, 100: Analog switch circuits

[0054] 41, 81, 101: Switching units

[0055] 42, 52, 62, 82, 102: Control circuits

[0056] 43, 63, 83, 103: Sensing circuits

[0057] 45, 65, 85, 105: Gate-source voltage regulation circuit

[0058] 57, 77, 97, 107: Voltage divider circuit

[0059] 631, 1031: Amplifier circuits

[0060] 633, 1033, 1034: Current mirror circuit

[0061] 651: Adjustment signal generation circuit

[0062] 852: Second adjustment circuit

[0063] 1051: Super Source Follower

[0064] 1053: First Impedance Circuit

[0065] 1055: Second Impedance Circuit

[0066] Ib: Fixed current

[0067] ILoad: Load current

[0068] Isen: Sensing Current

[0069] K, K1: Parameters

[0070] M1, M2, M3, M6, M7, M8: Switching elements

[0071] M4, M5, M9, M10: Resistive elements

[0072] N1: First input terminal

[0073] N2: Second input terminal

[0074] N3: Third input terminal

[0075] N4: Fourth input terminal

[0076] Q1: First switch

[0077] Q2: Second switch

[0078] Q11, Q12, Q21, Q22: Switches

[0079] R0: Channel resistance

[0080] R1: First resistor

[0081] R2: Second resistor

[0082] R3, R4, Rbs, Rbs', Rfod: Resistors

[0083] RL: Load resistance

[0084] Ron: Channel resistance

[0085] Rp: Parasitic resistance

[0086] Ssen: Sensing signal

[0087] T1: Input terminal

[0088] T2: Output terminal

[0089] V1, V2, V3, V4: Voltage

[0090] Vc1: Fixed voltage

[0091] Vdif: Voltage Difference

[0092] Vg, Vgs: Voltage

[0093] Vg1: First gate voltage

[0094] Vg2: Second gate voltage

[0095] Vgs1: First gate-source voltage

[0096] Vgs2: Second gate-source voltage

[0097] Vin: Input signal

[0098] Vout: Output signal

[0099] VRon: Channel voltage

[0100] VS: Voltage source

[0101] ΔR: Channel resistance change Detailed Implementation

[0102] The accompanying drawings in this invention are all schematic and are mainly intended to show the coupling relationship between various circuits and the relationship between various signal waveforms. The circuits, signal waveforms and frequencies are not drawn to scale.

[0103] Figure 4A This diagram shows an analog switch circuit 40 according to the present invention. Figure 4B The simulation results of harmonic distortion of the output signal Vout of the analog switching circuit according to the present invention are shown. The analog switching circuit 40 includes a switching unit 41 and a control circuit 42. The control circuit 42 includes a sensing circuit 43 and a gate-source voltage adjustment circuit 45. Figure 4A As shown, the switching unit 41 operates the first switch Q1 according to the first gate-source voltage Vgs1 to convert the input signal Vin at the input terminal T1 into the output signal Vout at the output terminal T2. The sensing circuit 43 is coupled between the input terminal T1 and the output terminal T2, and generates a sensing signal Ssen based on the voltage difference between the output signal Vin and the input signal Vout. The gate-source voltage adjustment circuit 45 is coupled to the sensing circuit 43 and adaptively adjusts the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 41 remains at a fixed value when the voltage difference changes.

[0104] In this embodiment, the first switch Q1 is, for example, an N-type metal-oxide-semiconductor (MOS) device. The aforementioned voltage difference is related to the source-drain voltage of the N-type MOS device, and the aforementioned on-resistance is related to the channel resistance when the N-type MOS device is turned on. In one embodiment, the aforementioned voltage difference is equal to the source-drain voltage of the N-type MOS device, and the aforementioned on-resistance is equal to the channel resistance when the N-type MOS device is turned on. The sensing signal Ssen is proportional to the source-drain current when the MOS device is turned on. The gate-source voltage adjustment circuit 45 adaptively adjusts the first gate-source voltage Vgs1 according to the aforementioned voltage difference change, i.e., the change in the source-drain voltage of the N-type MOS device, to maintain the channel resistance of the N-type MOS device at a fixed value when it is turned on. For example, such as... Figure 4A As shown, the first gate-source voltage Vgs1 is, for example, equal to a fixed voltage Vc1 plus parameter K multiplied by the sensing signal Ssen, where parameter K can be a fixed constant or an adjustable variable, set or adjusted according to user needs or harmonic distortion.

[0105] It should be noted that, in addition to being coupled to the sensing circuit 43, the gate-source voltage regulation circuit 45's output is coupled between the gate and source of the MOS element in the first switch Q1. For an N-type MOS element, when the voltage difference between the input signal Vin and the output signal Vout is positive, such as... Figure 4A As shown, the gate-source voltage regulation circuit 45 is coupled between the gate of the MOS element and the output terminal T2. When the voltage difference between the input signal Vin and the output signal Vout is negative, the gate-source voltage regulation circuit 45 is coupled between the gate of the MOS element and the input terminal T1 (not shown). Alternatively, a selection switch can be coupled to one output terminal of the gate-source voltage regulation circuit 45, between the output terminal T2 and the input terminal T1, switching according to the sign of the voltage difference between the input signal Vin and the output signal Vout, so that the output of the gate-source voltage regulation circuit 45 is coupled between the gate and source of the MOS element.

[0106] In analog switching circuits using MOS elements as the first switch Q1, to improve upon existing technologies where the on-resistance (the channel resistance when the MOS element is on) changes with variations in the input and output signals, leading to harmonic distortion, this invention senses the voltage difference between the input and output terminals and uses feedback to adjust the gate-source voltage of the MOS element to maintain a constant channel resistance. This embodiment achieves channel resistance control by changing the voltage between the gate and source of the MOS element (the first gate-source voltage Vgs1). Figure 4A As shown, this embodiment uses the voltage difference between input terminal T1 and output terminal T2 to feedback control the gate-source voltage (first gate-source voltage Vgs1) of the MOS element, thereby reducing the change in channel resistance. The voltage difference between the gate and source (in this embodiment, the first gate-source voltage Vgs1) can be determined by a fixed voltage Vc1 and a sensing signal Ssen, adaptively adjusting the gate-source voltage difference (first gate-source voltage Vgs1) to achieve the target. The sensing signal Ssen is related to the voltage difference between the output signal Vin and the input signal Vout; in this embodiment, the sensing signal Ssen is related to the voltage change between the drain and source of the MOS element. The simulation results are as follows... Figure 4B As shown, according to the simulation results of this embodiment, higher-order harmonic distortion can be significantly reduced if properly compensated.

[0107] Figure 5 A schematic diagram of an analog switch circuit 50 according to the present invention is shown. In this embodiment, the analog switch circuit 50 and... Figure 4A The analog switch circuit 40 shown differs in that, in the analog switch circuit 50, the control circuit 52, in addition to the sensing circuit 43 and the gate-source voltage adjustment circuit 45, also includes a voltage divider circuit 57. The voltage divider circuit 57 is coupled between the input terminal T1 and the output terminal T2, and is used to divide the voltage difference between the output signal Vin and the input signal Vout to generate a base-source voltage divider for the first switch Q1. This allows the gate-source voltage adjustment circuit 45 to adaptively adjust the first gate-source voltage Vgs1 based on the base-source voltage divider. The base-source voltage divider refers to the voltage divided by the resistor Rbs between the bulk and source terminals of the MOS element coupled to the first switch Q1 in the voltage divider circuit 57. Furthermore, as... Figure 5As shown, the gate-source voltage adjustment circuit 45 can be coupled between the substrate and the gate. In this way, regardless of whether the voltage difference between the voltage level of the input signal Vin and the voltage level of the output signal Vout is positive or negative, the gate-source voltage adjustment circuit 45 does not need to change the electrical connection to the input terminal T1 or the output terminal T2. It can adaptively adjust the first gate-source voltage Vgs1 so that the on-resistance of the switching unit 41 remains at a fixed value when the voltage difference changes, thereby improving harmonic distortion.

[0108] like Figure 5 As shown, in this embodiment, the first gate-source voltage Vgs1 is equal to the fixed voltage Vc1 plus the parameter K multiplied by the sensing signal Ssen and the aforementioned base-source voltage divider:

[0109] Vgs1=Vc1+(K×Ssen)+V3-Vout (In this embodiment, the base-source voltage is V3-Vout)

[0110] Consider that the sensed signal Ssen is equal to the input signal Vin minus the output signal Vout, and derive the following:

[0111] Vgs1=Vc1+(K×Ssen)+V3-Vout

[0112] Vgs1=Vc1+(K×Ssen)+D×(Vin-Vout)

[0113] Where D = Rbs / (Rbs+Rbs'), the resistance Rbs' is the resistance between the substrate and drain of the MOS element in the first switch Q1, that is, D is the ratio of Rbs to the entire voltage divider resistor string.

[0114] Wherein, voltage V3 is the substrate electrode voltage of the first switch Q1.

[0115] Vgs1=Vc1+K×(Vin-Vout)+D×(Vin-Vout)

[0116] =Vc1 + K′ × (Vin - Vout)

[0117] =Vc1+K′×Vdif

[0118] in

[0119] K′=K+D

[0120] Vdif = Vin - Vout

[0121] In other words, in this embodiment, the gate-source voltage regulation circuit 45 generates and adaptively adjusts the first gate-source voltage Vgs1 in a feedback control manner based on the sensing signal Ssen generated by the voltage difference between the output signal Vin and the input signal Vout (in one embodiment, the sensing signal Ssen is equal to the input signal Vin minus the output signal Vout), so that the on-resistance of the switching unit 41 remains at a fixed value when the voltage difference changes.

[0122] In one embodiment, parameter K is a real number greater than 1. The advantage of parameter K being greater than 1 is that it indicates that the gate-source voltage regulation circuit 45 is not limited to a voltage divider circuit composed of passive components such as resistors, and the first gate-source voltage Vgs1 is adjusted by the voltage divider of the voltage difference Vdif between the input voltage Vin and the output voltage Vout. According to an embodiment of the present invention, the first gate-source voltage Vgs1 can be actively controlled and adjusted by sensing the voltage difference Vdif, thereby maintaining the on-resistance of the switching unit 41 at a fixed value more accurately.

[0123] Figure 6 This diagram shows a more specific embodiment of the analog switching circuit 60 according to the present invention. In this embodiment, the analog switching circuit 60 includes a switching unit 41 and a control circuit 62. The control circuit 62 includes a sensing circuit 63 and a gate-source voltage adjustment circuit 65. Figure 6 As shown, the switching unit 41 operates the first switch Q1 according to the first gate-source voltage Vgs1 to convert the input signal Vin at input terminal T1 into the output signal Vout at output terminal T2. The sensing circuit 63 is coupled between input terminal T1 and output terminal T2, and generates a sensing signal Ssen based on the voltage difference Vdif between the input signal Vin and the output signal Vout. Figure 6 As shown, the sensing signal Ssen is, for example, the current K1*Isen. The gate-source voltage adjustment circuit 65 is coupled to the sensing circuit 63 to adaptively adjust the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 41 remains at a fixed value when the voltage difference Vdif changes. Figure 6 As shown, in one embodiment, assuming the value of parameter K1 is 1, the sensing signal Ssen is, for example, the sensing current Isen. The signal generation circuit 651 is adjusted to receive the sensing current Isen and generate a current K*Isen flowing through resistor R3, thereby generating a voltage difference K*Isen*R3. Then Vgs1=Vc1+K*Isen*R3.

[0124] This embodiment shows a more specific implementation of the sensing circuit 63. For example... Figure 6As shown, the sensing circuit 63 includes an amplifier circuit 631, a current mirror circuit 633, a first resistor R1, and a second resistor R2. The amplifier circuit 631 has a first input terminal N1 and a second input terminal N2, which are coupled to input terminal T1 and output terminal T2, respectively. The amplifier circuit 631 uses negative feedback control to adjust the voltages of the first input terminal N1 and the second input terminal N2 to the same level. The first resistor R1 is coupled between the first input terminal T1 and input terminal N1. The second resistor R2 is coupled between the second input terminal N2 and output terminal T2. The amplifier circuit 631 generates a sensing current Isen, and the sensing signal Ssen is proportional to the sensing current Isen. The current mirror circuit 633 is used to replicate the sensing current Isen to generate the sensing signal. In this embodiment, the current mirror circuit 633 amplifies the sensing current Isen by a factor of K1 to generate a current K1*Isen, which is used as the sensing signal Ssen. The amplifier A1 in the amplifier circuit 631 can be implemented in various ways, and specific embodiments will be described in detail below.

[0125] The gate-source voltage regulation circuit 65 is coupled to the sensing circuit 63 to adaptively adjust the first gate-source voltage Vgs1 according to the current K1*Isen, which is the sensing signal Ssen, so that the on-resistance of the switching unit 41 remains at a fixed value when the voltage difference Vdif changes.

[0126] In this embodiment, the gate-source voltage regulation circuit 65 includes a regulation signal generation circuit 651, a voltage source VS, and a resistor R3. In this embodiment, the regulation signal generation circuit 651 generates a current K*Isen based on the current K1*Isen flowing through the resistor R3, thus generating a voltage difference K*Isen*R3. Therefore, the first gate-source voltage Vgs1 is equal to the fixed voltage Vc1 plus the voltage difference K*Isen*R3. Since the current K*Isen is related to the voltage difference Vdif between the input signal Vin and the output signal Vout, the regulation signal generation circuit 651 can adaptively adjust the first gate-source voltage Vgs1 according to the voltage difference Vdif, so that the on-resistance of the switching unit 41 remains at a fixed value when the voltage difference Vdif changes. The resistor R3 is coupled between the gate and source of the first switch Q1 to adaptively adjust the first gate-source voltage Vgs1 according to the sensing signal.

[0127] like Figure 6As shown, two current sources each provide a fixed current Ib, and the two fixed currents Ib flow through the first resistor R1 and the second resistor R2, respectively. The voltage difference across the first resistor R1 is voltage V1; the voltage difference across the second resistor R2 is voltage V2. The amplifier circuit 631 uses negative feedback control to adjust the voltages at the first input terminal N1 and the second input terminal N2 to the same level. Considering the channel resistance Ron of the first switch Q1 and the output current Iout flowing through the first switch Q1, and considering that R1 equals R2, the negative feedback control of the amplifier circuit 631 is as follows:

[0128] V1 + Iout × Ron = V2

[0129] Ib×R1+Iout×Ron=Isen×R2+Ib×R2

[0130] Ib×R1+Iout×Ron=Isen×R1+Ib×R1

[0131]

[0132] Therefore, the first gate-source voltage Vgs is as follows:

[0133]

[0134] Considering that R3 equals R1, the first gate-source voltage Vgs1 is as follows:

[0135]

[0136] Vgs1=Vc1+K×Iout×Ron

[0137] Vgs1=Vc1+K×Vdif

[0138] The results show that the sensing circuit 63 in this embodiment adjusts the voltages of the first input terminal N1 and the second input terminal N2 to the same level through negative feedback control, generating a sensing current Isen; wherein the sensing current Isen is related to the voltage difference Vdif between the input signal Vin and the output signal Vout; the gate-source voltage adjustment circuit 65 then adaptively adjusts the first gate-source voltage Vgs1 according to the sensing current Isen, so as to achieve the effect that the on-resistance of the switching unit 41 remains at a fixed value when the voltage difference changes.

[0139] In a preferred embodiment, such as Figure 6 As shown, the amplifier circuit 631 includes a supersource follower. In a preferred embodiment, the parameter K is a real number greater than 1.

[0140] Figure 7A schematic diagram of an analog switch circuit 70 according to the present invention is shown. In this embodiment, the analog switch circuit 70 and... Figure 6 The analog switch circuit 60 shown differs in that, in the analog switch circuit 70, the control circuit 62, in addition to the sensing circuit 63 and the gate-source voltage adjustment circuit 65, also includes a voltage divider circuit 77. The voltage divider circuit 77 is coupled between the input terminal T1 and the output terminal T2 to provide a base-source voltage divider for the first switch Q1, which provides the voltage difference Vdif between the output signal Vin and the input signal Vout. This allows the gate-source voltage adjustment circuit 65 to adaptively adjust the first gate-source voltage Vgs1 based on the base-source voltage divider. Furthermore, as... Figure 7 As shown, the gate-source voltage adjustment circuit 65 can be coupled between the substrate and the gate. In this way, regardless of whether the voltage difference between the voltage level of the input signal Vin and the voltage level of the output signal Vout is positive or negative, the gate-source voltage adjustment circuit 65 does not need to change the electrical connection to the input terminal T1 or the output terminal T2. It can adaptively adjust the first gate-source voltage Vgs1 so that the on-resistance of the switching unit 41 remains at a fixed value when the voltage difference changes, thereby improving harmonic distortion.

[0141] Figure 8 This diagram shows an analog switching circuit 80 according to the present invention. The analog switching circuit 80 includes a switching unit 81 and a control circuit 82. The control circuit 82 includes a sensing circuit 83 and a gate-source voltage adjustment circuit 85. Figure 8 As shown, the switching unit 81 operates the first switch Q1 and the second switch Q2 according to the first gate-source voltage Vgs1 and the second gate-source voltage Vgs2, thereby converting the input signal Vin at the input terminal T1 into the output signal Vout at the output terminal T2. The sensing circuit 83 is coupled between the input terminal T1 and the output terminal T2, and generates a sensing signal Ssen based on the voltage difference between the output signal Vin and the input signal Vout. The gate-source voltage adjustment circuit 85 is coupled to the sensing circuit 83 and adaptively adjusts the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 81 remains at a fixed value when the voltage difference changes.

[0142] In this embodiment, the analog switch circuit 80 and Figure 4A The difference between the analog switch circuit 40 and the analog switch circuit 80 is that, in addition to the first switch Q1, the switch unit 81 also includes a second switch Q2. The first switch Q1 and the second switch Q2 are connected in series and coupled between the input terminal T1 and the output terminal T2.

[0143] In one embodiment, such as Figure 8 As shown, the gate-source voltage regulation circuit 85 may further include a second regulation circuit 852. The second regulation circuit 852 adjusts the gate-source voltage according to the sensing signal Ssen (e.g., ...). Figure 8 (As indicated by the dashed arrow in the middle), a second gate-source voltage Vgs2 is generated to control the second switch Q2, so that the on-resistance remains at a fixed value when the voltage difference changes. In one embodiment, the second gate-source voltage Vgs2 is a fixed value.

[0144] In this embodiment, as Figure 8 As shown, the first switch Q1 includes, for example, a first metal oxide semiconductor (MOS) element, which is, for example, an N-type MOS element; the second switch Q2 includes a second MOS element, which is, for example, an N-type MOS element. The aforementioned voltage difference is related to the sum of the source-drain voltages of the first MOS element and the source-drain voltages of the second MOS element; the aforementioned on-resistance is related to the sum of the channel resistance of the first MOS element when it is on and the channel resistance of the second MOS element when it is on.

[0145] In one embodiment, the aforementioned voltage difference is equal to the sum of the source-drain voltages of the first MOS element and the second MOS element; the aforementioned on-resistance is equal to the sum of the channel resistance when the first MOS element is on and the channel resistance when the second MOS element is on. The sensing signal Ssen is proportional to the source-drain current when both the first and second MOS elements are on. The gate-source voltage adjustment circuit 85 adaptively adjusts the first gate-source voltage Vgs1 according to the aforementioned voltage difference change, i.e., the change in the sum of the source-drain voltages of the first and second MOS elements, to maintain the on-resistance at a fixed value. For example, such as... Figure 8 As shown, the first gate-source voltage Vgs1 is, for example, equal to a fixed voltage Vc1 plus parameter K multiplied by the sensing signal Ssen, where parameter K can be a fixed constant or an adjustable variable, set or adjusted according to user needs or harmonic distortion.

[0146] Figure 9 This diagram shows an analog switching circuit 90 according to the present invention. The analog switching circuit 90 includes a switching unit 81 and a control circuit 92. The control circuit 92 includes a sensing circuit 83, a gate-source voltage regulation circuit 85, and a voltage divider circuit 97. Figure 9As shown, the switching unit 81 operates the first switch Q1 and the second switch Q2 according to the first gate-source voltage Vgs1 and the second gate-source voltage Vgs2, thereby converting the input signal Vin at the input terminal T1 into the output signal Vout at the output terminal T2. The sensing circuit 83 is coupled between the input terminal T1 and the output terminal T2, and generates a sensing signal Ssen based on the voltage difference between the output signal Vin and the input signal Vout. The gate-source voltage adjustment circuit 85 is coupled to the sensing circuit 83 and adaptively adjusts the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 81 remains at a fixed value when the voltage difference changes. Voltage divider circuit 97 is coupled between input terminal T1 and output terminal T2 to divide the voltage difference between output signal Vin and input signal Vout, thereby generating a base-source voltage divider for the first switch Q1. This allows gate-source voltage adjustment circuit 85 to adaptively adjust the first gate-source voltage Vgs1 based on the base-source voltage divider. In this embodiment, the second gate-source voltage Vgs2 can, for example, be a fixed value.

[0147] Figure 10 This diagram shows an analog switching circuit 100 according to the present invention. The analog switching circuit 100 includes a switching unit 101 and a control circuit 102. The control circuit 102 includes a sensing circuit 103, a gate-source voltage adjustment circuit 105, and a voltage divider circuit 107. Figure 10 As shown, the switching unit 101 operates the first switch Q1 and the second switch Q2 according to the first gate-source voltage Vgs1 and the second gate-source voltage Vgs2, to convert the input signal Vin at the input terminal T1 into the output signal Vout at the output terminal T2. The sensing circuit 103 is coupled between the input terminal T1 and the output terminal T2, and generates a sensing signal Ssen based on the voltage difference Vdif between the output signal Vin and the input signal Vout. The gate-source voltage adjustment circuit 105 is coupled to the sensing circuit 103 and adaptively adjusts the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 101 remains at a fixed value when the voltage difference Vdif changes.

[0148] It should be noted that, Figure 10 The first gate voltage Vg1 shown is the voltage difference between the gate of the first switch Q1 (an N-type MOS device in this embodiment) and the ground potential; the second gate voltage Vg2 is the voltage difference between the gate of the second switch Q2 (an N-type MOS device in this embodiment) and the ground potential. Figure 10 As shown, the input voltage Vin and the output voltage Vout are relative to the ground potential.

[0149] In this embodiment, the switch unit 101 includes a first switch Q1 and a second switch Q2. The first switch Q1 and the second switch Q2 are serially coupled between an input terminal T1 and an output terminal T2. As Figure 10 shown, in one embodiment, the second switch Q2 is an N-type MOS element, which is operated by a second gate voltage Vg2. The first switch Q1 is an N-type MOS element, which is operated by a first gate voltage Vg1.

[0150] In one embodiment, considering Vin > Vout, the sources of both the first switch Q1 and the second switch Q2 are on the right side, closer to the output voltage Vout.

[0151] Wherein, the gate-source voltage Vgs2 of the second switch Q2 is:

[0152] Vgs2 = 2Ib × 2Rfod + VR5

[0153]

[0154] Wherein, the gate-source voltage Vgs1 of the first switch Q1 is:

[0155] Vgs1 = (2Ib + Isen) × 2Rfod + VR7

[0156]

[0157] In the case where the resistance values of R4 to R7 are equal

[0158]

[0159]

[0160] Wherein, |Vds2| + |Vds1| = |Vout - Vin|, and the absolute value takes into account both the cases of Vin < Vout and Vin > Vout.

[0161] Wherein, VR5 is the voltage difference across the resistor R5; VR7 is the voltage difference across the resistor R7; Vds1 is the drain-source voltage of the first switch Q1, and Vds2 is the drain-source voltage of the second switch Q2.

[0162] The second gate-source voltage Vgs2 is the voltage drop of two resistors Rfod plus the base-source voltage division of the second switch Q2 (assuming Vin > Vout, the source is on the right side closer to the output voltage Vout, and the base-source voltage division is the voltage drop across the resistor R5, and the positive end is at the base; if Vin < Vout, the source will be on the left side closer to the input voltage Vin, and the base-source voltage division is the voltage drop across the resistor R4, and the positive end is at the base).

[0163] The gate-source voltage Vgs2 of the second switch Q2 is the second gate voltage Vg2 minus the input voltage Vin (when the input voltage Vin < the output voltage Vout); or the second gate voltage Vg2 minus the voltage V4 (where the voltage V4 is the voltage at the junction between resistors R5 and R6) (when the input voltage Vin > the output voltage Vout).

[0164] The gate-source voltage Vgs1 of the first switch Q1 is the first gate voltage Vg1 minus the voltage V4 (when the input voltage Vin < the output voltage Vout); or the first gate voltage Vg1 minus the output voltage Vout (when the input voltage Vin > the output voltage Vout).

[0165] However, if R4 to R7 are all equal, it will be as shown in the formula with absolute values ​​above.

[0166] like Figure 10 As shown, the voltage divider circuit 107, in addition to the four resistors R4 connected in series between the input terminal T1 and the output terminal T2, also includes switches Q11, Q12, Q21, and Q22. These switches, when Q1 and Q2 are controlled to be non-conducting, simultaneously cut off the current path connecting the input signal Vin to the output signal Vout via the voltage divider resistors R4 to R7. Switch Q11 is coupled between the source and base of the first switch Q1; switch Q12 is coupled between the drain and base of the first switch Q1; switch Q21 is coupled between the source and base of the second switch Q2; and switch Q22 is coupled between the drain and base of the second switch Q2. Switches Q11 and Q12 are controlled by the first gate voltage Vg1; switches Q21 and Q22 are controlled by the second gate voltage Vg2. Switches Q11, Q12, Q21, and Q22 are used to prevent the first gate voltage Vg1 and the second gate voltage Vg2 from switching to the non-conducting level of switches Q1 and Q2. The input signal Vin at input terminal T1 is converted into the output signal Vout at output terminal T2 through four resistors R4.

[0167] This embodiment shows a more specific implementation of the gate-source voltage regulation circuit 105. For example... Figure 10As shown, the gate-source voltage regulation circuit 105 includes a super source follower 1051, a first impedance circuit 1053, and a second impedance circuit 1055. The super source follower 1051 is coupled between the sensing circuit 103 and the first impedance circuit 1053, and generates two summed currents 2Ib+Isen based on the sensing current Isen and fixed currents Ib and 2Ib related to the sensing signal Ssen. The first impedance circuit 1053 is coupled between the gate and source of the first switch Q1, and adaptively adjusts the first gate-source voltage Vgs1 according to the sensing signal Isen. The second impedance circuit 1055 is coupled to the super source follower 1051. The two summed currents 2Ib+Isen flow through the first impedance circuit 1053 and the second impedance circuit 1055 respectively, adaptively adjusting the first gate-source voltage Vgs1.

[0168] In this embodiment, the super source follower 1051 is Figure 10 On the lower side, the two transistors whose gates are coupled to each other can correspond to the aforementioned... Figure 6 and Figure 7 The amplifier within the amplifier circuit.

[0169] Figure 11 A schematic diagram of a more specific embodiment of the sensing circuit 103 according to the present invention is shown. For example... Figure 11 As shown, in this embodiment, switching elements M1, M2, and M3 are used to form a super source follower, which serves as an amplifier circuit 1031 with feedback control (see [reference]). Figure 6 (Amplifier circuit 631). In this circuit, via the negative feedback path provided by switching element M3, the source (first input terminal N1) of switching element M1 and the source (second input terminal N2) of switching element M2 are adjusted to the same voltage. Resistive elements M4 and M5 are, for example, field oxide devices, used as resistors (see [reference]). Figure 6 The first resistor R1 and the second resistor R2). In this embodiment, the channel resistor Ron is used to indicate the on-resistance of the switching unit. Therefore, the amplifier circuit 1031 generates a sensing current Isen based on the voltage difference Vdif generated by the output current Iout flowing through the channel resistor Ron.

[0170] Switching elements M6, M7, and M8 are used to form another super-source follower, serving as an amplifier circuit 1032 with feedback control. Through the negative feedback path provided by switching element M8, the sources of switching element M6 (third input terminal N3) and switching element M7 (fourth input terminal N4) are adjusted to the same voltage. Resistor elements M9 and M10 are, for example, field-oxidizing elements, used as resistors. Amplifier circuit 1032 serves as an amplifier circuit with feedback control when the input signal Vin is less than the output signal Vout, so that sensing circuit 103 can operate regardless of whether the input signal Vin is not less than or is less than the output signal Vout. Specifically, when the input signal Vin is not less than the output signal Vout, amplifier circuit 1031 generates a sensing current Isen based on the voltage difference Vdif generated by the output current Iout flowing through channel resistor Ron. When the input signal Vin is less than the output signal Vout, the amplifier circuit 1032 generates a sensing current Isen based on the voltage difference Vdif generated by the output current Iout flowing through the channel resistor Ron.

[0171] In addition to amplifier circuits 1031 and 1032 and resistors M4, M5, M9, and M10, sensing circuit 103 also includes current mirror circuits 1033 and 1034. Current mirror circuits 1033 and 1034, for example but not limited to, amplify the sensing current Isen by one time to generate the same sensing current Isen, which is then used as the sensing signal Ssen. Of course, the amplification factor of current mirror circuits 1033 and 1034 is not limited to 1:1; it can also be a factor of K, which is not 1.

[0172] Considering that the amplification factor of current mirror circuits 1033 and 1034 is 1, and the resistance values ​​of resistors M4, M5, M9, and M10 are all Rfod, the sensed current Isen is derived as follows:

[0173] Rfod×2Ib+Ron|Iout|=Rfod×Isen+Rfod×2Ib

[0174]

[0175] Therefore, the sensing current Isen used to illustrate the sensing signal Ssen is proportional to the voltage difference Vdif generated by the output current Iout of the channel resistor Ron.

[0176] Figures 12A-12E The Fast Fourier Transform (FFT) simulation results of the harmonic distortion of the output signal Vout of the analog switching circuit according to the present invention are shown. Figures 12A-12EAs shown, the second-order (inclusive) and higher harmonic distortion of the FFT according to an embodiment of the present invention can be lower than -110dB, which is superior to the prior art. Figures 12A-12E In the diagram, the horizontal axis represents the frequencies of the input signal Vin and the output signal Vout. For example... Figures 12A-12E As shown, the harmonic distortion of the second order (inclusive) and above of the FFT according to the embodiments of the present invention can be lower than -110dB at signal frequencies of 1KHz, 3KHz, 5KHz, 10KHz and 0.1KHz.

[0177] The present invention has been described above with reference to preferred embodiments. However, the above description is only intended to facilitate understanding of the invention by those skilled in the art and is not intended to limit the scope of the invention. The described embodiments are not limited to individual application and can also be used in combination. For example, two or more embodiments can be used in combination, and some components of one embodiment can be used to replace corresponding components in another embodiment. For example, Figure 10 The gate-source voltage regulation circuit 105 shown can also be applied to... Figure 4A , Figure 5 , Figure 6 , Figure 7 , Figure 8 , Figure 9 The embodiments shown are illustrated. Furthermore, within the same spirit of the invention, those skilled in the art will conceive of various equivalent variations and combinations. For example, the phrase "processing or calculating based on a signal or generating an output result" in this invention is not limited to the signal itself, but also includes, when necessary, performing voltage-to-current conversion, current-to-voltage conversion, and / or proportional conversion on the signal, and then processing or calculating based on the converted signal to generate an output result. Therefore, within the same spirit of the invention, those skilled in the art will conceive of various equivalent variations and combinations, many of which are not listed here. Thus, the scope of the invention should cover the above and all other equivalent variations.

Claims

1. An analog switch circuit, characterized by, A switching unit includes a first switch coupled in a current path between an input terminal and an output terminal to convert an input signal at the input terminal to an output signal at the output terminal according to a first gate-source voltage; and a control circuit including a sensing circuit coupled between the input terminal and the output terminal to generate a sensing signal according to a voltage difference between the output signal and the input signal; and a gate-source voltage adjustment circuit coupled to the sensing circuit to generate and adaptively adjust the first gate-source voltage according to the sensing signal, so that an on-resistance of the switching unit remains at a fixed value when the voltage difference changes. The sensing circuit includes an amplifier circuit having a first input terminal and a second input terminal; a first resistor coupled between the first input terminal and the input terminal; and a second resistor coupled between the second input terminal and the output terminal; wherein the amplifier circuit controls the voltages at the first input terminal and the second input terminal to be at the same level in a negative feedback manner; wherein the amplifier circuit generates an amplified current, and the sensing signal is proportional to the amplified current. The control circuit further includes a voltage divider circuit coupled between the input terminal and the output terminal to provide a base-source voltage difference of the voltage difference, so that the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the base-source voltage difference as well. The switching unit further includes a second switch coupled in series with the first switch between the input terminal and the output terminal. The relationship between the first gate-source voltage and the voltage difference is as follows: Vgs1 = Vc1 + α × Vdif wherein the first gate-source voltage Vgs1 is equal to a fixed voltage Vc1 and the voltage difference Vdif multiplied by a coefficient α; wherein the coefficient α is a real number greater than 1. The gate-source voltage adjustment circuit further generates a second gate-source voltage according to the sensing signal to control the second switch, so that the on-resistance remains at the fixed value when the voltage difference changes. The second gate-source voltage is a fixed value. The control circuit further includes a voltage divider circuit coupled between the input terminal and the output terminal to provide a base-source voltage difference of the voltage difference, so that the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the base-source voltage difference as well. The sensing circuit further includes a current mirror circuit to copy and amplify the amplified current to generate the sensing signal. The amplifier circuit includes a first super source follower.

2. The analog switch circuit of claim 1, wherein, The gate-source voltage adjustment circuit includes a first impedance circuit coupled between a first gate and a first source of the first switch to adaptively adjust the first gate-source voltage according to the sensing signal.

3. The analog switch circuit of claim 1, wherein, The gate-source voltage adjustment circuit further includes a second super source follower coupled between the sensing circuit and the first impedance circuit to generate two summed currents according to a sensing current related to the sensing signal and a fixed current; and a second impedance circuit coupled to the second super source follower.

4. The analog switch circuit of claim 1, wherein, ​ ​ ​ ​ 5. The analog switch circuit of claim 3, wherein, ​ 6. The analog switch circuit of claim 5, wherein, ​ 7. The analog switch circuit of claim 3, wherein, ​ 8. The analog switch circuit of claim 1, wherein, ​ 9. The analog switch circuit of claim 1, wherein, ​ 10. The analog switch circuit of claim 1, wherein, ​ 11. The analog switch circuit of claim 10, wherein, ​ ​ ​ The two summed currents flow through the first impedance circuit and the second impedance circuit, respectively, and the first gate-source voltage is adaptively adjusted.

12. The analog switch circuit of claim 1, wherein, The first switch comprises a first metal oxide semiconductor element, and the voltage difference is related to a source-drain voltage of the first metal oxide semiconductor element, and the on-resistance is related to a channel resistance when the first metal oxide semiconductor element is turned on; wherein the sensing signal is proportional to a source-drain current when the first metal oxide semiconductor element is turned on; wherein the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the voltage difference change to maintain the channel resistance at the fixed value when the first metal oxide semiconductor element is turned on.

13. The analog switch circuit of claim 3, wherein, The first switch comprises a first metal oxide semiconductor element, and the second switch comprises a second metal oxide semiconductor element, and the voltage difference is related to a sum of a source-drain voltage of the first metal oxide semiconductor element and a source-drain voltage of the second metal oxide semiconductor element; wherein the on-resistance is related to a sum of a channel resistance when the first metal oxide semiconductor element is turned on and a channel resistance when the second metal oxide semiconductor element is turned on; wherein the sensing signal is proportional to a source-drain current when the first metal oxide semiconductor element is turned on; wherein the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the voltage difference change to maintain the sum of the channel resistances at the fixed value.

14. A control circuit for an analog switch circuit, characterized in that Comprising: a sensing circuit coupled between an input terminal and an output terminal for generating a sensing signal according to a voltage difference between an output signal of the output terminal and an input signal of the input terminal; and a gate-source voltage adjustment circuit coupled with the sensing circuit for generating and adaptively adjusting a first gate-source voltage according to the sensing signal to operate a first switch of a switching unit of the analog switch circuit to convert the input signal into the output signal and maintain a on-resistance of the switching unit at a fixed value when the voltage difference changes; wherein the first switch is coupled in a current path between the input terminal and the output terminal; wherein the sensing circuit comprises: an amplification circuit having a first input terminal and a second input terminal; a first resistor coupled between the first input terminal and the input terminal; and a second resistor coupled between the second input terminal and the output terminal; wherein the amplification circuit controls the voltages of the first input terminal and the second input terminal to be at the same level in negative feedback; wherein the amplification circuit generates an amplification current, and the sensing signal is proportional to the amplification current.

15. The control circuit for an analog switch circuit as recited in claim 14, wherein, Further comprising a voltage dividing circuit coupled between the input terminal and the output terminal for providing a base-source voltage division of the voltage difference, so that the gate-source voltage adjustment circuit also adaptively adjusts the first gate-source voltage according to the base-source voltage division.

16. The control circuit for an analog switch circuit as recited in claim 14, wherein, The switching unit further comprises a second switch, and the first switch and the second switch are coupled in series between the input terminal and the output terminal.

17. The control circuit for an analog switch circuit as recited in claim 14, wherein, The relationship between the first gate-source voltage and the voltage difference is as follows: Vgs1=Vc1+α×Vdif wherein the first gate-source voltage Vgs1 is equal to a sum of a fixed voltage Vc1 and the voltage difference Vdif multiplied by a coefficient a; wherein the coefficient a is a real number greater than 1.

18. The control circuit for an analog switch circuit as recited in claim 16, wherein, The gate-source voltage adjustment circuit further generates a second gate-source voltage according to the sensing signal to control the second switch, so that the on-resistance is maintained at the fixed value when the voltage difference changes.

19. The control circuit for an analog switch circuit as recited in claim 18, wherein, The second gate-source voltage is a fixed value.

20. The control circuit for an analog switch circuit as recited in claim 16, wherein, The control circuit further includes a voltage divider circuit coupled between the input terminal and the output terminal to provide a base-source voltage drop of the voltage difference, so that the gate-source voltage adjustment circuit further adaptively adjusts the first gate-source voltage according to the base-source voltage drop.

21. The control circuit for an analog switch circuit as recited in claim 14, wherein, The sensing circuit further includes a current mirror circuit to copy and amplify the amplification current to generate the sensing signal.

22. The control circuit for an analog switch circuit as recited in claim 14, wherein, The amplification circuit includes a first super source follower.

23. The control circuit for an analog switch circuit as recited in claim 14, wherein, The gate-source voltage adjustment circuit includes a first impedance circuit coupled between a first gate and a first source of the first switch to adaptively adjust the first gate-source voltage according to the sensing signal.

24. The control circuit for an analog switch circuit as recited in claim 23, wherein, The gate-source voltage adjustment circuit further includes: a second super source follower coupled between the sensing circuit and the first impedance circuit to generate two summed currents according to a sensing current related to the sensing signal and a fixed current; and a second impedance circuit coupled with the second super source follower; wherein the two summed currents flow through the first impedance circuit and the second impedance circuit, respectively, to adaptively adjust the first gate-source voltage.

25. The control circuit for an analog switch circuit as recited in claim 15, wherein, The first switch includes a first metal-oxide-semiconductor element, and the voltage difference is related to a source-drain voltage of the first metal-oxide-semiconductor element, and the on-resistance is related to a channel resistance when the first metal-oxide-semiconductor element is turned on; wherein the sensing signal is proportional to a source-drain current when the first metal-oxide-semiconductor element is turned on; wherein the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the voltage difference change to maintain the channel resistance at the fixed value when the first metal-oxide-semiconductor element is turned on.

26. The control circuit for an analog switch circuit as recited in claim 16, wherein, The first switch includes a first metal-oxide-semiconductor element, and the second switch includes a second metal-oxide-semiconductor element, and the voltage difference is related to a sum of a source-drain voltage of the first metal-oxide-semiconductor element and a source-drain voltage of the second metal-oxide-semiconductor element; wherein the on-resistance is related to a sum of a channel resistance when the first metal-oxide-semiconductor element is turned on and a channel resistance when the second metal-oxide-semiconductor element is turned on; wherein the sensing signal is proportional to a source-drain current when the first metal-oxide-semiconductor element is turned on; wherein the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the voltage difference change to maintain the sum of the channel resistances at the fixed value.

27. A control method of an analog switch circuit, characterized by, includes: operating a first switch of an analog switch circuit according to a first gate-source voltage to convert an input signal of an input terminal to an output signal of an output terminal; generating a sensing signal according to a voltage difference between the output signal and the input signal; and and According to the sensing signal, the first gate-source voltage is adaptively adjusted so that a conduction resistance of a switch unit remains at a fixed value when the voltage difference changes. The first switch is coupled in a current path between the input terminal and the output terminal. The step of generating a sensing signal according to a voltage difference between the output signal and the input signal comprises: A first resistor is provided, coupled between a first input terminal and the input terminal. A second resistor is provided, coupled between a second input terminal and the output terminal. The voltages of the first input terminal and the second input terminal are adjusted to the same level by negative feedback control. A first amplified current is generated, and the sensing signal is proportional to the first amplified current.

28. The control method of the analog switch circuit according to claim 27, wherein A base-source voltage of the voltage difference is provided, and the first gate-source voltage is also adaptively adjusted according to the base-source voltage so that the conduction resistance remains at the fixed value when the voltage difference changes.

29. The control method of the analog switch circuit according to claim 27, wherein A second gate-source voltage is also adaptively adjusted according to the sensing signal to control a second switch so that the conduction resistance remains at the fixed value when the voltage difference changes. The first switch and the second switch are coupled in series between the input terminal and the output terminal.

30. The control method of the analog switch circuit according to claim 27, wherein The first switch comprises a first metal-oxide-semiconductor element, and the voltage difference is related to a source-drain voltage of the first metal-oxide-semiconductor element, and the conduction resistance is related to a channel resistance when the first metal-oxide-semiconductor element is turned on; the sensing signal is proportional to a source-drain current when the first metal-oxide-semiconductor element is turned on; and the step of adaptively adjusting the first gate-source voltage according to the voltage difference change is used to maintain the channel resistance of the first metal-oxide-semiconductor element at the fixed value when the first metal-oxide-semiconductor element is turned on.

31. The control method of the analog switch circuit according to claim 29, wherein The first switch comprises a first metal-oxide-semiconductor element, and the second switch comprises a second metal-oxide-semiconductor element, and the voltage difference is related to a sum of a source-drain voltage of the first metal-oxide-semiconductor element and a source-drain voltage of the second metal-oxide-semiconductor element; the conduction resistance is related to a sum of a channel resistance when the first metal-oxide-semiconductor element is turned on and a channel resistance when the second metal-oxide-semiconductor element is turned on; the sensing signal is proportional to a source-drain current when the first metal-oxide-semiconductor element is turned on; and the step of adaptively adjusting the first gate-source voltage according to the voltage difference change is used to maintain the sum of the channel resistances at the fixed value.

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