Method and apparatus for determining processor load
By distinguishing between the effective and ineffective processing time of processor tasks within a preset period and accumulating the working and statistical time, the problem of low processor load accuracy is solved, and more accurate load calculation is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ACTIONS ZHUHAI MICROELECTRONICS CO LTD
- Filing Date
- 2021-03-26
- Publication Date
- 2026-07-10
AI Technical Summary
In existing technologies, when determining the load through processor state machines or non-working threads, there may be a problem where the processor does not actually execute any tasks, but the load accuracy is low.
The processor's current load is calculated by accumulating working time and statistical time based on the task processing results within a preset period, distinguishing between effective and ineffective processing time.
It improves the accuracy of processor load and avoids the phenomenon of the processor misjudging the idle time as the working time.
Smart Images
Figure CN115129462B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of information processing technology, and in particular to a method and apparatus for determining processor load. Background Technology
[0002] In today's electronics, communications, and internet industries, processor load can be used to evaluate processor performance or optimize processor power consumption.
[0003] In existing technologies, processor load can be determined by the proportion of non-idle time in the processor's state machine, or by the proportion of working time of non-working threads in the processor. However, in both of these methods, although the processor may appear to be executing tasks through the state machine or non-working threads, it may actually be idling (i.e., not actually executing any tasks), leading to low accuracy in determining the processor load. Summary of the Invention
[0004] The exemplary embodiments of this disclosure provide a method and apparatus for determining processor load, which is used to improve the accuracy of processor load determination.
[0005] The first aspect of this disclosure provides a method for determining processor load, applied in a processor, the method comprising:
[0006] Within a preset period, tasks are processed in the order of execution, and for any processed task, the processing time of the task is determined.
[0007] If the processing result of the task is valid, the processing time of the task is added to the working time and statistical time corresponding to the preset period, respectively; if the processing result of the task is invalid, the processing time of the task is added to the statistical time corresponding to the preset period.
[0008] When the statistical duration corresponding to the preset period exceeds the preset period, the current load of the processor is determined based on the statistical duration corresponding to the preset period and the working duration.
[0009] In this embodiment, the corresponding time accumulation operation is performed based on the processing result of the task to determine the statistical duration and working duration within the preset period. This avoids the phenomenon of using the corresponding processing duration as the working duration when the processor is idle, thereby improving the accuracy of the determined processor load.
[0010] In one embodiment, determining the current load of the processor based on the statistical duration and the working duration corresponding to the preset period includes:
[0011] The intermediate load parameter is obtained by dividing the working duration by the statistical duration; and...
[0012] The current load of the processor is obtained based on the intermediate load parameters.
[0013] This embodiment determines intermediate load parameters based on working time and statistical time to obtain the current load of the processor, thereby making the determined load more accurate.
[0014] In one embodiment, before determining the processing time of any processed task, the method further includes:
[0015] The processing result of the task is determined according to the following method:
[0016] If it is determined that the amount of data to be processed in the processor's data input buffer is greater than a first preset threshold and the amount of processed data in the processor's data output buffer is less than a second preset threshold, then the processing result of the task is determined to be valid; or,
[0017] If it is determined that the amount of data to be processed in the processor's data input buffer is not greater than the first preset threshold or the amount of processed data in the processor's data output buffer is not less than the second preset threshold, then the processing result of the task is determined to be invalid.
[0018] In this embodiment, the processing result is determined by comparing the amount of data to be processed in the data input buffer with a first preset threshold, and by comparing the amount of processed data in the data output buffer with a second preset threshold, so that the obtained processing result is more accurate.
[0019] In one embodiment, the method further includes:
[0020] Before processing each task sequentially within a preset period, the method further includes:
[0021] In response to a user's setting instruction for the preset period, the preset period is determined.
[0022] This embodiment determines the preset period based on the user's setting instructions, so that the preset period can be set according to the actual situation, thereby enabling the statistical analysis of the current load of the processor with different precision.
[0023] In one embodiment, after determining the current load of the processor based on the statistical duration and the working duration corresponding to the preset period, the method further includes:
[0024] Clear the working time and statistical time corresponding to the preset period.
[0025] In this embodiment, after determining the current load of the processor, the working time and statistical time corresponding to the preset cycle are cleared to avoid affecting the accuracy of determining the processor load in the next cycle.
[0026] A second aspect of this disclosure provides an apparatus for determining processor load, the apparatus comprising:
[0027] The processing time determination module is used to process each task in the order of execution within a preset period, and to determine the processing time of any processed task.
[0028] An accumulation module is used to, if the processing result of the task is valid, add the processing time of the task to the working time and statistical time corresponding to the preset period respectively; if the processing result of the task is invalid, add the processing time of the task to the statistical time corresponding to the preset period.
[0029] The current load determination module is used to determine the current load of the processor based on the statistical duration corresponding to the preset period and the working duration when the statistical duration corresponding to the preset period is greater than the preset period.
[0030] In one embodiment, the current load determination module is specifically used for:
[0031] The intermediate load parameter is obtained by dividing the working duration by the statistical duration; and...
[0032] The current load of the processor is obtained based on the intermediate load parameters.
[0033] In one embodiment, the apparatus further includes:
[0034] The processing result determination module is used to determine the processing result of any processed task before determining the processing time of that task, according to the following method:
[0035] If it is determined that the amount of data to be processed in the processor's data input buffer is greater than a first preset threshold and the amount of processed data in the processor's data output buffer is less than a second preset threshold, then the processing result of the task is determined to be valid; or,
[0036] If it is determined that the amount of data to be processed in the processor's data input buffer is not greater than the first preset threshold or the amount of processed data in the processor's data output buffer is not less than the second preset threshold, then the processing result of the task is determined to be invalid.
[0037] In one embodiment, the apparatus further includes:
[0038] The preset period determination module is used to determine the preset period in response to a user's setting instruction for the preset period before processing each task sequentially within the preset period.
[0039] In one embodiment, the apparatus further includes:
[0040] The duration clearing module is used to clear the working duration and the statistical duration corresponding to the preset period after determining the current load of the processor based on the statistical duration and the working duration corresponding to the preset period.
[0041] According to a third aspect of the present disclosure, an electronic device is provided, comprising:
[0042] At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor; the instructions being executed by the at least one processor to enable the at least one processor to perform the method as described in the first aspect.
[0043] According to a fourth aspect provided in the embodiments of this disclosure, a computer storage medium is provided, the computer storage medium storing a computer program for performing the method as described in the first aspect.
[0044] The beneficial effects of this disclosed solution are as follows: By determining whether the processing time of each task is the working time based on the processing result of each task, the statistical time and working time within a preset period are determined. This avoids the phenomenon of determining the corresponding processing time as the working time when the processor is idle, thereby improving the accuracy of determining the processor load. Attached Figure Description
[0045] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0046] Figure 1 This is a schematic diagram illustrating an applicable scenario according to one embodiment of the present disclosure;
[0047] Figure 2 This is one of the flowcharts illustrating a method for determining processor load according to an embodiment of the present disclosure;
[0048] Figure 3This is a schematic diagram of an interface for a method for determining processor load according to an embodiment of the present disclosure;
[0049] Figure 4 This is a second schematic flowchart illustrating a method for determining processor load according to an embodiment of the present disclosure;
[0050] Figure 5 This is an apparatus for determining processor load according to an embodiment of the present disclosure;
[0051] Figure 6 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present disclosure. Detailed Implementation
[0052] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.
[0053] In this disclosure, the term "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.
[0054] The application scenarios described in this disclosure are for the purpose of more clearly illustrating the technical solutions of this disclosure and do not constitute a limitation on the technical solutions provided in this disclosure. Those skilled in the art will understand that with the emergence of new application scenarios, the technical solutions provided in this disclosure are also applicable to similar technical problems. In the description of this disclosure, unless otherwise stated, "multiple" means two or more.
[0055] In existing technologies, processor load can be determined by the proportion of non-idle time in the processor's state machine, or by the proportion of working time of non-working threads in the processor. However, in both of these methods, although the processor may appear to be executing tasks through the state machine or non-working threads, it may actually be idling (i.e., not actually executing any tasks), resulting in low accuracy of the determined processor load.
[0056] Therefore, this disclosure provides a method for determining processor load. By performing a corresponding time accumulation operation based on the task processing results, the statistical time and working time within a preset period are determined. This avoids the phenomenon of using the corresponding processing time as the working time when the processor is idle, thereby improving the accuracy of the determined load. The solution of this disclosure will now be described in detail with reference to the accompanying drawings.
[0057] like Figure 1 The illustration shows an application scenario for a method to determine processor load. This scenario includes a terminal device 110 and a processor 120. The terminal device 110 can be a mobile phone, tablet computer, or personal computer, etc. The processor 120 can be a central processing unit, digital signal processor, etc. This disclosure does not impose any limitations on the application.
[0058] In one possible application scenario, the processor 120 processes tasks in execution order within a preset period. For any processed task, the processing time of the task is determined. If the processing result of the task is valid, the processor 120 adds the processing time of the task to the working time and statistical time corresponding to the preset period, respectively. If the processing result of the task is invalid, the processing time of the task is added to the statistical time corresponding to the preset period. When the statistical time corresponding to the preset period is greater than the preset period, the processor 120 determines the current load of the processor 120 based on the statistical time and the working time corresponding to the preset period, and sends the current load to the terminal device 110 for display.
[0059] like Figure 2 The diagram shown is a flowchart illustrating the processor load determination method of this disclosure, which, when applied to a processor, may include the following steps:
[0060] Step 201: Process each task in the order of execution within a preset period, and determine the processing time for any processed task.
[0061] The processing time for each task can be determined by setting a timer.
[0062] In one embodiment, the preset period can be determined by: determining the preset period in response to a user's setting instruction for the preset period.
[0063] For example, such as Figure 3 As shown, users can enter a preset period in the settings interface according to their needs, and then click the OK button to complete the setting of the preset period. For example, if a user enters 300 in the settings interface and clicks the OK button, the preset period will be set to 300 milliseconds.
[0064] Therefore, a preset period can be set according to the user's needs, thereby determining the current load with different levels of accuracy.
[0065] Step 202: If the processing result of the task is valid, the processing time of the task is added to the working time and statistical time corresponding to the preset period, respectively; if the processing result of the task is invalid, the processing time of the task is added to the statistical time corresponding to the preset period.
[0066] Invalid processing means that the task was not actually executed (i.e., it ran without being executed). Valid processing means that the task was actually executed.
[0067] Step 203: When the statistical duration corresponding to the preset period is greater than the preset period, determine the current load of the processor based on the statistical duration corresponding to the preset period and the working duration.
[0068] In one embodiment, determining the current load of the processor may include the following two methods:
[0069] Method 1: Divide the working time and the statistical time to obtain the intermediate load parameter; and obtain the current load of the processor based on the intermediate load parameter.
[0070] The current load of the processor can be determined by formula (1).
[0071]
[0072] in, is the current load of the processor, w is the working duration, and s is the statistical duration.
[0073] Method 2: Divide the working time and the statistical time to obtain the current load of the processor.
[0074] The current load of the processor can be determined by formula (2).
[0075]
[0076] in, is the current load of the processor, w is the working duration, and s is the statistical duration.
[0077] To ensure more accurate determination of processing results, in one embodiment, before determining the processing time of any processed task, the processing result of the task is determined according to the following method: if it is determined that the amount of data to be processed in the processor's data input buffer is greater than a first preset threshold and the amount of processed data in the processor's data output buffer is less than a second preset threshold, then the processing result of the task is determined to be valid processing; or, if it is determined that the amount of data to be processed in the processor's data input buffer is not greater than the first preset threshold or the amount of processed data in the processor's data output buffer is not less than the second preset threshold, then the processing result of the task is determined to be invalid processing.
[0078] The first preset threshold and the second preset threshold may be equal or unequal. They can be set according to actual conditions, and this disclosure does not impose any limitations on them. It should be further noted that in this embodiment of the invention, the data input buffer and data output buffer may include registers, FIFOs, DMA, shared RAM, etc. The following description uses the example of registers as both the input buffer and the data output buffer to illustrate the implementation process of the invention:
[0079] For example, the first threshold is 100KB (bytes), and the second preset threshold is 50KB. If it is determined that the amount of data to be processed in the processor's input register is 110KB, and the amount of processed data in the output register is 40KB, then the processing result of the task is determined to be valid.
[0080] If it is determined that the amount of data to be processed in the input register is 110KB and the amount of processed data in the output register is 60KB, then the processing result of the task is determined to be invalid.
[0081] If it is determined that the amount of data to be processed in the input register is 10KB and the amount of processed data in the output register is 40KB, then the processing result of the task is determined to be invalid.
[0082] Therefore, by comparing the amount of data to be processed in the data input buffer with a first preset threshold, and by comparing the amount of processed data in the data output buffer with a second preset threshold, the processing result is determined, making the obtained processing result more accurate.
[0083] In order to avoid affecting the accuracy of determining the processor load in the next cycle, in one embodiment, after step 203 is completed, the working time and the statistical time corresponding to the preset cycle are cleared.
[0084] For example, if the current load of the processor is determined when the working time is 40 milliseconds and the statistical time is 110 milliseconds, then after determining the current load, the working time is set to 0, and the statistical time is also set to 0.
[0085] Therefore, by clearing the working time and statistical time corresponding to the preset cycle after determining the current load of the processor, the accuracy of determining the processor load in the next cycle can be avoided.
[0086] To further understand the technical solution of this disclosure, the following is in conjunction with... Figure 4 A detailed explanation may include the following steps:
[0087] Step 401: In response to the user's setting instruction for the preset period, determine the preset period;
[0088] Step 402: Process each task in the order of execution within a preset period, and determine the processing time for any processed task.
[0089] Step 403: Determine whether the processing result of the task is valid. If yes, proceed to step 404; otherwise, proceed to step 405.
[0090] Step 404: Add the processing time of the task to the working time and statistical time corresponding to the preset period, respectively;
[0091] Step 405: Add the processing time of the task to the statistical time corresponding to the preset period;
[0092] Step 406: When the statistical duration corresponding to the preset period is greater than the preset period, determine the current load of the processor based on the statistical duration corresponding to the preset period and the working duration;
[0093] Step 407: Clear the working time and the statistical time corresponding to the preset period.
[0094] The following is a detailed description of the solution disclosed herein, using a preset period of 100 milliseconds, an initial working time of 0 milliseconds, and a statistical time of 0 milliseconds. The tasks to be executed are, in sequence: Task 1, Task 2, Task 3, and Task 4.
[0095] When executing Task 1, its processing time is determined to be 20 milliseconds. The result of Task 1 is considered valid. Therefore, the 20 milliseconds are added to both the working time and the statistical time, resulting in a working time of 20 milliseconds and a statistical time of 20 milliseconds. Since the statistical time is less than the preset period, Task 2 is executed. The processing time of Task 2 is determined to be 40 milliseconds, and the result of Task 2 is considered invalid. Therefore, the 40 milliseconds are added to the statistical time, resulting in a statistical time of 60 milliseconds, while the working time remains 20 milliseconds. Since the statistical time is still less than the preset period, Task 3 is executed. The processing time of Task 3 is determined to be 30 milliseconds, and the result of Task 3 is considered invalid. Therefore, the 30 milliseconds are added to the statistical time, resulting in a statistical time of 90 milliseconds, while the working time remains 20 milliseconds. Finally, since the statistical time is less than the preset period, Task 4 is executed. If the processing time for Task 4 is determined to be 20 milliseconds, and the processing result is considered valid, then these 20 milliseconds are added to both the working time and the statistical time. At this point, the working time is 40 milliseconds, and the statistical time is 110 milliseconds. Therefore, the statistical time is determined to be longer than the preset period. Using the working time and statistical time, the current processor load is determined to be 36.36%. Then, the working time and statistical time are cleared.
[0096] Therefore, by performing the corresponding time accumulation operation based on the task processing results, the statistical duration and working duration within the preset period are determined, avoiding the phenomenon of using the corresponding processing duration as the working duration when the processor is idle, thereby improving the accuracy of the determined processor load.
[0097] Based on the same disclosed concept, the processor load determination method described above can also be implemented by a processor load determination apparatus. The effect of this processor load determination apparatus is similar to that of the aforementioned method, and will not be repeated here.
[0098] Figure 5 This is a schematic diagram of a processor load determination apparatus according to an embodiment of the present disclosure.
[0099] like Figure 5 As shown, the processor load determination device 500 of this disclosure may include a processing time determination module 510, an accumulation module 520, and a current load determination module 530.
[0100] The processing time determination module 510 is used to process each task in the order of execution within a preset period, and to determine the processing time of any processed task.
[0101] The accumulation module 520 is used to, if the processing result of the task is valid, add the processing time of the task to the working time and statistical time corresponding to the preset period respectively; if the processing result of the task is invalid, add the processing time of the task to the statistical time corresponding to the preset period.
[0102] The current load determination module 530 is used to determine the current load of the processor based on the statistical duration corresponding to the preset period and the working duration when the statistical duration corresponding to the preset period is greater than the preset period.
[0103] In one embodiment, the current load determination module 530 is specifically used for:
[0104] The intermediate load parameter is obtained by dividing the working duration by the statistical duration; and...
[0105] The current load of the processor is obtained based on the intermediate load parameters.
[0106] In one embodiment, the apparatus further includes:
[0107] The processing result determination module 540 is used to determine the processing result of any processed task according to the following method before determining the processing time of the task:
[0108] If it is determined that the amount of data to be processed in the processor's data input buffer is greater than a first preset threshold and the amount of processed data in the processor's data output buffer is less than a second preset threshold, then the processing result of the task is determined to be valid; or,
[0109] If it is determined that the amount of data to be processed in the processor's data input buffer is not greater than the first preset threshold or the amount of processed data in the processor's data output buffer is not less than the second preset threshold, then the processing result of the task is determined to be invalid.
[0110] In one embodiment, the apparatus further includes:
[0111] The preset period determination module 550 is used to determine the preset period in response to a user's setting instruction for the preset period before processing each task sequentially within the preset period.
[0112] In one embodiment, the apparatus further includes:
[0113] The duration clearing module 560 is used to clear the working duration and statistical duration corresponding to the preset period after determining the current load of the processor based on the statistical duration and working duration corresponding to the preset period.
[0114] Having introduced a method and apparatus for determining processor load according to an exemplary embodiment of the present disclosure, the following describes an electronic device according to another exemplary embodiment of the present disclosure.
[0115] Those skilled in the art will understand that various aspects of this disclosure can be implemented as a system, method, or program product. Therefore, various aspects of this disclosure can be specifically implemented in the following forms: a completely hardware implementation, a completely software implementation (including firmware, microcode, etc.), or a combination of hardware and software aspects, collectively referred to herein as a "circuit," "module," or "system."
[0116] In some possible implementations, the electronic device according to this disclosure may include at least one processor and at least one computer storage medium. The computer storage medium stores program code that, when executed by the processor, causes the processor to perform steps in the processor load determination method according to various exemplary embodiments of this disclosure described above. For example, the processor may perform actions such as... Figure 2 Steps 201-203 are shown in the diagram.
[0117] The following reference Figure 6 To describe an electronic device 600 according to such an embodiment of the present disclosure. Figure 6 The electronic device 600 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments disclosed herein.
[0118] like Figure 6 As shown, the electronic device 600 is manifested in the form of a general electronic device. The components of the electronic device 600 may include, but are not limited to: at least one processor 601, at least one computer storage medium 602, and a bus 603 connecting different system components (including the computer storage medium 602 and the processor 601).
[0119] Bus 603 represents one or more of several bus structures, including a computer storage media bus or computer storage media controller, peripheral bus, processor, or local bus using any of the various bus structures.
[0120] Computer storage medium 602 may include readable media in the form of volatile computer storage media, such as random access computer storage medium (RAM) 621 and / or cache storage medium 622, and may further include read-only computer storage medium (ROM) 623.
[0121] The computer storage medium 602 may also include a program / utility 625 having a set (at least one) of program modules 624, including but not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of these examples may include an implementation of a network environment.
[0122] Electronic device 600 can also communicate with one or more external devices 604 (e.g., keyboard, pointing device, etc.), and with one or more devices that enable a user to interact with electronic device 600, and / or with any device that enables electronic device 600 to communicate with one or more other electronic devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 605. Furthermore, electronic device 600 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 606. As shown, network adapter 606 communicates with other modules used in electronic device 600 via bus 603. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 600, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.
[0123] In some possible implementations, aspects of a processor load determination method provided in this disclosure may also be implemented as a program product comprising program code that, when run on a computer device, causes the computer device to perform the steps in the processor load determination method according to various exemplary embodiments of this disclosure as described above.
[0124] The program product may take the form of any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access computer storage media (RAM), read-only computer storage media (ROM), erasable programmable read-only computer storage media (EPROM or flash memory), optical fibers, portable compact disk read-only computer storage media (CD-ROM), optical computer storage media, magnetic computer storage media, or any suitable combination thereof.
[0125] The processor-loaded program product of the embodiments of this disclosure can be a portable compact disc read-only computer storage medium (CD-ROM) and include program code, and can run on an electronic device. However, the program product of this disclosure is not limited thereto. In this document, the readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.
[0126] A readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying readable program code. This propagated data signal may take many forms, including—but not limited to—electromagnetic signals, optical signals, or any suitable combination thereof. A readable signal medium may also be any readable medium other than a readable storage medium, capable of sending, propagating, or transmitting a program for use by or in conjunction with an instruction execution system, apparatus, or device.
[0127] The program code contained on the readable medium may be transmitted using any suitable medium, including—but not limited to—wireless, wired, fiber optic, RF, etc., or any suitable combination thereof.
[0128] Program code for performing the operations of this disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages such as Java and C++, and conventional procedural programming languages such as C or similar languages. The program code can execute entirely on the user's electronic device, partially on the user's device, as a standalone software package, partially on the user's electronic device and partially on a remote electronic device, or entirely on a remote electronic device or server. In cases involving remote electronic devices, the remote electronic device can be connected to the user's electronic device via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external electronic device (e.g., via the Internet using an Internet service provider).
[0129] It should be noted that although several modules of the apparatus have been mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more modules described above can be embodied in one module. Conversely, the features and functions of one module described above can be further divided and embodied by multiple modules.
[0130] Furthermore, although the operations of the methods disclosed herein are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all of the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.
[0131] Those skilled in the art will understand that embodiments of this disclosure can be provided as methods, systems, or computer program products. Therefore, this disclosure can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this disclosure can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk computer storage media, CD-ROMs, optical computer storage media, etc.) containing computer-usable program code.
[0132] This disclosure is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0133] These computer program instructions may also be stored in a computer-readable computer storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable computer storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0134] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0135] Obviously, those skilled in the art can make various modifications and variations to this disclosure without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include such modifications and variations.
Claims
1. A method for determining processor load, characterized in that, When applied to a processor, the method includes: Within a preset period, tasks are processed in the order of execution, and for any processed task, the processing time of the task is determined. If the processing result of the task is valid, the processing time of the task is added to the working time and statistical time corresponding to the preset period, respectively; if the processing result of the task is invalid, the processing time of the task is added to the statistical time corresponding to the preset period. When the statistical duration corresponding to the preset period exceeds the preset period, the current load of the processor is determined based on the statistical duration corresponding to the preset period and the working duration. Before determining the processing time of any processed task, the method further includes: The processing result of the task is determined according to the following method: If it is determined that the amount of data to be processed in the processor's data input buffer is greater than a first preset threshold and the amount of processed data in the processor's data output buffer is less than a second preset threshold, then the processing result of the task is determined to be valid; or, If it is determined that the amount of data to be processed in the processor's data input buffer is not greater than the first preset threshold or the amount of processed data in the processor's data output buffer is not less than the second preset threshold, then the processing result of the task is determined to be invalid.
2. The method according to claim 1, characterized in that, Determining the current load of the processor based on the statistical duration and working duration corresponding to the preset period includes: The intermediate load parameter is obtained by dividing the working duration by the statistical duration; and... The current load of the processor is obtained based on the intermediate load parameters.
3. The method according to claim 1, characterized in that, Before processing each task sequentially within a preset period, the method further includes: In response to a user's setting instruction for the preset period, the preset period is determined.
4. The method according to any one of claims 1 to 3, characterized in that, After determining the current load of the processor based on the statistical duration and working duration corresponding to the preset period, the method further includes: Clear the working time and statistical time corresponding to the preset period.
5. A device for determining processor load, characterized in that, The device includes: The processing time determination module is used to process each task in the order of execution within a preset period, and to determine the processing time of any processed task. An accumulation module is used to, if the processing result of the task is valid, add the processing time of the task to the working time and statistical time corresponding to the preset period respectively; if the processing result of the task is invalid, add the processing time of the task to the statistical time corresponding to the preset period. The current load determination module is used to determine the current load of the processor based on the statistical duration corresponding to the preset period and the working duration when the statistical duration corresponding to the preset period is greater than the preset period. The device further includes: The processing result determination module is used to determine the processing result of any processed task before determining the processing time of that task, according to the following method: If it is determined that the amount of data to be processed in the processor's data input buffer is greater than a first preset threshold and the amount of processed data in the processor's data output buffer is less than a second preset threshold, then the processing result of the task is determined to be valid; or, If it is determined that the amount of data to be processed in the processor's data input buffer is not greater than the first preset threshold or the amount of processed data in the processor's data output buffer is not less than the second preset threshold, then the processing result of the task is determined to be invalid.
6. The apparatus according to claim 5, characterized in that, The current load determination module is specifically used for: The intermediate load parameter is obtained by dividing the working duration by the statistical duration; and... The current load of the processor is obtained based on the intermediate load parameters.
7. The apparatus according to claim 5, characterized in that, The device further includes: The preset period determination module is used to determine the preset period in response to a user's setting instruction for the preset period before processing each task sequentially within the preset period.
8. The apparatus according to any one of claims 5 to 7, characterized in that, The device further includes: The duration clearing module is used to clear the working duration and the statistical duration corresponding to the preset period after determining the current load of the processor based on the statistical duration and the working duration corresponding to the preset period.
9. An electronic device, characterized in that, The method includes at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions that are executed by the at least one processor; the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1-4.
10. A computer storage medium, characterized in that, The computer storage medium stores a computer program for performing the method according to any one of claims 1-4.