A method for enhancing sidewall protection of back-end integrated RRAM structure

Abstract

The present invention provides a method for enhancing the sidewall protection of a back-end integrated RRAM structure. A metal structure is formed in a silicon oxide layer, extending through the upper and lower surfaces. An NDC layer is formed on the silicon oxide layer and the metal structure, and a tungsten structure is formed in the NDC layer on the metal structure, extending through the upper and lower surfaces. An RRAM structure is formed on the upper surface of the NDC layer, covering the tungsten structure. A first silicon nitride layer is then formed on the RRAM structure. A second silicon nitride layer is then formed on the NDC layer and the first silicon nitride layer, the second silicon nitride layer also covering the sidewalls of the RRAM structure. The second silicon nitride layer on the NDC layer is then etched away, while retaining the second silicon nitride layer on the sidewalls of the RRAM structure. This method integrates RRAM without changing the height of the vias or metal layers, fully ensuring electrical consistency in the back-end process.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for enhancing sidewall protection of a back-end integrated RRAM structure. Background Art

[0002] RRAM structures (resistive random access memory structures) are usually inserted into the back-end of line (BEOL) of copper interconnects and are laterally wrapped by a large amount of silicon dioxide. If the sidewalls of the RRAM structure are not protected, its performance and reliability will be greatly challenged.

[0003] Therefore, a new method needs to be proposed to solve the above problems. Summary of the Invention

[0004] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a method for enhancing the sidewall protection of the back-end integrated RRAM structure, so as to solve the problem in the prior art that the device performance is degraded due to the lack of protection of the sidewall of the RRAM structure.

[0005] To achieve the above and other related objectives, the present invention provides a method for enhancing sidewall protection of a back-end integrated RRAM structure, comprising at least:

[0006] Step 1: providing a silicon oxide layer, wherein a metal structure is formed in the silicon oxide layer and penetrates the upper and lower surfaces thereof;

[0007] Step 2: forming an NDC layer on the silicon oxide layer and the metal structure, and forming a tungsten structure penetrating the upper and lower surfaces of the NDC layer on the metal structure;

[0008] Step 3: forming an RRAM structure covering the tungsten structure on the upper surface of the NDC layer, and then forming a first silicon nitride layer on the RRAM structure;

[0009] Step 4: Covering the NDC layer and the first silicon nitride layer with a second silicon nitride layer, wherein the second silicon nitride layer also covers the sidewalls of the RRAM;

[0010] Step 5: Etching and removing the second silicon nitride layer on the NDC layer, and retaining the second silicon nitride layer on the sidewall of the RRAM.

[0011] Preferably, the method of forming a metal structure penetrating the upper and lower surfaces of the silicon oxide layer in step 1 includes: first forming a first through hole penetrating the upper and lower surfaces of the silicon oxide layer, and then filling metal in the first through hole to form the metal structure.

[0012] Preferably, the method of forming a tungsten structure penetrating the upper and lower surfaces of the NDC layer in step 2 includes: first forming a second through hole penetrating the upper and lower surfaces of the NDC layer, and then filling tungsten in the second through hole to form the tungsten structure.

[0013] Preferably, the method of forming an RRAM structure covering the tungsten structure on the upper surface of the NDC layer in step three includes: first covering the NDC layer and the upper surface of the tungsten structure with a layer of RRAM layer, and then etching away part of the RRAM layer on the NDC layer, so that the RRAM layer covering the upper surface of the tungsten structure is retained, thereby forming the RRAM structure.

[0014] Preferably, the method of forming the first silicon nitride layer in step three is chemical vapor deposition.

[0015] Preferably, the method of forming the second silicon nitride layer in step 4 is chemical vapor deposition.

[0016] Preferably, the method further includes step six, covering the NDC layer and the second silicon nitride layer on the RRAM with silicon oxide; step seven, forming a third through hole in the silicon oxide that passes through its upper surface to the upper surface of the RRAM; and step eight, filling the third through hole with metal.

[0017] As described above, the present invention's method for enhancing sidewall protection for back-end integrated RRAM structures has the following beneficial effects: In the back-end process where the RRAM structure is integrated into copper interconnects, in addition to depositing silicon nitride on the RRAM structure, a sufficiently thick layer of silicon nitride is added after RRAM etching. The silicon nitride on the NDC is then removed by etching in the standard back-end process. This allows the RRAM to be integrated without changing the height of the vias and metal layers, fully ensuring electrical consistency in the back-end process. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 Shown is a schematic diagram of the structure after etching the second silicon nitride layer in the present invention;

[0019] Figure 2 It is a schematic structural diagram showing the second silicon nitride layer remaining on the sidewall of the RRAM structure after etching the second silicon nitride layer in the present invention;

[0020] Figure 3 Shown is a schematic diagram of the structure after metal through holes are formed on the RRAM structure in the present invention;

[0021] Figure 4 Shown is a flow chart of the method for enhancing the sidewall protection of the back-end integrated RRAM structure in the present invention. DETAILED DESCRIPTION

[0022] The following describes the embodiments of the present invention through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present invention from the disclosure herein. The present invention may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different viewpoints and applications without departing from the spirit of the present invention.

[0023] See also Figures 1 to 4 It should be noted that the diagrams provided in this embodiment are merely schematic illustrations of the basic concept of the present invention. Therefore, the diagrams only show components related to the present invention and are not drawn according to the number, shape, and size of components in actual implementation. In actual implementation, the type, quantity, and proportion of each component may be changed arbitrarily, and the component layout may also be more complex.

[0024] The present invention provides a method for enhancing the sidewall protection of the back-end integrated RRAM structure, such as Figure 4 As shown, Figure 4 The flowchart of the method for enhancing the sidewall protection of the back-end integrated RRAM structure in the present invention is shown. The method includes at least the following steps:

[0025] Step 1: providing a silicon oxide layer, wherein a metal structure is formed in the silicon oxide layer and penetrates the upper and lower surfaces thereof;

[0026] The present invention further provides that the method for forming a metal structure penetrating the upper and lower surfaces of the silicon oxide layer in step 1 of this embodiment includes: first forming a first through hole penetrating the upper and lower surfaces of the silicon oxide layer, and then filling metal in the first through hole to form the metal structure.

[0027] like Figure 1 As shown, Figure 1 The schematic diagram of the structure after etching the second silicon nitride layer in the present invention is shown. Step 1 provides a silicon oxide layer (SiO2), wherein a metal structure (Mx) is formed in the silicon oxide layer (SiO2) and extends through the upper and lower surfaces thereof. The method for forming the metal structure (Mx) in the silicon oxide layer (SiO2) and extending through the upper and lower surfaces thereof includes: first forming a first through-hole in the silicon oxide layer (SiO2) and extending through the upper and lower surfaces thereof, and then filling the first through-hole with metal to form the metal structure (Mx).

[0028] Step 2: forming an NDC layer on the silicon oxide layer and the metal structure, and forming a tungsten structure penetrating the upper and lower surfaces of the NDC layer on the metal structure;

[0029] The present invention further provides that in step 2 of this embodiment, the method for forming a tungsten structure in the NDC layer that passes through its upper and lower surfaces includes: first forming a second through hole in the NDC layer that passes through its upper and lower surfaces, and then filling tungsten in the second through hole to form the tungsten structure.

[0030] like Figure 1 As shown, in step 2, an NDC layer (NDC) is formed on the silicon oxide layer (SiO2) and the metal structure (Mx), and a tungsten structure (W) penetrating the upper and lower surfaces is formed in the NDC layer (NDC) on the metal structure (Mx); specifically, the method for forming the tungsten structure (W) penetrating the upper and lower surfaces in the NDC layer (NDC) includes: first forming a second through hole penetrating the upper and lower surfaces in the NDC layer, and then filling tungsten in the second through hole to form the tungsten structure (W).

[0031] Step 3: forming an RRAM structure covering the tungsten structure on the upper surface of the NDC layer, and then forming a first silicon nitride layer on the RRAM structure;

[0032] The present invention further provides that in step three of this embodiment, the method for forming an RRAM structure covering the tungsten structure on the upper surface of the NDC layer includes: first covering the upper surface of the NDC layer and the tungsten structure with a layer of RRAM layer, and then etching away a portion of the RRAM layer on the NDC layer so that the RRAM layer covering the upper surface of the tungsten structure is retained, thereby forming the RRAM structure.

[0033] Furthermore, in the present invention, the method of forming the first silicon nitride layer in step three of this embodiment is chemical vapor deposition.

[0034] like Figure 1 As shown, in step three, a RRAM structure 01 covering the tungsten structure (W) is formed on the upper surface of the NDC layer (NDC), and then a first silicon nitride layer (SiN1) is formed on the RRAM structure 01. Specifically, Figure 1 As shown, the method for forming an RRAM structure covering the tungsten structure on the upper surface of the NDC layer includes: first covering the upper surface of the NDC layer and the tungsten structure with an RRAM layer, and then etching away a portion of the RRAM layer on the NDC layer so that the RRAM layer covering the upper surface of the tungsten structure is retained, thereby forming the RRAM structure. More specifically, the method for forming the first silicon nitride layer is chemical vapor deposition.

[0035] Step 4: Covering the NDC layer and the first silicon nitride layer with a second silicon nitride layer, wherein the second silicon nitride layer also covers the sidewalls of the RRAM structure;

[0036] Furthermore, in the present invention, the method of forming the second silicon nitride layer in step 4 of this embodiment is chemical vapor deposition.

[0037] like Figure 1 As shown, in step four, a second silicon nitride layer (SiN2) is covered on the NDC layer and the first silicon nitride layer, and the second silicon nitride layer (SiN2) also covers the sidewalls of the RRAM structure. Specifically, the method for forming the second silicon nitride layer is chemical vapor deposition.

[0038] Step 5: Etch and remove the second silicon nitride layer on the NDC layer, and retain the second silicon nitride layer on the sidewall of the RRAM structure. Figure 2 As shown, Figure 2 The schematic diagram of the structure of the second silicon nitride layer remaining on the sidewall of the RRAM structure after etching the second silicon nitride layer in the present invention is shown. In step five, the second silicon nitride layer (SiN2) on the NDC layer (NDC) is etched away, and the second silicon nitride layer (SiN2) on the sidewall of the RRAM structure 01 is retained. Figure 2 The structure shown.

[0039] The present invention further includes the following steps:

[0040] Step 6: Covering the NDC layer and the second silicon nitride layer on the RRAM structure with silicon oxide; Figure 3 As shown, Figure 3 It is a schematic diagram showing the structure after metal through holes are formed on the RRAM structure in the present invention.

[0041] The present invention further includes the following steps: Step 7: forming a third through hole in the silicon oxide, which passes through the upper surface of the silicon oxide and reaches the upper surface of the RRAM structure;

[0042] Furthermore, the present invention, the method of this embodiment further includes: Step 8, filling metal in the third through hole to form a metal structure Mx+1.

[0043] In summary, the present invention integrates the RRAM structure into the copper interconnect back-end process. In addition to depositing silicon nitride on the RRAM structure, a sufficiently thick layer of silicon nitride is added after RRAM etching. The silicon nitride on the NDC is then removed by etching in the standard back-end process. This allows the RRAM to be integrated without changing the height of the vias and metal layers, fully ensuring electrical consistency in the back-end process. Therefore, the present invention effectively overcomes the shortcomings of the prior art and has high industrial applicability.

[0044] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed herein are intended to be covered by the claims of the present invention.

Claims

1. A method for enhancing sidewall protection of a back-end integrated RRAM structure, characterized in that: At least: Step 1: providing a silicon oxide layer, wherein a metal structure is formed in the silicon oxide layer and penetrates the upper and lower surfaces thereof; Step 2: forming an NDC layer on the silicon oxide layer and the metal structure, and forming a tungsten structure penetrating the upper and lower surfaces of the NDC layer on the metal structure; Step 3: forming an RRAM structure covering the tungsten structure on the upper surface of the NDC layer, and then forming a first silicon nitride layer on the RRAM structure; Step 4: Covering the NDC layer and the first silicon nitride layer with a second silicon nitride layer, wherein the second silicon nitride layer also covers the sidewalls of the RRAM structure; Step 5: etching and removing the second silicon nitride layer on the NDC layer, and retaining the second silicon nitride layer on the sidewall of the RRAM structure; Step 6: Covering the NDC layer and the second silicon nitride layer on the RRAM structure with silicon oxide; Step 7: forming a third through hole in the silicon oxide, penetrating the upper surface thereof to the upper surface of the RRAM structure; Step eight: Fill the third through hole with metal.

2. The method for enhancing sidewall protection of a back-end integrated RRAM structure according to claim 1, wherein: The method of forming a metal structure penetrating the upper and lower surfaces of the silicon oxide layer in step 1 includes: first forming a first through hole penetrating the upper and lower surfaces of the silicon oxide layer, and then filling metal in the first through hole to form the metal structure.

3. The method for enhancing sidewall protection of a back-end integrated RRAM structure according to claim 1, wherein: The method of forming a tungsten structure penetrating the upper and lower surfaces of the NDC layer in step 2 includes: first forming a second through hole penetrating the upper and lower surfaces of the NDC layer, and then filling tungsten in the second through hole to form the tungsten structure.

4. The method for enhancing sidewall protection of a back-end integrated RRAM structure according to claim 1, wherein: The method of forming an RRAM structure covering the tungsten structure on the upper surface of the NDC layer in step three includes: first covering the NDC layer and the upper surface of the tungsten structure with a layer of RRAM layer, and then etching away a portion of the RRAM layer on the NDC layer, so that the RRAM layer covering the upper surface of the tungsten structure is retained, thereby forming the RRAM structure.

5. The method for enhancing sidewall protection of a back-end integrated RRAM structure according to claim 1, wherein: The method of forming the first silicon nitride layer in step three is chemical vapor deposition.

6. The method for enhancing sidewall protection of a back-end integrated RRAM structure according to claim 1, wherein: The method of forming the second silicon nitride layer in step 4 is chemical vapor deposition.

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