Image sensing circuit, display panel, and driving method of image sensing circuit

Abstract

This invention discloses an image sensing circuit, a display panel, and a driving method for the image sensing circuit. The image sensing circuit includes: a plurality of image sensing pixels arranged in an array, a plurality of scan lines, and a plurality of data lines; the scan lines and data lines are intersected; the scan lines extend along a first direction and are connected to the plurality of image sensing pixels arranged along the first direction; the data lines extend along a second direction and are connected to the plurality of image sensing pixels arranged along the second direction; and a plurality of first switching modules are connected between different data lines to conduct different data lines, thereby smoothing out charge differences between the data lines. This invention can improve the problem of uneven electrical signals acquired by different data lines in the image sensing circuit, thereby improving the uniformity of the image acquisition signal of the image sensing circuit.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of image sensor, and particularly relate to an image sensing circuit, a display panel and a driving method of the image sensing circuit. BACKGROUND

[0002] With the rapid development of thin film transistor (TFT) technology, TFT image sensors are widely used, especially in the consumer field for fingerprint recognition and the medical field for X-ray detection.

[0003] In the pixel signal acquisition circuit of the TFT image sensor, the charging and discharging speed of the image sensing pixel to the data line is affected by the parasitic capacitance of the data line, so that the signal acquisition amount of each pixel by the data line is inconsistent, thereby causing unstable acquisition of the electrical signal of the image sensor and poor image uniformity. SUMMARY

[0004] Embodiments of the present application provide an image sensing circuit, a display panel and a driving method of the image sensing circuit to improve the problem of unstable acquisition of the electrical signal of the image sensing circuit, thereby improving the uniformity of image acquisition of the image sensing circuit.

[0005] In a first aspect, embodiments of the present application provide an image sensing circuit, comprising:

[0006] a plurality of image sensing pixels arranged in an array, a plurality of scan lines and a plurality of data lines; the scan lines extend along a first direction, and the scan lines are connected to the plurality of image sensing pixels arranged along the first direction; the data lines extend along a second direction, and the data lines are connected to the plurality of image sensing pixels arranged along the second direction, the first direction and the second direction intersecting each other;

[0007] a plurality of first switch modules, each of the plurality of first switch modules being connected between different data lines, for turning on the different data lines to smooth the charge difference between the data lines.

[0008] Optionally, the first switch module comprises:

[0009] a first transistor, a gate of the first transistor being connected to a first switch control line, a first pole of the first transistor being connected to one data line, and a second pole of the first transistor being connected to another data line.

[0010] Optionally, the connection mode of the first switch module comprises at least one of the following modes:

[0011] the first switch module is connected between two adjacent data lines;

[0012] at least one data line is arranged between the two data lines connected by the first switch module.

[0013] The first end of the at least two first switch modules is connected to different data lines, and the second end is connected to the same data line.

[0014] Optionally, each data line is connected to at least one first switch module.

[0015] Preferably, the number of data lines is 1 more than the number of first switch modules.

[0016] Optionally, the data line comprises a first end portion and a second end portion.

[0017] The image sensing circuit further comprises a signal reading module, wherein the signal reading module is connected to the first end portion of the data line, and the first switch module is connected to the second end portion of the data line.

[0018] Preferably, the image sensing circuit further comprises a plurality of current sources, wherein the current sources are connected to the first end portion of the data line.

[0019] Optionally, the image sensing circuit further comprises:

[0020] a plurality of second switch modules, wherein the second switch modules are connected between the data line and a reference voltage line.

[0021] Preferably, the reference voltage line is a ground terminal.

[0022] Preferably, a connection point between the data line and the second switch module is defined as a first connection point, and a connection point between the second switch module and the reference voltage line is defined as a second connection point; the first switch module is connected between different first connection points, or the first switch module is connected between different second connection points.

[0023] Optionally, the second switch module comprises:

[0024] a second transistor, wherein the gate of the second transistor is connected to a second switch control line, the first pole of the second transistor is connected to a data line, and the second pole of the second transistor is connected to a reference voltage line.

[0025] Optionally, the first switch module is controlled by a first switch control signal, and the second switch module is controlled by a second switch control signal.

[0026] The first switch control signal is multiplexed as the second switch control signal.

[0027] Correspondingly, the present application further provides a display panel, comprising the image sensing circuit according to any one of the embodiments of the present application.

[0028] Correspondingly, the application also provides a driving method of the image sensing circuit, comprising a reset stage, an acquisition stage and a reading stage; wherein the reading stage comprises alternatingly arranged charge dissipation sub-stages and voltage reading sub-stages.

[0029] In the charge dissipation sub-stage, the plurality of first switch modules are controlled to be turned on to smooth the charge difference between the data lines.

[0030] In the voltage reading sub-stage, the plurality of first switch modules are controlled to be turned off.

[0031] The image sensing circuit provided by the embodiment of the application adds the plurality of first switch modules, which are respectively connected between different data lines. Thus, the embodiment of the application can control the first switch modules to be turned on before the data lines acquire the electric signals converted by the image sensing pixels, so as to connect the data lines and smooth the charge difference between the data lines, so that the initial voltages of different data lines are consistent. In this way, the acquisition amount of the electric signals of the image sensing pixels is consistent during the acquisition of the electric signals converted by the image sensing pixels, so that the problem of unstable acquisition of the electric signals by the image sensing circuit is solved, and the uniformity of image acquisition by the image sensing circuit is improved. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings in the following description only some embodiments of the application, and for those skilled in the art, other drawings can be obtained without creative labor based on these drawings.

[0033] Figure 1 A cross-sectional structure schematic diagram of a display panel provided by the embodiment of the application;

[0034] Figure 2 A structure schematic diagram of an image sensing circuit provided by the prior art;

[0035] Figure 3 A structure schematic diagram of an image sensing pixel array provided by the prior art;

[0036] Figure 4 A structure schematic diagram of an image sensing circuit provided by the embodiment of the application;

[0037] Figure 5 Another structure schematic diagram of an image sensing circuit provided by the embodiment of the application;

[0038] Figure 6 Still another structure schematic diagram of an image sensing circuit provided by the embodiment of the application;

[0039] Figure 7 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0040] Figure 8 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0041] Figure 9 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0042] Figure 10 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0043] Figure 11 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0044] Figure 12 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0045] Figure 13 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0046] Figure 14 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0047] Figure 15 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0048] Figure 16 A structure schematic diagram of another image sensing circuit provided by an embodiment of the present application;

[0049] Figure 17 A structure schematic diagram of an image sensing pixel circuit provided by an embodiment of the present application; Figure 16 A structure schematic diagram of an image sensing pixel circuit provided by an embodiment of the present application;

[0050] Figure 18 A timing schematic diagram of an image sensing circuit provided by an embodiment of the present application in each stage;

[0051] Figure 19 A structure schematic diagram of a display panel provided by an embodiment of the present application;

[0052] Figure 20 A flow schematic diagram of a driving method of an image sensing circuit provided by an embodiment of the present application. DETAILED DESCRIPTION

[0053] In the following, the technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative effort should fall into the protection scope of the present application.

[0054] It should be noted that the terms "first", "second" and the like in the description and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the term "comprising" and any variation thereof is intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to the steps or units clearly listed, but can include other steps or units not clearly listed or inherent to the process, method, product or device.

[0055] As described in the background, the existing image sensing circuit has the problems of unstable electrical signal acquisition and poor image uniformity. The inventors have found that the causes of the problems are as follows.

[0056] The application is described by taking the application of the image sensing circuit to fingerprint identification as an example. Figure 1 A cross-sectional structure schematic diagram of a display panel provided by the embodiments of the present application is shown in FIG. 1. As shown in FIG. 1, the display panel includes an image sensing circuit 01, a frame glue 02, a light-emitting driving layer 03, a light-emitting device layer 04 and other functional layers 05 which are arranged in layers. The other functional layers 05 include an encapsulation layer, a polarizer, a touch film layer and a cover plate, etc. Figure 1

[0057] Exemplarily, the process of the image sensing circuit 01 acquiring the light signal is as follows: when the skin surface 06 of the finger tip is pressed against the surface of the display panel, the light emitted by the light-emitting device layer 04 is reflected after irradiating the skin surface 06 of the finger tip, and the reflected light is shot into the image sensing circuit 01, so that the image sensing circuit 01 acquires the light signal. The light signal fed back by the skin surface 06 of the finger tip has a small signal difference due to the existence of the ridge and valley of the skin surface 06 of the finger tip, and thus a fingerprint image is formed in the image sensing circuit 01.

[0058] Figure 2 A structure schematic diagram of an image sensing circuit provided by the prior art is shown in FIG. 2. As shown in FIG. 2, the image sensing circuit includes a light-emitting driving layer 03, a light-emitting device layer 04 and an image sensing circuit 01. Figure 2 ​As shown, the image sensing circuit includes an image sensing pixel array 110, a read out circuit (ROIC) 120, and an image processing module 130. The image sensing pixel array 110 is a photoelectric conversion circuit using a photosensitive device, which can convert a received optical signal into an electrical signal according to a photoelectric conversion ratio. The read out circuit 120 can form a fingerprint image according to the electrical signal generated by the image sensing pixel array 110 and transmit the fingerprint image to the image processing module 130, thereby completing the recognition of the fingerprint image.

[0059] Figure 3 A structural schematic diagram of an image sensing pixel array provided by the prior art is shown in FIG. 1. As shown, the pixel sensing circuit includes a plurality of image sensing pixels 111 arranged in an array, a plurality of scanning lines 112, and a plurality of data lines 113. The scanning lines 112 and the data lines 113 are arranged in a cross manner. The scanning lines 112 extend along a first direction X and are connected to the plurality of image sensing pixels 111 arranged along the first direction X. The data lines 113 extend along a second direction Y and are connected to the plurality of image sensing pixels 111 arranged along the second direction Y. Figure 3

[0060] Due to the parasitic capacitance on the data lines 113, the transmission of the electrical signal on the data lines 113 needs to be charged and discharged first. Therefore, after each collection of the electrical signal, the data lines 113 will have residual charges, thereby causing the initial voltages on the data lines 113 to be different. Based on this, the image sensing circuit has the problems of unstable collection of the electrical signal and poor uniformity of image collection.

[0061] Continuing to refer to Figure 3 , for example, the first column of data lines 113 has a residual voltage of 3V and the second column of data lines 113 has a residual voltage of 5V. During the signal reading, the image sensing pixels 111 in the first row and the first column transmit a voltage of 2V to the first column of data lines 113, and the image sensing pixels 111 in the first row and the second column transmit a voltage of 2V to the second column of data lines 113. The first column of data lines 113 needs to discharge the voltage from 3V to 2V, and the second column of data lines 113 needs to discharge the voltage from 5V to 2V. Due to the influence of the parasitic capacitance on the data lines 113, the discharging time of the second column of data lines 113 is longer. If the discharging time of the second column of data lines 113 is greater than the signal reading time interval, the second column of data lines 113 has a situation of incomplete charging and discharging, thereby causing the phenomenon of unstable reading of the signal.

[0062] ​Therefore, the collection amount of the data line 113 collecting the same electrical signal at the same time is inconsistent in the prior art. Thus, the image sensing circuit electrical signal collection is unstable, and the image collection uniformity is poor. In this case, it can be understood that for the image sensing circuit collecting the fingerprint image, due to the existence of the ridge and valley on the skin surface of the finger end, the electrical signals collected by each image sensing pixel 111 are different, but the existence of the residual charge on the data line 113 makes the collection amount unstable, thereby causing poor accuracy of fingerprint recognition.

[0063] The embodiment of the present application provides an image sensing circuit to solve the above technical problems. Figure 4 The embodiment of the present application provides an image sensing circuit to solve the above technical problems. Figure 4 As shown in the figure, the image sensing circuit comprises: a plurality of image sensing pixels 111 arranged in an array, a plurality of scanning lines 112, a plurality of data lines 113 and a plurality of first switch modules 114. Wherein, the scanning line 112 extends along the first direction X, and the scanning line 112 is connected with the plurality of image sensing pixels 111 arranged along the first direction X. The data line 113 extends along the second direction Y, and the data line 113 is connected with the plurality of image sensing pixels 111 arranged along the second direction Y, and the first direction X and the second direction Y intersect. The plurality of first switch modules 114 are respectively connected between different data lines 113, and are used to turn on the different data lines 113 to smooth the charge difference between the data lines 113.

[0064] Wherein, the image sensing pixel 111 can convert the optical signal into an electrical signal. The scanning line 112 can select different rows of image sensing pixels 111. The selected image sensing pixels 111 convert the optical signal into an electrical signal and transmit the electrical signal to the data line 113.

[0065] Exemplarily, the driving method of the image sensing circuit comprises: a reset stage, a collection stage and a reading stage. Wherein, the reset stage and the collection stage will be described in subsequent embodiments, and the working process of the reading stage will be described first in this embodiment. The reading stage comprises alternately arranged charge dissipation sub-stage and voltage reading sub-stage. In the charge dissipation sub-stage, the plurality of first switch modules 114 are controlled to be turned on to smooth the charge difference between the data lines 113, so that the initial voltages of different data lines 113 are consistent. In the voltage reading sub-stage, the plurality of first switch modules 114 are controlled to be turned off, and the electrical signals collected by each image sensing pixel 111 are transmitted to the readout module by each data line 113.

[0066] Exemplarily, the first column of data lines 113 retains a 3V voltage, and the third column of data lines 113 retains a 5V voltage. In the charge dissipation sub-stage, the plurality of first switch modules 114 are controlled to be turned on, and the first column of data lines 113 and the third column of data lines 113 are communicated, so that the charge difference between the first column of data lines 113 and the third column of data lines 113 can be smoothed, and the initial voltages of the first column of data lines 113 and the third column of data lines 113 are both 4V. In the voltage reading sub-stage, the plurality of first switch modules 114 are controlled to be turned off. The image sensing pixels 111 of the first row and the first column transmit a 2V voltage to the first column of data lines 113, and the image sensing pixels 111 of the first row and the third column also transmit a 2V voltage to the third column of data lines 113. The first column of data lines 113 needs to discharge the voltage from 4V to 2V, and the third column of data lines 113 also needs to discharge the voltage from 4V to 2V. Therefore, the first column of data lines 113 and the third column of data lines 113 collect the same amount of collected signals at the same time.

[0067] The readout module performs analog-to-digital conversion on the signals read by the data lines 113, and then the image processing module performs image processing. Taking fingerprint recognition as an example, the image processing module can process to obtain a fingerprint image on the surface of the finger skin. In the voltage reading stage, the different data lines 113 can collect the same amount of collected signals, so that the problem of unstable collection of electrical signals by the image sensing circuit can be improved, and the uniformity of image collection by the image sensing circuit is improved.

[0068] In summary, in the embodiment of the present application, the first switch module 114 is controlled to be turned on before the data lines 113 collect the electrical signals converted by the image sensing pixels 111, so that the data lines 113 are communicated, the charge difference between the data lines 113 is smoothed, and the initial voltages of the different data lines 113 are consistent. Then, in the voltage reading sub-stage, the readout module reads the electrical signals with good uniformity. Therefore, the embodiment of the present application improves the problem of unstable collection of electrical signals by the image sensing circuit, and improves the uniformity of image collection by the image sensing circuit.

[0069] On the basis of the above-mentioned embodiment, optionally, Figure 5 Another structure diagram of an image sensing circuit provided by the embodiment of the present application is shown in FIG. 4. Figure 5 As shown in FIG. 4, the first switch module 114 includes a first transistor T1. The gate of the first transistor T1 is connected with the first switch control line 115, the first pole of the first transistor T1 is connected with one data line 113, and the second pole of the first transistor T1 is connected with another data line 113. The embodiment of the present application is thus set, and the circuit structure is simple and easy to implement.

[0070] The first switch control line 115 can provide a first switch signal to the first transistor T1, so that the first transistor T1 is turned on or turned off according to the first switch signal. For example, if the first transistor T1 is an N-type transistor, the on level of the first transistor T1 is high. In the charge dissipation sub-stage, the first switch control line 115 outputs a high level, and each first transistor T1 is turned on, so that the first column data line 113 and the third column data line 113 are connected, and the second column data line 113 and the fourth column data line 113 are connected, thereby smoothing the charge difference between the first column data line 113 and the third column data line 113, and smoothing the charge difference between the second column data line 113 and the fourth column data line 113. In the voltage reading sub-stage, the first switch control line 115 outputs a low level, so that each first transistor T1 is turned off. At this time, the scan line 112 can select different rows of image sensing pixels 111, so that the selected image sensing pixels 111 transmit the electrical signal to the corresponding data line 113.

[0071] In the above embodiments, the first switch module can have various connection modes, and the same image sensing pixel array can adopt one connection mode or multiple connection modes. Hereinafter, several connection modes will be described, but the description is not intended to limit the present application.

[0072] With reference to the foregoing description, the first switch module 114 can be connected to the data lines 113 in various modes. Figure 4 and Figure 5 In an embodiment of the present application, optionally, at least one data line 113 is arranged between the two data lines 113 connected by the first switch module 114.

[0073] For example, the first column data line 113 and the third column data line 113 are connected by one first switch module 114, and the second column data line 113 and the fourth column data line 113 are connected by another first switch module 114. The reason for this arrangement is that the residual charge amount between the adjacent two data lines 113 is relatively close, and if the adjacent two data lines 113 are simply connected together, the smoothing effect on the charge difference of the data lines 113 is not good. Therefore, the data lines 113 arranged at intervals are connected together in the embodiment of the present application, thereby optimizing the smoothing effect of the charge difference between the data lines 113.

[0074] Figure 6 Another structure diagram of an image sensing circuit is provided in an embodiment of the present application. As shown in FIG. 6, the image sensing circuit includes a first switch module 114, a second switch module 116, and a third switch module 117. Figure 6As shown, in one embodiment of the present invention, optionally, a first switch module 114 is connected between two adjacent data lines 113. Exemplarily, the first column of data lines 113 and the second column of data lines 113 are connected via a first switch module 114, the second column of data lines 113 and the third column of data lines 113 are connected via a second switch module 114, the third column of data lines 113 and the fourth column of data lines 113 are connected via a third switch module 114, and so on.

[0075] Accordingly, during the driving process of the image sensing circuit, in the charge dissipation sub-stage: each of the first switch modules 114 is turned on, connecting the first column data lines 113 and the second column data lines 113, connecting the second column data lines 113 and the third column data lines 113, and connecting the third column data lines 113 and the fourth column data lines 113, i.e., all data lines 113 are connected. This arrangement allows the charge differences between the first column data lines 113, the second column data lines 113, the third column data lines 113, and the fourth column data lines 113 to be smoothed out. Therefore, the initial voltages of the first column data lines 113, the second column data lines 113, the third column data lines 113, and the fourth column data lines 113 are all consistent.

[0076] During the voltage reading sub-stage: the first switch module 114 is disconnected. At this time, the scan line 112 sequentially selects the first and second row of image sensing pixels 111. When the first row of image sensing pixels 111 is selected, it transmits electrical signals to each data line 113; when the second row of image sensing pixels 111 is selected, it transmits electrical signals to each data line 113.

[0077] Therefore, in this embodiment of the invention, the first switch module 114 is sequentially connected between two adjacent data lines 113. Each data line 113 is connected via the first switch module 114, meaning all data lines 113 are interconnected. This smooths out the charge differences on each data line 113, further improving the problem of unstable electrical signals acquired by the image sensing circuit and enhancing the uniformity of image acquisition.

[0078] Figure 7 This is a schematic diagram of another image sensing circuit provided in an embodiment of the present invention, as shown below. Figure 7As shown, at least two first switch modules 114 have their first ends connected to different data lines 113 and their second ends connected to the same data line 113. For example, the first column of data lines 113 and the fourth column of data lines 113 are connected via a first first switch module 114, the second column of data lines 113 and the fourth column of data lines 113 are connected via a second first switch module 114, and the third column of data lines 113 and the fourth column of data lines 113 are connected via a third first switch module 114.

[0079] Accordingly, during the driving process of the image sensing circuit, in the charge dissipation sub-stage: each of the first switch modules 114 is turned on, connecting the first and fourth column data lines 113, the second and fourth column data lines 113, and the third and fourth column data lines 113, i.e., all data lines 113 are connected. This configuration smooths out the charge differences between the first, second, third, and fourth column data lines 113. Therefore, the initial voltages of the first, second, third, and fourth column data lines 113 are all consistent.

[0080] During the voltage reading sub-stage: the first switch module 114 is disconnected. At this time, the scan line 112 can sequentially select the first and second row of image sensing pixels 111. When the first row of image sensing pixels 111 is selected, the first row of image sensing pixels 111 transmits electrical signals to each data line 113; when the second row of image sensing pixels 111 is selected, the second row of image sensing pixels 111 transmits electrical signals to each data line 113.

[0081] Therefore, in this embodiment of the invention, at least two first switch modules 114 are configured with their first ends connected to different data lines 113 and their second ends connected to the same data line 113. Each data line 113 is connected through the first switch modules 114, meaning all data lines 113 are interconnected. This smooths out the charge differences on each data line 113, further improving the problem of unstable electrical signals acquired by the image sensing circuit and enhancing the uniformity of image acquisition.

[0082] Figure 8 This is a schematic diagram of another image sensing circuit provided in an embodiment of the present invention. Figure 8As shown, each first switch module 114 is randomly arranged between each data line 113, meaning that the same image sensing circuit can include multiple connection methods as described in the above embodiments. For example, the two data lines 113 connected to the first and second first switch modules 114 are separated by one data line 113, and the two data lines 113 connected to the third first switch module 114 are separated by two data lines 113. That is, the first column of data lines 113 and the third column of data lines 113 are connected via the first first switch module 114, the second column of data lines 113 and the fourth column of data lines 113 are connected via the second first switch module 114, and the first column of data lines 113 and the fourth column of data lines 113 are connected via the third first switch module 114. The advantage of randomly arranging the first switch modules 114 is that charge differences exist randomly on each data line 113. For the image processing module, the interference and errors of each image sensing pixel 111 are random, having a smaller impact on the overall accuracy of image recognition.

[0083] Accordingly, during the driving process of the image sensing circuit, in the charge dissipation sub-stage: the first switch module 114 is turned on, connecting the first column data line 113 and the third column data line 113, connecting the second column data line 113 and the fourth column data line 113, and connecting the third column data line 113 and the fourth column data line 113, that is, all data lines 113 are connected. This configuration smooths out the charge differences among the first column data line 113, the second column data line 113, the third column data line 113, and the fourth column data line 113, thus ensuring that the initial voltages of the first column data line 113, the second column data line 113, the third column data line 113, and the fourth column data line 113 are all consistent.

[0084] During the voltage reading sub-stage: the first switch module 114 is disconnected. At this time, the scan line 112 sequentially selects the first and second row of image sensing pixels 111. When the first row of image sensing pixels 111 is selected, it transmits electrical signals to each data line 113; when the second row of image sensing pixels 111 is selected, it transmits electrical signals to each data line 113.

[0085] Therefore, in this embodiment of the invention, the two data lines 113 connected by the first switch module 114 are spaced apart by at least one data line 113. All data lines 113 are connected through the first switch module 114, meaning all data lines 113 are interconnected. This smooths out the charge differences on each data line 113, further improving the problem of unstable electrical signals acquired by the image sensing circuit and enhancing the uniformity of image acquisition.

[0086] Based on the above embodiments, optionally, refer to the following: Figures 4-8 Each data line 113 is connected to at least one first switch module 114.

[0087] Each data line 113 is connected to at least one first switch module 114, ensuring that all data lines 113 are connected to other data lines 113, thereby achieving smooth processing of charge differences between different data lines 113. For example, as... Figure 4 As shown, the first column of data lines 113, the second column of data lines 113, the third column of data lines 113, and the fourth column of data lines 113 are all connected to a first switch module 114. Figure 6 As shown, the first column of data lines 113 is connected to a first switch module 114, and the second, third, and fourth column of data lines 113 are each connected to two first switch modules 114.

[0088] Based on the above embodiments, optionally, refer to the following: Figures 6-8 The difference between the number of data lines 113 and the number of first switch modules 114 is 1. For example, as... Figure 6 As shown, the first switch module 114 is sequentially connected between two adjacent data lines 113. In this connection method, there are four data lines 113 and three first switch modules 114, allowing all four data lines 113 to be connected together via the three first switch modules 114. Figure 7 As shown, at least two first switch modules 114 have their first ends connected to different data lines 113, and their second ends connected to the same data line 113. In this connection method, there are four data lines 113 and three first switch modules 114, allowing all four data lines 113 to be connected together through the three first switch modules 114. Figure 8 As shown, there is at least one data line 113 between the two data lines 113 connected to the first switch module 114. In this connection method, the number of data lines 113 is 4, and the number of first switch modules 114 is 3, allowing all four data lines 113 to be connected together through the three first switch modules 114. This configuration reduces the number of first switch modules 114 while ensuring that all data lines 113 are connected.

[0089] It is important to note that Figures 6-8 The above are just examples of several connection methods. The connection method between the first switch module 114 and the data line 113 in the image sensing circuit can be flexibly adopted according to the specific design requirements of the circuit, and all of them are within the protection scope of this invention.

[0090] Based on the above embodiments, optionally, Figure 9This is a schematic diagram of another image sensing circuit provided in an embodiment of the present invention, as shown below. Figure 9 As shown, the data line 113 includes a first end and a second end. Exemplarily, the first end is the lower end, and the second end is the upper end. The image sensing circuit further includes a signal reading module 116; the signal reading module 116 is connected to the first end of the data line 113. A first switch module 114 is connected to the second end of the data line 113.

[0091] The signal reading module 116 is used to read the acquisition amount of each data line 113, thereby forming a fingerprint image based on the acquisition amount of each data line 113.

[0092] In other embodiments, the first end can be set as the upper end and the second end as the lower end, which can be set as needed in practical applications. This embodiment of the invention further enhances the smoothing effect of the first switch module 114 on the charge differences on the data line 113 by placing the signal reading module 116 and the first switch module 114 at both ends of the data line 113. This is because the signal reading module 116 also contains other circuit structures. Placing the first switch module 114 and the signal reading module 116 at the same end makes it easier for the smoothed charge to pass through the signal reading module 116 without passing through each data line 113. However, placing the first switch module 114 and the signal reading module 116 at different ends is more conducive to the smoothing of the charge on each data line 113.

[0093] In addition to the connection methods described above, as an optional implementation method, Figure 10 This is a schematic diagram of another image sensing circuit provided in an embodiment of the present invention, as shown below. Figure 10 As shown, both the signal reading module 116 and the first switch module 114 are connected to the first end of the data line 113.

[0094] As can be seen from the above embodiments, the first switch module 114 only needs to be connected to the data line 113, and the specific connection position between the first switch module 114 and the data line 113 can be flexibly designed according to specific design requirements.

[0095] Based on the above embodiments, optionally, Figure 11 This is a schematic diagram of another image sensing circuit provided in an embodiment of the present invention, as shown below. Figure 11 As shown, the image sensing circuit also includes a plurality of current sources 117, which are connected to the first end of the data line 113.

[0096] Each current source 117 is connected to the first end of a data line 113 to provide constant current for reading image signals.

[0097] Based on the above embodiments, optionally,Figure 12 This is a schematic diagram of another image sensing circuit provided in an embodiment of the present invention. Figure 12 As shown, the image sensing circuit further includes a plurality of second switch modules 118, which are connected between the data line 113 and the reference voltage line 119; for example, the reference voltage line 119 is a ground line. The provision of multiple second switch modules 118 in this embodiment of the invention further facilitates the smoothing of charge differences on the data line 113, improves the problem of unstable electrical signals acquired by the image sensing circuit, and enhances the uniformity of image acquisition by the image sensing circuit.

[0098] Specifically, the data cable 113 and the second switch module 118 are configured in a one-to-one correspondence.

[0099] Accordingly, during the driving process of the image sensing circuit, in the charge dissipation sub-stage, each of the first switch modules 114 and each of the second switch modules 118 is turned on. When the second switch module 118 is turned on, the reference voltage line 119 resets the charge on each data line 113, thereby resetting the voltage of each data line 113 to the voltage provided by the reference voltage line 119 (e.g., 0V). However, the voltage reset effect is not uniform for data lines at different locations (e.g., some data lines are reset to 0V, while others are reset to 0.3V). Simultaneously, the first switch module 114 is turned on to connect the data lines 113, thereby smoothing out the charge differences between the data lines 113 and making the initial voltages of different data lines 113 consistent. For example, the voltage of each data line 113 may be close to 0V.

[0100] During the voltage reading sub-stage: all first switch modules 114 and all second switch modules 118 are disconnected. At this time, the scan line 112 can sequentially select the first and second row of image sensing pixels 111. When the first row of image sensing pixels 111 is selected, the first row of image sensing pixels 111 transmits electrical signals to each data line 113; when the second row of image sensing pixels 111 is selected, the second row of image sensing pixels 111 transmits electrical signals to each data line 113.

[0101] Therefore, in this embodiment of the invention, the data line 113 is reset to the voltage provided by the reference voltage line 119 through the second switch module 118. The data line 113 is turned on through the first switch module 114, making the charge difference between the data lines 113 smoother. This further improves the problem of unstable electrical signals acquired by the image sensing circuit and enhances the uniformity of image acquisition.

[0102] In the above embodiments, the first switch module 114 is exemplarily shown to be located above the second switch module 118, which is not intended to limit the invention. Specifically, the connection point between the data line 113 and the second switch module 118 is defined as the first connection point A, and the connection point between the second switch module 118 and the reference voltage line 119 is defined as the second connection point B. Figure 12 As shown, the first switch module 114 can be connected between different first connection points A. In other embodiments, it can also be as follows: Figure 13 As shown, the first switch module 114 can also be connected between different second connection points B.

[0103] Since each data line 113 is connected to the reference voltage line 119, and the second connection point B on each data line 113 is connected to the reference voltage line 119, the potential of the second connection point B on each data line 113 is the reference voltage. Therefore, connecting the first switch module 114 between different second connection points B can reduce signal crosstalk caused by smoothing the charge difference between each data line 113 through interconnection via the first switch module 114, compared to connecting the first switch module 114 between different first connection points A.

[0104] Based on the above embodiments, optionally, Figure 14 This is a schematic diagram of another image sensing circuit provided in an embodiment of the present invention, as shown below. Figure 14 As shown, the second switch module 118 includes a second transistor T2, the gate of which is connected to the second switch control line 200, the first terminal of which is connected to a data line 113, and the second terminal of which is connected to a reference voltage line 119. This configuration in this embodiment of the invention results in a simple circuit structure that is easy to implement.

[0105] The second switch control line 200 can provide a second switch signal to the second transistor T2, so that the second transistor T2 is turned on or off according to the second switch signal.

[0106] For example, if the second transistor T2 is an N-type transistor, the conduction level of the second transistor T2 is high. During the charge dissipation sub-stage: both the second switch control line 200 and the first switch control line 115 output high levels. Specifically, when the second switch control line 200 outputs a high level, each second transistor T2 conducts, connecting each data line 113 to the reference voltage line 119. This allows the reference voltage line 119 to reset the charge on each data line 113, restoring the voltage of each data line 113 to the voltage output by the reference voltage line 200. When the first switch control line 115 outputs a high level, each first transistor T1 conducts, connecting the first column data lines 113 and the third column data lines 113, and connecting the second column data lines 113 and the fourth column data lines 113. This smooths out the charge difference between the first and third column data lines 113, as well as the charge difference between the second and fourth column data lines 113.

[0107] During the voltage reading sub-stage: both the second switch control line 200 and the first switch control line 115 output a low level, causing each second transistor T2 and each first transistor T1 to be disconnected. At this time, the scan line 112 can select image sensing pixels 111 in different rows, so that the selected image sensing pixels 111 transmit electrical signals to the corresponding data line 113.

[0108] Based on the above embodiments, optionally, Figure 15 This is a schematic diagram of another image sensing circuit provided in an embodiment of the present invention, as shown below. Figure 15 As shown, the first switch module 114 is controlled by a first switch control signal; the second switch module 118 is controlled by a second switch control signal; wherein the first switch control signal is multiplexed as the second switch control signal.

[0109] The first switch module 114 smooths the charge difference between the data lines 113, while the second switch module 118 resets each data line 113. Both the first switch module 114 and the second switch module 118 need to be turned on before the scan line 112 drives the image sensing pixel 111 to transmit electrical signals to the data lines 113. Thus, the first switch control signal can be multiplexed as the second switch control signal, thereby reducing the number of control terminals required by the image sensing circuit and simplifying the circuit layout.

[0110] Based on the above embodiments, optionally, Figure 16 This is a schematic diagram of another image sensing circuit provided in an embodiment of the present invention, as shown below. Figure 16As shown, each image sensing pixel 111 includes a third transistor T3, a fourth transistor T4, a fifth transistor T5, a capacitor C, and a photodiode PD. Each scan line includes a reset signal line RST, a read signal line Gate, and a switch control terminal SW. The first switch module 114 includes a first transistor T11, a first transistor T12, and a first transistor T13. The second switch module 118 includes a second transistor T21, a second transistor T22, a second transistor T23, and a second transistor T24.

[0111] In this configuration, the gate of the fifth transistor T5 is connected to the reset signal line RST, the first terminal of the fifth transistor T5 and the first terminal of the fourth transistor T4 are both connected to the power supply signal line VDD, the anode of the photodiode PD and the first terminal of the capacitor C are both connected to the input signal line, the cathode of the photodiode PD, the second terminal of the fifth transistor T5, the second terminal of the capacitor C and the gate of the fourth transistor T4 are connected, the second terminal of the fourth transistor T4 is connected to the first terminal of the third transistor T3, the gate of the third transistor T3 is connected to the read signal line Gate, and the second terminal of the third transistor T3 is connected to the data line Date.

[0112] The first terminal of the first transistor T11 is connected to the data line Date1, and the second terminal of the first transistor T11 is connected to the data line Date3; the first terminal of the first transistor T12 is connected to the data line Date2, and the second terminal of the first transistor T12 is connected to the data line Date4; the first terminal of the first transistor T13 is connected to the data line Date1, and the second terminal of the first transistor T13 is connected to the data line Date4; the gates of the first transistors T11, T12, and T13 are all connected to the switch control terminal SW.

[0113] The first terminal of the second transistor T21 is connected to the data line Date1, the first terminal of the second transistor T22 is connected to the data line Date2, the first terminal of the second transistor T23 is connected to the data line Date3, and the first terminal of the second transistor T24 is connected to the data line Date4. The second terminals of the second transistors T21, T22, T23, and T24 are all connected to the ground terminal GND. The gates of the second transistors T21, T22, T23, and T24 are all connected to the switch control terminal SW.

[0114] It should be noted that the gates of the fifth transistors T5 in the image sensor pixels 111 arranged in the same row are all connected to the same reset signal line RST. For example, the gates of the fifth transistors T5 in the first row of image sensor pixels 111 are all connected to the reset signal line RST1, and the gates of the fifth transistors T5 in the second row of image sensor pixels 111 are all connected to the reset signal line RST2.

[0115] The gates of the third transistors T3 in the image sensing pixels 111 arranged in the same row are all connected to the same read signal line Gate. For example, the gates of the third transistors T3 in the first row of image sensing pixels 111 are all connected to the first read signal line Gate1, and the gates of the third transistors T3 in the second row of image sensing pixels 111 are all connected to the second read signal line Gate2.

[0116] The second electrode of the third transistor T3 in the image sensing pixels 111 arranged in the same column is connected to the same data line Date. For example, the second electrode of the third transistor T3 in the first column of image sensing pixels 111 is connected to the first data line Date1, the second electrode of the third transistor T3 in the second column of image sensing pixels 111 is connected to the second data line Date2, the second electrode of the third transistor T3 in the third column of image sensing pixels 111 is connected to the third data line Date3, and the second electrode of the third transistor T3 in the fourth column of image sensing pixels 111 is connected to the fourth data line Date4.

[0117] also, Figure 17 for Figure 16 A schematic diagram of the structure of the image sensing pixel circuit is shown in the reference diagram. Figure 16 and Figure 17 To facilitate the description of the working principle of the image sensing pixel 111: For example, all transistors are N-type transistors, and the conduction level is high. The first node N1 is defined as the connection point between the cathode of the photodiode PD, the second terminal of the fifth transistor T5, the second terminal of the capacitor C, and the gate of the fourth transistor T4. The second node N2 is the connection point between the second terminal of the fourth transistor T4 and the first terminal of the third transistor T3.

[0118] Figure 18 This is a timing diagram illustrating the various stages of an image sensing circuit provided in an embodiment of the present invention. (Continue to refer to...) Figures 16-18 Specifically, the working process of the image sensing circuit is as follows:

[0119] Reset Phase: The reset signal lines RST1 and RST2 of the image sensor pixels 111 in different rows sequentially output high levels. That is, after the reset signal line RST1 outputs a high level, the reset signal line RST2 outputs a high level, until the reset signal line RSTn outputs a high level. The switch control terminal SW and the read signal line Gate both output a low level continuously.

[0120] During the reset phase, the specific working process of each image sensing pixel 111 is as follows: when the reset signal line RST outputs a high level, the fifth transistor T5 is turned on. The fifth transistor T5 transmits the low voltage of the power supply signal VDD to the first node N1. At this time, the capacitor C has the function of energy storage, which can keep the potential of the first node N1 at a low voltage, so as to pull down the gate potential of the fourth transistor T4 and ensure that the fourth transistor T4 is turned off.

[0121] During the sampling phase: the reset signal line RST, the switch control terminal SW, and the read signal line Gate all output a low level continuously.

[0122] During the sampling phase, the specific working process of each image sensing pixel 111 is as follows: the photodiode PD receives the light signal, the photodiode PD turns on according to the light signal, and transmits the bias voltage Vbias to the first node N1. At this time, the fourth transistor T4 turns on according to the bias voltage Vbias, and the electrical signal transmitted by the power signal line VDD is transmitted to the second node N2 through the fourth transistor T4.

[0123] Reading Phase: The charge dissipation sub-phase and the voltage reading sub-phase alternate. In the charge dissipation sub-phase: the switch control terminal SW outputs a high level, controlling multiple first switch modules 114 to conduct, smoothing charge differences between data lines. Simultaneously, multiple second switch modules 118 are controlled to conduct, resetting each data line. In the voltage reading sub-phase: the switch control terminal SW outputs a low level, controlling multiple first switch modules 114 and multiple second switch modules 118 to de-energize.

[0124] Specifically, when reading the first line of signals, a charge dissipation sub-stage is executed before the read signal line Gate1 changes from low to high, and a voltage reading sub-stage is executed when the read signal line Gate1 changes from high to low. During the charge dissipation sub-stage, the switch control terminal SW outputs a high level, and the first transistors T11-T14 and the second transistors T21-T24 are all turned on. This smooths out the charge differences between all data lines Date1-Date4 and resets all data lines Date1-Date4. During the voltage reading sub-stage: the switch control terminal SW changes from high to low, the first transistors T11-T14 and the second transistors T21-T24 are turned off, and the first line image sensing pixel 111 outputs an electrical signal to each data line Date1-Date4.

[0125] When reading the second line of signal, a charge dissipation sub-stage is executed before the read signal line Gate2 changes from low to high, and a voltage reading sub-stage is executed when the read signal line Gate2 changes from high to low. The execution process of the charge dissipation and voltage reading sub-stages is similar to that of reading the first line of signal, and will not be described again. This process continues until the read signal line Gate2 changes from high to low, at which point one frame acquisition phase ends.

[0126] Figure 19 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention, such as... Figure 19 As shown, the display panel 100 includes the image sensing circuit 01 provided in any embodiment of the present invention, and has corresponding beneficial effects.

[0127] Optionally, the image sensing circuit 01 is located in the fingerprint recognition area of ​​the display panel 100 for in-screen fingerprint recognition. The fingerprint recognition area can be located in the middle or lower middle part of the display panel 100, etc., and can be set as needed in practical applications.

[0128] This invention also provides a driving method for an image sensing circuit, which drives the image sensing circuit provided in any embodiment of this invention and has corresponding beneficial effects. Figure 20 This is a schematic flowchart illustrating a driving method for an image sensing circuit according to an embodiment of the present invention. See also... Figure 20 The driving method includes the following steps:

[0129] S310, Reset Phase.

[0130] S320, Data Acquisition Phase.

[0131] S331. In the charge dissipation sub-stage, control multiple first switch modules to turn on to smooth the charge difference between data lines.

[0132] S332. In the voltage reading sub-stage, control multiple first switch modules to disconnect.

[0133] It should be noted that: S330, the reading stage, includes the alternating charge dissipation sub-stage and voltage reading sub-stage.

[0134] The driving method for the image sensing circuit provided in this invention, during the charge dissipation sub-stage, controls the conduction of multiple first switching modules to connect the data lines, thereby smoothing the charge differences between the data lines and ensuring consistent initial voltages across different data lines. This results in better uniformity of the electrical signals read by the readout module during the voltage reading sub-stage. Therefore, this invention improves the problem of unstable electrical signal acquisition in image sensing circuits and enhances the uniformity of image acquisition.

[0135] It should be noted that in the various embodiments of the image sensing circuit, specific descriptions of the driving methods for different image sensing circuits are provided. These driving methods can all be considered as the driving methods of the image sensing circuit provided in the embodiments of the present invention, and repeated content will not be described here.

[0136] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0137] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. An image sensing circuit, characterized by comprising: The image sensing circuit comprises: a plurality of image sensing pixels, a plurality of scanning lines and a plurality of data lines; the scanning lines extend along a first direction, and the scanning lines are connected with the plurality of image sensing pixels arranged along the first direction; the data lines extend along a second direction, and the data lines are connected with the plurality of image sensing pixels arranged along the second direction, the first direction intersects the second direction; a plurality of first switch modules, the plurality of first switch modules are respectively connected between different data lines, and are used for turning on the different data lines to smooth the charge difference between the data lines; a driving method of the image sensing circuit comprises a reset stage, an acquisition stage and a reading stage; the reading stage comprises alternatingly arranged charge dissipation sub-stages and voltage reading sub-stages; the charge dissipation sub-stage and the voltage reading sub-stage are executed once when reading each row of signals; in the charge dissipation sub-stage, the plurality of first switch modules are turned on to smooth the charge difference between the data lines; in the voltage reading sub-stage, the plurality of first switch modules are turned off; the image sensing circuit further comprises a plurality of second switch modules, the second switch modules are connected between the data lines and a reference voltage line; a connection point between the data lines and the second switch modules is defined as a first connection point, a connection point between the second switch modules and the reference voltage line is defined as a second connection point; the first switch modules are connected between different second connection points.

2. The image sensing circuit according to claim 1, wherein The first switch module comprises: a first transistor, a gate of the first transistor is connected with a first switch control line, a first pole of the first transistor is connected with one of the data lines, and a second pole of the first transistor is connected with another of the data lines.

3. The image sensing circuit according to claim 1, wherein The connection mode of the first switch module comprises at least one of the following modes: the first switch module is connected between two adjacent data lines; at least one data line is arranged between the two data lines connected by the first switch module; first ends of at least two first switch modules are connected to different data lines, and second ends of the at least two first switch modules are connected to the same data line.

4. The image sensing circuit according to claim 1, wherein each data line is connected with at least one first switch module.

5. The image sensing circuit according to claim 4, wherein The number of data lines is 1 more than the number of first switch modules.

6. The image sensing circuit according to any one of claims 1 to 5, wherein The data line comprises a first end portion and a second end portion; the image sensing circuit further comprises a signal reading module; the signal reading module is connected with the first end portion of the data line; the first switch module is connected with the second end portion of the data line.

7. The image sensing circuit according to claim 6, wherein The image sensing circuit further comprises a plurality of current sources, the current sources are connected with the first end portion of the data line.

8. The image sensing circuit according to claim 1, wherein The reference voltage line is a ground terminal.

9. The image sensing circuit according to claim 1, wherein The second switch module comprises: a second transistor, a gate of the second transistor is connected with a second switch control line, a first pole of the second transistor is connected with one of the data lines, and a second pole of the second transistor is connected with the reference voltage line.

10. The image sensing circuit according to claim 1, wherein The first switch module is controlled by a first switch control signal; the second switch module is controlled by a second switch control signal. The first switch control signal is multiplexed as the second switch control signal.

11. A display panel, characterized by, Comprise: The image sensing circuit according to any one of claims 1-10.

12. A driving method of an image sensing circuit according to any one of claims 1 to 10, characterized by, Comprise: A reset stage, a collection stage and a reading stage; wherein the reading stage comprises alternately arranged charge dissipation sub-stages and voltage reading sub-stages; In the charge dissipation sub-stage, the plurality of first switch modules are controlled to be turned on to smooth the charge difference between the data lines; In the voltage reading sub-stage, the plurality of first switch modules are controlled to be turned off.

Images