Display Devices

Abstract

A display device is provided. The display device includes: a substrate having a central area and a peripheral area adjacent to the central area; at least one insulating layer on the substrate; a central insulating layer disposed on the at least one insulating layer at the central area; a first insulating pattern and a second insulating pattern disposed directly on the at least one insulating layer at the peripheral area; a first groove between the central insulating layer and the first insulating pattern; a second groove between the first insulating pattern and the second insulating pattern, wherein the first groove and the second groove expose an upper surface of the at least one insulating layer; and a covering layer covering the first insulating pattern and the second insulating pattern, wherein a portion of the central insulating layer extends over a portion of the peripheral area, the first insulating pattern, the second insulating pattern, and the central insulating layer include the same inorganic insulating material, and the first insulating pattern, the second insulating pattern, and the central insulating layer are separated from each other by the first groove and the second groove in the peripheral area.

Description

[0001] This application is a divisional application of application No. 201510405391.X, entitled “Display device and method for manufacturing the same”, filed with the State Intellectual Property Office of China on July 10, 2015. Technical Field

[0002] One or more embodiments of the present invention are directed to a display device and a method of manufacturing the display device. Background Art

[0003] Recently, display devices are used in various ways. In addition, as display devices have been developed to have a small thickness and light weight, the use range of display devices has become wider.

[0004] In particular, recently, display devices have been replaced by portable thin flat panel display devices.

[0005] A thin display device has a plurality of various films. However, when an external force is applied to the thin display device or due to process conditions during the manufacture of the thin display device, the various films may be damaged or may serve as a path for crack propagation.

[0006] Specifically, when forming display devices from one mother substrate, the manufacturing process may include a process of cutting the mother substrate to separate the display devices from each other.

[0007] During the cutting process, cracks may occur in the film of the display device, and the film may serve as a path for the cracks to propagate.

[0008] Therefore, the durability of the display device may be affected. Summary of the invention

[0009] One or more embodiments of the present invention include a display device and a method of manufacturing the display device.

[0010] Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the provided embodiments, to those skilled in the art.

[0011] According to one or more embodiments of the present invention, a display device includes a substrate having a central area and a peripheral area adjacent to the central area, the central area including a display area, and the display device also includes: at least one insulating layer on the substrate; a central insulating layer disposed on the at least one insulating layer at the central area; a first insulating pattern and a second insulating pattern directly disposed on the at least one insulating layer at the peripheral area, the first insulating pattern and the second insulating pattern being arranged to be spaced apart from each other in one direction; a first groove between the central insulating layer and the first insulating pattern; a second groove between the first insulating pattern and the second insulating pattern, wherein the first groove and the second groove expose an upper surface of the at least one insulating layer, and the first groove and the second groove are located on the at least one insulating layer; and a covering layer covering the first insulating pattern and the second insulating pattern and including an organic material, wherein a portion of the central insulating layer extends over a portion of the peripheral area, and wherein the first insulating pattern, the second insulating pattern and the central insulating layer include the same inorganic insulating material, and the first insulating pattern, the second insulating pattern and the central insulating layer are separated from each other in the peripheral area by the first groove and the second groove.

[0012] According to one or more embodiments of the present invention, a display device includes: a substrate including a display area and a non-display area between the display area and an edge of the substrate; a blocking layer disposed on the substrate; a thin film transistor disposed on the blocking layer in the display area and including an active layer, a first electrode, a second electrode and a third electrode; a first insulating layer disposed between the active layer and the first electrode; a second insulating layer disposed between the first electrode and the third electrode; a first insulating pattern and a second insulating pattern including the same material as one of the first insulating layer and the second insulating layer, the first insulating pattern and the second insulating pattern being disposed in the non-display area of ​​the substrate; a groove between the first insulating pattern and the second insulating pattern; and at least one conductive pattern including the same material as one of the first electrode and the third electrode and disposed in the groove.

[0013] According to one or more embodiments of the present invention, a display device includes a substrate having a central area and a peripheral area adjacent to the central area, wherein the central area includes a display area. The display device also includes: an insulating pattern in the peripheral area; a groove adjacent to the insulating pattern; and at least one insulating layer disposed between the insulating pattern and the substrate, wherein the groove is located on the at least one insulating layer. The material used to form the insulating pattern may have been removed from the groove so that the groove is formed adjacent to the insulating pattern.

[0014] The groove may be adjacent to at least one edge of the substrate.

[0015] The grooves may be adjacent to all edges of the substrate.

[0016] The insulating pattern may be spaced apart from at least one edge of the substrate. Here, the insulating pattern may be spaced apart from at least one edge of the substrate.

[0017] The at least one insulating layer may be formed as a single layer.

[0018] The at least one insulating layer may be formed of a plurality of stacked layers.

[0019] The at least one insulating layer may include an inorganic material.

[0020] The at least one insulating layer may include oxide, nitride, or oxynitride.

[0021] The at least one insulating layer may extend over at least a portion of the central region on the substrate.

[0022] The at least one insulating layer may extend over at least a portion of the display area on the substrate.

[0023] The at least one insulating layer may completely cover the top surface of the substrate.

[0024] The at least one insulating layer may expose a portion of a top surface of the substrate.

[0025] The insulating pattern may extend longitudinally in parallel with at least one edge of the substrate.

[0026] A plurality of insulation patterns spaced apart from each other may be formed in one direction, and the groove may be located between the insulation patterns adjacent to each other.

[0027] A plurality of insulating patterns may be formed in another direction crossing the one direction.

[0028] At least one edge of the substrate may be defined by a cut line.

[0029] The insulating pattern may be formed in multiple layers.

[0030] The insulating pattern may be formed of an inorganic material.

[0031] The insulation pattern may include a central insulation pattern and a peripheral insulation pattern around the central insulation pattern, wherein a width of the central insulation pattern may be different from a width of the peripheral insulation pattern.

[0032] A width of the central insulating pattern may be greater than a width of the peripheral insulating pattern.

[0033] The insulating pattern may be formed as an island-shaped pattern.

[0034] The insulating pattern may have curved edges.

[0035] The insulating pattern may have an arc-shaped edge, a circular edge, or an elliptical edge.

[0036] The display device may further include a central insulating layer formed in a central region on the substrate.

[0037] The insulating patterns and the central insulating layer may be formed of the same or substantially the same material.

[0038] A portion of the central insulating layer may extend over a portion of the peripheral region.

[0039] The groove may be located between the central insulating layer and the insulating pattern.

[0040] The substrate may include an organic material.

[0041] The substrate may be formed in multiple layers.

[0042] The substrate may include a first layer including an organic material, a second layer including an organic material, and an insertion layer between the first layer and the second layer.

[0043] The display device may further include at least one conductive pattern that is located in the groove and that may contact a top surface or a side surface of the insulating pattern.

[0044] The at least one conductive pattern may include a pad unit.

[0045] The display device may further include a capping layer formed on the insulating pattern.

[0046] The cover layer may include an organic material.

[0047] The insulation pattern may include a first direction insulation pattern extending in a first direction and a second direction insulation pattern extending in a second direction crossing the first direction.

[0048] The first direction insulation pattern may be connected to the second direction insulation pattern.

[0049] The first direction insulation pattern and the second direction insulation pattern may surround the display area.

[0050] The first direction insulation pattern and the second direction insulation pattern may be connected to each other in a one-to-one correspondence and may surround the display area.

[0051] The first direction insulation pattern and the second direction insulation pattern may be connected to each other at ends thereof.

[0052] A plurality of first direction insulation patterns and a plurality of second direction insulation patterns may be formed, and two or more first direction insulation patterns among the plurality of first direction insulation patterns may be connected to one second direction insulation pattern among the plurality of second direction insulation patterns.

[0053] The one second direction insulation pattern among the second direction insulation patterns connected to the two or more first direction insulation patterns among the plurality of first direction insulation patterns may be located closest to an edge of the substrate.

[0054] The one second direction insulation pattern connected to the two or more first direction insulation patterns may be located closer to the display area than another second direction insulation pattern among the second direction insulation patterns located closest to an edge of the substrate.

[0055] One or more first direction insulation patterns among the plurality of first direction insulation patterns may not be connected to the plurality of second direction insulation patterns.

[0056] A plurality of first direction insulation patterns and a plurality of second direction insulation patterns may be formed, and two or more second direction insulation patterns among the plurality of second direction insulation patterns may be connected to one first direction insulation pattern among the plurality of first direction insulation patterns.

[0057] The one first direction insulation pattern connected to the two or more second direction insulation patterns may be located closest to an edge of the substrate.

[0058] The one first direction insulation pattern connected to the two or more second direction insulation patterns may be located closer to the display area than another first direction insulation pattern among the first direction insulation patterns located closest to an edge of the substrate.

[0059] One or more second direction insulation patterns among the plurality of second direction insulation patterns may not be connected to the plurality of first direction insulation patterns.

[0060] The insulation pattern may further include a connection insulation pattern connecting the first direction insulation pattern and the second direction insulation pattern.

[0061] The connection insulation pattern may not be parallel to the first direction and the second direction.

[0062] The display device may further include at least one thin film transistor (TFT) formed at a central area of ​​the substrate. The TFT may include an active layer, a gate electrode, a source electrode, and a drain electrode. At least one adjacent insulating layer may be formed adjacent to at least one of the active layer, the gate electrode, the source electrode, and the drain electrode, and the insulating pattern and the at least one adjacent insulating layer may be formed of the same or substantially the same material.

[0063] The at least one insulating layer may be formed between the substrate and the at least one TFT.

[0064] The at least one adjacent insulating layer may be at least one of a gate insulating layer for insulating the gate electrode from the active layer and an interlayer insulating layer for insulating the source electrode and the drain electrode from the gate electrode.

[0065] The display device may further include a passivation layer for covering the at least one TFT, and the passivation layer may be formed on the insulating pattern.

[0066] The display device may further include a first electrode electrically connected to the at least one TFT, and a pixel defining layer covering a portion of the first electrode and defining a pixel area, wherein the pixel defining layer is formed on the insulating pattern.

[0067] The display device may further include a second electrode facing the first electrode and an intermediate layer between the first electrode and the second electrode. The intermediate layer may include an organic emission layer.

[0068] According to one or more embodiments of the present invention, there is provided a method for manufacturing a display device, the display device comprising a substrate on which a central area and a peripheral area located adjacent to the central area are arranged. The central area includes a display area. The method comprises the following steps: forming at least one insulating pattern in the peripheral area; forming a groove adjacent to the at least one insulating pattern; forming at least one insulating layer between the at least one insulating pattern and the substrate, wherein the groove is located on the at least one insulating layer. The groove may be formed by removing a material used to form the at least one insulating pattern.

[0069] The method may further include forming a central insulating layer at a central region of the substrate, and the at least one insulating pattern and the central insulating layer may be formed of the same or substantially the same material.

[0070] The at least one insulating pattern and the central insulating layer may be formed simultaneously.

[0071] The at least one insulating layer may be formed in the peripheral region and the central region.

[0072] According to one or more embodiments of the present invention, a method for manufacturing a display device by using a mother substrate is provided. The method includes the following steps: cutting the mother substrate along a cutting line, wherein the display device includes: a central area and a peripheral area located adjacent to the central area, the central area including a display area; an insulating pattern formed in the peripheral area; a groove adjacent to the insulating pattern; and at least one insulating layer formed between the insulating pattern and the substrate, wherein the groove is located on the at least one insulating layer, wherein the cutting line corresponds to the groove and is separated from the insulating pattern. The groove may be formed by removing a material used to form the insulating pattern so that the groove is adjacent to the insulating pattern. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] These and / or other aspects will become apparent and more readily understood through the following description of embodiments in conjunction with the accompanying drawings, in which:

[0074] Figure 1 shows a plan view of a display device according to an embodiment of the present invention;

[0075] Figure 2 Shows Figure 1 an enlarged view of a portion D of;

[0076] Figure 3 Shown along Figure 2 A cross-sectional view of a portion D taken along line III-III;

[0077] Figure 4 , Figure 5 and Figure 6 Shows Figure 3 Modification example of part D of;

[0078] Figure 7 and Figure 8 Shows Figure 2 Modification example of part D of;

[0079] Fig. 9 A plan view showing a display device according to another embodiment of the present invention is shown;

[0080] Fig.10 Shows Fig. 9 an enlarged view of part E;

[0081] Fig.11 Shown along Fig.10 a sectional view of a portion E taken along line XI-XI;

[0082] Fig.12 Shows Fig.11 Modification example of part E of;

[0083] Fig.13 A plan view showing a display device according to another embodiment of the present invention is shown;

[0084] Fig.14 Shows Fig.13 an enlarged view of part F;

[0085] Fig.15 A plan view showing a display device according to another embodiment of the present invention is shown;

[0086] Fig.16 Shows Fig.15 an enlarged view of part G;

[0087] Fig.17 Shown along Fig.16a sectional view of a portion G taken along line XVII-XVII of ;

[0088] Fig.18 Shows Fig.17 A modified example of part G;

[0089] Fig.19 , Fig. 20 , Fig.21 and Fig. 22 They are shown respectively Figure 3 , Fig.11 , Fig.18 and Fig.21 Modification example of:

[0090] Fig.23 A plan view showing a display device according to another embodiment of the present invention is shown;

[0091] Fig.24 Shown along Fig.23 A cross-sectional view of the display device taken along line XVI-XVI and line XV-XV;

[0092] Fig.25 Shows Fig.24 Modification examples of the display device;

[0093] Fig.26 A plan view showing a display device according to another embodiment of the present invention is shown;

[0094] Fig. 27 Shows Fig.26 An enlarged view of part K;

[0095] Fig.28 , Fig.29 , Fig.30 , Fig.31 and Fig.32 Shows Fig. 27 Modification example of part K;

[0096] Fig.33 A plan view showing a mother substrate used in manufacturing a display device according to an embodiment of the present invention;

[0097] Fig.34 Shows Fig.33 an enlarged plan view of a portion M of; and

[0098] Fig.35 Shown along Fig.34 A cross-sectional view of portion M taken along line XX-XX. DETAILED DESCRIPTION

[0099] Because the present invention allows for various changes and many embodiments, example embodiments will be shown in the drawings and described in detail in the written description. By referring to the detailed description and drawings of the following example embodiments, the effects and features of the present invention and the methods for achieving the effects and features of the present invention can be more easily understood. However, the present invention can be implemented in many different forms and should not be interpreted as being limited to the embodiments set forth herein.

[0100] Hereinafter, in one or more embodiments, although terms such as “first”, “second”, etc. may be used, these components are not necessarily limited to the above terms, and the above terms are only used to distinguish one component from another.

[0101] Hereinafter, in one or more embodiments, unless there is a specific description contrary thereto, a singular form may include a plural form.

[0102] In the following, in one or more embodiments, terms such as “comprise” and “include” are used to list the existence of stated features or components without excluding the existence of one or more other stated features or one or more other components.

[0103] Hereinafter, in one or more embodiments, it will also be understood that when an element such as a layer, region, or component is referred to as being "on" another element, it may be directly on the other element, or an intermediate element such as a layer, region, or component may be disposed between them. In addition, when a first element is described as being "coupled to" or "connected to" a second element, the first element may be directly coupled to or directly connected to the second element without any intermediate element therebetween, or may be indirectly (e.g., electrically) coupled to or indirectly connected to the second element with one or more intermediate elements disposed therebetween.

[0104] In the drawings, for the convenience of description, the size and region of the layers are exaggerated for clarity. For example, for the convenience of description, the size and thickness of each element may be random, and therefore, one or more embodiments of the present invention are not limited thereto.

[0105] In the following, in one or more embodiments, the X-axis, Y-axis, and Z-axis may not be limited to three axes on a rectangular coordinate system, but may be interpreted as a broad meaning including three axes. For example, the X-axis, Y-axis, and Z-axis may be perpendicular to each other or may indicate different directions that are not perpendicular to each other.

[0106] In one or more embodiments, the order of the processes may be different from the order of the processes described. For example, two processes described sequentially may be performed substantially simultaneously, or may be performed in an order opposite to the order described.

[0107] Hereinafter, one or more embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Regardless of the figure numbers, those components that are the same or correspond to each other are given the same reference numerals, and repeated explanations are omitted.

[0108] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of...", when preceding a series of elements, modify the entire series of elements and do not modify the individual elements of the series.

[0109] Figure 1 A plan view of a display device 1000 according to an embodiment of the present invention is shown. Figure 2 Shows Figure 1 An enlarged view of part D of Figure 3 Shown along Figure 2 A cross-sectional view of portion D taken along line III-III.

[0110] Reference Figures 1 to 3 , the display device 1000 includes a substrate 101. The substrate 101 may include one or more of various suitable materials known to those skilled in the art. For example, the substrate 101 may be formed of a glass material, a metal material, or any suitable organic material.

[0111] In an embodiment, the substrate 101 may be a flexible substrate 101. Here, the flexible substrate 101 refers to a substrate having flexibility that is easily bent, curved, folded, and / or rolled. The flexible substrate 101 may be formed of ultra-thin glass, metal, or plastic. For example, when plastic is used, the substrate 101 may be formed of polyimide (PI), but one or more embodiments are not limited thereto, and thus one or more of various suitable materials known to those skilled in the art may be used.

[0112] A plurality of display devices 1000 may be formed on a mother substrate, and may be separated into individual display devices 1000 in a manner of cutting the mother substrate along a cutting line CL of the substrate 101 . Figure 1 One display device 1000 is shown cut along a cutting line CL and thus separated. Therefore, the edge of the substrate 101 is defined by the cutting line CL.

[0113] All edges of the substrate 101 (i.e., Figure 1 In the embodiment of the present invention, the four edges of the substrate 101 shown in FIG. 1 may be the cutting line CL. In other embodiments, one, two or three of the four edges of the substrate 101 may be the cutting line CL.

[0114] That is, the positions or number of edges determined as the cutting lines CL among all edges of the display device 1000 may vary according to the size and / or shape of the mother substrate and / or the number, shape, and size of substrates manufactured from the mother substrate.

[0115] The substrate 101 is divided into a peripheral area PA and a central area CA. In more detail, the peripheral area PA refers to an area around the cutting line CL, and the central area CA refers to an area located inside compared to the peripheral area PA.

[0116] However, the present embodiment is not limited thereto. That is, the cutting line CL may not exist. In more detail, one display device 1000 may be formed on a mother substrate, in which case the substrate 101 may correspond to the mother substrate, so that the cutting line CL may not exist. In this case, the peripheral area PA may refer to an area adjacent to an edge of the substrate 101, and the central area CA may refer to an area located inside compared to the peripheral area PA. For ease of description, it is assumed that the cutting line CL exists in the embodiment to be described below.

[0117] The central area CA may include at least one display area DA.

[0118] The display area DA may include at least one display device (not shown in Figure 1 In the display area DA, for example, an organic light emitting device (or organic light emitting device, OLED) for displaying images. In addition, a plurality of pixels may be arranged in the display area DA.

[0119] Non-display area (not in Figure 1 In some embodiments, the non-display area may be formed around the display area DA. In more detail, the non-display area may be formed to surround the display area DA. In an embodiment, the non-display area may be formed to be adjacent to a plurality of sides of the display area DA. In another embodiment, the non-display area may be formed to be adjacent to one side of the display area DA.

[0120] In another embodiment, only the display area DA may be disposed in the central area CA. That is, the non-display area may be formed only in the peripheral area PA.

[0121] Pad area (not in Figure 1 In this regard, the driver or the plurality of pad units (not shown in FIG. Figure 1 (marked in) can be set in the pad area.

[0122] In an embodiment, at least one central insulating layer (not in Figure 1 The central insulating layer (indicated in FIG. 1 ) may be formed in the central area CA to prevent or substantially prevent moisture or impurities from penetrating into the display device 1000 through the substrate 101. For example, the central insulating layer may include an inorganic material.

[0123] The peripheral area PA refers to a region around the cutting line CL and is arranged in the edge of the substrate 101 along the cutting line CL.

[0124] The insulating pattern IP is formed in the peripheral area PA. A groove GV is formed adjacent to the insulating pattern IP, wherein a material used to form the insulating pattern IP is removed from the groove GV.

[0125] The first insulating layer 111 is disposed between the substrate 101 and the insulating pattern IP and between the substrate 101 and the groove GV. That is, in the peripheral area PA, the first insulating layer 111 is formed on the substrate 101 and the insulating pattern IP and the groove GV are formed on the first insulating layer 111.

[0126] The first insulating layer 111 may be formed of one or more of various suitable insulating materials known to those skilled in the art. In an embodiment, the first insulating layer 111 may be formed of an inorganic material. For example, the first insulating layer 111 may include an oxide, a nitride, or a nitride oxide. In more detail, the first insulating layer 111 may include silicon nitride (SiN x ), silicon oxide (SiO 2 ) or silicon oxynitride (SiO x N y ).

[0127] In an embodiment, the first insulating layer 111 may be formed to extend to the central area CA or the display area DA. In another embodiment, the first insulating layer 111 may be formed on both the central area CA and the peripheral area PA of the substrate 101. That is, the first insulating layer 111 may be formed on the entire top surface of the substrate 101.

[0128] In an embodiment, the top surface of the substrate 101 is not exposed in the peripheral area PA due to the first insulating layer 111. That is, the first insulating layer 111 may be formed to extend to the cutting line CL of the substrate 101.

[0129] However, one or more embodiments of the present invention are not limited thereto, and the first insulating layer 111 may not cover the top surface of the substrate 101 in a portion of the peripheral area PA.

[0130] The insulating pattern IP may be formed of one or more of various suitable materials known to those skilled in the art. For example, the insulating pattern IP may be formed of an inorganic material or an organic material. In an embodiment, the insulating pattern IP may be formed of a material that is the same or substantially the same as at least one of the insulating materials that may be formed in the central area CA of the substrate 101. That is, as described in the above embodiment, the at least one central insulating layer may be formed in the central area CA to prevent or substantially prevent moisture or impurities from penetrating into the display device 1000 through the substrate 101, where the insulating pattern IP may be formed of the same or substantially the same material as the central insulating layer, and in another embodiment, the central insulating layer and the insulating pattern IP may be formed together (e.g., simultaneously).

[0131] The groove GV is located between the insulation pattern IP and the cutting line CL of the substrate 101. The groove GV is located adjacent to the cutting line CL of the substrate 101, and the insulation pattern IP is separated from the cutting line CL of the substrate 101.

[0132] The insulating pattern IP may extend longitudinally. Figure 2 As shown, the insulating pattern IP may have a shape extending in a longitudinal direction parallel to the cutting line CL of the substrate 101. Here, the length of the insulating pattern IP may vary and thus may be greater or less than the length of the display area DA.

[0133] In an embodiment, although not shown, it is possible to Figure 1 and Figure 2 A plurality of insulation patterns IP are arranged in the Y-axis direction (eg, arranged in the longitudinal direction).

[0134] The two grooves GV are formed such that the insulating pattern IP is located between the two grooves GV. That is, the groove GV is formed by partially removing a material forming the insulating pattern IP.

[0135] The groove GV includes the groove GV adjacent to the cutting line CL of the substrate 101. In addition, in the embodiment, the groove GV may be adjacent to all the cutting lines CL of the substrate 101. That is, the groove GV may include the groove GV adjacent to all the edges of the substrate 101.

[0136] However, the present embodiment is not limited thereto, and the groove GV may include the groove GV adjacent to only at least one edge of the substrate 101 .

[0137] The groove GV adjacent to the cutting line CL of the substrate 101 (i.e., the groove arranged in the peripheral area PA of the display device) prevents or reduces the expansion of cracks from the edge of the substrate 101. For example, the groove GV adjacent to the cutting line CL of the substrate 101 first prevents or reduces the expansion of cracks that may occur on the substrate 101 when each display device 1000 is cut and then separated from the mother substrate.

[0138] Specifically, the groove GV corresponds to the top surface of the first insulating layer 111 on the substrate 101. Since the first insulating layer 111 is formed in the groove GV adjacent to the insulating pattern IP, the substrate 101 may be effectively protected, and occurrence and extension of cracks may be prevented or reduced.

[0139] In addition, due to the first insulating layer 111 , the insulating pattern IP can be prevented or substantially prevented from being separated from the substrate 101 .

[0140] The insulating pattern IP is adjacent to the groove GV adjacent to the cutting line CL of the substrate 101, thereby again preventing or substantially preventing the expansion of the crack. In addition, the insulating pattern IP improves or can improve the durability of the peripheral area PA. For example, when the substrate 101 is formed of a flexible material and thus the display device 1000 has flexibility, the insulating pattern IP can effectively protect the peripheral area PA when a bending or folding action occurs in the peripheral area PA.

[0141] The groove GV adjacent to the side of the insulation pattern IP away from the cutting line CL may stop or substantially prevent cracks from being additionally generated or extended.

[0142] Figures 4 to 6 Shows Figure 3 A modified example of part D of FIG.

[0143] First, refer to Figure 4 , the first insulating layer 111 and the second insulating layer 112 are disposed between the substrate 101 and the insulating pattern IP and between the substrate 101 and the groove GV. In more detail, the first insulating layer 111 is formed on the substrate 101, and the second insulating layer 112 is formed on the first insulating layer 111. The insulating pattern IP and the groove GV are formed on the second insulating layer 112.

[0144] The second insulating layer 112 may be formed of one or more of various suitable insulating materials known to those skilled in the art.

[0145] In an embodiment, the second insulating layer 112 may be formed of an inorganic material. For example, the second insulating layer 112 may include oxide, nitride, or oxynitride. In more detail, the second insulating layer 112 may include silicon nitride (SiN x ), silicon oxide (SiO 2 ) or silicon oxynitride (SiO x N y ).

[0146] Although not shown, in an embodiment, at least three insulation layers may be stacked between the substrate 101 and the insulation pattern IP and between the substrate 101 and the groove GV.

[0147] Reference Figure 5 , the insulating pattern IP is not a single layer, but includes a plurality of layers including a first layer IPa and a second layer IPb. The first layer IPa is formed on the first insulating layer 111, and the second layer IPb is formed on the first layer IPa. The first layer IPa and the second layer IPb may be formed of one or more of various suitable insulating materials including organic materials and inorganic materials known to those skilled in the art.

[0148] In an embodiment, the first layer IPa and the second layer IPb may be formed of the same or substantially the same material.

[0149] Reference Figure 5 , the first layer IPa and the second layer IPb have the same or substantially the same width. However, the present embodiment is not limited thereto, so the first layer IPa and the second layer IPb may have different widths or a portion of the top surface of the first layer IPa may not be covered by the second layer IPb.

[0150] Although not shown, in an embodiment, Figure 4 The second insulating layer 112 may also be provided Figure 5 For example, the second insulating layer 112 may also be disposed between the first layer IPa and the first insulating layer 111.

[0151] Reference Figure 6 , the substrate 101 is not a single layer, but includes a multilayer including a first layer 101a, a second layer 101b, and an insertion layer 101c. The first layer 101a and the second layer 101b may include an organic material, and the insertion layer 101c may include an inorganic material. In an embodiment, the first layer 101a and the second layer 101b may include a plastic material such as polyimide, and the insertion layer 101c may include silicon oxide.

[0152] However, the present invention is not limited thereto, and the first layer 101a and the second layer 101b may include one or more of various suitable types of the same or different organic materials known to those skilled in the art. The insertion layer 101c may include one or more of various suitable materials known to those skilled in the art that can be used as a barrier, and may not have a single-layer structure but may have a multi-layer structure.

[0153] Although not shown, Figure 6 The multilayer structure of the substrate 101 shown in FIG. Figure 4 and Figure 5 One or more of the structures.

[0154] Figure 7 and Figure 8 Shows Figure 2 A modified example of part D of FIG.

[0155] Reference Figure 7 , forming a plurality of insulating patterns IP. Figure 7 Two insulating patterns IP are shown, but the present embodiment is not limited thereto. That is, at least three insulating patterns IP may be formed.

[0156] In an embodiment, the plurality of insulating patterns IP may be arranged in one direction (eg, along a width direction ( Figure 7 Multiple insulation patterns IP are arranged in the X-axis direction.

[0157] In addition, the groove GV is formed adjacent to the plurality of insulation patterns IP.

[0158] In an embodiment, the plurality of insulating patterns IP may be formed in parallel with each other and may have a regular width (eg, a uniform width). In addition, the plurality of insulating patterns IP may have a uniform width or different widths according to each region.

[0159] Other configurations of the insulation pattern IP are the same or substantially the same as those of the insulation pattern IP described in the foregoing embodiment, and thus a detailed description thereof is omitted here.

[0160] The plurality of insulating patterns IP and the grooves GV formed therebetween can effectively block or substantially prevent cracks from extending from the cutting line CL through the substrate 101 to the substrate 101. That is, due to the grooves GV adjacent to the cutting line CL (i.e., the edge of the substrate 101), crack occurrence can be reduced or minimized, the insulating pattern IP adjacent to the groove GV adjacent to the cutting line CL can prevent or reduce crack occurrence, the grooves GV adjacent to the insulating pattern IP can prevent or reduce crack occurrence extension, and the insulating pattern IP adjacent to the grooves GV can additionally prevent or reduce crack occurrence and crack occurrence extension.

[0161] Reference Figure 8 , forming an insulating pattern IP. Figure 8 The insulation pattern IP shown in FIG. 4 includes a central insulation pattern IPc and a peripheral insulation pattern IPp.

[0162] The peripheral insulating pattern IPp is disposed around the central insulating pattern IPc. That is, the peripheral insulating pattern IPp is disposed between the cutting line CL of the substrate 101 and the central insulating pattern IPc, and between the central insulating pattern IPc and the display area (DA).

[0163] Reference Figure 8 , two peripheral insulation patterns IPp are formed on each side of the central insulation pattern IPc, but the present invention is not limited thereto. That is, at least three peripheral insulation patterns IPp may be formed on each side of the central insulation pattern IPc.

[0164] The central insulation pattern IPc has a width W1 , and each peripheral insulation pattern IPp has a width W2 .

[0165] In an embodiment, width W1 and width W2 may be different from each other. For example, width W1 may be greater than width W2.

[0166] Since the width W1 of the central insulating pattern IPc is greater than the width W2 of the peripheral insulating pattern IPp, cracks that may extend through the peripheral insulating pattern IPp may be effectively blocked or substantially prevented by the central insulating pattern IPc.

[0167] In addition, since the width W1 and the width W2 are different from each other, when the display apparatus 1000 is bent, the flexibility of the display apparatus 1000 may be improved.

[0168] In embodiments, the central insulation pattern IPc and the peripheral insulation pattern IPp may be formed parallel to each other.

[0169] Other configurations of the insulation pattern IP are the same or substantially the same as those of the insulation pattern IP described in the foregoing embodiment, and thus a detailed description thereof is omitted here.

[0170] Fig. 9 A plan view of a display device 2000 according to another embodiment of the present invention is shown. Fig.10 Show Fig. 9 An enlarged view of part E of Fig.11 Shown along Fig.10 A cross-sectional view of portion E taken along line XI-XI.

[0171] Reference Figures 9 to 11 , the display device 2000 according to the present embodiment includes a substrate 201. The substrate 201 may include one or more of various suitable materials known to those skilled in the art. Detailed examples of various suitable materials for the substrate 201 are the same or substantially the same as the detailed examples of various suitable materials for the substrate described in the previous embodiments, and thus a detailed description thereof is omitted here.

[0172] A plurality of display devices 2000 may be formed on a mother substrate, and may be separated into individual display devices 2000 in a manner of cutting the mother substrate along a cutting line CL of the substrate 201 . Fig. 9 One display device 2000 is shown cut along a cutting line CL and thus separated. Therefore, the edge of the substrate 201 is defined by the cutting line CL.

[0173] All edges of the substrate 201 (i.e., Fig. 9 The four edges of the substrate 201 shown in FIG. 20A and FIG. 20B may be the cutting lines CL. In an embodiment, one, two or three of the four edges of the substrate 201 may be the cutting lines CL.

[0174] That is, the positions or number of edges determined as the cutting lines CL among all edges of the display device 2000 may vary according to the size and / or shape of the mother substrate and / or the number, shape, and size of substrates manufactured from the mother substrate.

[0175] The substrate 201 is divided into a peripheral area PA and a central area CA. In more detail, the peripheral area PA refers to an area around the cutting line CL, and the central area CA refers to an area located inside compared to the peripheral area PA.

[0176] However, the present embodiment is not limited thereto. That is, the cutting line CL may not exist. In more detail, one display device 2000 may be formed on a mother substrate, in which case the substrate 201 may correspond to the mother substrate, so that the cutting line CL may not exist. In this case, the peripheral area PA may refer to an area adjacent to an edge of the substrate 201, and the central area CA may refer to an area located inside compared to the peripheral area PA. For ease of description, it is assumed that the cutting line CL exists in the embodiment to be described below.

[0177] The central area CA may include at least one display area DA.

[0178] The display area DA may have at least one display device (not shown in FIG. Fig. 9 In the display area DA, for example, an OLED is used to display an image. In addition, a plurality of pixels may be arranged in the display area DA.

[0179] Non-display area (not in Fig. 9 In some embodiments, the non-display area may be formed around the display area DA. In more detail, the non-display area may be formed to surround the display area DA. In an embodiment, the non-display area may be formed to be adjacent to a plurality of sides of the display area DA. In another embodiment, the non-display area may be formed to be adjacent to one side of the display area DA.

[0180] In another embodiment, only the display area DA may be disposed in the central area CA. That is, the non-display area may be formed only in the peripheral area PA.

[0181] Pad area (not in Fig. 9 In this regard, the driver or the plurality of pad units (not shown in FIG. Fig. 9 (marked in) can be set in the pad area.

[0182] At least one insulating layer (not in Fig. 9 ) may be formed in the central area CA to prevent or substantially prevent moisture or impurities from penetrating into the display device 2000 through the substrate 201. That is, Fig.11 As shown, the central insulating layer 220 may be formed in the central area CA on the substrate 201 .

[0183] In an embodiment, the central insulating layer 220 may be formed to extend from the central area CA to a portion of the peripheral area PA. In another embodiment, a portion of the central insulating layer 220 may be formed in a portion of the peripheral area PA while the portion of the central insulating layer 220 is partially separated (e.g., spaced apart) from the central insulating layer 220 formed in the central area CA.

[0184] The central insulating layer 220 may include one or more of various suitable insulating materials known to those skilled in the art, for example, an inorganic material.

[0185] The peripheral area PA refers to a region around the cutting line CL and is arranged at an edge of the substrate 201 along the cutting line CL.

[0186] The insulating pattern IP is formed in the peripheral area PA. A groove GV is formed adjacent to the insulating pattern IP, wherein a material used to form the insulating pattern IP is removed from the groove GV.

[0187] The first insulating layer 211 is disposed between the substrate 201 and the insulating pattern IP and between the substrate 201 and the groove GV. That is, in the peripheral area PA, the first insulating layer 211 is formed on the substrate 201, and the insulating pattern IP and the groove GV are formed on the first insulating layer 211. The first insulating layer 211 may be formed of one or more of various suitable insulating materials known to those skilled in the art, and in this regard, all (or at least one) of the materials described in the aforementioned embodiments may be used.

[0188] In an embodiment, the top surface of the substrate 201 is not exposed in the peripheral area PA due to the first insulating layer 211. That is, the first insulating layer 211 may be formed to extend to the cutting line CL of the substrate 201.

[0189] However, one or more embodiments of the present invention are not limited thereto, and the first insulating layer 211 may not cover the top surface of the substrate 201 in a portion of the peripheral area PA.

[0190] In an embodiment, the first insulating layer 211 may extend to the central area CA. In addition, the first insulating layer 211 may be disposed between the substrate 201 and the central insulating layer 220 .

[0191] The insulating pattern IP may be formed of one or more of various suitable materials known to those skilled in the art. For example, the insulating pattern IP may be formed of an inorganic material or an organic material. In an embodiment, the insulating pattern IP may be formed of a material that is the same or substantially the same as at least one of the insulating materials that may be formed in the central area CA of the substrate 201.

[0192] In an embodiment, the insulation pattern IP may be formed of the same material or substantially the same material as the central insulation layer 220. In doing so, the insulation pattern IP and the central insulation layer 220 may be formed together (eg, simultaneously).

[0193] In embodiments, the insulation pattern IP and the central insulation layer 220 may be formed of an inorganic material.

[0194] The groove GV is located between the insulating pattern IP and the cutting line CL of the substrate 201. The groove GV is located adjacent to the cutting line CL of the substrate 201, and the insulating pattern IP is separated (eg, spaced apart) from the cutting line CL of the substrate 201. In addition, another groove GV is formed between the insulating pattern IP and the central insulating layer 220.

[0195] The features of the groove GV and the insulating pattern IP are the same or substantially the same as those of the groove GV and the insulating pattern IP described in the previous embodiment, and thus a detailed description thereof is omitted here. In an embodiment, although not shown, the insulating pattern IP may be provided in one direction (e.g., in the width direction (along the groove GV and the insulating pattern IP) Fig.10 In other words, multiple insulating patterns IP may be arranged in the X-axis direction. Figure 7 and Figure 8 One or more of the structures shown in FIG. 1 are applied to the display device 2000 .

[0196] Although not shown, in addition to the first insulating layer 211, at least one insulating layer (not shown) may be further provided between the substrate 201 and the insulating pattern IP and between the substrate 201 and the groove GV. Fig.11 The at least one insulating layer may be formed of one or more of various suitable insulating materials known to those skilled in the art, for example, an inorganic material.

[0197] Fig.12 Shows Fig.11 A modified example of part E of FIG.

[0198] Reference Fig.12 , the insulating pattern IP is not a single layer, but includes a plurality of layers including a first layer IPa and a second layer IPb. The first layer IPa is formed on the first insulating layer 211, and the second layer IPb is formed on the first layer IPa. The first layer IPa and the second layer IPb are formed of one or more of various suitable insulating materials known to those skilled in the art, for example, an organic material or an inorganic material.

[0199] In an embodiment, the first layer IPa and the second layer IPb may be formed of the same or substantially the same material.

[0200] In an embodiment, the central insulating layer 220 may be formed to extend from the central area CA to a portion of the peripheral area PA. In another embodiment, a portion of the central insulating layer 220 may be formed at a portion of the peripheral area PA while the portion of the central insulating layer 220 is partially separated (e.g., spaced apart) from the central insulating layer 220 formed at the central area CA.

[0201] The central insulating layer 220 may include one or more of various suitable insulating materials known to those skilled in the art, for example, an inorganic material.

[0202] In embodiments, the insulation pattern IP may be formed of the same or substantially the same material as the central insulation layer 220. In doing so, the insulation pattern IP and the central insulation layer 220 may be formed together (eg, simultaneously).

[0203] In embodiments, the insulation pattern IP and the central insulation layer 220 may be formed of an inorganic material.

[0204] In more detail, the central insulating layer 220 includes a first central insulating layer 221 and a second central insulating layer 222. The first layer IPa of the insulating pattern IP may be formed of the same material or substantially the same material as the first central insulating layer 221, and the second layer IPb may be formed of the same material or substantially the same material as the second central insulating layer 222.

[0205] In this way, the first layer IPa and the first central insulating layer 221 may be formed together (eg, simultaneously), and the second layer IPb and the second central insulating layer 222 may be formed together (eg, simultaneously).

[0206] In addition, in an embodiment, the first layer IPa and the second layer IPb may be formed together (or simultaneously). In another embodiment, when the first layer IPa and the second layer IPb are formed together (e.g., simultaneously), the first layer IPa and the second layer IPb may be formed together (e.g., simultaneously) with the first central insulating layer 221 and the second central insulating layer 222.

[0207] Reference Fig.12 , the first layer IPa and the second layer IPb have the same width or substantially the same width. However, the present invention is not limited thereto, the first layer IPa and the second layer IPb may have different widths, and a portion of the top surface of the first layer IPa may not be covered by the second layer IPb.

[0208] Reference Fig.11 and Fig.12 , the substrate 201 is formed as a single layer, but the present invention is not limited thereto. Figure 6 As in the embodiment of FIG. 1 , the substrate 201 may not be formed as a single layer but may be formed as a multilayer including a first layer (not shown), a second layer (not shown) and an insertion layer (not shown). The characteristics of the first layer, the second layer and the insertion layer are similar to those of the reference Figure 6 The features of the described first layer, second layer, and intervening layer are the same or substantially the same, and thus a detailed description thereof is omitted here.

[0209] Fig.13 A plan view of a display device 3000 according to another embodiment of the present invention is shown. Fig.14 Shows Fig.13 An enlarged view of part F.

[0210] Reference Fig.13 and Fig.14 , the display device 3000 according to the present embodiment includes a substrate 301. The substrate 301 may include one or more of various suitable materials known to those skilled in the art. Detailed examples of various suitable materials for the substrate 301 are the same or substantially the same as the detailed examples of various suitable materials for the substrate described in the previous embodiments, and thus a detailed description thereof is omitted here.

[0211] A plurality of display devices 3000 may be formed on a mother substrate, and may be separated into individual display devices 3000 in a manner of cutting the mother substrate along a cutting line CL of the substrate 301 . Fig.13 One display device 3000 is shown cut along a cutting line CL and thus separated. Therefore, the edge of the substrate 301 is defined by the cutting line CL.

[0212] All edges of the substrate 301 (i.e., Fig.13 4 (four edges of the substrate 301 shown in FIG. 4 ) may be the cutting line CL. In an embodiment, one, two or three of the four edges of the substrate 301 may be the cutting line CL.

[0213] That is, according to the size and / or shape of the mother substrate and / or the number, shape, and size of substrates manufactured from the mother substrate, the position or number of edges determined as the cutting line CL among all edges of the display device 3000 may vary.

[0214] The substrate 301 is divided into a peripheral area PA and a central area CA. In more detail, the peripheral area PA refers to an area around the cutting line CL, and the central area CA refers to an area located inside compared to the peripheral area PA.

[0215] However, the present embodiment is not limited thereto. That is, the cutting line CL may not exist. In more detail, one display device 3000 may be formed on a mother substrate, in which case the substrate 301 may correspond to the mother substrate, so that the cutting line CL may not exist. In this case, the peripheral area PA may refer to an area adjacent to an edge of the substrate 301, and the central area CA may refer to an area located inside compared to the peripheral area PA. For ease of description, it is assumed that the cutting line CL exists in the embodiment to be described below.

[0216] The central area CA may include at least one display area DA.

[0217] The display area DA may include at least one display device (not shown in Fig.13 In the display area DA, for example, an OLED is used to display an image. In addition, a plurality of pixels may be arranged in the display area DA.

[0218] Non-display area (not in Fig.13In some embodiments, the non-display area may be formed around the display area DA. In more detail, the non-display area may be formed to surround the display area DA. In an embodiment, the non-display area may be formed to be adjacent to a plurality of sides of the display area DA. In another embodiment, the non-display area may be formed to be adjacent to one side of the display area DA.

[0219] In another embodiment, only the display area DA may be disposed in the central area CA. That is, the non-display area may be formed only in the peripheral area PA.

[0220] Pad area (not in Fig.13 In this regard, the driver or the plurality of pad units (not shown in FIG. Fig.13 (marked in) can be set in the pad area.

[0221] In an embodiment, at least one insulating layer (not in Fig.13 ) may be formed in the central area CA to prevent or substantially prevent moisture or impurities from penetrating into the display device 3000 through the substrate 301. For example, the at least one insulating layer may include an inorganic material.

[0222] The peripheral area PA refers to a region around the cutting line CL and is arranged in the edge of the substrate 301 along the cutting line CL.

[0223] The insulating pattern IP is formed in the peripheral area PA. A groove GV is formed adjacent to the insulating pattern IP, wherein a material used to form the insulating pattern IP is removed from the groove GV.

[0224] A plurality of insulating patterns IP separated from each other (e.g., spaced apart) may be formed. That is, the plurality of insulating patterns IP may be arranged in a direction intersecting a direction from a cutting line CL (i.e., an edge of the substrate 301) toward the display area DA. Here, a separation area SA may exist between the plurality of insulating patterns IP and may correspond to the groove GV.

[0225] Although not shown, the first insulating layer (not shown) Fig.13 The first insulating layer is the same or substantially the same as the first insulating layer described in the previous embodiment, and thus a detailed description thereof is omitted here.

[0226] The groove GV is located between the insulating pattern IP and the cutting line CL of the substrate 301. The groove GV is located adjacent to the cutting line CL of the substrate 301, and the insulating pattern IP is separated from the cutting line CL of the substrate 301.

[0227] Although not specifically shown, Figures 4 to 12 One or more of the structures shown in FIG. 1 are applied to the display device 3000 .

[0228] That is, the plurality of insulation patterns IP may be arranged in a direction different from the direction in which they are currently arranged ( Fig.14 The Y-axis direction) crosses the direction (along Fig.14 in the X-axis direction).

[0229] In addition, multiple insulating layers (not in Fig.14 (indicated in FIG. 1 ) may be disposed between the substrate 301 and the insulating pattern IP and between the substrate 301 and the groove GV. In addition, the insulating pattern IP may not be formed as a single layer but may be formed as a multi-layer.

[0230] In an embodiment, the central insulating layer (not in Fig.14 In another embodiment, a portion of the central insulating layer may be formed in a portion of the peripheral area PA while the portion of the central insulating layer is partially separated (e.g., isolated) from the central insulating layer formed in the central area CA.

[0231] In embodiments, the insulation pattern IP and the central insulation layer may be formed of the same or substantially the same material.

[0232] The substrate 301 may be formed as a single layer, but the present invention is not limited thereto. Figure 6 As in the embodiment of the present invention, the substrate 301 may not be formed as a single layer, but may be formed to include a first layer (not shown in FIG. Fig.14 Indicated in), the second layer (not in Fig.14 ) and insert layers (not shown in Fig.14 The characteristics of the first layer, the second layer and the insertion layer are similar to those of the reference Figure 6 The features of the described first layer, second layer, and intervening layer are the same or substantially the same, and thus a detailed description thereof is omitted here.

[0233] Fig.15 A plan view of a display device 4000 according to another embodiment of the present invention is shown. Fig.16 Shows Fig.15 An enlarged view of part G, Fig.17 Shown along Fig.16 A cross-sectional view of portion G taken along line XVII-XVII.

[0234] Reference Figures 15 to 17 , the display device 4000 according to the present embodiment includes a substrate 401. The substrate 401 may include one or more of various suitable materials known to those skilled in the art. Detailed examples of various suitable materials for the substrate 401 are the same or substantially the same as the detailed examples of various suitable materials for the substrate described in the previous embodiments, and thus a detailed description thereof is omitted here.

[0235] A plurality of display devices 4000 may be formed on a mother substrate, and may be separated into individual display devices 4000 in a manner of cutting the mother substrate along a cutting line CL of the substrate 401 . Fig.15 One display device 4000 is shown cut along a cutting line CL and thus separated. Therefore, the edge of the substrate 401 is defined by the cutting line CL.

[0236] All edges of the substrate 401 (i.e., Fig.15 The four edges of the substrate 401 shown in FIG. 4A and FIG. 4B may be the cutting lines CL. In an embodiment, one, two or three of the four edges of the substrate 401 may be the cutting lines CL.

[0237] That is, according to the size and / or shape of the mother substrate and / or the number, shape, and size of substrates manufactured from the mother substrate, the position or number of edges determined as the cutting line CL among all edges of the display device 4000 may vary.

[0238] The substrate 401 is divided into a peripheral area PA and a central area CA. In more detail, the peripheral area PA refers to an area around the cutting line CL, and the central area CA refers to an area located inside compared to the peripheral area PA.

[0239] However, the present embodiment is not limited thereto. That is, the cutting line CL may not exist. In more detail, one display device 4000 may be formed on a mother substrate, in which case the substrate 401 may correspond to the mother substrate, so that the cutting line CL may not exist. In this case, the peripheral area PA may refer to an area adjacent to an edge of the substrate 401, and the central area CA may refer to an area located inside compared to the peripheral area PA. For ease of description, it is assumed that the cutting line CL exists in the embodiment to be described below.

[0240] The central area CA may include at least one display area DA.

[0241] The display area DA may have at least one display device (not shown in FIG. Fig.15 In the display area DA, for example, an OLED is used to display an image. In addition, a plurality of pixels may be arranged in the display area DA.

[0242] Non-display area (not in Fig.15 In some embodiments, the non-display area may be formed around the display area DA. In more detail, the non-display area may be formed to surround the display area DA. In an embodiment, the non-display area may be formed to be adjacent to a plurality of sides of the display area DA. In another embodiment, the non-display area may be formed to be adjacent to one side of the display area DA.

[0243] In another embodiment, only the display area DA may be disposed in the central area CA. That is, the non-display area may be formed only in the peripheral area PA.

[0244] Pad area (not in Fig.15 In this regard, the driver or the plurality of pad units (not shown in FIG. Fig.15 (marked in) can be set in the pad area.

[0245] In an embodiment, at least one insulating layer (not shown) may be formed in the central area CA to prevent or substantially prevent moisture or impurities from penetrating into the display device 4000 through the substrate 401. For example, the at least one insulating layer may include an inorganic material.

[0246] The peripheral area PA refers to a region around the cutting line CL and is arranged in the edge of the substrate 401 along the cutting line CL.

[0247] The insulating pattern IP is formed in the peripheral area PA. A groove GV is formed adjacent to the insulating pattern IP, wherein a material used to form the insulating pattern IP is removed from the groove GV.

[0248] The plurality of insulating patterns IP may correspond to the plurality of island patterns, respectively. In an embodiment, each insulating pattern IP may have a curved edge. In another embodiment, each insulating pattern IP may have an arc-shaped edge, a circular edge, or an elliptical edge.

[0249] In an embodiment, the plurality of insulation patterns IP may be formed as a plurality of island patterns arranged in a crossing direction.

[0250] For example, the plurality of insulating patterns IP may be arranged in a direction parallel to the cutting line CL (along the Fig.16 X-axis direction) and another direction intersecting with the direction parallel to the cutting line CL ( Fig.16 in the Y-axis direction).

[0251] The first insulating layer 411 is disposed between the substrate 401 and the insulating pattern IP and between the substrate 401 and the groove GV. The first insulating layer 411 is the same or substantially the same as the first insulating layer described in the previous embodiment, and thus a detailed description thereof is omitted here.

[0252] The groove GV is located between the insulation pattern IP and the cutting line CL of the substrate 401. The groove GV is located adjacent to the cutting line CL of the substrate 401, and the insulation pattern IP is separated (eg, spaced apart) from the cutting line CL of the substrate 401.

[0253] The grooves GV are respectively formed between the plurality of island-shaped insulating patterns IP. In this way, the grooves GV extend widely (eg, extend widely in a predetermined area), thereby effectively stopping or substantially preventing cracks from extending through the substrate 401.

[0254] Although not shown, the Figures 4 to 12One or more of the structures shown in FIG. 4 are applied to the display device 4000 .

[0255] In addition, multiple insulating layers (not in Fig.17 Indicated in the figure) may be disposed between the substrate 401 and the insulating pattern IP and between the substrate 401 and the groove GV. In addition, the insulating pattern IP may not be formed as a single layer, but may be formed to include a first layer IPa (not in Fig.17 Indicated in) and Layer 2 IPb (not in Fig.17 Multilayers (indicated in ).

[0256] In an embodiment, the first layer IPa and the second layer IPb may be formed of the same or substantially the same material.

[0257] In an embodiment, the central insulating layer (not in Fig.15 In another embodiment, a portion of the central insulating layer may be formed in a portion of the peripheral area PA while the portion of the central insulating layer is partially separated (e.g., isolated) from the central insulating layer formed in the central area CA.

[0258] In embodiments, the insulation pattern IP and the central insulation layer may be formed of the same or substantially the same material.

[0259] Although the substrate 401 is formed as a single layer, the present invention is not limited thereto. Figure 6 As in the embodiment of the present invention, the substrate 401 may not be formed as a single layer, but may be formed to include a first layer (not shown in FIG. Fig.17 Indicated in), the second layer (not in Fig.17 ) and insert layers (not shown in Fig.17 The characteristics of the first layer, the second layer and the insertion layer are similar to those of the reference Figure 6 The features of the described first layer, second layer, and intervening layer are the same or substantially the same, and thus a detailed description thereof is omitted here.

[0260] Fig.18 Shows Fig.17 A modified example of part G of FIG.

[0261] Reference Fig.18 , the portion G includes a conductive pattern MT. The conductive pattern MT may be a pad unit. The conductive pattern MT is disposed in the groove GV between the plurality of insulating patterns IP. Here, the conductive pattern MT may be formed to extend on the top surface and / or the side surface of the plurality of insulating patterns IP.

[0262] Figures 19 to 22 They are shown respectively Figure 3 , Fig.11 , Fig.18 and Fig.21's modified example.

[0263] That is, in Figures 19 to 22 The modification examples shown in Figure 3 , Fig.11 , Fig.18 and Fig.21 covering layer on the structure.

[0264] Reference Fig.19 , a capping layer 130 is further formed to cover the insulating pattern IP. The capping layer 130 may be formed of one or more of various suitable materials known to those skilled in the art, for example, an organic material. In an embodiment, the capping layer 130 may contact the first insulating layer 111. That is, the capping layer 130 may cover the groove GV.

[0265] The capping layer 130 may protect the insulating pattern IP, and may also protect the first insulating layer 111 on the substrate 101 .

[0266] Although not shown, the cover layer 130 may also be applied to Figures 4 to 8 One or more of the structures shown in .

[0267] Reference Fig. 20 , a capping layer 230 is further formed to cover the insulating pattern IP. The capping layer 230 may be formed of one or more of various suitable materials known to those skilled in the art, for example, an organic material. In an embodiment, the capping layer 230 may contact the first insulating layer 211. That is, the capping layer 230 may cover the groove GV.

[0268] The cover layer 230 may be formed even in the central area CA, and thus may cover at least a portion of the central insulating layer 220 .

[0269] Although not shown, the cover layer 230 may also be applied to Figures 12 to 17 One or more of the structures shown in .

[0270] Reference Fig.21 , a capping layer 430 is further formed to cover the insulating pattern IP. The capping layer 430 may be formed of one or more of various suitable materials known to those skilled in the art, for example, an organic material. In an embodiment, the capping layer 430 may contact the first insulating layer 411. That is, the capping layer 430 may cover the groove GV.

[0271] In addition, the cover layer 430 is formed to cover the conductive pattern MT.

[0272] Reference Fig. 22 , the capping layer 430 may have a width sufficient to cover the conductive pattern MT. That is, some of the grooves GV may not be covered by the capping layer 430.

[0273] Fig.23 A plan view of a display device 5000 according to another embodiment of the present invention is shown. Fig.24 Shown along Fig.23 1 is a cross-sectional view of the display device 5000 taken along the line XVI-XVI and the line XV-XV of FIG. For convenience of description, the present embodiment will be described with respect to the differences from the aforementioned embodiment.

[0274] The display device 5000 according to the present embodiment includes a substrate 501. The substrate 501 may include one or more of various suitable materials known to those skilled in the art. Detailed examples of various suitable materials for the substrate 501 are the same or substantially the same as the detailed examples of various suitable materials for the substrate described in the previous embodiments, and therefore a detailed description thereof is omitted here.

[0275] A plurality of display devices 5000 may be formed on a mother substrate, and may be separated into individual display devices 5000 in a manner of cutting the mother substrate along a cutting line CL of the substrate 501 . Fig.23 One display device 5000 is shown cut along a cutting line CL and thus separated. Therefore, the edge of the substrate 501 is defined by the cutting line CL.

[0276] All edges of the substrate 501 (i.e., Fig.23 The four edges of the substrate 501 shown in FIG. 5A and FIG. 5B may be the cutting lines CL. In an embodiment, one, two or three of the four edges of the substrate 501 may be the cutting lines CL.

[0277] That is, according to the size and / or shape of the mother substrate and / or the number, shape, and size of substrates manufactured from the mother substrate, the position or number of edges determined as the cutting line CL among all edges of the display device 5000 may vary.

[0278] The substrate 501 is divided into a peripheral area PA and a central area CA. In more detail, the peripheral area PA refers to an area around the cutting line CL, and the central area CA refers to an area located inside compared to the peripheral area PA.

[0279] However, the present embodiment is not limited thereto. That is, the cutting line CL may not exist. In more detail, one display device 5000 may be formed on a mother substrate, in which case the substrate 501 may correspond to the mother substrate, so that the cutting line CL may not exist. In this case, the peripheral area PA may refer to an area adjacent to an edge of the substrate 501, and the central area CA may refer to an area located inside compared to the peripheral area PA. For ease of description, it is assumed that the cutting line CL exists in the embodiment to be described below.

[0280] The central area CA may include at least one display area DA.

[0281] The display area DA may have at least one display device (not shown), for example, an OLED for displaying an image. In addition, a plurality of pixels may be arranged in the display area DA.

[0282] Non-display area (not in Fig.23 In some embodiments, the non-display area may be formed around the display area DA. In more detail, the non-display area may be formed to surround the display area DA. In an embodiment, the non-display area may be formed to be adjacent to a plurality of sides of the display area DA. In another embodiment, the non-display area may be formed to be adjacent to one side of the display area DA.

[0283] In another embodiment, only the display area DA may be disposed in the central area CA. That is, the non-display area may be formed only in the peripheral area PA.

[0284] Pad area (not in Fig.23 In this regard, the driver or the plurality of pad units (not shown in FIG. Fig.23 (marked in) can be set in the pad area.

[0285] A first insulating layer (or referred to as a barrier layer) 511 is formed on the substrate 501. The first insulating layer 511 may be formed in the central area CA and the peripheral area PA. In an embodiment, the first insulating layer 511 may be formed on the substrate 501 without performing a separate patterning process.

[0286] The first insulating layer 511 may be formed of one or more of various suitable insulating materials known to those skilled in the art. In an embodiment, the first insulating layer 511 may be formed of an inorganic material. For example, the first insulating layer 511 may include an oxide, a nitride, or a nitride oxide. In more detail, the first insulating layer 511 may include silicon nitride (SiN x ), silicon oxide (SiO 2 ) or silicon oxynitride (SiO x N y ). In addition, the first insulating layer 511 can be formed by using one or more of various suitable deposition methods known to those skilled in the art, including plasma enhanced chemical vapor deposition (PECVD), atmospheric pressure CVD (APCVD), low pressure CVD (LPCVD), etc.

[0287] A thin film transistor (TFT) may be formed in the display area DA on the first insulating layer 511 and may have an active layer 513, a gate electrode 560, a source electrode 561, and a drain electrode 562. The TFT formed in the display area DA serves as a part of the pixel circuit. The TFT may also be formed in the non-display area. The TFT formed in the non-display area serves as a part of the circuit included in the driver.

[0288] In the present embodiment, the TFT corresponds to a top gate type TFT in which an active layer 513, a gate electrode 560, a source electrode 561, and a drain electrode 562 are sequentially formed. However, the present invention is not limited thereto, and one or more of various suitable types of TFTs including a bottom gate type TFT may be used as the TFT.

[0289] The active layer 513 is formed on the first insulating layer 511. The active layer 513 may include a semiconductor material such as amorphous silicon or polycrystalline silicon. However, the present invention is not limited thereto, and the active layer 513 may include one or more of various suitable materials known to those skilled in the art. In an embodiment, the active layer 513 may include an organic semiconductor material.

[0290] In another embodiment, the active layer 513 may include an oxide semiconductor material. For example, the active layer 513 may include an oxide including a material selected from metal elements of Groups 12, 13, and 14 including zinc (Zn), indium (In), gallium (Ga), tin (Sn), cadmium (Cd), germanium (Ge), and hafnium (Hf), and combinations thereof.

[0291] As described above, the present embodiment may include one or more of various types of TFTs, for example, a bottom gate TFT. For example, if the active layer 513 includes oxide or amorphous silicon, the present embodiment may include a bottom gate TFT.

[0292] The bottom gate TFT may have one or more of various suitable structures known to those skilled in the art. For one example, the gate electrode may be formed on the first insulating layer 511, the active layer may be formed on the gate electrode, and the source electrode and the drain electrode may be disposed on the active layer. For another example, the gate electrode may be formed on the substrate, the source electrode and the drain electrode may be formed on the gate electrode, and the active layer may be formed on the source electrode and the drain electrode. In this case, an insulating layer such as an inorganic layer may be formed adjacent to the gate electrode, the active layer, and at least one of the source electrode and the drain electrode.

[0293] The gate insulating layer 521 is formed on the active layer 513. The gate insulating layer 521 may be formed as a multi-layer or single-layer including an inorganic material such as silicon oxide and / or silicon nitride. The gate insulating layer 521 insulates the active layer 513 from the gate electrode 560.

[0294] In embodiments, the insulating pattern IP may be formed of the same or substantially the same material as the gate insulating layer 521. In addition, the gate insulating layer 521 and the insulating pattern IP may be formed together (eg, simultaneously).

[0295] The patterned gate electrode 560 is formed on the gate insulating layer 521. The gate electrode 560 may be connected to a gate line (not shown) that applies an ON signal or an OFF signal to the TFT. Fig.24 (marked in).

[0296] The gate electrode 560 may be formed of a low resistance metal material. For example, the gate electrode 560 may be formed as a multi-layer or single-layer including a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti).

[0297] An interlayer insulating layer 522 is formed on the gate electrode 560 . The interlayer insulating layer 522 insulates the gate electrode 560 from the source electrode 561 and insulates the gate electrode 560 from the drain electrode 562 .

[0298] The interlayer insulating layer 522 may be formed as a multilayer or single layer including an inorganic material. For example, the inorganic material may be a metal oxide or a metal nitride. More specifically, the inorganic material may include silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zirconium oxide (ZrO 2 ).

[0299] The source electrode 561 and the drain electrode 562 are formed on the interlayer insulating layer 522. Each of the source electrode 561 and the drain electrode 562 may be formed as a single layer or a multilayer including a highly conductive material.

[0300] The source electrode 561 and the drain electrode 562 are formed to contact the active layer 513 .

[0301] A passivation layer 570 is formed on the source electrode 561 and the drain electrode 562 to cover the TFT.

[0302] The passivation layer 570 can eliminate the steps caused by the TFT and provide a flattened layer above the TFT, thereby preventing or reducing the occurrence of defective OLEDs caused by the unevenness caused by the TFT. The passivation layer 570 can be formed as a single layer or multiple layers including an organic material. The organic material may include a polymer derivative, which has a commercial polymer such as polymethyl methacrylate (PMMA) or polystyrene (PS), as well as a phenol-based, acryl-based polymer, an imide-based polymer, an arylene ether-based polymer, an amide-based polymer, a fluorine-based polymer, a paraxylene-based polymer, a vinyl alcohol-based polymer, or a combination thereof. In addition, the passivation layer 570 can be formed as a multi-stack including an inorganic insulating layer and an organic insulating layer.

[0303] In the aforementioned embodiment, the covering layer (not in Fig.24) may be applied to the display device 5000, in which case, the cover layer and the passivation layer 570 may be formed of the same or substantially the same material.

[0304] The OLED 580 is formed on the passivation layer 570. The OLED 580 is electrically connected to the TFT.

[0305] The OLED 580 includes a first electrode 581 , a second electrode 582 , and an intermediate layer 583 disposed between the first electrode 581 and the second electrode 582 .

[0306] The first electrode 581 is electrically connected to one of the source electrode 561 and the drain electrode 562. Fig.24 , the first electrode 581 may be electrically connected to the drain electrode 562 .

[0307] The first electrode 581 may have one or more of various suitable forms. For example, the first electrode 581 may be patterned into an island shape.

[0308] The first electrode 581 may be formed of one or more of various suitable materials known to those skilled in the art. That is, the first electrode 581 may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO), and aluminum zinc oxide (AZO). In addition, the first electrode 581 may include a metal such as silver (Ag) having high reflectivity.

[0309] The intermediate layer 583 may include an organic emission layer including a small molecule organic material or a polymer molecule organic material. In an embodiment, the intermediate layer 583 includes an organic emission layer and may further include one or more layers selected from the group consisting of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer.

[0310] An organic emission layer may be formed in each OLED. In this case, the OLED may emit red light, green light, and blue light, respectively. However, one or more embodiments of the present invention are not limited thereto, and the organic emission layer may be formed together in the OLED. For example, a plurality of organic emission layers emitting red light, green light, and blue light may be vertically stacked or mixed, and thus white light may be emitted. As will be appreciated by those skilled in the art, the color combination for emitting white light is not limited to the above description. In this case, a color conversion layer or a color filter may be separately arranged to convert the emitted white light into another color (e.g., into a predetermined color).

[0311] The second electrode 582 may be formed of one or more of various suitable conductive materials known to those skilled in the art. For example, the second electrode 582 may be formed as a multilayer or a single layer, and the single layer or multilayer includes at least one of the following: lithium (Li), calcium (Ca), lithium fluoride (LiF), aluminum (Al), magnesium (Mg), silver (Ag), and an alloy including at least two of these materials.

[0312] The pixel defining layer 572 is formed on the passivation layer 570. In more detail, the pixel defining layer 572 is formed while not covering a region (e.g., a predetermined region) of the first electrode 581, the intermediate layer 583 is formed on a region (e.g., a predetermined region) of the first electrode 581 not covered by the pixel defining layer 572, and the second electrode 582 is formed on the intermediate layer 583.

[0313] The pixel defining layer 572 may be formed of at least one organic insulating material selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene, and phenolic resin by using a spin coating method.

[0314] In an embodiment, the cover layer in the aforementioned embodiment may be applied to the display device 5000 , in which case the cover layer and the pixel defining layer 572 may be formed of the same or substantially the same material.

[0315] In an embodiment, although not shown on the second electrode 582, a functional layer (not shown) may be formed thereon. Fig.24 ). The functional layer may include a plurality of layers formed on the second electrode 582. In this regard, at least one functional layer may protect the second electrode 582 when an encapsulation member is subsequently formed, and another functional layer may improve the efficiency of visible light emitted from the intermediate layer 583 to the second electrode 582.

[0316] In addition, an encapsulation member may be formed on the second electrode 582 (or on the functional layer if the functional layer is formed) to prevent or substantially prevent external moisture and air from penetrating into the OLED 580. The encapsulation member may be a thin film having the following structure: x ) or silicon nitride (SiN x ) and an organic layer including epoxy resin or polyimide are alternately stacked. However, the present invention is not limited thereto, and the encapsulation member may include a layer formed of low melting point glass.

[0317] The present invention is not limited to the structure, and an encapsulation member formed of one or more of various suitable materials known to those skilled in the art may be formed on the OLED 580 .

[0318] The groove GV adjacent to the cutting line CL of the substrate 501 and arranged in the peripheral area PA of the display device 5000 prevents or reduces cracks extending from the edge of the substrate 501. For example, the groove GV adjacent to the cutting line CL of the substrate 501 prevents or reduces the extension of cracks that may occur on the substrate 501 when each display device 5000 is cut and separated from the mother substrate.

[0319] The insulating pattern IP is adjacent to the groove GV adjacent to the cutting line CL of the substrate 501, thereby again preventing or reducing the expansion of cracks. In addition, the insulating pattern IP can improve the durability of the peripheral area PA. Specifically, when the substrate 501 is formed of a flexible material and thus the display device 5000 has flexibility, the insulating pattern IP can effectively protect the peripheral area PA when a bending or folding action occurs in the peripheral area PA.

[0320] In addition, the insulating pattern IP and the insulating layer of the central area CA may be formed of the same or substantially the same material. In an embodiment, the insulating pattern IP and the gate insulating layer 521 in the display area DA may be formed of the same or substantially the same material, or in another embodiment, the insulating pattern IP and the gate insulating layer 521 may be formed together (e.g., simultaneously), so that the insulating pattern IP may be conveniently formed, and thus a separate patterning process using a mask may not be added.

[0321] Although it is described that the insulating pattern IP and the gate insulating layer 521 are formed together (eg, simultaneously), the present invention is not limited thereto. That is, the insulating pattern IP and another insulating layer (ie, the interlayer insulating layer 522) may be formed of the same or substantially the same material.

[0322] The present embodiment may include one or more of various suitable types of TFTs. In this regard, the insulating pattern IP may be formed of the same or substantially the same material as that of an insulating layer of the TFT, the insulating layer being adjacent to one of the active layer, the gate electrode, the source electrode, and the drain electrode. In an embodiment, the insulating pattern IP and the insulating layer of the TFT may be formed together (e.g., simultaneously).

[0323] Fig.25 Shows Fig.24 For convenience of description, this embodiment will be described focusing on the differences from the aforementioned embodiment.

[0324] Reference Fig.25 ,and Figure 5 and Fig.12 Similar to the embodiment of FIG. 5 , the display device 5000 has the insulating pattern IP which is not formed as a single layer but is formed as a multi-layer including a first layer IPa and a second layer IPb.

[0325] A first layer IPa is formed on the first insulating layer 511, and a second layer IPb is formed on the first layer IPa. The first layer IPa and the second layer IPb may be formed of one or more of various suitable insulating materials known to those skilled in the art, for example, an organic material or an inorganic material.

[0326] In an embodiment, the first layer IPa and the second layer IPb may be formed of the same or substantially the same material as that of the central area CA, and in more detail, of the same or substantially the same material as that of the gate insulating layer 521 and the interlayer insulating layer 522 formed in the display area DA.

[0327] In the described embodiment, the first layer IPa and the second layer IPb may be formed together (eg, simultaneously) with the gate insulating layer 521 and the interlayer insulating layer 522 so that the insulating pattern IP may be conveniently formed, specifically, a separate patterning process using a mask may not be added.

[0328] Although not shown, except for Fig.25 The structure shown in Fig.24 Modification examples of the display device 5000 may include one or more of various suitable structures. That is, Figure 3 Insulation pattern IP, Figure 4 The first insulating layer 111 and the second insulating layer 112, Figure 6 The stacked substrate 101, Figure 8 Insulation pattern IP, Fig.14 Insulation pattern IP, Fig.16 The insulation pattern IP or Figures 18 to 22 At least one of the structures shown in Fig.24 A modified example of the display device 5000 is shown in FIG.

[0329] Fig.26 A plan view of a display device 6000 according to another embodiment of the present invention is shown. Fig. 27 Shows Fig.26 An enlarged view of part K.

[0330] Fig.26 and Fig. 27 6000. Fig.26 and Fig. 27 The structure shown in FIG. 1 is applicable to all of the display device 1000 , the display device 2000 , the display device 3000 , the display device 4000 , and the display device 5000 and their modified examples.

[0331] The display device 6000 may include a substrate 601. Detailed examples of various suitable materials for the substrate 601 are the same or substantially the same as those described in the foregoing embodiments, and thus detailed descriptions thereof are omitted here.

[0332] A plurality of display devices 6000 may be formed on a mother substrate, and may be separated into individual display devices 6000 in a manner of cutting the mother substrate along a cutting line CL of the substrate 601 . Fig.26 One display device 6000 is shown cut along a cutting line CL and thus separated. Therefore, the edge of the substrate 601 is defined by the cutting line CL.

[0333] All edges of the substrate 601 (i.e., Fig.26 601) may be the cutting line CL. In an embodiment, one, two or three of the four edges of the substrate 601 may be the cutting line CL.

[0334] That is, according to the size and / or shape of the mother substrate and / or the number, shape, and size of substrates manufactured from the mother substrate, the position or number of edges determined as the cutting line CL among all edges of the display device 6000 may vary.

[0335] The substrate 601 is divided into a peripheral area PA and a central area CA. In more detail, the peripheral area PA refers to an area around the cutting line CL, and the central area CA refers to an area located inside compared to the peripheral area PA.

[0336] However, the present embodiment is not limited thereto. That is, the cutting line CL may not exist. In more detail, one display device 6000 may be formed on a mother substrate, in which case the substrate 601 may correspond to the mother substrate, so that the cutting line CL may not exist. In this case, the peripheral area PA may refer to an area adjacent to an edge of the substrate 601, and the central area CA may refer to an area located inside compared to the peripheral area PA. For ease of description, it is assumed that the cutting line CL exists in the embodiment to be described below.

[0337] The central area CA may include at least one display area DA.

[0338] The display area DA may have at least one display device (not shown), for example, an OLED for displaying an image. In addition, a plurality of pixels may be arranged in the display area DA.

[0339] Non-display area (not in Fig.26 In some embodiments, the non-display area may be formed around the display area DA. In more detail, the non-display area may be formed to surround the display area DA. In an embodiment, the non-display area may be formed to be adjacent to a plurality of sides of the display area DA. In another embodiment, the non-display area may be formed to be adjacent to one side of the display area DA.

[0340] In another embodiment, only the display area DA may be disposed in the central area CA. That is, the non-display area may be formed only in the peripheral area PA.

[0341] Pad area (not in Fig.26 In this regard, the driver or the plurality of pad units (not shown in FIG. Fig.26 (marked in) can be set in the pad area.

[0342] The insulating pattern IP is formed in the peripheral area PA. A groove GV is formed adjacent to the insulating pattern IP, wherein a material used to form the insulating pattern IP is removed from the groove GV.

[0343] The insulation patterns IP include first direction insulation patterns IPL extending in a first direction and second direction insulation patterns IPW extending in a second direction crossing the first direction. Each first direction insulation pattern IPL is connected to each second direction insulation pattern IPW.

[0344] In an embodiment, each first direction insulation pattern IPL and each second direction insulation pattern IPW may be formed to surround the display area DA.

[0345] That is, the first direction insulation patterns IPL may be connected to the second direction insulation patterns IPW, respectively.

[0346] In an embodiment, each first direction insulation pattern IPL and each second direction insulation pattern IPW may have a longitudinally extending shape and may be connected to each other at their ends. In this way, the first direction insulation pattern IPL and the second direction insulation pattern IPW may have a polygonal shape, for example, a quadrilateral shape.

[0347] In an embodiment, the first direction and the second direction may be perpendicular to each other. In an embodiment, the first direction or the second direction may be parallel to an edge of the substrate 601 .

[0348] Although not shown, the first insulating layer (not shown) Fig.26 ) are disposed between the substrate 601 and the insulating pattern IP and between the substrate 601 and the groove GV. That is, in the peripheral area PA, a first insulating layer is formed on the substrate 601, and the insulating pattern IP and the groove GV are formed on the first insulating layer.

[0349] Figure 28 to Figure 32 Shows Fig. 27 A modified example of part K of FIG.

[0350] Reference Fig.28The insulation pattern IP includes a first direction insulation pattern IPL extending in a first direction and a second direction insulation pattern IPW extending in a second direction crossing the first direction. The first direction insulation pattern IPL is connected to the second direction insulation pattern IPW.

[0351] Here, at least two first direction insulation patterns IPL may be connected to one second direction insulation pattern IPW.

[0352] In embodiments, the plurality of first direction insulation patterns IPL may be connected to the second direction insulation pattern IPW that is most adjacent to (eg, closest to) an edge of the substrate 601 among the second direction insulation patterns IPW.

[0353] Right now, Fig. 27 An example may be shown in which the number of the first direction insulation patterns IPL is equal to the number of the second direction insulation patterns IPW. Fig.28 An example may be shown in which the number of the first direction insulation patterns IPL is greater than the number of the second direction insulation patterns IPW.

[0354] In addition, if Fig.29 As shown, the plurality of first direction insulation patterns IPL may be connected to the second direction insulation patterns IPW among the second direction insulation patterns IPW except for other second direction insulation patterns IPW of the second direction insulation patterns IPW that are adjacent to (e.g., closer to or closest to) the edge of the substrate 601. In an embodiment, the plurality of first direction insulation patterns IPL may be connected to the second direction insulation pattern IPW that is closest to (e.g., closest to) the display area DA among the second direction insulation patterns IPW.

[0355] Although not shown, in one embodiment, a plurality of second direction insulation patterns IPW may be connected to one first direction insulation pattern IPL.

[0356] In this embodiment, the plurality of second direction insulation patterns IPW may be connected to the first direction insulation pattern IPL that is most adjacent to (eg, closest to) an edge of the substrate 601 among the first direction insulation patterns IPL.

[0357] As another example, refer to Fig.30 The insulation pattern IP includes a first direction insulation pattern IPL extending in a first direction and a second direction insulation pattern IPW extending in a second direction crossing the first direction. The first direction insulation pattern IPL is connected to the second direction insulation pattern IPW.

[0358] Here, all first direction insulation patterns IPL may be connected to one second direction insulation pattern IPW. In an embodiment, all first direction insulation patterns IPL may be connected to the second direction insulation pattern IPW that is most adjacent to (e.g., closest to) the display area DA. In this way, all second direction insulation patterns IPW except the above-mentioned second direction insulation pattern IPW may be separated (e.g., spaced apart) from the first direction insulation pattern IPL.

[0359] In addition, if Fig.31 As shown, all the second direction insulation patterns IPW may be connected to one first direction insulation pattern IPL. In an embodiment, all the second direction insulation patterns IPW may be connected to the first direction insulation pattern IPL that is closest to (e.g., closest to) the display area DA. In this way, all the first direction insulation patterns IPL except the above-mentioned first direction insulation pattern IPL may be separated (e.g., separated) from the second direction insulation pattern IPW.

[0360] Reference Fig.32 The insulation pattern IP includes a first direction insulation pattern IPL extending along a first direction, a second direction insulation pattern IPW extending along a second direction crossing the first direction, and a connection insulation pattern IPC. The connection insulation pattern IPC connects the first direction insulation pattern IPL and the second direction insulation pattern IPW.

[0361] In an embodiment, the connection insulation pattern IPC is not parallel to the first direction and the second direction. The portion where each first direction insulation pattern IPL and each second direction insulation pattern IPW are connected to each other has an obtuse angle. By doing so, it is possible to prevent or reduce damage to the portion of the insulation pattern IP where each first direction insulation pattern IPL and each second direction insulation pattern IPW are connected to each other.

[0362] Fig.33 A plan view showing a mother substrate MSU used in manufacturing a display device according to an embodiment of the present invention is shown. Fig.34 Shows Fig.33 An enlarged plan view of part M, Fig.35 Shown along Fig.34 A cross-sectional view of portion M taken along line XX-XX.

[0363] Reference Figure 33 to Figure 35 , a plurality of units C1, C2, C3 and C4 are arranged on the mother substrate MSU. The plurality of units C1, C2, C3 and C4 correspond to a plurality of display devices respectively.

[0364] That is, the mother substrate MSU is cut along the cutting lines CL, thereby separating the plurality of cells C1, C2, C3, and C4. Thereafter, four display devices are manufactured through subsequent processes.

[0365] The mother substrate MSU may include one or more of various suitable materials known to those skilled in the art. Detailed examples of various suitable materials for the mother substrate MSU are the same or substantially the same as the detailed examples of various suitable materials for the mother substrate described in the aforementioned embodiment, so their detailed description is omitted here.

[0366] Each of the plurality of cells C1, C2, C3 and C4 of the mother substrate MSU is divided into a peripheral area PA and a central area CA. In more detail, the peripheral area PA refers to an area around the cutting line CL, and the central area CA refers to an area located inside compared to the peripheral area PA.

[0367] The central area CA may include at least one display area DA.

[0368] The display area DA may have at least one display device (not shown in FIG. Fig.33 In the display area DA, for example, an OLED is used to display an image. In addition, a plurality of pixels may be arranged in the display area DA.

[0369] Non-display area (not in Fig.33 In some embodiments, the non-display area may be formed around the display area DA. In more detail, the non-display area may be formed to surround the display area DA. In an embodiment, the non-display area may be formed to be adjacent to a plurality of sides of the display area DA. In another embodiment, the non-display area may be formed to be adjacent to one side of the display area DA.

[0370] In another embodiment, only the display area DA may be disposed in the central area CA. That is, the non-display area may be formed only in the peripheral area PA.

[0371] Pad area (not in Fig.33 In this regard, the driver or the plurality of pad units (not shown in FIG. Fig.33 (marked in) can be set in the pad area.

[0372] The peripheral area PA refers to an area around the cutting line CL, and is arranged at a side end portion of the mother substrate MSU along the cutting line CL.

[0373] The insulating pattern IP is formed in the peripheral area PA. A groove GV is formed adjacent to the insulating pattern IP, wherein a material used to form the insulating pattern IP is removed from the groove GV.

[0374] The first insulating layer 111 is disposed between the mother substrate MSU and the insulating pattern IP and between the mother substrate MSU and the groove GV. That is, in the peripheral area PA, the first insulating layer 111 is formed on the mother substrate MSU, and the insulating pattern IP and the groove GV are formed on the first insulating layer 111.

[0375] Reference Fig.35The region of the mother substrate MSU corresponding to the cutting line CL corresponds to the grooves GV of the cells C1 and C2, and the insulating pattern IP is arranged with the cutting line CL arranged therebetween. That is, the insulating pattern IP of the cell C1 and the insulating pattern IP of the cell C2 are arranged on opposite sides of the cutting line CL.

[0376] In this embodiment, in order to manufacture a display device, the mother substrate MSU may be cut along a cutting line CL. Here, the cutting line CL corresponds to the groove GV. The groove GV blocks or substantially prevents cracks of the mother substrate MSU that may occur during the cutting process, and prevents or reduces the expansion of the cracks.

[0377] Specifically, the groove GV corresponds to the top surface of the first insulating layer 111 on the mother substrate MSU. Since the first insulating layer 111 is formed in the groove GV adjacent to the insulating pattern IP, the mother substrate MSU can be effectively protected and the occurrence and extension of cracks can be prevented or reduced.

[0378] In addition, due to the first insulating layer 111 , the insulating pattern IP can be prevented or substantially prevented from being separated from the mother substrate MSU.

[0379] The insulating pattern IP is adjacent to the groove GV of the cutting line CL adjacent to the mother substrate MSU, thereby again preventing or reducing the expansion of the crack. In addition, the insulating pattern IP improves or can improve the durability of the peripheral area PA. Specifically, when the mother substrate MSU is formed of a flexible material and thus the display device has flexibility, the insulating pattern IP can effectively protect the peripheral area PA when a bending or folding action occurs in the peripheral area PA.

[0380] According to one or more of the above-described embodiments of the present invention, a display device may have improved durability.

[0381] It should be understood that the exemplary embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. The description of features or aspects in each embodiment should generally be considered as applicable to other similar features or aspects in other embodiments.

[0382] Although one or more embodiments of the present invention have been described with reference to the drawings, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the claims and their equivalents.

Claims

1. A display device, comprising a substrate having a central area and a peripheral area adjacent to the central area, wherein the central area comprises a display area, and further comprising: at least one insulating layer on the substrate; a central insulating layer disposed on the at least one insulating layer at the central region; first and second insulating patterns disposed directly on the at least one insulating layer at the peripheral region, the first and second insulating patterns being arranged to be spaced apart from each other in one direction; a first groove between the central insulating layer and the first insulating pattern; a second groove between the first insulating pattern and the second insulating pattern, wherein the first groove and the second groove expose an upper surface of the at least one insulating layer, and the first groove and the second groove are located on the at least one insulating layer; and a covering layer covering the first insulating pattern and the second insulating pattern and including an organic material, wherein a portion of the central insulating layer extends over a portion of the peripheral region, and wherein the first insulating pattern, the second insulating pattern, and the central insulating layer include the same inorganic insulating material, and the first insulating pattern, the second insulating pattern, and the central insulating layer are separated from each other by the first groove and the second groove in the peripheral area, wherein the first insulating pattern and the second insulating pattern each include multiple layers, and The display device further includes at least one conductive pattern disposed in the second groove, the at least one conductive pattern contacts top surfaces or side surfaces of the first insulating pattern and the second insulating pattern, and the at least one conductive pattern includes a pad unit.

2. The display device according to claim 1, wherein: The first groove and the second groove are adjacent to at least one edge of the substrate.

3. The display device according to claim 1, wherein: The first insulating pattern and the second insulating pattern are spaced apart from at least one edge of the substrate.

4. The display device according to claim 1, wherein: The at least one insulating layer is a single layer, or includes a plurality of stacked layers.

5. The display device according to claim 1, wherein: The at least one insulating layer includes oxide, nitride or oxynitride.

6. The display device according to claim 1, wherein: The first insulating pattern and the second insulating pattern extend longitudinally in parallel with at least one edge of the substrate.

7. The display device according to claim 1, wherein: The second insulation pattern surrounds the first insulation pattern.

8. The display device according to claim 1, wherein: At least one of the first insulating pattern and the second insulating pattern has a bent edge.

9. The display device according to claim 1, wherein: At least one of the first insulating pattern and the second insulating pattern has an island-shaped pattern.

10. The display device according to claim 1, wherein: The first insulating pattern and the second insulating pattern include an inorganic material.

11. The display device according to claim 1, wherein: A width of the first insulating pattern is different from a width of the second insulating pattern.

12. The display device according to claim 1, wherein: The substrate includes a first layer having an organic material, a second layer having an organic material, and an intervening layer between the first layer and the second layer.

13. The display device according to claim 1, wherein: The cover layer covers the at least one conductive pattern.

14. The display device according to claim 13, wherein: The cover layer has a width greater than a width of the at least one conductive pattern.

15. The display device according to claim 1, further comprising: a third insulating pattern between the second insulating pattern and an edge of the substrate, and a third groove between the second insulating pattern and the third insulating pattern, Wherein, the covering layer covers the third insulating pattern.

16. The display device according to claim 1, wherein: The display device further includes at least one thin film transistor at the central area of ​​the substrate, the at least one thin film transistor including an active layer, a gate electrode, a source electrode, and a drain electrode, The central insulating layer is at least one of a gate insulating layer for insulating the gate electrode from the active layer and an interlayer insulating layer for insulating the source electrode and the drain electrode from the gate electrode.

17. The display device according to claim 16, wherein: The at least one insulating layer is between the substrate and the at least one thin film transistor.

18. The display device according to claim 16, further comprising a passivation layer for covering the at least one thin film transistor, in, The passivation layer includes the same material as the capping layer.

19. The display device according to claim 16, further comprising a light emitting device, wherein the light emitting device comprises: a first electrode connected to the at least one thin film transistor; a second electrode, facing the first electrode; as well as an intermediate layer, between the first electrode and the second electrode, the intermediate layer comprising an organic layer, Wherein, the display device further includes a pixel defining layer covering a portion of the first electrode.

20. The display device according to claim 19, wherein: The pixel defining layer includes the same material as the cover layer. 21 . The display device of claim 19 , further comprising an encapsulation member over the second electrode, the encapsulation member comprising at least one inorganic layer and at least one organic layer.

22. A display device, comprising: A substrate, comprising a display area and a non-display area between the display area and an edge of the substrate; A barrier layer, disposed on the substrate; a thin film transistor, disposed on the barrier layer in the display area and comprising an active layer, a gate electrode, a source electrode and a drain electrode; A first insulating layer, disposed between the active layer and the gate electrode; A second insulating layer is provided between the gate electrode and the source electrode and the drain electrode; a first insulating pattern and a second insulating pattern including the same material as one of the first insulating layer and the second insulating layer, the first insulating pattern and the second insulating pattern being disposed in the non-display area of ​​the substrate; a groove between the first insulating pattern and the second insulating pattern; as well as at least one conductive pattern including the same material as one of the gate electrode, the source electrode, and the drain electrode and disposed in the groove, wherein each of the first insulating pattern and the second insulating pattern includes multiple layers, The at least one conductive pattern contacts top surfaces or side surfaces of the first insulating pattern and the second insulating pattern, and The at least one conductive pattern includes a pad unit.

23. The display device according to claim 22, wherein: The first insulating pattern and the second insulating pattern are spaced apart from at least one edge of the substrate.

24. The display device according to claim 22, wherein: The barrier layer is a single layer, or comprises a plurality of stacked layers.

25. The display device according to claim 22, wherein: The barrier layer includes oxide, nitride or oxynitride.

26. The display device according to claim 22, wherein: The first insulating pattern and the second insulating pattern extend longitudinally in parallel with at least one edge of the substrate.

27. The display device according to claim 22, wherein: The second insulation pattern surrounds the first insulation pattern.

28. The display device according to claim 22, wherein: At least one of the first insulating pattern and the second insulating pattern has a bent edge.

29. The display device according to claim 22, wherein: At least one of the first insulating pattern and the second insulating pattern has an island-shaped pattern.

30. The display device according to claim 22, wherein: One layer of each of the first and second insulating patterns includes the same material as the first insulating layer, and another layer of each of the first and second insulating patterns includes the same material as the second insulating layer.

31. The display device according to claim 22, wherein: The first insulating pattern and the second insulating pattern include an inorganic material.

32. The display device according to claim 22, wherein: A width of the first insulating pattern is different from a width of the second insulating pattern.

33. The display device according to claim 22, wherein: The substrate includes a first layer having an organic material, a second layer having an organic material, and an intervening layer between the first layer and the second layer.

34. The display device according to claim 22, wherein: An uppermost surface of the barrier layer contacts the active layer of the thin film transistor.

35. The display device according to claim 22, further comprising: a third insulating pattern between the second insulating pattern and an edge of the substrate, and a second groove between the second insulating pattern and the third insulating pattern, The second groove exposes the uppermost surface of the barrier layer closest to the edge of the substrate.

36. The display device of claim 22, further comprising a cover layer covering the at least one conductive pattern, the cover layer comprising an organic material.

37. The display device of claim 36, wherein: The cover layer has a width greater than a width of the at least one conductive pattern.

38. The display device according to claim 36, further comprising a passivation layer for covering the thin film transistor, in, The passivation layer includes the same material as the capping layer.

39. The display device according to claim 36, further comprising a light emitting device, wherein the light emitting device comprises: A first electrode connected to the thin film transistor; a second electrode, facing the first electrode; as well as an intermediate layer, between the first electrode and the second electrode, the intermediate layer comprising an organic layer, Wherein, the display device further includes a pixel defining layer covering a portion of the first electrode.

40. The display device according to claim 39, wherein: The pixel defining layer includes the same material as the cover layer.

41. The display device of claim 39, further comprising an encapsulation member over the second electrode, the encapsulation member comprising at least one inorganic layer and at least one organic layer.

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