A Hall sensor circuit

Abstract

The present invention belongs to the field of measurement and discloses a Hall sensor circuit comprising a Hall sensor, a rotary switch circuit connected to the Hall sensor, and a ripple-eliminating chopper amplifier connected to the rotary switch circuit; the ripple-eliminating chopper amplifier comprises a first amplifier and a second amplifier connected in series, and also comprises a first negative feedback circuit; the first negative feedback circuit comprises a ripple-eliminating loop and a transconductance amplifier connected to the ripple-eliminating loop, the output of the transconductance amplifier being connected to the input of the second amplifier; the ripple-eliminating loop comprises a chopper and an integrator, wherein the chopper input is coupled to the output of the second amplifier, the chopper output is coupled to the input of the integrator, and the output of the integrator is coupled to the transconductance amplifier. The above technical solution achieves high bandwidth, fast response speed, high measurement accuracy, low noise, and low offset voltage.

Description

[0001] This application is a divisional application of the invention patent application with the application date of November 20, 2020, application number 202011314470.7, and invention name “A Hall Sensor Circuit”. Technical Field

[0002] The invention belongs to the field of measurement, and in particular relates to an improvement on a Hall sensor circuit. Background Art

[0003] Current monitoring is widely used in high-power circuit systems, such as motor or load control, inverter circuits, power factor correction, and power monitoring systems. These systems need to monitor currents ranging from a few amperes to hundreds of amperes, or even thousands or tens of thousands of amperes. Traditional current monitoring methods, which use a series resistor to monitor the voltage across the resistor, result in significant energy loss.

[0004] Hall effect sensors are commonly used to monitor high-current systems. Due to the magnetic effect of current, a conductor carrying current forms a magnetic field proportional to the current. The Hall effect can detect the magnitude of this magnetic field and thus monitor the current flowing through the conductor. These electromagnetic current monitoring systems are widely used in high-power circuit systems. Hall effect sensors are a key component of magnetic sensors. Compared to other magnetic sensors, Hall effect sensors offer high linearity and good consistency. However, their sensitivity is limited, and their offset voltage is large relative to the induced signal, severely limiting their measurement accuracy.

[0005] There are two main methods for reducing the impact of Hall effect sensor offset voltage on measurement: static and dynamic. Static methods use multiple Hall effect sensors connected in parallel to cancel their offset voltages, but the effectiveness is limited, as this method still leaves a residual offset voltage close to the amplitude of the sensed signal. Dynamic methods modulate the Hall effect sensor offset voltage to a high frequency, creating a high-frequency ripple superimposed on the signal. However, some methods are still required to eliminate this ripple.

[0006] Dynamic methods are divided into two types according to the different methods of processing the wave signal. There are two common methods: the first is to use a low-pass filter to remove the signal, and the second is to use a sampling-based notch filter to remove the signal.

[0007] Reference Figure 1 and Figure 2 Using a low-pass filter (LPF) scheme, the dynamic method employs a rotary switch circuit 104 to excite two of the four ports of the Hall sensor 102 via clocks CLK / CLKN or periodic rotation, and to detect voltages at the other two ports accordingly. The excitation port is driven by the CLK clock signal, while the output port is driven by the inverse CLK clock signal, CLKN.

[0008] The output waveform Vo1 consists of two components. The first is the Hall effect signal voltage Vh, and the other is the Hall effect signal modulated by the offset voltage Vos, converted to a high-frequency signal. This signal appears as a square wave at the rotation frequency, while the Hall effect signal frequency remains constant at Vh. Vo1 is amplified by the subsequent low-offset amplifier 106 (Low Offset Amp) and output as Vo2. Vo2 is then filtered by the subsequent low-pass filter (LPF) and output (via the VOP / VON port). The LPF 108 removes the modulated offset voltage and retains the signal Vo3.

[0009] To suppress the ripple caused by Vos, the LPF bandwidth must be much smaller than the rotation frequency. This limits the signal bandwidth and slows down the response of the signal path, increasing the response time. To better suppress the ripple, a second-order or higher-order low-pass filter is required, which further degrades the response speed.

[0010] Reference Figure 3 A solution using a low-pass filter employing a notch filter (NF) 110 is used. Unlike a low-pass filter, a notch filter is used to filter out ripples instead of a low-pass filter. The efficiency of a notch filter in filtering out ripples is much higher than that of a low-pass filter.

[0011] The effectiveness of the notch filter 110 depends on the notch frequency. When the notch frequency and the SPIN frequency are exactly the same, ripple is effectively filtered. If the two frequencies differ, the filtering effect is significantly reduced. Therefore, notch filters are typically implemented using switched capacitor sampling. Synchronizing the sampling frequency with the SPIN frequency allows the notch frequency and SPIN frequency to be identical. However, switched capacitor sampling can cause noise aliasing, exacerbating in-band noise, and limiting response time. The output only changes when the sampling clock toggles, and the response time is limited by the sampling frequency, resulting in a slow response. Summary of the Invention

[0012] In order to solve the above technical problems, the present invention aims to realize a Hall sensor circuit that removes ripple without limiting response speed, does not alias noise, has low offset voltage, low noise, and fast response speed.

[0013] The Hall sensor circuit of the present invention comprises: a Hall sensor, a rotary switch circuit connected to the Hall sensor, and a ripple elimination chopper amplifier connected to the rotary switch circuit;

[0014] The ripple elimination chopper amplifier includes a first amplifier and a second amplifier connected in series, and also includes a first negative feedback circuit; the first negative feedback circuit includes a ripple elimination loop and a transconductance amplifier connected to the ripple elimination loop, and the output end of the transconductance amplifier is connected to the input end of the second amplifier;

[0015] The ripple elimination loop includes a chopper and an integrator, wherein the chopper input is coupled to the output of the second amplifier, the chopper output is coupled to the integrator input, and the integrator output is coupled to the transconductance amplifier.

[0016] As a further improvement of one embodiment of the present invention, the first amplifier is a chopper amplifier which includes a first transconductance amplifier and a first chopper connected to the input end of the first transconductance amplifier; the second amplifier includes a second transconductance amplifier and a second chopper connected to the input end of the second transconductance amplifier; the input end of the first chopper serves as the input end of the ripple elimination chopper amplifier, and the input end of the second chopper is connected to the output end of the first transconductance amplifier; the output end of the first negative feedback circuit is connected to the output end of the first transconductance amplifier to eliminate the ripple signal at the output end of the first transconductance amplifier.

[0017] As a further improvement to one embodiment of the present invention, the ripple-eliminating chopper amplifier further includes a second negative feedback circuit, wherein the input end of the second negative feedback circuit is connected to the output end of the second transconductance amplifier, and the output end of the second negative feedback circuit is connected to the input end of the second transconductance amplifier, for eliminating the ripple signal at the input end of the second transconductance amplifier. The second negative feedback circuit has a similar structure to the first negative feedback circuit, and also includes a ripple-eliminating loop and a transconductance amplifier connected to the ripple-eliminating loop, and is connected to the input end of the second transconductance amplifier via a third chopper.

[0018] As a further improvement of one embodiment of the present invention, the Hall sensing circuit also includes a synchronous clock signal generator, which generates a first clock and a second clock, and the clock period of the second clock is twice the clock period of the first clock; the first clock and the first clock inverted signal drive the first chopper and the second chopper; the second clock and the second clock inverted signal drive the third chopper.

[0019] As a further improvement of an embodiment of the present invention, the ripple elimination circuit includes a preamplifier whose output end is connected to the input end of the chopper.

[0020] As a further improvement of an embodiment of the present invention, the ripple elimination circuit includes a high-pass filter connected to the input end of the preamplifier.

[0021] As a further improvement of one embodiment of the present invention, the integrator is a transconductance integrator, the ripple elimination circuit further includes a third transconductance amplifier, the output end of the chopper is connected to the input end of the third transconductance amplifier, and the output end of the third transconductance amplifier is connected to the input end of the transconductance integrator.

[0022] As a further improvement of one embodiment of the present invention, the integrator is a transconductance integrator, the ripple elimination circuit further includes a third transconductance amplifier, the input end of the chopper is connected to the output end of the third transconductance amplifier, and the output end of the chopper is connected to the input end of the transconductance integrator.

[0023] As a further improvement of one embodiment of the present invention, the rotary switch circuit includes an excitation switch group and an output switch group. The control timing of the excitation switch group and the output switch group has a time delay, and the falling edge of the output switch group is ahead of the corresponding excitation switch group, and the rising edge lags behind.

[0024] A Hall sensor circuit includes: a Hall sensor, a rotary switch circuit connected to the Hall sensor, and a ripple-elimination chopper amplifier connected to the rotary switch circuit; the ripple-elimination chopper amplifier includes a differential amplifier formed by a first operational amplifier and a second operational amplifier, and a first ripple-elimination loop; three resistors are connected in series to the output ends of the first operational amplifier and the second operational amplifier; the input end of the first operational amplifier is connected to the second resistor, and the input end of the second operational amplifier is connected to the third resistor; the first operational amplifier and the second operational amplifier each include a first feedback port, the first feedback port is connected to the output end of the first ripple-elimination loop, and the input end of the first ripple-elimination loop is connected to the output ends of the first operational amplifier and the second operational amplifier;

[0025] Each operational amplifier includes a first amplifier, a second amplifier, and a first negative feedback transconductance amplifier; the first amplifier is a chopper amplifier including a first transconductance amplifier and a first chopper connected to the input end of the first transconductance amplifier; the second amplifier includes a second transconductance amplifier and a second chopper connected to the input end of the second transconductance amplifier; the input end of the first chopper serves as the input end of each operational amplifier, and the input end of the second chopper is connected to the output end of the first transconductance amplifier; the input end of the first negative feedback transconductance amplifier is connected to the first feedback port of each operational amplifier, and the output end of the first negative feedback transconductance amplifier is connected to the output end of the first transconductance amplifier;

[0026] The first ripple elimination loop includes a chopper and an integrator, wherein the chopper input is coupled to the output of the second amplifier, the chopper output is coupled to the input of the integrator, and the integrator output is coupled to the first negative feedback transconductance amplifier.

[0027] As a further improvement to an embodiment of the present invention, the first operational amplifier and the second operational amplifier each include a second feedback port and a second ripple elimination loop, the second feedback port is connected to the output end of the second ripple elimination loop, and the input end of the second ripple elimination loop is connected to the output ends of the first operational amplifier and the second operational amplifier;

[0028] Each operational amplifier includes a second negative feedback transconductance amplifier having an input connected to a second feedback port, and the second negative feedback transconductance amplifier is connected to the input of the second transconductance amplifier via a third chopper. The second ripple elimination loop has a similar structure to the first ripple elimination loop and also includes a chopper and an integrator, wherein the chopper input is coupled to the output of the second amplifier, the chopper output is coupled to the input of the integrator, and the output of the integrator is coupled to the second negative feedback transconductance amplifier.

[0029] As a further improvement of an embodiment of the present invention, the first ripple elimination circuit and / or the second ripple elimination circuit are the ripple elimination circuits described above.

[0030] The present invention is an improvement over the prior art in that the ripple elimination chopper amplifier circuit uses a ripple elimination loop composed of a chopper and an integrator as a feedback loop, thereby removing the ripple signal without limiting the response speed or aliasing noise, thereby realizing a Hall sensor circuit with low offset voltage, low noise, and fast response speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 This is a scheme framework diagram of a Hall sensor rotation excitation combined with a low-pass filter and a low-pass amplifier in the prior art;

[0032] Figure 2 This is a signal timing diagram of the Hall sensor rotation excitation combined with a low-pass filter and a low-pass amplifier in the prior art;

[0033] Figure 3 This is a framework diagram of a solution combining rotational excitation of a Hall sensor with a low-pass filter and a notch filter in the prior art;

[0034] Figure 4 This is the framework diagram of the Hall sensor rotation excitation scheme of this application;

[0035] Figure 5 This is a schematic diagram of the rotary switch circuit structure of the present application;

[0036] Figure 6 This is the two-phase excitation clock signal and switch control timing diagram of the present application;

[0037] Figure 7 This is the four-phase excitation clock signal and switch control timing diagram of the present application;

[0038] Figure 8 This is a schematic diagram of the first implementation scheme of the wave elimination chopper amplifier;

[0039] Figure 9 It is a schematic diagram of six implementation schemes of the Wenbo elimination circuit;

[0040] Figure 10 It is a schematic diagram of the chopper structure;

[0041] Figure 11 This is a schematic diagram of the second implementation scheme of the wave elimination chopper amplifier;

[0042] Figure 12 This is a schematic diagram of the operational amplifier implementation scheme in the ripple elimination chopper amplifier. DETAILED DESCRIPTION

[0043] The following describes in detail preferred embodiments of the technical solution of the present invention in conjunction with the accompanying drawings to help those skilled in the art understand the technical solution of the present invention. In this application, "group" is used to represent multiple electronic devices of the same type. For example, a sampling capacitor group represents multiple sampling capacitors, and a switch group represents multiple switches with the same function or switches driven by the same clock. In this application, "input end" refers to a positive input port and a negative input port, and "output end" refers to a positive output port and a negative output port.

[0044] Reference Figure 4 The framework diagram of the Hall sensor rotation excitation scheme shown in the figure includes a Hall sensor (Hall) 402 and related circuits connected to the Hall sensor 402, as well as circuits for processing the signals from the Hall sensor 402. This includes a Hall sensor circuit ripple elimination chopper amplifier 406. While a single Hall sensor 402 is shown in the figure, those skilled in the art may optionally connect multiple Hall sensors 402 in parallel to further reduce offset signals.

[0045] The Hall sensor circuit comprises a Hall sensor 402, a rotary switch circuit 404, and a ripple-cancelling chopper amplifier 406. The Hall sensor 402 has four ports: two for inputting excitation signals and two for outputting sensing signals. The four ports of the Hall sensor 402 are connected to the first, second, third, and fourth ports (a, b, c, d) of the rotary switch circuit 404, respectively. The rotary switch circuit 404 periodically excites two ports of the Hall sensor 402 while receiving output signals from the other two ports. The rotary switch circuit 404 then transmits the output signals from the other two ports to the ripple-cancelling chopper amplifier 406. The ripple-cancelling chopper amplifier 406 and the rotary switch circuit 404 use a synchronous clock signal generator 408 as a clock source.

[0046] At least one chopper circuit in the ripple elimination chopper amplifier 406 can eliminate ripple signals. The ripple elimination chopper amplifier 406 and the rotary switch circuit 404 use a synchronous clock signal as a driving signal source to generate and process synchronous signals with good response speed.

[0047] Reference Figure 5 A schematic diagram of one embodiment of a rotary switch circuit 404 is shown. Switches with the same numbering represent a group of switches with the same operating sequence, meaning they open or close simultaneously. Switches with an S suffix have the same operating sequence as those without it, for example, P1 / P1S and P2 / P2S have the same operating sequence.

[0048] The rotary switch circuit 404 consists of an excitation switch group 502 for controlling the excitation signal and a sensor signal output switch group 504. The Hall sensor 402 includes a first port a, a second port b, a third port c, and a fourth port d. The excitation switch group 502 includes a first switch group P1 for forming an excitation signal loop between the first port a and the third port c, a second switch group P2 for forming an excitation signal loop between the second port b and the fourth port d, a third switch group P3 for forming an excitation signal loop between the third port c and the first port a, and a fourth switch group P4 for forming an excitation signal loop between the fourth port d and the second port b. The output switch group 504 includes a first output switch group P1S for forming an output loop between the second port b and the fourth port d, a second output switch group P2S for forming an output loop between the third port c and the first port a, a third output switch group P3S for forming an output loop between the fourth port d and the second port, and a fourth switch group P4S for forming an output loop between the first port a and the third port c. The first to fourth switch groups each include a switch connected to the excitation signal port and a ground switch. The specific connection method of the above-mentioned excitation switch group 502 and output switch group 504 and the switches is: (for the sake of simplicity, only the switch numbers are identified) the first port a is connected to P1, P3, P4S, and P2S, the second port b is connected to P2, P4, P1 S, and P3S, the third port c is connected to P3, P1, P2S, and P4S, and the fourth port d is connected to P4, P2, P3S, and P1 S.

[0049] The output switch group 504 of the rotary switch circuit 404 is connected to an output capacitor Cs. The first terminal of the output capacitor Cs serves as the positive output terminal VOP of the rotary switch circuit 404, and the second terminal of the output capacitor Cs serves as the negative output terminal VON of the rotary switch. The output capacitor Cs is used to sample the output voltage generated by the Hall sensor 402. The output voltage Vo1 is the sum of the effective signal Vh of the Hall sensor 402 and Vos.

[0050] The rotary switch circuit 404, under the control of the excitation switch group 502 and the output switch group 504, performs four-phase or two-phase excitation on the Hall sensor 402 and receives signals through two ports other than the excitation port. The following table is created based on the mapping relationship between phase, excitation port and direction, sampling port and direction, signal direction, and offset voltage direction:

[0051]

[0052] In the table, “+” and “-” indicate the direction of the Hall voltage Vh and the offset voltage Vos, and “→” indicates the voltage direction of the excitation port or the output port.

[0053] Figure 5 and Figure 6 The clock signal generated by the synchronous clock signal generator 408 and the control timing of the aforementioned switch components are described below. The synchronous clock signal generator 408 generates a first clock C1 and a second clock C2, where the period of the second clock C1 is twice the period of the first clock C2. The activation process of the rotary switch circuit 404 is further described below in conjunction with the clock and control timing.

[0054] Figure 6 The figure shows the control timing of the two-phase rotary switch. The synchronous clock signal generator 408 generates the clock signal C1 and the clock signal inverse drive signal C1 N. In the first clock cycle t1, switches P1 and P1 S are closed, the excitation port sum direction is a→c, the first port a and the third port c form an excitation loop, the output port sum direction is b→d, and the Hall voltage Vh direction and the offset voltage Vos are both positive output. In the second clock cycle t2, switches P1 and P1 S are open, while switches P2 and P2S are closed. The excitation port sum direction is b→d, that is, the second port b and the fourth port d form an excitation loop, the output port sum direction is c→a, the Hall voltage Vh direction is positive output, and the offset voltage Vos is negative output.

[0055] It can be seen that the offset voltage Vos changes with the direction of the clock signal C1, and its signal is modulated into a high-frequency signal with the same frequency as the clock signal. It is superimposed on the Hall voltage Vh signal in the form of a wave signal to form the rotary switch circuit output signal Vo1. This high-frequency signal is convenient for subsequent processing such as filtering.

[0056] exist Figure 6 The switches P3, P4, P3S and P4S are always kept in the off state, that is, the excitation signals of the two phases c→a and d→b and their corresponding output signals are shielded by controlling the timing. Figure 7 The four-phase rotary switch circuit 404 further includes the above-mentioned two-phase excitation signals and corresponding output signals.

[0057] The four-phase rotary switch circuit 404 includes four different timings. In the first clock cycle t1 and the second clock cycle t2, the operating timings of the excitation switch group 502 and the output switch group 504 are the same as those in the first clock cycle t1 and the second clock cycle t2. Figure 3 The operating timing of the two-phase rotary switch shown in FIG4 is different. During the third clock cycle t3, P3 and P3S are closed, with the excitation port and direction c→a and the output port and direction d→b. During the fourth clock cycle t4, P4 and P4S are closed, with the excitation port and direction d→b and the output port and direction a→c. It can be seen that the sign of the offset signal Vos output by the four-phase rotary switch circuit 404 changes with the direction of the clock signal. This offset signal, superimposed on the Hall voltage Vh signal in the form of a wave signal, forms the four-phase rotary switch circuit output signal Vo1.

[0058] It should be pointed out that whether it is a two-phase rotary switch circuit or a four-phase rotary switch circuit, its control timing of the excitation and output switch groups has a certain delay (such as Figure 6 、 7 (The following are labeled d1 to d4). The falling edge of the output switch group P1S-P4S is slightly ahead of the corresponding excitation P1-P4, and the rising edge is slightly behind the corresponding P1-P4. Because the falling / rising edge of P1-P4 indicates that the switch is in the switching process, the HALL output has not yet established. Therefore, P1S-P4S has a dead time at the corresponding P1-P4 edge to prevent the unsettled HALL output from being sampled and amplified in the subsequent stage, causing errors. At the same time, the clock of the subsequent ripple-chopping amplifier needs to be aligned with the falling edge of P1S-P4S. This ensures that the modulated Vh can be effectively suppressed by the ripple-chopping circuit of the subsequent amplifier.

[0059] Reference Figure 4 and Figure 8 The positive and negative input ports (VIP, VIN) of the ripple-eliminating chopper amplifier 406 are respectively connected to the positive and negative output ports (VOP, VON) of the rotary switch circuit 404. The ripple-eliminating chopper amplifier 406 includes multiple implementations, and this application cites two typical implementations for illustration.

[0060] Figure 8 This is a first implementation of the ripple-eliminating chopper amplifier 406. It includes a first amplifier 802, a second amplifier 804, and a first negative feedback circuit 806 connected in series. The first amplifier 802 includes a first transconductance amplifier GM1 and a first chopper Ch1 connected to the input of the first transconductance amplifier GM1. The input of the first chopper Ch1 serves as the input of the ripple-eliminating chopper amplifier 406. The chopper Ch1 is also used to eliminate the offset voltage of the first transconductance amplifier GM1.

[0061] The second amplifier 804 includes a second transconductance amplifier GM2 and a second chopper Ch2 connected to the input end of the second transconductance amplifier GM2; the input end of the second chopper Ch2 is connected to the output end of the first transconductance amplifier GM1; the input end of the first negative feedback circuit 806 is connected to the output end of the second transconductance amplifier GM2.

[0062] The first negative feedback circuit 806 is used to suppress the ripple output of the second transconductance amplifier GM2. It includes a ripple cancellation loop RRL and a transconductance amplifier GMa connected to the ripple cancellation loop RRL. The output of transconductance amplifier GMa serves as the output of the first negative feedback circuit 806. The input of transconductance amplifier GMa is connected to the output of the ripple cancellation loop RRL. The ripple cancellation loop RRL collects ripple signals from the output signal, demodulates and amplifies them, and then negatively feeds them back to the output port of the first transconductance amplifier GM1 to suppress the output ripple.

[0063] exist Figure 8 If the rotary switch circuit 404 performs four-phase sampling, the chopping ripple elimination chopper amplifier 406 should also include a second negative feedback circuit 808. The input of the second negative feedback circuit 808 is connected to the output of the second transconductance amplifier GM2, and the output of the second negative feedback circuit 808 is connected to the input of the second transconductance amplifier GM2. The structure of the second negative feedback circuit 808 is the same as that of the first negative feedback circuit 806. The output of the second negative feedback circuit 808 is connected to the input of the third chopper Ch3, and the output of the third chopper Ch3 is connected to the input of the second transconductance amplifier GM2.

[0064] For a four-phase rotary switch circuit, the first clock C1 and the first clock inverted signal C1N drive the first chopper Ch1 and the second chopper Ch2. The second clock signal C2, with a clock period twice that of the first clock signal C1, drives the third chopper. This allows the ripple cancellation path of the second negative feedback circuit 808 to effectively suppress ripple at half the rotation frequency. For a two-phase rotary switch circuit, the second negative feedback circuit 808 can be removed or electrically shut down.

[0065] Reference Figure 9 The figure shows several typical implementations of the ripple elimination loop (RRL). Their common feature is that they are mainly composed of a chopper and an integrator. The chopper can demodulate the ripple in the output signal back to DC, which is amplified by the integrator and fed back to the signal path. Through negative feedback, the RRL can suppress the output ripple of the amplifier to a level that is negligible relative to the Hall signal.

[0066] Continue to refer to Figure 9The first ripple elimination loop 902 includes a chopper ch and an integrator int, wherein the chopper ch is connected to the input of the integrator Int. The second ripple elimination loop 904 is based on the first ripple elimination loop RRL and adds a preamplifier GM2 whose output is connected to the input of the chopper Ch.

[0067] For the first ripple elimination loop 902, its residual ripple is determined by the offset voltage of the amplifier in the integrator Int. Adding a preamplifier GM2 before the chopper Ch can further reduce the ripple. The ripple suppression is equal to the gain of the preamplifier GM2 at the chopping frequency.

[0068] The third ripple elimination circuit 906 adds a high-pass filter (HPF) to the second ripple elimination circuit 904. This high-pass filter (HPF) is connected to the input of the preamplifier GM2. The HPF is an RC structure as shown in the figure. This high-pass filter (HPF) allows high-frequency ripple signals to pass through before the preamplifier, blocking the Hall signal Vh. This reduces the processing time of the RRL and allows the RRL to process the Hall signal Vh, focusing solely on the ripple. Since the Hall signal Vh has a frequency lower than the chopping frequency, it is modulated to the chopping frequency by the chopper ch. When passing through the integrator, it is suppressed by the low-pass characteristics of the integrator Int. Therefore, the RRL does not feed back the useful Hall signal vh, but only feeds back and suppresses the ripple.

[0069] The fourth ripple elimination circuit 908 includes a chopper Ch, a third transconductance amplifier GM3 and a transconductance integrator Int'. The output of the chopper Ch is connected to the input of the transconductance amplifier, and the output of the third transconductance amplifier GM3 is connected to the input of the transconductance integrator Int'.

[0070] The fifth ripple elimination circuit 910 includes a chopper Ch, a third transconductance amplifier GM3, and a transconductance integrator Int'. The input of the chopper Ch is connected to the output of the third transconductance amplifier GM3, and the output of the chopper Ch is connected to the input of the transconductance integrator Int'. The chopper Ch of the fifth ripple elimination circuit 910 can be moved from the input of the amplifier to the output, which helps reduce the residual ripple amplitude.

[0071] Reference Figure 10 The implementation of the chopper shown includes a first switch group S1 connected to the input and output ends in a forward direction and a second switch group S2 connected to the output end in a reverse direction. The first switch group is driven by a clock source C1 or C2, and the second switch group is driven by a clock source C1N or C2N. The output signal of the chopper switch action continuously changes direction with the clock signal.

[0072] Figure 11FIG. 4 shows a second implementation of the ripple-cancelling chopper amplifier 406 , wherein the implementation of the chopper and the ripple-cancelling loop RRL is the same as that of the first implementation of the ripple-cancelling chopper amplifier 406 .

[0073] The ripple-cancelling chopper amplifier 406 includes a differential amplifier formed by a first operational amplifier OPAMP1 and a second operational amplifier OPAMP2, and a ripple-cancelling loop RRL. Three resistors (R1, R2, and R3) are connected in series to the output terminals of the first and second operational amplifiers OPAMP1 and OPAMP2. The input terminal of the first operational amplifier OPAMP1 is connected to the second resistor R2, and the input terminal of the second operational amplifier OPAMP2 is connected to the third resistor R3. The first operational amplifier OPAMP1 or the second operational amplifier OPAMP2 includes a first feedback port VIP1 / VIN1. The positive input terminal VIP1 and the negative input terminal VIN1 of the first feedback port VIP1 / VIN1 are respectively connected to the positive output terminal VOP and the negative output terminal VON of the ripple-cancelling loop RRL. The positive input terminal VIP and the negative input terminal VIN of the ripple-cancelling loop RRL are connected to the output terminals of the first and second operational amplifiers OPAMP1 and OPAMP2.

[0074] Reference Figure 12 The operational amplifier (OPAMP1 / OPAMP1) includes a first amplifier 1202, a second amplifier 1204, and a first negative feedback transconductance amplifier GMa; the first amplifier 1202 includes a first transconductance amplifier GM1 and a first chopper Ch1 connected to the input end of the first transconductance amplifier GM1, and the second amplifier 1204 includes a second transconductance amplifier GM2 and a second chopper Ch2 connected to the input end of the second transconductance amplifier GMB; the input end of the first chopper Ch1 serves as the input end of the operational amplifier, and the input end of the second chopper Ch2 is connected to the output end of the first transconductance amplifier GM1; the input end of the first negative feedback transconductance amplifier Gma is connected to the first feedback port VIP1 / VIN2 of the operational amplifier, and the output end of the first negative feedback transconductance amplifier Gma is connected to the output end of the first transconductance amplifier GM1.

[0075] Reference Figure 11 and Figure 2If the rotary switch circuit uses four-phase excitation, the operational amplifier also includes an output terminal of a ripple cancellation loop RRL' connected to the second feedback port VIP2 / VIN2. The input terminal of this ripple cancellation loop RRL' is connected to the output terminals of the first and second operational amplifiers OPAMP1 and OPAMP2. Accordingly, a second negative feedback transconductance amplifier GMb, whose internal input terminal is connected to the second feedback port VIP2 / VIN2, is connected to the input terminal of the second transconductance amplifier Gmb via a third chopper Ch3. The first chopper Ch1 and the second chopper Ch2 are driven by a first clock C1 and a first clock inverted signal C1N, while the third chopper Ch3 is driven by a second clock C2 and a second clock inverted signal C2N. If the rotary switch circuit uses two-phase excitation, the ripple cancellation loop RRL', the second transconductance amplifier Gmb, and the third chopper Ch3 can be electrically shielded or removed from the circuit.

[0076] In summary, the present invention coordinates the switching clock and clock edges of the rotary switch circuit with those of the subsequent ripple-cancelling chopper amplifier, utilizing the ripple cancellation circuit in the latter to eliminate the modulated offset voltage of the Hall element. By employing a suitable switching sequence, the present invention is compatible with both two-phase and four-phase rotary switch circuits. By suppressing ripple at the rotation frequency and at half the rotation frequency, respectively, the two circuits effectively eliminate the ripple caused by four-phase rotation.

[0077] The present invention does not add a low-pass or high-order low-pass filter with a low cutoff frequency in the signal path, nor does it add a switch sampling circuit. This does not affect the bandwidth and delay time of the signal path, and does not cause the noise aliasing effect caused by switch sampling. It achieves high bandwidth, fast response speed, high measurement accuracy, low noise, low offset voltage and measurement accuracy, and sufficiently short delay time. When the detected system current has an overcurrent, the system can quickly receive an overcurrent signal and initiate protective measures to protect the safety of the entire system.

[0078] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application.

Claims

1. A Hall sensor circuit, characterized in that: include: A Hall sensor, a rotary switch circuit connected to the Hall sensor, and a ripple-eliminating chopper amplifier connected to the rotary switch circuit; The ripple elimination chopper amplifier includes a first amplifier and a second amplifier connected in series, and also includes a first negative feedback circuit; the first amplifier is a chopper amplifier which includes a first transconductance amplifier and a first chopper connected to the input end of the first transconductance amplifier, and the input end of the first chopper serves as the input end of the ripple elimination chopper amplifier; the first negative feedback circuit includes a ripple elimination loop and a transconductance amplifier connected to the ripple elimination loop, and the output end of the transconductance amplifier is connected to the input end of the second amplifier; The ripple elimination loop includes a chopper and an integrator, wherein the chopper input is coupled to the output of the second amplifier, the chopper output is coupled to the integrator input, and the integrator output is coupled to the transconductance amplifier.

2. A Hall sensor circuit according to claim 1, characterized in that: The second amplifier includes a second transconductance amplifier and a second chopper connected to the input end of the second transconductance amplifier; the input end of the second chopper is connected to the output end of the first transconductance amplifier; the output end of the first negative feedback circuit is connected to the output end of the first transconductance amplifier to eliminate the output end Wenbo signal of the first transconductance amplifier.

3. A Hall sensor circuit according to claim 2, characterized in that: The ripple-eliminating chopper amplifier further includes a second negative feedback circuit, the input end of the second negative feedback circuit being connected to the output end of the second transconductance amplifier, and the output end of the second negative feedback circuit being connected to the input end of the second transconductance amplifier, for eliminating the ripple signal at the input end of the second transconductance amplifier. The second negative feedback circuit has a similar structure to the first negative feedback circuit, and also includes a ripple-eliminating loop and a transconductance amplifier connected to the ripple-eliminating loop, and is connected to the input end of the second transconductance amplifier via a third chopper.

4. A Hall sensor circuit according to claim 3, characterized in that: The Hall sensor circuit further includes a synchronous clock signal generator, wherein the synchronous clock signal generator generates a first clock and a second clock, wherein a clock period of the second clock is twice a clock period of the first clock; The first clock and the first clock inverse signal drive the first chopper and the second chopper; The second clock and the second clock inversion signal drive the third chopper.

5. The Hall sensor circuit according to claim 1, characterized in that: The ripple elimination circuit includes a preamplifier whose output end is connected to the input end of the chopper.

6. A Hall sensor circuit according to claim 5, characterized in that: The ripple elimination circuit includes a high-pass filter connected to the input end of the preamplifier.

7. The Hall sensor circuit according to claim 1, characterized in that: The integrator is a transconductance integrator, and the ripple elimination circuit further includes a third transconductance amplifier. The output end of the chopper is connected to the input end of the third transconductance amplifier, and the output end of the third transconductance amplifier is connected to the input end of the transconductance integrator.

8. The Hall sensor circuit according to claim 1, characterized in that: The integrator is a transconductance integrator, the ripple elimination circuit further includes a third transconductance amplifier, the input end of the chopper is connected to the output end of the third transconductance amplifier, and the output end of the chopper is connected to the input end of the transconductance integrator.

9. The Hall sensor circuit according to claim 1, characterized in that: The rotary switch circuit includes an excitation switch group and an output switch group. The control timing of the excitation switch group and the output switch group has a time delay. The falling edge of the output switch group is ahead of the corresponding excitation switch group, and the rising edge is delayed accordingly.

10. A Hall sensor circuit, characterized in that: include: A Hall sensor, a rotary switch circuit connected to the Hall sensor, and a ripple-eliminating chopper amplifier connected to the rotary switch circuit; the ripple-eliminating chopper amplifier includes a differential amplifier formed by a first operational amplifier and a second operational amplifier, and a first ripple-eliminating loop; three resistors are connected in series to the outputs of the first and second operational amplifiers; the input of the first operational amplifier is connected to the second resistor, and the input of the second operational amplifier is connected to the third resistor; the first and second operational amplifiers each include a first feedback port, the first feedback port is connected to the output of the first ripple-eliminating loop, and the input of the first ripple-eliminating loop is connected to the outputs of the first and second operational amplifiers; Each operational amplifier includes a first amplifier, a second amplifier, and a first negative feedback transconductance amplifier; the first amplifier is a chopper amplifier including a first transconductance amplifier and a first chopper connected to the input end of the first transconductance amplifier; the second amplifier includes a second transconductance amplifier and a second chopper connected to the input end of the second transconductance amplifier; the input end of the first chopper serves as the input end of each operational amplifier, and the input end of the second chopper is connected to the output end of the first transconductance amplifier; the input end of the first negative feedback transconductance amplifier is connected to the first feedback port of each operational amplifier, and the output end of the first negative feedback transconductance amplifier is connected to the output end of the first transconductance amplifier; The first ripple elimination loop includes a chopper and an integrator, wherein the chopper input is coupled to the output of the second amplifier, the chopper output is coupled to the input of the integrator, and the integrator output is coupled to the first negative feedback transconductance amplifier.

11. The Hall sensor circuit according to claim 10, characterized in that: The first operational amplifier and the second operational amplifier each include a second feedback port and a second ripple elimination loop, the second feedback port is connected to the output end of the second ripple elimination loop, and the input end of the second ripple elimination loop is connected to the output ends of the first operational amplifier and the second operational amplifier; Each operational amplifier includes an input terminal and a second negative feedback transconductance amplifier connected to the second feedback port, and the second negative feedback transconductance amplifier is connected to the input terminal of the second transconductance amplifier through a third chopper. The second ripple elimination loop has a similar structure to the first ripple elimination loop and also includes a chopper and an integrator, wherein the chopper input terminal is coupled to the output terminal of the second amplifier, the chopper output terminal is coupled to the input terminal of the integrator, and the output terminal of the integrator is coupled to the second negative feedback transconductance amplifier.

12. A Hall sensor circuit according to any one of claims 10-11, characterized in that: The first ripple elimination circuit and / or the second ripple elimination circuit is the ripple elimination circuit of the Hall sensor circuit according to any one of claims 5 to 8.

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