Pixel circuit, pixel driving method, display substrate and display device

Abstract

The present invention provides a pixel circuit, a pixel driving method, a display substrate and a display device. The pixel circuit includes a driving circuit, a first reset circuit, a first node control circuit, a first light-emitting control circuit and a light-emitting element; the first reset circuit writes a first initial voltage into a first pole of the light-emitting element under the control of the potential of the first node; the first node control circuit controls the potential of the first node according to the data voltage and the threshold voltage of the driving transistor included in the driving circuit; the first light-emitting control circuit controls the connection between the second end of the driving circuit and the first pole of the light-emitting element under the control of the light-emitting control signal; the driving circuit is used to generate a driving current. The present invention can avoid the black screen weak bright spot and HBM (high brightness mode) bright spot phenomenon that occur partly due to the characteristic deviation of the driving transistor included in the driving circuit.

Description

Technical Field

[0001] The present invention relates to the technical field, and in particular to a pixel circuit, a pixel driving method, a display substrate and a display device. Background Art

[0002] In existing pixel circuits, weak bright spots on black screens and HBM (High Brightness Model) bright spots often occur due to the offset of driving transistor characteristics, as well as ghosting on black background and white text screens. These phenomena are caused by the presence of potential at the anode in the black screen state. Summary of the invention

[0003] The main purpose of the present invention is to provide a pixel circuit, a pixel driving method, a display substrate and a display device to solve the problems of weak bright spots and HBM bright spots on black screens and ghosting on black background with white characters in existing pixel circuits due to the deviation of driving transistor characteristics.

[0004] An embodiment of the present invention provides a pixel circuit, including a driving circuit, a first reset circuit, a first node control circuit, a first light emitting control circuit and a light emitting element;

[0005] The control terminal of the driving circuit is electrically connected to the first node;

[0006] The first reset circuit is electrically connected to the first node, the first initial voltage line and the first electrode of the light-emitting element respectively, and is used to write the first initial voltage provided by the first initial voltage line into the first electrode of the light-emitting element under the control of the potential of the first node, so as to initialize the first electrode of the light-emitting element;

[0007] The first node control circuit is electrically connected to the data line, the first node, the first end of the driving circuit and the second end of the driving circuit respectively, and is used to control the potential of the first node according to the data voltage provided by the data line and the threshold voltage of the driving transistor included in the driving circuit;

[0008] The first light-emitting control circuit is electrically connected to the light-emitting control line, the second end of the driving circuit and the first electrode of the light-emitting element respectively, and is used to control the second end of the driving circuit to be connected to the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control line;

[0009] The driving circuit is used to generate a driving current under the control of the potential of the first node;

[0010] The second electrode of the light emitting element is electrically connected to the first voltage line.

[0011] Optionally, the first node control circuit includes a data writing circuit, a compensation control circuit and an energy storage circuit;

[0012] The data writing circuit is electrically connected to the scan line, the data line and the first end of the driving circuit respectively, and is used to write the data voltage provided by the data line into the first end of the driving circuit under the control of the scan signal provided by the scan line;

[0013] The compensation control circuit is electrically connected to the scan line, the control end of the drive circuit and the second end of the drive circuit respectively, and is used to control the control end of the drive circuit to be connected to the second end of the drive circuit under the control of the scan signal;

[0014] The first end of the energy storage circuit is electrically connected to the control end of the drive circuit, the second end of the energy storage circuit is electrically connected to the second voltage line, and the energy storage circuit is used to store electric energy.

[0015] Optionally, the pixel circuit described in at least one embodiment of the present invention further includes a second reset circuit;

[0016] The second reset circuit is electrically connected to the reset control line, the second initial voltage line and the control end of the driving circuit, respectively, and is used to provide the second initial voltage provided by the second initial voltage line to the control end of the driving circuit under the control of the reset control signal provided by the reset control line, so as to initialize the control end of the driving circuit.

[0017] Optionally, the pixel circuit described in at least one embodiment of the present invention further includes a second light emitting control circuit;

[0018] The second light-emitting control circuit is electrically connected to the light-emitting control line, the second voltage line and the first end of the driving circuit respectively, and is used to control the connection between the first end of the driving circuit and the second voltage line under the control of the light-emitting control signal provided by the light-emitting control line;

[0019] The second light emitting control circuit includes a sixth transistor;

[0020] The control electrode of the sixth transistor is electrically connected to the light emitting control line, the first electrode of the sixth transistor is electrically connected to the second voltage line, and the second electrode of the sixth transistor is electrically connected to the first end of the driving circuit.

[0021] Optionally, the first reset circuit includes a first transistor;

[0022] The control electrode of the first transistor is electrically connected to the first node, the first electrode of the first transistor is electrically connected to the first initial voltage line, and the second electrode of the first transistor is electrically connected to the first electrode of the light emitting element.

[0023] Optionally, the driving circuit includes a driving transistor, and the first light emitting control circuit includes a second transistor;

[0024] The control electrode of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the first end of the driving circuit, and the second electrode of the driving transistor is electrically connected to the second end of the driving circuit;

[0025] The control electrode of the second transistor is electrically connected to the light emitting control line, the first electrode of the second transistor is electrically connected to the second end of the driving circuit, and the second electrode of the second transistor is electrically connected to the first electrode of the light emitting element.

[0026] Optionally, the data writing circuit includes a third transistor, the compensation control circuit includes a fourth transistor; the energy storage circuit includes a first capacitor;

[0027] The control electrode of the third transistor is electrically connected to the scan line, the first electrode of the third transistor is electrically connected to the data line, and the second electrode of the third transistor is electrically connected to the first end of the driving circuit;

[0028] The control electrode of the fourth transistor is electrically connected to the scan line, the first electrode of the fourth transistor is electrically connected to the control terminal of the drive circuit, and the second electrode of the fourth transistor is electrically connected to the second terminal of the drive circuit;

[0029] The first plate of the first capacitor is electrically connected to the control end of the driving circuit, and the second plate of the first capacitor is electrically connected to the second voltage line.

[0030] Optionally, the second reset circuit includes a fifth transistor;

[0031] The control electrode of the fifth transistor is electrically connected to the reset control line, the first electrode of the fifth transistor is electrically connected to the second initial voltage line, and the second electrode of the fifth transistor is electrically connected to the control terminal of the driving circuit.

[0032] The embodiment of the present invention further provides a pixel driving method, which is applied to the above-mentioned pixel circuit, wherein a display cycle includes a data writing phase and a display phase which are arranged in sequence; the pixel driving method includes:

[0033] In the data writing stage, the data line provides a data voltage, and the first node control circuit controls the potential of the first node according to the data voltage and the threshold voltage of the driving transistor in the driving circuit;

[0034] In the display stage, when the data voltage is a data voltage corresponding to a black screen, the first reset circuit writes a first initial voltage into the first electrode of the light-emitting element under the control of the potential of the first node to initialize the first electrode of the light-emitting element.

[0035] Optionally, the pixel driving method further comprises: when the data voltage is not a data voltage corresponding to a black screen, in the display stage, the first light emitting control circuit controls the second end of the driving circuit to be connected to the first electrode of the light emitting element under the control of the light emitting control signal provided by the light emitting control line, and the driving circuit generates a current to drive the light emitting element under the control of the potential of the control end thereof;

[0036] The pixel circuit further includes a second light emitting control circuit; the pixel driving method further includes: the second light emitting control circuit controls the connection between the first end of the driving circuit and the second voltage line under the control of the light emitting control signal.

[0037] Optionally, the pixel circuit further includes a second reset circuit; the display cycle further includes an initialization phase arranged before the data writing phase; and the pixel driving method further includes:

[0038] In the initialization stage, the second reset circuit provides the second initial voltage provided by the second initial voltage line to the control end of the drive circuit under the control of the reset control signal provided by the reset control line, so as to initialize the control end of the drive circuit.

[0039] An embodiment of the present invention further provides a display substrate, comprising a plurality of rows and columns of the above-mentioned pixel circuits arranged on a base substrate.

[0040] Optionally, the display substrate includes a first initial voltage line, a reset control line, a scan line, a light emitting control line, a second initial voltage line, a high voltage line and a data line;

[0041] The pixel circuit includes a driving circuit, a first reset circuit, a first node control circuit, a first light emitting control circuit, a second reset circuit, a second light emitting control circuit and a first reset circuit; the first node control circuit includes a compensation control circuit and a data writing circuit;

[0042] The first reset circuit includes a first transistor, the first light emission control circuit includes a second transistor, the data writing circuit includes a third transistor, the compensation control circuit includes a fourth transistor, the second reset circuit includes a fifth transistor, the second light emission control circuit includes a sixth transistor, and the driving circuit includes a driving transistor;

[0043] The first electrode of the first transistor is electrically connected to the first initial voltage line, the control electrode of the second transistor and the control electrode of the sixth transistor are both electrically connected to the light emitting control line, the control electrode of the third transistor and the control electrode of the fourth transistor are both electrically connected to the scanning line, the control electrode of the fifth transistor is electrically connected to the reset control line, the first electrode of the fifth transistor is electrically connected to the second initial voltage line, and the first electrode of the sixth transistor is electrically connected to the high voltage line;

[0044] The first initial voltage line, the reset control line, the scan line, the light emitting control line and the second initial voltage line extend along a first direction, and the high voltage line and the data line extend along a second direction;

[0045] The first initial voltage line, the reset control line, the scan line, the light emitting control line and the second initial voltage line are arranged in sequence along a second direction; the first direction intersects with the second direction;

[0046] The fourth transistor, the second transistor and the first transistor are arranged in sequence along a second direction;

[0047] The fifth transistor and the driving transistor are arranged in sequence along the second direction;

[0048] The third transistor and the sixth transistor are arranged in sequence along the second direction;

[0049] The orthographic projection of the channel of the third transistor on the substrate and the orthographic projection of the channel of the sixth transistor on the substrate are arranged between the orthographic projection of the high voltage line on the substrate and the orthographic projection of the data line on the substrate;

[0050] The orthographic projection of the gate of the driving transistor on the base substrate is arranged between the orthographic projection of the scanning line on the base substrate and the orthographic projection of the light emitting control line on the base substrate.

[0051] Optionally, the pixel circuit further includes a first capacitor;

[0052] The gate of the driving transistor is reused as the first plate of the first capacitor; a plate of the first capacitor is formed on the first gate metal layer;

[0053] The second electrode plate of the first capacitor is formed on the second gate metal layer;

[0054] The orthographic projection of the high voltage line on the base substrate at least partially overlaps with the orthographic projection of the second plate of the first capacitor on the base substrate.

[0055] An embodiment of the present invention further provides a display device, comprising the above-mentioned display substrate.

[0056] The pixel circuit, pixel driving method, display substrate and display device described in the embodiments of the present invention can avoid the black screen weak bright spots and HBM bright spots caused in part by the offset of the driving transistor characteristics included in the driving circuit, and provide the efficiency of switching the anode from high potential to low potential, thereby reducing the ghosting and partial afterimage phenomena. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Figure 1 is a structural diagram of a pixel circuit according to an embodiment of the present invention;

[0058] Figure 2 is a structural diagram of a pixel circuit according to at least one embodiment of the present invention;

[0059] Figure 3 is a structural diagram of a pixel circuit according to at least one embodiment of the present invention;

[0060] Figure 4 is a structural diagram of a pixel circuit according to at least one embodiment of the present invention;

[0061] Figure 5 is a circuit diagram of a pixel circuit according to at least one embodiment of the present invention;

[0062] Figure 6 The present invention is Figure 5 An operation timing diagram of at least one embodiment of the pixel circuit shown;

[0063] Figure 7 is a circuit diagram of a pixel circuit according to at least one embodiment of the present invention;

[0064] Figure 8 The present invention is Figure 7 A schematic diagram of the working state of at least one embodiment of the pixel circuit shown in the initialization stage;

[0065] Fig. 9 The present invention is Figure 7 A schematic diagram of the working state of at least one embodiment of the pixel circuit shown in the data writing phase;

[0066] Fig.10 The present invention is Figure 7 A schematic diagram of the working state of at least one embodiment of the pixel circuit in the display stage;

[0067] Fig.11 yes Fig.17 A layout diagram of a semiconductor layer in FIG.

[0068] Fig.12 yes Fig.17A layout diagram of the first gate metal layer in FIG.

[0069] Fig.13 yes Fig.17 A layout diagram of a second gate metal layer in FIG.

[0070] Fig.14 yes Fig.17 A layout diagram of the first source and drain metal layer in FIG.

[0071] Fig.15 yes Fig.17 A layout diagram of a second source / drain metal layer in FIG.

[0072] Fig.16 yes Fig.17 Layout diagram of the anode layer in FIG.

[0073] Fig.17 yes Figure 5 A layout diagram of at least one embodiment of a corresponding pixel circuit. DETAILED DESCRIPTION

[0074] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present disclosure.

[0075] The transistors used in all embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same characteristics. In the embodiments of the present disclosure, in order to distinguish the two electrodes of the transistor except the control electrode, one electrode is called the first electrode and the other electrode is called the second electrode.

[0076] In actual operation, when the transistor is a thin film transistor or a field effect transistor, the control electrode can be a gate, the first electrode can be a drain, and the second electrode can be a source; or, the control electrode can be a gate, the first electrode can be a source, and the second electrode can be a drain.

[0077] like Figure 1 As shown, the pixel circuit according to the embodiment of the present invention includes a driving circuit 11, a first reset circuit 12, a first node control circuit 13, a first light emitting control circuit 14 and a light emitting element E0;

[0078] The control end of the driving circuit 11 is electrically connected to the first node N1;

[0079] The first reset circuit 12 is electrically connected to the first node N1, the first initial voltage line I1 and the first electrode of the light emitting element E0 respectively, and is used to write the first initial voltage Vi1 provided by the first initial voltage line I1 into the first electrode of the light emitting element E0 under the control of the potential of the first node N1, so as to initialize the first electrode of the light emitting element E0, so that the light emitting element E0 does not emit light;

[0080] The first node control circuit 13 is electrically connected to the data line DA, the first node N1, the first end of the driving circuit 11 and the second end of the driving circuit 11, respectively, and is used to control the potential of the first node N1 according to the data voltage provided by the data line DA and the threshold voltage of the driving transistor included in the driving circuit 11;

[0081] The first light emitting control circuit 14 is electrically connected to the light emitting control line E1, the second end of the driving circuit 11 and the first electrode of the light emitting element E0 respectively, and is used to control the second end of the driving circuit 11 to be connected to the first electrode of the light emitting element E0 under the control of the light emitting control signal provided by the light emitting control line E1;

[0082] The driving circuit 11 is electrically connected to the first node N1, and is used to generate a driving current under the control of the potential of the first node N1;

[0083] The second electrode of the light emitting element E0 is electrically connected to the first voltage line V1.

[0084] Optionally, the first voltage line may be a ground terminal or a low voltage line, but is not limited thereto.

[0085] When the pixel circuit according to the embodiment of the present invention is working, the display cycle includes a data writing phase and a display phase which are arranged successively;

[0086] In the data writing stage, the data line DA provides a data voltage Vdata, and the first node control circuit 13 controls the potential of the first node N1 according to the data voltage Vdata and the threshold voltage of the driving transistor in the driving circuit 11;

[0087] In the display stage, when the data voltage Vdata is a data voltage corresponding to a black screen, the first reset circuit 12, under the control of the potential of the first node N1, writes the first initial voltage Vi1 provided by the first initial voltage line I1 into the first electrode of the light-emitting element E0 to initialize the first electrode of the light-emitting element E0, and the light-emitting element E0 does not emit light.

[0088] When the pixel circuit described in the embodiment of the present invention is working, the potential of the first node N1 is used as the voltage of the control driving circuit 11 and the first reset circuit 12 at the same time. Under the black screen display pattern, the first initial voltage provided by the first initial voltage line I1 is continuously provided to the first electrode of the light-emitting element E0 (the first electrode of the light-emitting element E0 can be an anode), changing the original black screen display logic, switching the first initialization voltage to a black screen anode signal, which can avoid the black screen weak bright spot and HBM bright spot phenomenon caused by the characteristic offset of the driving transistor included in the driving circuit 11, and provide the efficiency of switching the anode from a high potential to a low potential, thereby reducing the ghosting and partial afterimage phenomenon.

[0089] The present invention does not require changing the number and precision of processes, and can greatly improve the yield, reduce the HBM bright spot phenomenon, and improve the image quality at the same time.

[0090] When the pixel circuit described in the embodiment of the present invention is working, when the data voltage is not the data voltage corresponding to the black screen, in the display stage, the first light-emitting control circuit 14 controls the second end of the driving circuit 11 to be connected with the first electrode of the light-emitting element E0 under the control of the light-emitting control signal provided by the light-emitting control line E1, and the driving circuit 11 generates a current to drive the light-emitting element E0 under the control of the potential of its control end.

[0091] In a specific implementation, when the data voltage is not a data voltage corresponding to a black screen, in the display stage, the driving circuit 11 drives the light emitting element E0 to emit light.

[0092] In the related art, the 7T1C pixel circuit often has the phenomenon of weak bright spots on black screens and HBM bright spots due to the deviation of the driving transistor characteristics, as well as the phenomenon of ghosting on black background and white text screens. These phenomena are caused by the existence of potential at the anode in the black screen state. Before the light-emitting stage, the short time for initializing the anode will affect the black screen quality of the light-emitting element, and the display panel will not be able to turn black quickly. This is because the black screen display logic of the related 7T1C pixel circuit is in the anode initialization stage before the light-emitting stage. After the anode is initialized, the anode is kept in a floating state, and it is inevitable that other current factors will affect the anode potential.

[0093] In at least one embodiment of the present invention, Figure 2 As shown, in Figure 1 Based on at least one embodiment of the pixel circuit shown, the first node control circuit includes a data writing circuit 21, a compensation control circuit 22 and an energy storage circuit 23;

[0094] The data writing circuit 21 is electrically connected to the scan line GA, the data line DA and the first end of the driving circuit 11 respectively, and is used to write the data voltage Vdata provided by the data line DA into the first end of the driving circuit 11 under the control of the scan signal provided by the scan line GA;

[0095] The compensation control circuit 22 is electrically connected to the scan line GA, the control end of the drive circuit 11 and the second end of the drive circuit 11 respectively, and is used to control the control end of the drive circuit 11 to communicate with the second end of the drive circuit 11 under the control of the scan signal;

[0096] A first end of the energy storage circuit 23 is electrically connected to the control end of the driving circuit 11 , a second end of the energy storage circuit 23 is electrically connected to the second voltage line V2 , and the energy storage circuit 23 is used to store the voltage of the first node N1 .

[0097] Optionally, the second voltage line may be a high voltage line, but is not limited thereto.

[0098] like Figure 3 As shown, in Figure 2 Based on at least one embodiment of the pixel circuit shown, the pixel circuit according to at least one embodiment of the present invention further includes a second reset circuit 31;

[0099] The second reset circuit 31 is electrically connected to the reset control line R1, the second initial voltage line I2 and the control end of the drive circuit 11, respectively, and is used to provide the second initial voltage Vi2 provided by the second initial voltage line I2 to the control end of the drive circuit 11 under the control of the reset control signal provided by the reset control line R1, so as to initialize the control end of the drive circuit 11.

[0100] The present invention Figure 3 When at least one embodiment of the pixel circuit shown is in operation, the display cycle may further include an initialization phase arranged before the data writing phase; the pixel driving method may further include:

[0101] During the initialization phase, the second reset circuit 31, under the control of the reset control signal provided by the reset control line R1, provides the second initial voltage Vi2 provided by the second initial voltage line I2 to the control end of the driving circuit 11 to initialize the first node N1, so that at the beginning of the data writing phase, the driving circuit 11 can turn on the connection between its first end and the second end.

[0102] like Figure 4 As shown, in Figure 3Based on at least one embodiment of the pixel circuit shown, the pixel circuit according to at least one embodiment of the present invention further includes a second light emitting control circuit 41;

[0103] The second light-emitting control circuit 41 is electrically connected to the light-emitting control line E1, the second voltage line V2 and the first end of the driving circuit 11 respectively, and is used to control the connection between the first end of the driving circuit 11 and the second voltage line V2 under the control of the light-emitting control signal provided by the light-emitting control line E1.

[0104] Optionally, the first reset circuit includes a first transistor;

[0105] The control electrode of the first transistor is electrically connected to the first node, the first electrode of the first transistor is electrically connected to the first initial voltage line, and the second electrode of the first transistor is electrically connected to the first electrode of the light emitting element.

[0106] Optionally, the driving circuit includes a driving transistor, and the first light emitting control circuit includes a second transistor;

[0107] The control electrode of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the first end of the driving circuit, and the second electrode of the driving transistor is electrically connected to the second end of the driving circuit;

[0108] The control electrode of the second transistor is electrically connected to the light emitting control line, the first electrode of the second transistor is electrically connected to the second end of the driving circuit, and the second electrode of the second transistor is electrically connected to the first electrode of the light emitting element.

[0109] Optionally, the data writing circuit includes a third transistor, the compensation control circuit includes a fourth transistor; the energy storage circuit includes a first capacitor;

[0110] The control electrode of the third transistor is electrically connected to the scan line, the first electrode of the third transistor is electrically connected to the data line, and the second electrode of the third transistor is electrically connected to the first end of the driving circuit;

[0111] The control electrode of the fourth transistor is electrically connected to the scan line, the first electrode of the fourth transistor is electrically connected to the control terminal of the drive circuit, and the second electrode of the fourth transistor is electrically connected to the second terminal of the drive circuit;

[0112] The first plate of the first capacitor is electrically connected to the control end of the driving circuit, and the second substrate of the first capacitor is electrically connected to the second voltage line.

[0113] Optionally, the second reset circuit includes a fifth transistor;

[0114] The control electrode of the fifth transistor is electrically connected to the reset control line, the first electrode of the fifth transistor is electrically connected to the second initial voltage line, and the second electrode of the fifth transistor is electrically connected to the control terminal of the driving circuit.

[0115] Optionally, the second light emitting control circuit includes a sixth transistor;

[0116] The control electrode of the sixth transistor is electrically connected to the light emitting control line, the first electrode of the sixth transistor is electrically connected to the second voltage line, and the second electrode of the sixth transistor is electrically connected to the first end of the driving circuit.

[0117] like Figure 5 As shown, in Figure 4 Based on at least one embodiment of the pixel circuit shown, the first reset circuit 12 includes a first transistor T1; the light emitting element is an organic light emitting diode O1;

[0118] The gate of the first transistor T1 is electrically connected to the first node N1, the source of the first transistor T1 is electrically connected to the first initial voltage line I1, and the drain of the first transistor T1 is electrically connected to the anode of the organic light emitting diode O1;

[0119] The driving circuit 11 includes a driving transistor T0, and the first light emitting control circuit 14 includes a second transistor T2;

[0120] The gate of the driving transistor T0 is electrically connected to the first node N1;

[0121] The gate of the second transistor T2 is electrically connected to the light emitting control line E1, the source of the second transistor T2 is electrically connected to the drain of the driving transistor T0, and the drain of the second transistor T0 is electrically connected to the anode of the organic light emitting diode O1;

[0122] The data writing circuit 21 includes a third transistor T3, the compensation control circuit 22 includes a fourth transistor T4; the energy storage circuit 23 includes a first capacitor C1;

[0123] The gate of the third transistor T3 is electrically connected to the scan line GA, the source of the third transistor T3 is electrically connected to the data line DA, and the drain of the third transistor T3 is electrically connected to the source of the driving transistor T0;

[0124] The gate of the fourth transistor T4 is electrically connected to the scan line GA, the source of the fourth transistor T4 is electrically connected to the gate of the driving transistor T0, and the drain of the fourth transistor T4 is electrically connected to the drain of the driving transistor T0;

[0125] The first plate of the first capacitor C1 is electrically connected to the gate of the driving transistor T0, and the second plate of the first capacitor C1 is electrically connected to the high voltage line VDD;

[0126] The second reset circuit 31 includes a fifth transistor T5;

[0127] The gate of the fifth transistor T5 is electrically connected to the reset control line R1, the source of the fifth transistor T5 is electrically connected to the second initial voltage line I2, and the drain of the fifth transistor T5 is electrically connected to the gate of the driving transistor T0;

[0128] The second light emitting control circuit 41 includes a sixth transistor T6;

[0129] The gate of the sixth transistor T6 is electrically connected to the light emitting control line E1, the source of the sixth transistor T6 is electrically connected to the high voltage line VDD, and the drain of the sixth transistor T6 is electrically connected to the source of the driving transistor T0;

[0130] A cathode of the organic light emitting diode O1 is electrically connected to a low voltage line VSS.

[0131] exist Figure 5 In at least one embodiment shown, T1 and T5 are N-type transistors, and T2, T3, T4, T6, and T0 are P-type transistors.

[0132] exist Figure 5 In at least one embodiment shown, T1 and T5 may be oxide transistors, and T2, T3, T4, T6, and T0 may be LTPS (low temperature polysilicon) transistors. Figure 5 The pixel circuit shown is an LTPO (low temperature polycrystalline oxide) circuit but is not limited thereto. In actual operation, T1 and T5 may also be N-type transistors using other channel materials, and T1 and T5 may also be low temperature polysilicon transistors like other transistors.

[0133] like Figure 6 As shown, the present invention is Figure 5 When at least one embodiment of the pixel circuit shown is in operation, a display cycle may include an initialization phase S1, a data writing phase S2, and a display phase S3 which are arranged successively;

[0134] In the initialization phase S1, E1 provides a high voltage signal, R1 provides a high voltage signal, and GA provides a high voltage signal, such as Figure 7As shown, T5 is turned on to initialize the potential of the first node N1, and I2 provides a -5V voltage signal to the first node N1; if the previous frame is a black frame, the anode of O1 does not need to be initialized in the data writing stage S2; if the previous frame is lit and the current frame is a black frame, T1 is controlled to be turned on in the data writing stage S2. Compared with the related art, at least one embodiment of the present invention reduces the control object of a reset control signal, which has a certain effect of reducing the power consumption of PNL;

[0135] In the data writing phase S2, E1 provides a high voltage signal, R1 provides a low voltage signal, GA provides a low voltage signal, and VDD provides a 1V voltage signal. Figure 8 As shown, T4 is turned on, DA provides data voltage Vdata, when the current frame is not a black frame, the voltage of Vdata is greater than or equal to -2V and less than or equal to 1V, and the threshold voltage of T0 is -2.5V, then at the beginning of the data writing phase S2, T0 is turned on, and C1 is charged through Vdata to increase the potential of N1 until the potential of N1 becomes Vdata+Vth, at which time the potential of N1 is greater than or equal to -4.5V and less than or equal to -1.5V, and T1 remains in the closed state;

[0136] In the data writing phase S2, E1 provides a high voltage signal, R1 provides a low voltage signal, and GA provides a low voltage signal. When the current frame is black, the voltage value of Vdata is 4V, so that the potential of N1 is maintained at 1.5V, I1 provides a -1V voltage signal, and VDD is adjusted to output a 1V voltage signal, so that T0 can work in the cut-off area; under the black screen, T1 is normally open;

[0137] In the display stage S3, E1 provides a low voltage signal, R1 provides a low voltage signal, and GA provides a high voltage signal. When the current frame is not a black frame, Fig. 9 As shown, T2 and T6 are turned on, T0 drives O1 to emit light, and the driving current of T0 driving O1 to emit light is K (Vdata-Vdd) 2 , where K is the current coefficient of T0, and Vdd is the voltage value of the high voltage signal provided by VDD;

[0138] In the display stage S3, E1 provides a low voltage signal, R1 provides a low voltage signal, and GA provides a high voltage signal. When the current frame is a black frame, Fig.10 As shown, T1 is in the normally open state, T0 is in the closed state, and I1 provides a -1V voltage signal. At this time, the anode potential of O1 always remains at -1V, which greatly reduces the risk of bright spots and improves the response speed of the picture from bright to dark, thereby improving the picture quality.

[0139] In at least one embodiment of the present invention, VDD may provide a 1V voltage signal, but is not limited thereto.

[0140] exist Figure 6 When the light-emitting control signal provided by E1 is a low voltage signal, the potential of the light-emitting control signal may be -6V; when the light-emitting control signal provided by E1 is a high voltage signal, the potential of the light-emitting control signal may be 6V;

[0141] When the reset control signal provided by R1 is a low voltage signal, the potential of the reset control signal may be -6V; when the reset control signal provided by R1 is a high voltage signal, the potential of the reset control signal may be 6V;

[0142] When the scanning signal provided by GA is a low voltage signal, the potential of the scanning signal may be -6V; when the scanning signal provided by GA is a high voltage signal, the potential of the scanning signal may be 6V.

[0143] The pixel driving method described in the embodiment of the present invention is applied to the above-mentioned pixel circuit, and the display cycle includes a data writing phase and a display phase which are arranged in sequence; the pixel driving method includes:

[0144] In the data writing stage, the data line provides a data voltage, and the first node control circuit controls the potential of the first node according to the data voltage and the threshold voltage of the driving transistor in the driving circuit;

[0145] In the display stage, when the data voltage is a data voltage corresponding to a black screen, the first reset circuit, under the control of the potential of the first node, writes a first initial voltage into the first electrode of the light-emitting element to initialize the first electrode of the light-emitting element so that the light-emitting element does not emit light.

[0146] In the pixel driving method described in the embodiment of the present invention, the potential of the first node is used as the voltage of the control driving circuit and the first reset circuit at the same time. Under the black screen display pattern, the first initial voltage provided by the first initial voltage line is continuously provided to the first electrode of the light-emitting element (the first electrode of the light-emitting element may be an anode), and the original black screen display logic is changed. The first initialization voltage is switched to a black screen anode signal, which can avoid the black screen weak bright spot and HBM bright spot phenomenon caused by the characteristic offset of the driving transistor included in the driving circuit, and provide the efficiency of switching the anode from a high potential to a low potential, thereby reducing the ghosting and partial afterimage phenomenon.

[0147] In an embodiment of the present invention, the pixel driving method further includes: when the data voltage is not a data voltage corresponding to a black screen, in the display stage, the first light-emitting control circuit controls the second end of the driving circuit to be connected to the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control line, and the driving circuit generates a current to drive the light-emitting element under the control of the potential of its control end.

[0148] Optionally, the pixel circuit further includes a second reset circuit; the display cycle further includes an initialization phase arranged before the data writing phase; and the pixel driving method further includes:

[0149] In the initialization phase, the second reset circuit, under the control of the reset control signal provided by the reset control line, provides the second initial voltage provided by the second initial voltage line to the control end of the drive circuit to initialize the control end of the drive circuit, so that when the data writing phase begins, the drive circuit can turn on the connection between its first end and the second end.

[0150] In at least one embodiment of the present invention, the pixel circuit further includes a second light emitting control circuit; and the pixel driving method includes:

[0151] The second light emitting control circuit controls the connection between the first end of the driving circuit and the second voltage line under the control of the light emitting control signal.

[0152] The display substrate described in the embodiment of the present invention includes the above-mentioned multi-row and multi-column pixel circuits arranged on a base substrate.

[0153] Figure 11-17 for Figure 5 A schematic diagram of a single pixel circuit layout in which all transistors in the corresponding pixel circuit are low temperature polysilicon transistors. In at least one embodiment of the present invention, the display substrate includes a semiconductor layer, a first gate metal layer, a second gate metal layer, a first source-drain metal layer, a second source-drain metal layer, and an anode layer stacked in sequence in a direction away from the base substrate.

[0154] In at least one embodiment of the present invention, the display substrate includes a plurality of first initial voltage lines, a plurality of reset control lines, a plurality of scan lines, a plurality of light-emitting control lines, a plurality of second initial voltage lines, a plurality of high voltage lines and a plurality of data lines; the pixel circuit includes a driving circuit, a first reset circuit, a first node control circuit, a first light-emitting control circuit, a second reset circuit, a second light-emitting control circuit and a first reset circuit; the first node control circuit includes a compensation control circuit and a data writing circuit;

[0155] The first reset circuit includes a first transistor, the first light emission control circuit includes a second transistor, the data writing circuit includes a third transistor, the compensation control circuit includes a fourth transistor, the second reset circuit includes a fifth transistor, the second light emission control circuit includes a sixth transistor, and the driving circuit includes a driving transistor;

[0156] The first electrode of the first transistor is electrically connected to the first initial voltage line, the control electrode of the second transistor and the control electrode of the sixth transistor are both electrically connected to the light emitting control line, the control electrode of the third transistor and the control electrode of the fourth transistor are both electrically connected to the scanning line, the control electrode of the fifth transistor is electrically connected to the reset control line, the first electrode of the fifth transistor is electrically connected to the second initial voltage line, and the first electrode of the sixth transistor is electrically connected to the high voltage line;

[0157] The first initial voltage line, the reset control line, the scan line, the light emitting control line and the second initial voltage line extend along a first direction, and the high voltage line and the data line extend along a second direction;

[0158] The first initial voltage line, the reset control line, the scan line, the light emitting control line and the second initial voltage line are arranged in sequence along a second direction; the first direction intersects with the second direction;

[0159] The fourth transistor, the second transistor and the first transistor are arranged in sequence along a second direction;

[0160] The fifth transistor and the driving transistor are arranged in sequence along the second direction;

[0161] The third transistor and the sixth transistor are arranged in sequence along the second direction;

[0162] The orthographic projection of the channel of the third transistor on the substrate and the orthographic projection of the channel of the sixth transistor on the substrate are arranged between the orthographic projection of the high voltage line on the substrate and the orthographic projection of the data line on the substrate;

[0163] The orthographic projection of the gate of the driving transistor on the base substrate is arranged between the orthographic projection of the scanning line on the base substrate and the orthographic projection of the light emitting control line on the base substrate.

[0164] In at least one embodiment of the present invention, the control electrode can be a gate, each of the transistors includes a gate and an active layer, the active layer includes a channel region, a source and a drain; the active layer of the first transistor, the active layer of the second transistor, the active layer of the third transistor, the active layer of the fourth transistor, the active layer of the fifth transistor and the active layer of the sixth transistor are located in the semiconductor layer, and the gate is located in the first gate metal layer.

[0165] In at least one embodiment of the present invention, the pixel circuit further includes a first capacitor;

[0166] The gate of the driving transistor is reused as the first plate of the first capacitor; a plate of the first capacitor is formed on the first gate metal layer;

[0167] The second electrode plate of the first capacitor is formed on the second gate metal layer;

[0168] The orthographic projection of the high voltage line on the base substrate at least partially overlaps with the orthographic projection of the second plate of the first capacitor on the base substrate.

[0169] Fig.11 yes Fig.17 The layout of the semiconductor layers in Fig.12 yes Fig.17 The layout diagram of the first gate metal layer in Fig.13 yes Fig.17 The layout diagram of the second gate metal layer in Fig.14 yes Fig.17 Layout diagram of the first source and drain metal layer in, Fig.15 yes Fig.17 Layout diagram of the second source and drain metal layer in FIG. Fig.16 yes Fig.17 The layout of the anode layer in Fig.17 yes Figure 5 A layout diagram of at least one embodiment of a corresponding pixel circuit.

[0170] exist Fig.11 , the channel labeled A0 is T0, the channel labeled A1 is T1, the channel labeled A2 is T2, the channel labeled A3 is T3, the channel labeled A4 is T4, the channel labeled A5 is T5, and the channel labeled A6 is T6.

[0171] exist Fig.12 , R1 is a reset control line, GA is a scan line, E1 is a light emitting control line, G0 is a gate of T0, G1 is a gate of T1, G2 is a gate of T2, G3 is a gate of T3, G4 is a gate of T4, G5 is a gate of T5, and G6 is a gate of T6;

[0172] G0 is reused as the first plate of C1.

[0173] like Fig.12 As shown, the part where the reset control line R1 overlaps with the semiconductor layer is the gate G5 of the fifth transistor, the part where the scan line GA overlaps with the semiconductor layer is the gate G4 of the fourth transistor and the gate G3 of the third transistor, and the part where the light-emitting control line E1 overlaps with the semiconductor layer is the gate G2 of the second transistor and the gate G6 of the sixth transistor.

[0174] exist Fig.13 , the first initial voltage line is labeled I1, the second initial voltage line is labeled I2, and the second electrode plate of C1 is labeled C1b.

[0175] exist Fig.14 , VDD is a high voltage line, L1 is a first conductive connection portion, L2 is a second conductive connection portion, L3 is a third conductive connection portion, and L4 is a fourth conductive connection portion.

[0176] exist Fig.15 Among them, the one labeled DA is the data line.

[0177] exist Fig.16 Among them, the one labeled AN is the anode of the organic light emitting diode.

[0178] like Figures 11 to 17 As shown, the first initial voltage line I1, the second initial voltage line I2, the reset control line R1, the scan line GA and the light emitting control line E1 are all extended in the horizontal direction; VDD and DA are extended in the vertical direction;

[0179] I1, R1, GA, E1 and I2 are arranged in sequence along the vertical direction;

[0180] T4, T2 and T1 are arranged in sequence along the vertical direction;

[0181] T5 and T0 are arranged in sequence along the vertical direction;

[0182] T3 and T6 are arranged in sequence along the vertical direction;

[0183] The orthographic projection of the channel of T3 on the substrate and the orthographic projection of the channel of T6 on the substrate are arranged between the orthographic projection of the high voltage line VDD on the substrate and the orthographic projection of the data line DA on the substrate;

[0184] The orthographic projection of the gate G0 of T0 on the base substrate is disposed between the orthographic projection of the scanning line GA on the base substrate and the orthographic projection of the light emitting control line E1 on the base substrate.

[0185] In at least one embodiment of the present invention, the pixel circuit further includes a first capacitor;

[0186] The gate G0 of the driving transistor T0 is reused as the first plate of the first capacitor; a plate of the first capacitor is formed on the first gate metal layer;

[0187] The second electrode plate C1b of the first capacitor is formed on the second gate metal layer;

[0188] The orthographic projection of the high voltage line VDD on the substrate at least partially overlaps with the orthographic projection of the second electrode plate C1b of the first capacitor on the substrate, so as to reduce the space occupied laterally by the pixel circuit.

[0189] exist Fig.11 and Fig.17 , S5 is the source of T5, D5 is the drain of T5, S4 is the source of T4, D4 is the drain of T4, S2 is the source of T2, D2 is the drain of T2, D1 is the drain of T1, S1 is the source of T1, S5 is the source of T5, D5 is the drain of T5, S3 is the source of T3, D3 is the drain of T3, D6 is the source of T6, S6 is the source of T6; D0 is the drain of T0;

[0190] exist Fig.11 Among them, the one labeled S0 is the source of T0;

[0191] like Figure 11-Figure 17 As shown, S5 is electrically connected to I2 through a via hole, D5 is electrically connected to a first conductive connection portion L1 through a via hole, and the first conductive connection portion L1 is electrically connected to a gate G0 of a driving transistor T0 through a via hole;

[0192] S4 is electrically connected to the second conductive connection portion L2 through a via hole, and the second conductive connection portion L2 is connected to the first conductive connection portion L1;

[0193] D4, S2 and D0 are interconnected;

[0194] D2 is electrically connected to the anode AN of O1 through a via hole; D2 is electrically connected to the third conductive connection portion L3 through a via hole; the third conductive connection portion L3 is electrically connected to D1 through a via hole, so that D1 and D2 are electrically connected;

[0195] S1 is electrically connected to the first initial voltage line I1 through a via hole; G1 is electrically connected to the fourth conductive connection portion L4 through a via hole, and L4 is electrically connected to the gate G0 of the driving transistor T0 through a via hole;

[0196] S3 is electrically connected to the data line DA through a via, and D3, D6 and S0 are connected;

[0197] S6 is electrically connected to the high voltage line VDD through a via;

[0198] The second electrode plate C1b of C1 is electrically connected to the high voltage line VDD through a via.

[0199] The display device described in the embodiment of the present invention includes the above-mentioned display substrate.

[0200] The display device provided in the embodiment of the present invention can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc.

[0201] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A pixel circuit, characterized in that: It includes a driving circuit, a first reset circuit, a first node control circuit, a first light emitting control circuit and a light emitting element; The control terminal of the driving circuit is electrically connected to the first node; The first reset circuit is electrically connected to the first node, the first initial voltage line and the first electrode of the light-emitting element respectively, and is used to write the first initial voltage provided by the first initial voltage line into the first electrode of the light-emitting element under the control of the potential of the first node, so as to initialize the first electrode of the light-emitting element; The first node control circuit is electrically connected to the data line, the first node, the first end of the driving circuit and the second end of the driving circuit respectively, and is used to control the potential of the first node according to the data voltage provided by the data line and the threshold voltage of the driving transistor included in the driving circuit; The first light-emitting control circuit is electrically connected to the light-emitting control line, the second end of the driving circuit and the first electrode of the light-emitting element respectively, and is used to control the second end of the driving circuit to be connected to the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control line; The driving circuit is used to generate a driving current under the control of the potential of the first node; The second electrode of the light emitting element is electrically connected to the first voltage line; The pixel circuit further includes a second reset circuit; The second reset circuit is electrically connected to the reset control line, the second initial voltage line and the control end of the drive circuit respectively, and is used to provide the second initial voltage provided by the second initial voltage line to the control end of the drive circuit under the control of the reset control signal provided by the reset control line.

2. The pixel circuit according to claim 1, wherein: The first node control circuit includes a data writing circuit, a compensation control circuit and an energy storage circuit; The data writing circuit is electrically connected to the scan line, the data line and the first end of the driving circuit respectively, and is used to write the data voltage provided by the data line into the first end of the driving circuit under the control of the scan signal provided by the scan line; The compensation control circuit is electrically connected to the scan line, the control end of the drive circuit and the second end of the drive circuit respectively, and is used to control the control end of the drive circuit to be connected to the second end of the drive circuit under the control of the scan signal; The first end of the energy storage circuit is electrically connected to the control end of the drive circuit, the second end of the energy storage circuit is electrically connected to the second voltage line, and the energy storage circuit is used to store electric energy.

3. The pixel circuit according to claim 1, wherein: Also includes a second light emitting control circuit; The second light-emitting control circuit is electrically connected to the light-emitting control line, the second voltage line and the first end of the driving circuit respectively, and is used to control the connection between the first end of the driving circuit and the second voltage line under the control of the light-emitting control signal provided by the light-emitting control line; The second light emitting control circuit includes a sixth transistor; The control electrode of the sixth transistor is electrically connected to the light emitting control line, the first electrode of the sixth transistor is electrically connected to the second voltage line, and the second electrode of the sixth transistor is electrically connected to the first end of the driving circuit.

4. The pixel circuit according to claim 1, wherein: The first reset circuit includes a first transistor; The control electrode of the first transistor is electrically connected to the first node, the first electrode of the first transistor is electrically connected to the first initial voltage line, and the second electrode of the first transistor is electrically connected to the first electrode of the light emitting element.

5. The pixel circuit according to claim 1, wherein: The driving circuit includes a driving transistor, and the first light emitting control circuit includes a second transistor; The control electrode of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the first end of the driving circuit, and the second electrode of the driving transistor is electrically connected to the second end of the driving circuit; The control electrode of the second transistor is electrically connected to the light emitting control line, the first electrode of the second transistor is electrically connected to the second end of the driving circuit, and the second electrode of the second transistor is electrically connected to the first electrode of the light emitting element.

6. The pixel circuit according to claim 2, characterized in that: The data writing circuit includes a third transistor, the compensation control circuit includes a fourth transistor; the energy storage circuit includes a first capacitor; The control electrode of the third transistor is electrically connected to the scan line, the first electrode of the third transistor is electrically connected to the data line, and the second electrode of the third transistor is electrically connected to the first end of the driving circuit; The control electrode of the fourth transistor is electrically connected to the scan line, the first electrode of the fourth transistor is electrically connected to the control terminal of the drive circuit, and the second electrode of the fourth transistor is electrically connected to the second terminal of the drive circuit; The first plate of the first capacitor is electrically connected to the control end of the driving circuit, and the second plate of the first capacitor is electrically connected to the second voltage line.

7. The pixel circuit according to claim 1, wherein: The second reset circuit includes a fifth transistor; The control electrode of the fifth transistor is electrically connected to the reset control line, the first electrode of the fifth transistor is electrically connected to the second initial voltage line, and the second electrode of the fifth transistor is electrically connected to the control terminal of the driving circuit.

8. A pixel driving method, applied to the pixel circuit according to any one of claims 1 to 7, characterized in that: The display cycle includes a data writing phase and a display phase which are arranged successively; the pixel driving method includes: In the data writing stage, the data line provides a data voltage, and the first node control circuit controls the potential of the first node according to the data voltage and the threshold voltage of the driving transistor in the driving circuit; In the display stage, when the data voltage is a data voltage corresponding to a black screen, the first reset circuit writes a first initial voltage into the first electrode of the light-emitting element under the control of the potential of the first node to initialize the first electrode of the light-emitting element; The pixel circuit further includes a second reset circuit; the display cycle further includes an initialization phase arranged before the data writing phase; the pixel driving method further includes: In the initialization stage, the second reset circuit provides the second initial voltage provided by the second initial voltage line to the control end of the drive circuit under the control of the reset control signal provided by the reset control line, so as to initialize the control end of the drive circuit.

9. The pixel driving method according to claim 8, characterized in that: The pixel driving method further comprises: when the data voltage is not a data voltage corresponding to a black screen, in the display stage, the first light emitting control circuit controls the second end of the driving circuit to be connected to the first electrode of the light emitting element under the control of the light emitting control signal provided by the light emitting control line, and the driving circuit generates a current to drive the light emitting element under the control of the potential of the control end thereof; The pixel circuit further includes a second light emitting control circuit; the pixel driving method further includes: the second light emitting control circuit controls the connection between the first end of the driving circuit and the second voltage line under the control of the light emitting control signal.

10. A display substrate, characterized in that: The invention comprises a plurality of rows and columns of pixel circuits as claimed in any one of claims 1 to 7 arranged on a substrate.

11. The display substrate according to claim 10, wherein: The display substrate comprises a first initial voltage line, a reset control line, a scan line, a light emitting control line, a second initial voltage line, a high voltage line and a data line; The pixel circuit includes a driving circuit, a first reset circuit, a first node control circuit, a first light emitting control circuit, a second reset circuit, a second light emitting control circuit and a first reset circuit; the first node control circuit includes a compensation control circuit and a data writing circuit; The first reset circuit includes a first transistor, the first light emission control circuit includes a second transistor, the data writing circuit includes a third transistor, the compensation control circuit includes a fourth transistor, the second reset circuit includes a fifth transistor, the second light emission control circuit includes a sixth transistor, and the driving circuit includes a driving transistor; The first electrode of the first transistor is electrically connected to the first initial voltage line, the control electrode of the second transistor and the control electrode of the sixth transistor are both electrically connected to the light emitting control line, the control electrode of the third transistor and the control electrode of the fourth transistor are both electrically connected to the scanning line, the control electrode of the fifth transistor is electrically connected to the reset control line, the first electrode of the fifth transistor is electrically connected to the second initial voltage line, and the first electrode of the sixth transistor is electrically connected to the high voltage line; The first initial voltage line, the reset control line, the scan line, the light emitting control line and the second initial voltage line extend along a first direction, and the high voltage line and the data line extend along a second direction; The first initial voltage line, the reset control line, the scan line, the light emitting control line and the second initial voltage line are arranged in sequence along a second direction; the first direction intersects with the second direction; The fourth transistor, the second transistor and the first transistor are arranged in sequence along a second direction; The fifth transistor and the driving transistor are arranged in sequence along the second direction; The third transistor and the sixth transistor are arranged in sequence along the second direction; The orthographic projection of the channel of the third transistor on the substrate and the orthographic projection of the channel of the sixth transistor on the substrate are arranged between the orthographic projection of the high voltage line on the substrate and the orthographic projection of the data line on the substrate; The orthographic projection of the gate of the driving transistor on the base substrate is arranged between the orthographic projection of the scanning line on the base substrate and the orthographic projection of the light emitting control line on the base substrate.

12. The display substrate according to claim 11, wherein: The pixel circuit further includes a first capacitor; The gate of the driving transistor is reused as the first plate of the first capacitor; a plate of the first capacitor is formed on the first gate metal layer; The second electrode plate of the first capacitor is formed on the second gate metal layer; The orthographic projection of the high voltage line on the base substrate at least partially overlaps with the orthographic projection of the second plate of the first capacitor on the base substrate.

13. A display device, characterized in that: The invention comprises a display substrate as claimed in any one of claims 10 to 12.

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