Silicon carbide heterostructure normally closed high electron mobility transistor and its fabrication method

Abstract

This invention provides a method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor, comprising: selecting an unintentionally doped n-type 4H-SiC wafer as a substrate; isomorphically epitaxially growing a 4H-SiC transition layer on the surface of the substrate, and epitaxially growing a C-plane on the upper surface of the 4H-SiC transition layer; growing an unintentionally doped 3C-SiC well layer on the C-plane of the 4H-SiC transition layer; growing an n-type doped 4H-SiC barrier layer on the upper surface of the 3C-SiC well layer, and epitaxially growing a Si-plane on the upper surface of the 4H-SiC barrier layer; growing an unintentionally doped 3C-SiC cap layer on the Si-plane of the 4H-SiC barrier layer; fabricating electrodes and a protective film to obtain a 3C-SiC / 4H-SiC heterostructure normally closed single-channel high electron mobility transistor. By implementing this invention, the elements on both sides of the SiC heterostructure interface are the same during the preparation process, and there is no diffusion pollution, which reduces the complexity of the process; the obtained SiC heterostructure normally closed high electron mobility transistor has a low threshold voltage, a very small on-resistance, a high breakdown voltage, a large power quality factor, and high reliability.

Description

Technical Field

[0001] This invention relates to the field of power semiconductor technology, and in particular to a silicon carbide (SiC) heterojunction normally-off high electron mobility transistor (HEMT) and its fabrication method. Background Technology

[0002] III-V compound direct bandgap semiconductor heterojunction (HEMT) has achieved significant research and application success. A normally closed lateral field-effect transistor (HFET) with a (p)AlGaN / (i)GaN heterojunction has been fabricated, and its working principle has been studied [Y. Uemoto, M. Hikita, H. Ueno, et al., IEEE Transactions on Electron Devices, Vol. 54, No. 12 (2007): 3393-3399.]. This HFET utilizes the spontaneous, piezoelectric polarization effect of the AlGaN / GaN heterojunction to form a two-dimensional electron gas (2DEG) channel. A (p)GaN layer is grown on the AlGaN side of the AlGaN / GaN heterojunction, and then the gate (G) is deposited. Because the majority carriers in the (p)GaN layer are holes, the conduction band barrier height of the channel below the gate (G) can be increased. When the gate (G) voltage V... g When V = 0, the 2DEG in the channel beneath the (p)GaN layer is completely depleted, and the device is normally closed. When V g The built-in potential (V) of the (p)GaN / (p)AlGaN heterojunction is positively increased and exceeds that of the (p)GaN / (p)AlGaN heterojunction. bi When the gate (G) is through the (p)GaN layer, holes are injected into the channel; conversely, electrons are injected into the gate (G) through the (p)GaN layer from the channel, but are suppressed by the (p)GaN / (p)AlGaN heterojunction barrier. Due to the requirement of electrical neutrality, holes are injected into the channel through the (p)GaN layer from the gate (G). Due to the low mobility of holes, holes will recombine with some channel electrons, resulting in a conductivity modulation effect. At the same time, an equal number of electrons accumulated at the source (S) are attracted by the positively biased drain (D) and pass through the 2DEG channel with high mobility, forming the drain (D) current I. d The device can only function properly if a P-type GaN layer is embedded under the gate (G) and holes are injected into the channel, causing a conductance modulation effect in the channel, leading to I0 d Significantly increased, while I g The current collapse is negligible. Moreover, the lattice mismatch between the (p)GaN and (p)AlGaN embedded under the gate (G) is controllable, and the gate (G) defects have a negligible effect on the 2DEG transport of the AlGaN / GaN heterojunction channel.

[0003] A two-dimensional electron gas Schottky junction tunneling transverse field-effect transistor based on a metal-AlGaN / GaN heterostructure has been reported and its working principle has been explained [H.Chen,L.Yuan,KJChen,Phys.Status Solidi C,Vol.9,No.3-4(2012):871-874.]. This TJ-FET utilizes the spontaneous, piezoelectric polarization effect of the AlGaN / GaN heterojunction to form a 2DEG channel. At one end of this channel, an alloy (e.g., TiAu) thin film is deposited to form a Schottky junction, and an ohmic connection electrode is formed on the alloy film as the source (S). An oxide (e.g., Al2O3) insulating layer is deposited on the AlGaN layer, and then an alloy (e.g., NiAu) gate is fabricated. This gate G overlaps and covers the underlying Schottky junction, preventing the formation of a lateral gap between the gate G and the Schottky junction, which would cause the gate G voltage to be unable to control the charge transport of the Schottky junction. At the other end of the heterojunction 2DEG channel, an ohmic contact alloy (e.g., TiAlNiAu) thin film is deposited to form the drain. When the gate G voltage V... g When <0, the 2DEG in the channel below the gate G is depleted, and the channel is pinched off. At this time, the Schottky junction barrier is very high and the lateral thickness is very large. Charge cannot tunnel from the source S through the Schottky barrier to the drain D, and the drain current I... d =0. When V g When I = 0, the 2DEG channel below the gate G is turned on, but at this time the Schottky junction barrier is relatively high and the lateral thickness is relatively large, making it difficult for charge to tunnel from the source S through the Schottky barrier to the drain D. d It can be ignored. When V g When the forward voltage rises to a certain level, the Schottky junction barrier becomes very low, and the lateral thickness becomes very small. Charge then tunnels smoothly from the source (S) through the Schottky barrier to the drain (D). d It is very large. This TJ-FET forms I by the forward voltage of the gate (G) controlling the source (S) to tunnel electrons through the Schottky barrier to the drain (D). d To achieve enhanced work; because I d By V g The specific on-resistance R of the device is obtained by controlling the tunneling of electrons from the source (S) through the Schottky barrier to the drain (D). on-sp Very small; V g When ≤0, I d =0, therefore the breakdown voltage V of the TJ-FET is 0. B It is significantly higher than the corresponding value of traditional HEMT.

[0004] To date, there have been no reports of SiC heterostructure HEMTs. However, SiC semiconductors possess advantages such as chemical stability, wide band gap, high thermal conductivity, high critical breakdown electric field strength, fast carrier saturation drift velocity, radiation resistance, and corrosion resistance. There are over 100 crystal structures for SiC, such as the common cubic silicon carbide (3C-SiC), hexagonal silicon carbide (4H-SiC, 6H-SiC, etc.), etc. In a 3C-SiC unit cell, the four C-Si bonds are completely equivalent, while in 4H-SiC and 6H-SiC unit cells, one preferred bond (oriented along the c-axis) is not equivalent to the bonds in other directions, thus causing spontaneous polarization. Furthermore, the band gap (E... g Heterogeneous structures composed of SiC with different crystal forms and atomic planes (such as 3C / (4,6)H-SiC, (4,6)H / 3C / (4,6)H-SiC, etc.) can control the transport of charge carriers and photons. The lattice constants and thermal conductivity in the a and b directions of different SiC crystal forms are not significantly different, resulting in weak piezoelectric polarization effects at the heterostructure interface, which is significantly different from the situation in group III nitride semiconductor heterostructures. Furthermore, the chemical composition of different SiC crystal forms is the same (both Si and C), so there is no cross-diffusion contamination between chemical components when forming heterostructures. Therefore, SiC heterostructures possess novel electrical, optical, and thermal properties, meeting the requirements of high frequency, high temperature, high pressure, high power, low noise, and corrosion resistance. Thus, SiC heterostructures have significant research and development value, broad application prospects, and huge market potential.

[0005] Currently, research has been conducted on the growth theory and experimental preparation of SiC isostructures. The main techniques for growing SiC isostructures include vapor phase transport techniques such as molecular beam epitaxy (MBE), vacuum sublimation epitaxy (SEV), physical vapor transport (PVT), chemical vapor deposition (CVD), and vapor-liquid-solid growth (VLS). The research group of Professor Xu Pengshou at the University of Science and Technology of China used solid-source molecular beam epitaxy (SSMBE) technology to fabricate a 6H / 3C / 6H-SiC multilayer structure on a 6H-SiC(0001) substrate at 1350K [Liu Jinfeng, Liu Zhongliang, Xu Pengshou, et al., Acta Physico-Chimica Sinica, Vol.24(2008):571-575.]. The growth of this heterostructure is divided into three stages: (1) when the Si beam current is slightly excessive, it is a two-dimensional step flow growth mode, and the epitaxial film maintains the crystal structure of the substrate; (2) when the Si beam current is reduced, the film is transformed into a three-dimensional island growth; (3) when the Si beam current is increased to restore the initial slightly excessive condition, the film growth is restored to the two-dimensional step flow growth mode. The research group of Zhang Yuming at Xidian University used hot-wall chemical vapor deposition (HWCVD) technology and mixed reaction gas (SiH4+C3H8+H2) to form 3C / 4H-SiC heterostructures on a positive axial 4H-SiC(0001) Si surface substrate at 1770K by stepwise heteroepitaxial epitaxy of 3C-SiC thin films [B.Xin, RXJia, YMZhang, et al., Applied Surface Science, Vol.357(2015):985-993.]. German researchers A. Fissel et al. used SSMBE technology to fabricate a (4,6)H / 3C / (4,6)H-SiC multilayer structure on a (4,6)H-SiC substrate [A. Fissel, Physics Reports, Vol. 379 (2003): 149-255.]. They grew a 3C-SiC thin film on an on-axis (4,6)H-SiC(0001) substrate at 1430 K using alternating C and Si sources with controlled jets. This effectively controlled the twin boundaries at the (4,6)H / 3C-SiC interface and improved the quality of the 3C-SiC layer. Russian researchers A. AA Lebedev et al. used vacuum sublimation epitaxy (SEV) technology to fabricate a 3C / 6H-SiC mutant heterostructure [AA Lebedev, et al., Journal of Crystal Growth, Vol. 396 (2014): 100-103.].The growth temperature of 3C-SiC on the Si surface of a 6H-SiC (0001) substrate is approximately 2270 K, and the growth rate exceeds 0.7 μm / min. The growth temperature of 3C-SiC on the C (000ī) surface of a 6H-SiC substrate is approximately 2120–2170 K, and the growth rate is 0.4–0.5 μm / min. The electroluminescence spectrum peaks of 2.9 eV and 2.3 eV correspond to the band gaps of 6H-SiC and 3C-SiC, respectively. French scientists J. Lorenzzi et al. used a water-cooled cold-wall CVD system and different mixed gas (SiH4+C3H8+Ar2) ratios to fabricate 3C / 6H-SiC(0001) Si surface substrates on the positive axis and 2° off-axis and studied the gas-liquid-solid (VLS) mechanism of 3C-SiC epitaxial growth [J. Lorenzzi, et al., Diamond & Related Materials, Vol. 20 (2011): 808-813.].

[0006] Currently, novel electrical, optical, and thermal properties of SiC heterostructures have been studied. In China, Xie Xide et al. from Fudan University used the LMTO-ASA ab initio band structure calculation method to study (3C-SiC). 3n / (2H-SiC) 2n Electronic and band structures of (n=1,2,3) heterostructure superlattices [XDXie, et al., Physical Review B, Vol.54(1996):8789-8793.] were obtained, and the results show that the 3C / 2H-SiC heterostructure band structure is a type II band structure with a conduction band order ΔE. c = 1.48 eV, valence band order ΔE v =0.13eV; the band gap decreases rapidly with increasing overall thickness, which is related to the internal electric field caused by the spontaneous polarization of 2H-SiC, but this electric field affects the valence band order ΔE. c ΔE vThe impact is minimal. Russian scientists S.Yu. Davydov et al. studied the effect of spontaneous polarization on the quantum well energy levels of the (4,6)H / 3C / (4,6)H-SiC heterostructure [S.Yu.Davydov, et al., Physics of the Solid State, Vol.53(2011):872-877.; S.Yu.Davydov, et al.]. [al., Semiconductors, Vol.53(2019):699-702.] By setting boundary conditions and self-consistently solving the Poisson equation and the Schrödinger equation, the energy level expression of the quantum well of the SiC heterostructure was obtained. Simulation calculations revealed that the spontaneous polarization effect makes the quantum well on the left interface of the (4,6)H / 3C / (4,6)H-SiC heterostructure narrower and deeper, and the quantum well on the right interface wider and shallower. Electrons will directly transition from the quantum well in the 3C-SiC region to the valence band in the (4,6)H-SiC region. When the 3C-SiC layer is very thin, electrons will indirectly transition from the quantum well on the left conduction band to the valence band on the right interface. American scientists MVS Handrashekhar et al. fabricated a 4H(000ī)C facet / 3C-SiC heterostructure using cold-wall CVD technology [MVSChandrashekhar, et al., Applied Physics Letters, Vol. 91(2007): 033503-1-3.]. In this heterostructure, a two-dimensional electron gas (2DEG) is distributed on the 3C-SiC side of the interfacial quantum well, and the highest mobility of the 2DEG is 314 cm⁻¹. 2 ·V -1 ·s -1 The areal density reaches 3×10 13 cm -2 Furthermore, MVS Handrashekhar et al. also prepared a 4H(000ī)Si facet / 3C-SiC isostructure [MVSChandrashekhar, et al., Applied Physics Letters, Vol.90(2007):173509-1-4.], in which the spontaneous polarization of 4H-SiC induced the positive charge on one side of 3C-SiC to become the interfacial two-dimensional hole gas (2DHG), with an areal density of 9.7 × 10⁻⁶. 12 cm -2This is due to the spontaneous polarization inducing a large amount of 2DHG. American scientists S. Bai et al. used hot-wall CVD technology to prepare 4H / 3C / 4H-SiC single quantum wells at 1820K [S. Bai, et al., Applied Physics Letters, Vol. 83 (2003): 3171-3173.]. Low-temperature PL spectra at 2K showed that the light emission energy of the quantum well was 0.2 eV lower than the band gap of the 3C-SiC bulk material. This is attributed to the quantum confinement Stark effect caused by the electric field induced by the spontaneous polarization of 4H-SiC, which leads to a redshift in the light emission of the quantum well. Based on this, the spontaneous polarization intensity of 4H-SiC can be calculated. American scientists Jie Lu et al. used a cold-wall CVD system to deposit 3C-SiC on a 6H-SiC(0001)C substrate, forming a 6H(0001)C / 3C-SiC heterostructure [J.Lu, et al., Applied Physics Letters, Vol.94(2009):162115-1-3.]. Analysis revealed that the lattice mismatch between the 6H-SiC(0001) and 3C-SiC(111) planes was less than 0.1%, and the thermal mismatch was less than 0.1%. Magnetic transport measurements in a magnetic field of 0–10T and a temperature range of 1.5–100K showed the presence of 2DEG at the interface of this heterostructure, with a mobility of 2000 cm⁻¹. 2 ·V -1 ·s -1 The areal density is (2.7±0.2)×10 12 cm -2 When the magnetic field remains constant, the longitudinal magnetoresistance R xx R decreases as temperature increases; when the temperature is below 30K, R... xx As the magnetic field strengthens, R first decreases and then increases; above 30K, R... xx It rises as the magnetic field strengthens.

[0007] Currently, some SiC heterostructure devices and their performance have been reported. RAMinamisawa et al. fabricated a 3C / 4H-SiC heterostructure Schottky barrier diode (SBD) using the HWCVD method [RAMinamisawa, et al., Applied Physics Letters, Vol. 108(2016): 143502-1-3.], with a forward conduction voltage V... on=1.65V, leakage current conforms to field emission mechanism; the thermal stability of this SBD is better than that of Si / SiC heterojunction SBDs prepared by low-voltage CVD and MBE. The inventors of this invention designed a terahertz band SiC heterojunction impact-ionization avalanche transit time (IMPATT) diode [WSWei, et al., Superlattices and Microstructures, Vol.152(2021):106844-1-12.], and analyzed the influence of SiC heterojunction barrier and material properties before and after quantum effect (tunneling, Bohm potential) correction on the DC and large signal performance of the device through numerical simulation, and compared the differences in power, efficiency and noise of different heterojunction IMPATT diodes.

[0008] Based on the existing research and reports, considering the near-identical lattice matching in the a and b directions of the 3C / 4H(6H)-SiC heterostructure interface and the negligible piezoelectric polarization effect, this type of heterostructure interface only needs to consider the interface 2DEG and 2DHG induced by the spontaneous polarization effect of hexagonal SiC, without considering the interface piezoelectric polarization effect. Therefore, it is necessary to develop such heterostructure devices to reduce the interference factors of interface 2DEG and 2DHG, ensure no diffusion contamination on both sides of the heterostructure interface, and reduce process complexity. Therefore, compared with devices of group III nitride heterostructures with spontaneous and piezoelectric polarization, SiC heterostructure devices are simpler and more reliable. Summary of the Invention

[0009] The technical problem to be solved by the embodiments of the present invention is to provide a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT) and its preparation method. Because the elements on both sides of the SiC heterostructure interface are the same during the preparation process, there is no diffusion contamination on both sides of the interface, the process is simplified and the device performance is improved.

[0010] To address the aforementioned technical problems, embodiments of the present invention provide a method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT), comprising the following steps:

[0011] S11. Select an unintentionally doped n-type 4H-SiC wafer as the substrate;

[0012] S12. An isomorphically epitaxial 4H-SiC transition layer is grown on the upper surface of the substrate, and a C-plane is epitaxially grown on the upper surface of the 4H-SiC transition layer.

[0013] S13. An unintentionally doped 3C-SiC potential well layer is grown on the C-plane of the 4H-SiC transition layer.

[0014] S14. An n-type doped 4H-SiC barrier layer is grown on the upper surface of the 3C-SiC well layer, and a Si surface is epitaxially grown on the upper surface of the 4H-SiC barrier layer.

[0015] S15. An unintentionally doped 3C-SiC cap layer is grown on the Si surface of the 4H-SiC barrier layer.

[0016] S16. Electrodes and protective films are fabricated to obtain a normally closed single-channel high electron mobility transistor with a 3C-SiC / 4H-SiC heterostructure.

[0017] Specifically, step S11 is as follows:

[0018] Using an unintentionally doped n-type 4H-SiC wafer at a certain angle to the positive or negative axis as a substrate, and in the reaction chamber of a hot-wall chemical vapor deposition (HWCVD) system at a first predetermined temperature and pressure, hydrogen (H2) is used to etch the growth surface of the 4H-SiC wafer substrate to remove surface dangling bonds, scratches and contaminants.

[0019] Specifically, step S12 is as follows:

[0020] In the reaction chamber of the hot-wall chemical vapor deposition (HWCVD) system at the first predetermined temperature and the predetermined pressure, a 4H-SiC transition layer with the same crystal form and crystal plane as the substrate is isomorphically epitaxially grown on the growth surface etched on the substrate using a first mixed gas containing silane (SiH4), propane (C3H8), hydrogen (H2) and doped phosphine (PH3). A C-plane is then epitaxially grown on the upper surface of the 4H-SiC transition layer.

[0021] When the thickness of the 4H-SiC transition layer on the C-side reaches the first preset thickness, the silane (SiH4), propane (C3H8), and phosphine (PH3) in the first mixed gas are turned off, and hydrogen (H2) is used to continue etching the surface of the 4H-SiC transition layer.

[0022] Specifically, step S13 is as follows:

[0023] In the reaction chamber of the hot-wall chemical vapor deposition (HWCVD) system at the second predetermined temperature and the predetermined pressure, an unintentionally doped 3C-SiC potential well layer is grown in a three-dimensional island shape on the C-surface of the 4H-SiC transition layer by a second mixed gas containing silane (SiH4), propane (C3H8) and hydrogen (H2).

[0024] When the thickness of the 3C-SiC potential well layer reaches the second preset thickness, the silane (SiH4) and propane (C3H8) in the second mixed gas are turned off, and hydrogen (H2) is used to continue etching the surface of the 3C-SiC potential well layer.

[0025] The 3C-SiC potential well layer and the C-plane 4H-SiC transition layer form a SiC heterostructure interface, which excites a two-dimensional electron gas (2DEG).

[0026] Specifically, step S14 is as follows:

[0027] In the reaction chamber of the hot-wall chemical vapor deposition (HWCVD) system based on the first predetermined temperature and the predetermined pressure, an n-type doped 4H-SiC barrier layer is grown by two-dimensional step flow through the first mixed gas on the upper surface of the 3C-SiC potential well layer, and a Si surface is epitaxially grown on the upper surface of the 4H-SiC barrier layer.

[0028] When the thickness of the 4H-SiC barrier layer on the Si surface reaches the third preset thickness, the silane (SiH4), propane (C3H8) and phosphine (PH3) in the first mixed gas are turned off, and hydrogen (H2) is used to continue etching the surface of the 4H-SiC barrier layer.

[0029] Specifically, step S15 is as follows:

[0030] In the reaction chamber of the hot-wall chemical vapor deposition (HWCVD) system based on the second predetermined temperature and the predetermined pressure, an unintentionally doped 3C-SiC cap layer is grown in three dimensions on the Si surface of the 4H-SiC barrier layer using the second mixed gas.

[0031] When the thickness of the 3C-SiC cap layer reaches the fourth preset thickness, the silane (SiH4) and propane (C3H8) in the second mixed gas are turned off, and hydrogen (H2) is used to continue etching the surface of the 3C-SiC cap layer.

[0032] The 3C-SiC cap layer and the Si-faced 4H-SiC barrier layer form a SiC heterostructure interface, which excites two-dimensional hole gas (2DHG).

[0033] Specifically, step S16 is as follows:

[0034] Using inductively coupled plasma (ICP) etching, gate grooves for forming longitudinal conductive channels and drain grooves for achieving ohmic contact between the drain and the two-dimensional electron gas (2DEG) lateral conductive channel are respectively fabricated on both sides of the multilayer SiC heterostructure. The multilayer SiC heterostructure is composed of a SiC heterostructure formed by the 4H-SiC transition layer and the 3C-SiC well layer, and a SiC heterostructure formed by the 4H-SiC barrier layer and the 3C-SiC cap layer.

[0035] Phosphorus (P) ions are implanted into the 3C-SiC cap layer below the source electrode using an ion implantation process to form a threshold voltage (V) for adjusting the HEMT. th N + The N-type doped region is used to implant P ions into the multilayer heterostructure on the left side of the drain to form an N-type lateral conduction channel for ohmic linking the 2DEG to the drain. + Type-doped regions;

[0036] Using electron beam evaporation technology, in all N + Alloy films are deposited in the doped regions to form ohmic contact source and drain electrodes;

[0037] An electron beam evaporation process is used to deposit an insulating gate dielectric in the gate trench, followed by the deposition of a Schottky metal gate; wherein the insulating gate dielectric is one of SiO2, Al2O3, HfO2, or La2O3;

[0038] A protective layer is applied to the outside of the multilayer SiC heterostructure using a coating technique.

[0039] A light-shielding layer is applied to the outside of the protective layer using a coating technique to prevent light from shining from the side and affecting the device performance.

[0040] This invention also provides a method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT), characterized by comprising the following steps:

[0041] S21. Select an unintentionally doped n-type 4H-SiC wafer as the substrate;

[0042] S22. An isomorphically epitaxial 4H-SiC transition layer is grown on the upper surface of the substrate, and a C-plane is epitaxially grown on the upper surface of the 4H-SiC transition layer.

[0043] S23. An unintentionally doped 3C-SiC first potential well layer is grown on the C-plane of the 4H-SiC transition layer;

[0044] S24. An n-type doped 4H-SiC first barrier layer is grown on the upper surface of the 3C-SiC first well layer, and a C-face is epitaxially grown on the upper surface of the 4H-SiC first barrier layer.

[0045] S25. An unintentionally doped 3C-SiC second well layer is grown on the C-plane of the first barrier layer of 4H-SiC.

[0046] S26. An n-type doped 4H-SiC second barrier layer is grown on the upper surface of the 3C-SiC second well layer, and a Si surface is epitaxially grown on the upper surface of the 4H-SiC second barrier layer.

[0047] S27. An unintentionally doped 3C-SiC cap layer is grown on the Si surface of the second barrier layer of 4H-SiC.

[0048] S28. Electrodes and protective films are fabricated to obtain a normally closed dual-channel high electron mobility transistor with a 3C-SiC / 4H-SiC heterostructure.

[0049] This invention also provides a SiC heterostructure normally closed single-channel HEMT, which is fabricated using the aforementioned method for fabricating a silicon carbide heterostructure normally closed high electron mobility transistor.

[0050] This invention also provides a SiC heterostructure normally closed dual-channel HEMT, which is fabricated using the aforementioned method for fabricating a silicon carbide heterostructure normally closed high electron mobility transistor.

[0051] Implementing the embodiments of the present invention has the following beneficial effects:

[0052] Compared with traditional GaN-based heterojunction normally closed HEMTs, the elements on both sides of the heterojunction interface in the SiC heterojunction single and dual-channel HEMTs of this invention are the same (both are Si and C), which makes there is no diffusion contamination on both sides of the heterojunction interface, reduces process complexity, and improves device performance. Attached Figure Description

[0053] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, obtaining other drawings based on these drawings without creative effort still falls within the scope of the present invention.

[0054] Figure 1 This is a flowchart of a method for fabricating a silicon carbide (SiC) heterostructure normally closed single-channel high electron mobility transistor (HEMT) provided in Embodiment 1 of the present invention;

[0055] Figure 2 This is a schematic diagram of a normally closed single-channel HEMT with SiC heterostructure provided in Embodiment 1 of the present invention;

[0056] Figure 3 This is a flowchart of another method for preparing a SiC heterostructure normally closed dual-channel HEMT provided in Embodiment 2 of the present invention;

[0057] Figure 4 This is a schematic diagram of a normally closed dual-channel HEMT with SiC heterostructure provided in Embodiment 2 of the present invention;

[0058] Figure 5 The above are simulated diagrams of the band structure of the SiC heterojunction in a normally closed single-channel HEMT under different conditions, as provided in Embodiment 1 of the present invention.

[0059] Figure 6 These are simulation diagrams of electron and hole distributions in normally closed single- and double-channel HEMTs of SiC heterostructures under different conditions provided in Embodiments 1 and 2 of the present invention.

[0060] Figure 7 This is a simulation diagram showing the effect of fixed positive and negative polarization charges on the equipotential line distribution at the interface of the 3C-SiC / 4H-SiC (C-face) and 3C-SiC / 4H-SiC (Si-face) heterostructures in a normally closed single-channel HEMT provided in Embodiment 1 of the present invention.

[0061] Figure 8 The thickness (t) of the 3C-SiC cap layer in the normally closed single-channel HEMT with SiC heterostructure provided in Embodiment 1 of the present invention. c Simulation plots showing the effects of different effects on HEMT performance;

[0062] Figure 9 The thickness (t) of the 3C-SiC potential well layer in the normally closed single-channel HEMT with SiC heterostructure provided in Embodiment 1 of the present invention is shown in the figure. w Simulation diagram showing the impact of changes on HEMT performance;

[0063] Figure 10 The thickness (t) of the 4H-SiC barrier layer in the normally closed single-channel HEMT with SiC heterostructure provided in Embodiment 1 of the present invention is shown in the figure. b Simulation diagram showing the impact of changes on HEMT performance;

[0064] Figure 11 The doping concentration (P) of the 4H-SiC barrier layer in the normally closed single-channel HEMT with SiC heterostructure provided in Embodiment 1 of the present invention is... b Simulation diagram showing the impact of changes on HEMT performance;

[0065] Figure 12 The gate thickness (L) of the SiC heterostructure normally closed dual-channel HEMT provided in Embodiment 2 of the present invention is... g ), height (t) g Simulation diagram of the effect of HEMT breakdown voltage and specific on-resistance;

[0066] Figure 13 This is a simulation diagram of the transfer and output characteristic curves of the normally closed single- and dual-channel HEMTs of SiC heterostructure provided in Embodiments 1 and 2 of the present invention. Detailed Implementation

[0067] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings.

[0068] like Figure 1 The image shows a method for fabricating a silicon carbide (SiC) heterostructure normally closed single-channel high electron mobility transistor (HEMT) according to Embodiment 1 of the present invention, comprising the following steps:

[0069] Step S11: Select an unintentionally doped n-type 4H-SiC wafer as the substrate;

[0070] The specific process is as follows: First, an unintentionally doped n-type 4H-SiC wafer with a certain angle (e.g., ≤4°) on the positive or off-axis is used as the substrate.

[0071] Next, at a first predetermined temperature (e.g., about 1850 K), a low flow rate of hydrogen (H2) is introduced into the reaction chamber of the hot-wall chemical vapor deposition (HWCVD) system to etch the growth surface of the 4H-SiC wafer substrate to remove dangling bonds, surface scratches, and contaminants.

[0072] Step S12: Isotropically epitaxially grow a 4H-SiC transition layer on the upper surface of the substrate, and epitaxially grow a C-plane on the upper surface of the 4H-SiC transition layer;

[0073] The specific process involves maintaining the substrate temperature during the etching stage, adjusting the H2 flow rate, and then introducing appropriate flow rates of the reaction source gases SiH4 and C3H8, along with a suitable dopant gas PH3. During this stage, the reaction chamber pressure is stabilized at 10 Pa, and the reconstructed pattern on the 4H-SiC growth surface is clearly monitored in situ using Reflection High Electron Diffraction (RHEED) technology.

[0074] At this point, firstly, in the HWCVD system reaction chamber at a predetermined temperature (e.g., 1850K) and a predetermined pressure (e.g., 10Pa), a 4H-SiC transition layer with the same crystal form as the substrate is isomorphically grown on the growth surface of the substrate by a first mixed gas containing silane (SiH4), propane (C3H8), hydrogen (H2), and an appropriate amount of dopant gas phosphine (PH3). Then, on the surface of the 4H-SiC transition layer, a two-dimensional epitaxial growth of the C-plane is performed (e.g., by reasonably adjusting the flow rate and flow ratio of SiH4 and C3H8 source gases, as well as the dopant gas and doping ratio PH3 / SiH4, and strictly controlling the substrate temperature).

[0075] Secondly, the thickness of the 4H-SiC transition layer can be controlled by the growth rate, growth time and in-situ monitored RHEED pattern. When the thickness of the 4H-SiC transition layer on the C-side reaches the first preset thickness (e.g., 2 micrometers), SiH4, C3H8 and PH3 in the first mixed gas are turned off, and H2 is used to continue etching the dangling bonds, surface scratches and contaminants on the growth surface of the 4H-SiC transition layer to reduce defects and facilitate interface smoothing.

[0076] Step S13: An unintentionally doped 3C-SiC potential well layer is grown on the C-face of the 4H-SiC transition layer;

[0077] The specific process is as follows: First, in the HWCVD system reaction chamber based on a second predetermined temperature (e.g., 1750K), a three-dimensional island-like growth of an unintentionally doped 3C-SiC potential well layer is performed on the C-surface of the 4H-SiC transition layer using a second mixed gas containing SiH4, C3H8, and H2. That is, the temperature is reduced to about 1750K, a reasonably proportioned mixed reaction source gas (SiH4+C3H8+H2) is introduced, and the flow rate of the Si source gas (SiH4) is appropriately reduced while the flow rate of C3H8 is reasonably increased, while maintaining the reaction chamber pressure level of the previous stage (e.g., 10Pa). Because the Si source ratio decreases, the RHEED reconstruction image of the SiC growth surface monitored in situ changes, and the growth mode of the 4H-SiC transition layer surface changes from two-dimensional step flow to three-dimensional island growth. At this time, the 4H-SiC crystal form changes to the 3C-SiC crystal form.

[0078] Secondly, the thickness of the 3C-SiC potential well layer can be controlled by the growth rate, growth time and in-situ monitored RHEED pattern. When the thickness of the 3C-SiC potential well layer reaches the second preset thickness (e.g., 25 nm), SiH4 and C3H8 in the second mixed gas are turned off, and H2 is used to continue etching the dangling bonds, surface scratches and contaminants on the growth surface of the 3C-SiC potential well layer to reduce defects and facilitate interface smoothing.

[0079] It should be noted that the 3C-SiC potential well layer and the C-plane 4H-SiC transition layer form a SiC heterostructure interface, which excites a two-dimensional electron gas (2DEG).

[0080] Step S14: An n-type doped 4H-SiC barrier layer is grown on the upper surface of the 3C-SiC well layer, and a Si surface is epitaxially grown on the upper surface of the 4H-SiC barrier layer.

[0081] The specific process is as follows: In the HWCVD system reaction chamber at a predetermined temperature (e.g., 1850 K) and a predetermined pressure (e.g., 10 Pa), an n-type doped 4H-SiC barrier layer is grown on the upper surface of the 3C-SiC well layer using a first mixed gas containing SiH4, C3H8, H2, and a suitable amount of PH3 through two-dimensional step flow growth. A Si surface is then epitaxially grown on the upper surface of the 4H-SiC barrier layer. That is, the parameters from step S12, such as the substrate temperature, the total amount and ratio of the mixed reaction source gas (SiH4+C3H8+PH3+H2), and the gas pressure in the HWCVD system reaction chamber, are restored. At this time, the Si source ratio on the 4H-SiC growth surface is increased compared to the value during 3C-SiC growth. The in-situ monitored RHEED image restores the crystal form of the 4H-SiC transition layer. The surface growth mode of the 4H-SiC barrier layer changes from three-dimensional island growth to two-dimensional step flow growth, and the film changes from a 3C-SiC crystal form to a 4H-SiC crystal form.

[0082] Secondly, the thickness of the 4H-SiC barrier layer can be controlled by the growth rate, growth time, and in-situ monitored RHEED pattern. When the thickness of the 4H-SiC barrier layer on the Si surface reaches the third preset thickness (e.g., 25 nm), SiH4, C3H8, and PH3 in the first mixed gas are turned off, and H2 is used to continue etching the dangling bonds, surface scratches, and contaminants on the growth surface of the 4H-SiC barrier layer to reduce defects and facilitate interface smoothing.

[0083] It should be noted that, in order to reduce the adverse effects of temperature changes on the growth of each layer, SiH4, C3H8 and PH3 are paused during the temperature change process in steps 12→13→14, while H2 is retained to etch the surface of the growth material. This is because the effect of etching is slower and weaker than the effect of temperature change. On the other hand, it avoids the unevenness of the first mixed gas of SiH4, C3H8, H2 and PH3 introduced into the HWCVD system reaction chamber in the initial stage.

[0084] Step S15: On the upper surface of the 4H-SiC barrier layer, an unintentionally doped 3C-SiC cap layer is grown;

[0085] The specific process is to repeat step 13, that is, to restore the substrate temperature, the total amount and ratio of the mixed reaction source gas (SiH4+C3H8+H2), the gas pressure of the HWCVD system reaction chamber and other parameters of step S13, as well as the corresponding preparation process of the 3C-SiC potential well layer.

[0086] First, in the HWCVD system reaction chamber at a second predetermined temperature (e.g., 1750K), an unintentionally doped 3C-SiC cap layer is grown in a three-dimensional island-like epitaxial manner on the surface of the 4H-SiC transition layer by a second mixed gas containing SiH4, C3H8 and H2.

[0087] Secondly, the thickness of the 3C-SiC cap layer can be controlled by the growth rate, growth time, and in-situ monitored RHEED pattern. When the thickness of the 3C-SiC cap layer reaches the fourth preset thickness (e.g., 25 nanometers), SiH4 and C3H8 in the second mixed gas are turned off, and H2 is used to continue etching the dangling bonds, surface scratches, and contaminants on the growth surface of the 3C-SiC cap layer to reduce defects and facilitate interface smoothing.

[0088] It should be noted that the 3C-SiC cap layer and the 4H-SiC barrier layer on the Si surface form a SiC heterostructure interface, which excites two-dimensional hole gas (2DHG).

[0089] Step S16: Fabricate electrodes and a protective film to obtain a normally closed single-channel HEMT with a 3C-SiC / 4H-SiC heterostructure.

[0090] The specific process is as follows: First, using inductively coupled plasma (ICP) etching technology, gate (G) grooves for forming longitudinal conduction channels and drain grooves for achieving ohmic contact between the drain (D) electrode and the 2DEG lateral conduction channel are respectively fabricated on both sides of the multilayer SiC heterostructure; wherein, the multilayer SiC heterostructure is a SiC heterostructure formed by a 4H-SiC transition layer and a 3C-SiC potential well layer to excite 2DEG, and a SiC heterostructure formed by a 4H-SiC barrier layer and a 3C-SiC cap layer to excite 2DHG;

[0091] The second step involves implanting phosphorus (P) ions into the 3C-SiC cap layer below the source electrode using an ion implantation process, with a concentration of N₂. m This forms a threshold voltage (V) that can be adjusted for HEMT. th N + The N-type doped region is used to implant P ions into the multilayer SiC isostructure on the left side of the drain, forming an N-type doped region for ohmic linking the 2DEG lateral conduction channel to the drain. + Type-doped regions;

[0092] The third step involves using electron beam evaporation technology to evaporate all N... +Alloy films are deposited on the outer side of the doped region to form ohmic contact source (S) and drain (D) electrodes;

[0093] The fourth step involves depositing an insulating gate dielectric in the gate (G) groove using an electron beam evaporation process, followed by depositing a Schottky metal gate (G); wherein the insulating gate dielectric is one of SiO2, Al2O3, HfO2, or La2O3.

[0094] Step 5: Apply a coating technique to coat the outside of the multilayer SiC heterostructure with a protective layer;

[0095] Step 6: Apply a light-shielding layer to the outside of the protective layer to prevent light from shining from the outside and affecting the device performance, and to prevent light from shining from the side and affecting the device performance.

[0096] Corresponding to the preparation method of the SiC heterostructure normally closed HEMT in Embodiment 1 of the present invention, Embodiment 1 of the present invention also provides a SiC heterostructure normally closed single-channel HEMT, which is prepared using the preparation method of the SiC heterostructure normally closed HEMT in Embodiment 1 of the present invention. The specific preparation method will not be described in detail here, and the specific structural cross-sectional view can be found in the appendix to the specification. Figure 2 As shown.

[0097] like Figure 3 As shown in Embodiment 2 of the present invention, a method for preparing a SiC heterostructure normally closed dual-channel HEMT is provided, characterized by comprising the following steps:

[0098] Step S21: Select an unintentionally doped n-type 4H-SiC wafer as the substrate;

[0099] Step S22: Isotropically epitaxially grow a 4H-SiC transition layer on the upper surface of the substrate, and epitaxially grow a C-plane on the upper surface of the 4H-SiC transition layer;

[0100] Step S23: An unintentionally doped 3C-SiC first potential well layer is grown on the C-face of the 4H-SiC transition layer;

[0101] Step S24: An n-type doped 4H-SiC first barrier layer is grown on the upper surface of the 3C-SiC first well layer, and a C-face is epitaxially grown on the upper surface of the 4H-SiC first barrier layer.

[0102] Step S25: Grow an unintentionally doped 3C-SiC second well layer on the C-plane of the first barrier layer of 4H-SiC.

[0103] Step S26: An n-type doped 4H-SiC second barrier layer is grown on the upper surface of the 3C-SiC second well layer, and a Si surface is epitaxially grown on the upper surface of the 4H-SiC second barrier layer.

[0104] Step S27: Grow an unintentionally doped 3C-SiC cap layer on the Si surface of the second barrier layer of 4H-SiC;

[0105] Step S28: Fabricate electrodes and a protective film to obtain a normally closed dual-channel HEMT with a 3C-SiC / 4H-SiC heterostructure.

[0106] It should be noted that the specific process of step S21 is the same as that of step S11 in Embodiment 1 of the present invention; the specific process of step S22 is the same as that of step S12 in Embodiment 1 of the present invention; the specific processes of steps S23 and S25 are the same as that of step S13 in Embodiment 1 of the present invention; the specific process of step S24 is similar to that of step S12 in Embodiment 1 of the present invention, except that the thickness of the 4H-SiC first barrier layer is thinner than the thickness of the 4H-SiC transition layer; the specific process of step S26 is the same as that of step S14 in Embodiment 1 of the present invention; the specific process of step S27 is the same as that of step S15 in Embodiment 1 of the present invention; and the specific process of step S28 is the same as that of step S16 in Embodiment 1 of the present invention. For details, please refer to the relevant content of the preparation method of SiC heterostructure normally closed single-channel HEMT in Embodiment 1 of the present invention, which will not be repeated here.

[0107] Corresponding to the preparation method of the SiC heterostructure normally closed dual-channel HEMT in Embodiment 2 of the present invention, Embodiment 2 of the present invention also provides a SiC heterostructure normally closed dual-channel HEMT, which is prepared using the preparation method of the SiC heterostructure normally closed dual-channel HEMT in Embodiment 2 of the present invention. The specific preparation method will not be described in detail here, and the specific structural cross-sectional view can be found in [reference needed]. Figure 4 As shown.

[0108] In Example 2, the specific parameters of the SiC heterostructure normally closed dual-channel HEMT are shown in Table 1 below:

[0109] Table 1

[0110]

[0111] The structure and working principle of normally closed single- and dual-channel HEMTs with 3C-SiC / 4H-SiC heterostructures according to embodiments of the present invention are described in detail below:

[0112] This invention utilizes the spontaneous polarization effect of 4H-SiC to construct two SiC heterostructures: 3C-SiC / 4H-SiC (Si facet) and 3C-SiC / 4H-SiC (C facet) (see appendix). Figure 2 and Figure 4(As shown). In this process, the heterostructure interface on the Si surface generates a two-dimensional electron gas 2DHG, and the heterostructure interface on the C surface excites a two-dimensional hole gas 2DEG. The 2DHG enables the normally closed function of the HEMT, and the 2DEG forms a conductive channel connecting the source (S) and drain (D) electrodes.

[0113] exist Figure 2 and Figure 4 In the middle, when the voltage (V) of the left gate (G) of the device g ) higher than the threshold voltage (V th Afterwards, a negative interface charge is formed between the gate oxide (insulating layer) / semiconductor (3C-SiC, 4H-SiC) heterojunction, constructing a conductive channel between the source (S) electrode, the SiC / 4H-SiC (C-side) heterojunction 2DEG lateral channel, and the drain (D) electrode. When V g <V th At this time, the 2DHG located in the 3C-SiC / 4H-SiC (Si face) heterojunction can deplete the interface negative charge between the source and the 2DEG channel of the SiC / 4H-SiC (C face) heterojunction, cutting off the longitudinal conductive channel at the gate oxide / semiconductor heterojunction interface, realizing the normally closed (normally off) function of the HEMT, ensuring the HEMT is turned off and operates reliably. If V is gradually increased... g Due to the electric field, the 2DHG at the oxide / semiconductor interface is displaced, and instead, a high concentration of negative charges (electrons) is attracted and accumulated at this interface, forming a longitudinal conductive channel. When the voltage between the drain and source (V... ds When the voltage is greater than 0, electrons injected from the source enter the 2DEG channel through the longitudinal conduction channel, are attracted to the drain by the drain electric field, and the HEMT enters the conduction state. At V... g <V th In the blocking state, the 2DHG at the 3C / 4H-SiC (Si facet) heterostructure interface is extracted by the source, resulting in a fixed negative polarization charge at this interface according to the requirement of charge neutrality; conversely, the 2DEG at the 3C / 4H-SiC (C facet) heterostructure interface is attracted by the drain, leaving a fixed positive polarization charge at this interface according to the requirement of charge neutrality. These fixed positive and negative polarization charges form a uniform electric field, effectively suppressing the voltage (V) between the drain and source. ds The electric field concentration effect near the drain and source improves the lateral electric field distribution in the drift region between the drain and source, increases the average electric field strength in this region, and thus improves the breakdown voltage of HEMT.

[0114] Furthermore, the 2DHG at the 3C-SiC / 4H-SiC (Si facet) heterostructure interface can suppress the drain-induced barrier reduction effect caused by the increase in drain voltage. In conventional HEMTs, as the drain voltage increases, the source barrier height decreases, and the number of electrons injected from the source into the channel increases significantly, leading to an increase in drain current and premature breakdown of the HEMT. In the HEMT of this invention, the 2DHG increases the conduction band barrier height of the heterostructure below the source, hindering electron injection from the source into the channel, effectively suppressing the drain-induced barrier reduction effect and improving the breakdown voltage of the device. Moreover, the gate thickness of the HEMT of this invention has a weak effect on the drain-induced barrier reduction effect, thus reducing the lateral dimensions of the HEMT of this invention.

[0115] Furthermore, the source acts as a floating field plate, reducing the electric field peak at the gate edge and inducing a new electric field spike at the right end of the source. Therefore, the positive and negative polarized charges fixed at the 3C / 4H-SiC (C-side) and 3C / 4H-SiC (Si-side) interfaces, together with the source, enhance the lateral electric field of the HEMT of this invention, thereby increasing the breakdown voltage of the HEMT. Moreover, N-type polarization is introduced below the source. + By using heavily doped regions to reduce the conduction band barrier height of the heterojunction where 2DHG is located, and adjusting the 2DHG concentration, the threshold voltage (V) of the HEMT of this invention is reduced. th N + Doping concentration (N) in the type region m The higher the concentration of 2DHG below the source, the lower the V of the device. th The smaller.

[0116] Change the doping concentration N of the heavily doped region under the source m Simulations of the band structure of oxide / semiconductor heterojunctions in single- and dual-channel HEMTs, considering gate oxide thickness and the selection of different oxide materials and gate voltages, are as follows: Figure 5 As shown.

[0117] Figure 5 For V g =0V, V d =1V,t b =25nm, t c A schematic diagram of the band structure of the oxide / semiconductor interface (x = 511 nm, 0 ≤ y ≤ 100 nm) of a normally closed single-channel HEMT with a 3C / 4H-SiC heterostructure at 25 nm. Wherein, CB and VB are the conduction band and valence band, respectively; (a) is the N... + Type doped region concentration N m Different scenarios; (b) is the Al2O3 thickness L under the gate. g (c) Cases where the oxides under the gate are different; (d) Cases where the V values ​​are different. gThe conduction band structure of the oxide / semiconductor interface in a dual-channel HEMT.

[0118] exist Figure 5 In single-channel HEMTs, the conduction bands of the 3C-SiC / 4H-SiC (C-face) isomorphism at y1 = 50 nm and the 3C-SiC / 4H-SiC (C-face) isomorphism at y1 = 50 nm and y2 = 75 nm in dual-channel HEMTs are both below the Fermi level E. F =0 eV indicates the presence of electrons; in both single- and dual-channel HEMTs, the valence band at y0 = 25 nm in the 3C-SiC / 4H-SiC (Si plane) isomer is higher than E. F This indicates the presence of holes. If only the doping concentration N is changed... m Conductor band, valence band, etc. Figure 5 As shown in (a), the gate oxide is HfO2 with a thickness of L. g =10nm. When N m =1.0×10 16 cm -3 Threshold voltage V at time th =2.99V, when N m =1.0×10 17 cm -3 V at time th =2.97V, when N m =1.0×10 18 cm -3 V at time th =2.88V, when N m =1.0×10 19 cm -3 V at time th =1.81V. Because this region is N + With type N doping, the surface potential at the bottom of this region (y = 25 nm) decreases, thus causing the energy band of the 3C / 4H-SiC heterostructure interface near this region to increase with the doping concentration N. m The value decreases as the energy band increases; of course, the effect of doping on the energy band further away from this location gradually weakens, such as... Figure 5 As shown in (a).

[0119] If only the gate oxide thickness is changed, the conduction band and valence band will be affected. Figure 5 As shown in (b), the gate oxide is HfO2, N m =1.0×10 18 cm -3 When L g =5nm V th =2.71V, when L g =10nm V th =2.88V, when L g=15nm V th =2.95V, when L g =20nm V th = 3.11V. For the same oxide insulating layer, the thicker the layer, the higher the voltage it shares, and the higher the voltage required to regulate the channel. th The higher.

[0120] If different oxide insulating materials are chosen, the conductive strip and valence strip will differ as follows: Figure 5 As shown in (c), the L of each oxide g =10nm, N m =1.0×10 18 cm -3 The relative permittivity of SiO2, Al2O3, and HfO2 are ε, respectively. r =3.9, 9.0, 25.0. Use high k (or ε) r The dielectric material is beneficial for improving the electric field of oxide / semiconductor heterojunctions [JFDu, et al., Electronics Letters, Vol. 51(2015): 104–106.], therefore ε r The higher the V th The lower. Figure 5 In (c), when the oxide is SiO2, V th = 3.09V, when the oxide is Al2O3, V th = 2.88V, when the oxide is HfO2, V th =2.69V. In Figure 5 In (d), the gate forward voltage V g The higher the value, the lower the conduction band energy of the oxide / semiconductor heterojunction.

[0121] Electron and hole distributions in normally closed single- and double-channel HEMTs of 3C / 4H-SiC heterostructures under different conditions are as follows: Figure 6 As shown. Figure 6 (a) is V g At 0V, there is no electron distribution at the oxide / semiconductor vertical interface in a single-channel HEMT, i.e., there is no vertical channel. Figure 6 (b) is V g = 5V, there is an electron distribution at the oxide / semiconductor vertical interface in a single-channel HEMT, i.e., there is a vertical channel. The inset on the right is a schematic diagram of the electron concentration in the device. Figure 6 (c) is V g At 5V, there is an electron distribution at the oxide / semiconductor vertical interface in a dual-channel HEMT, i.e., there is a vertical channel. The inset on the right is a schematic diagram of the electron concentration in the device.

[0122] The influence of fixed positive and negative polarization charges at the interfaces of 3C-SiC / 4H-SiC (C-face) and 3C-SiC / 4H-SiC (Si-face) heterostructures on the potential distribution within a normally closed single-channel HEMT of SiC heterostructures, such as... Figure 7 As shown. Ignoring this effect, the equipotential lines become increasingly denser laterally from the source to the drain, as... Figure 7 As shown in (a), the electric field strength increases as the electrode approaches the drain, making breakdown more likely and resulting in lower breakdown voltage. Considering this effect, the 2DEG at the 3C-SiC / 4H-SiC (C-side) heterostructure is attracted to the drain, leaving a fixed positive polarization charge; the 2DHG at the 3C-SiC / 4H-SiC (Si-side) heterostructure is transferred to the lower potential source, leaving a fixed negative polarization charge. The electric field generated by the fixed positive and negative polarization charges is vertically upward, superimposed on the transverse electric field generated by the voltage between the source and drain, causing the total electric field between the source and drain to tend to be uniform. The equipotential line distribution is much more uniform than in the case where the fixed positive and negative polarization charges are not considered, such as... Figure 7 As shown in (b). Therefore, considering the effects of fixed positive and negative polarization charges, the local accumulation of the transverse electric field near the drain is significantly reduced, thereby increasing the device's breakdown voltage (V). B ).

[0123] 3C-SiC cap thickness (t) c The effect of changes on the performance of SiC heterostructure normally closed single-channel HEMTs is as follows: Figure 8 As shown. In Figure 8 China V g =5V,t b =25nm,t go =10nm, N m =1.0×10 18 cm -3 With t c Increasing the concentration of 2DHG helps to form more 2DHG in the 3C-SiC / 4H-SiC (Si face) isomer and gradually saturate it. When the 2DEG and 2DHG at the interface of the 3C-SiC / 4H-SiC (C face) and 3C-SiC / 4H-SiC (Si face) isomers are depleted, more fixed positive and negative polarization charges remain according to the requirement of electroneutrality. This helps to enhance the electric field between the 3C-SiC / 4H-SiC (C face) and 3C-SiC / 4H-SiC (Si face) isomers, such as... Figure 8 As shown in (a), the depletion region between the gate and drain can be expanded, increasing the breakdown voltage of the HEMT until saturation. However, increasing the 2DHG concentration can enhance the depletion of 2DEG at the 3C-SiC / 4H-SiC (C-side) heterostructure interface, leading to a decrease in 2DEG concentration, as shown in (a). Figure 8 As shown in (d), this causes the drain current (I)d ) decrease, such as Figure 8 As shown in (b) and (c).

[0124] 3C-SiC potential well layer thickness (t) w The effect of changes on the performance of SiC heterostructure normally closed single-channel HEMTs is as follows: Figure 9 As shown. In Figure 9 China V g =5V,t b =25nm,t c =25nm,t go =10nm, N m =1.0×10 18 cm -3 With t w Increasing the concentration of 2DHG at the 3C-SiC / 4H-SiC (Si facet) isomer helps to form more 2DHG and gradually saturate it. When the 2DEG at the interface of the 3C-SiC / 4H-SiC (C facet) is depleted, more fixed positive polarization charge remains according to the requirement of electroneutrality, which helps to enhance the electric field between the 3C-SiC / 4H-SiC (C facet) and 3C-SiC / 4H-SiC (Si facet) isomers, such as... Figure 9 As shown in (a). This can extend the depletion region between the gate and drain and increase the breakdown voltage of the HEMT until saturation, as... Figure 9 As shown in (c). However, increasing the 2DHG concentration can enhance the depletion of 2DEG at the 3C-SiC / 4H-SiC (C-face) heterostructure interface, leading to a decrease in the 2DEG concentration, as shown in (c). Figure 9 As shown in (d), this causes the drain current (I) d ) decrease, such as Figure 9 As shown in (b) and (c).

[0125] 4H-SiC barrier layer thickness (t) b The effect of changes on the performance of SiC heterostructure normally closed single-channel HEMTs is as follows: Figure 10 As shown. In Figure 10 China V g =5V,t c =25nm,t go =10nm, N m =1.0×10 18 cm -3 With t b As the concentration of 4H-SiC increases, the spontaneous polarization effect of 4H-SiC is enhanced and reaches saturation. The concentration of 2DHG at the interface of the 3C-SiC / 4H-SiC (Si facet) heterostructure increases slightly until saturation, which can assist in the depletion of the drift region between the gate and drain. On the other hand, increasing t bIt is equivalent to increasing the distance between the positive and negative fixed polarization charges corresponding to the 3C-SiC / 4H-SiC (C-plane) heterojunction and the 3C-SiC / 4H-SiC (Si-plane) heterojunction interfaces respectively, which will weaken the electric field therein. Therefore, the electric field in the drift region between the gate and the drain remains basically unchanged, as Figure 10 (a) shows; it can be seen that the breakdown voltage of the HEMT increases slightly and gradually saturates. On the other hand, the increase in the 2DHG concentration can enhance the depletion of the 2DEG at the 3C-SiC / 4H-SiC (C-plane) heterojunction interface, resulting in a decrease in the 2DEG concentration, as Figure 10 (d) shows, causing a decrease in the drain current, as Figure 10 (b), (c) show.

[0126] The influence of the P-type doping concentration (P b ) of the barrier layer 4H-SiC on the performance of the SiC heterojunction normally-off single-channel HEMT is as Figure 11 shown. As P b increases, it helps to enhance the spontaneous polarization effect of 4H-SiC (Si-plane), increases the 2DHG concentration at the 3C-SiC / 4H-SiC (Si-plane) heterojunction interface, and enhances the depletion of carriers in the vertical conduction channels near both ends of the 2DHG channel. At the same time, when increasing P b , according to the requirement of electrical neutrality, more fixed positive and negative polarization charges will be left at the 3C-SiC / 4H-SiC (C-plane) and 3C-SiC / 4H-SiC (Si-plane) heterojunction interfaces, which helps to enhance the electric field between these two heterojunction interfaces, as Figure 11 (a) shows, and can improve the breakdown voltage of the HEMT, as Figure 11 (c) shows. On the other hand, as P b increases, it causes the electron concentration in the vertical channel 4H-SiC barrier layer segment (25 nm < y < 50 nm) in the device's on state to decrease, and finally causes a decrease in the drain current, as Figure 11 (b), (d) show.

[0127] The influence of the gate thickness L g and height t g on the breakdown voltage (V B ) and specific on-resistance (R on,sp ) of the SiC heterojunction normally-off double-channel HEMT is as Figure 12 shown. It is found from the figure that R on,sp slightly increases as L g increases, which is due to the fact that the length of the longitudinal conduction channel is not affected by the change of L g . In addition, the drain-induced barrier lowering effect of the double-channel HEMT is suppressed, and its V B varies weakly with L g , as Figure 12 As shown in (a). If t g If the gate size is too small, the gate is too short to completely cover the two heterojunctions and it is difficult to achieve two effective conductive channels, so I d Smaller and R on,sp Larger; if t g Increase, the gate lengthens until it completely covers the two heterojunctions to form two effective conductive channels, I d Increase until saturation, R on,sp Reduce to a stable state, such as Figure 12 As shown in (b).

[0128] The transfer and output characteristics of single-channel and dual-channel HEMTs are as follows: Figure 13 As shown, the admittance (g) m ) can be accessed via I d For V g It is obtained by differentiation. With the positive V... g Upgrade to V th Above, as more and more electrons are attracted and accumulate in the vertical channel of the oxide / semiconductor heterojunction, the HEMT begins to function normally, and when V g After reaching a certain value, due to the saturation of electron accumulation in the vertical channels at the sidewalls of the HEMT, the It d The value remains basically unchanged, such as Figure 13 As shown. With V d As the current gradually increases, the channel carrier drift velocity accelerates, and the drain current (I) increases. d ) increases rapidly; when V d When the number of carriers in the 2DEG channel increases to a certain level, the drift velocity reaches saturation. d Gradually stabilized, no longer fluctuating with V d Increase as it rises. Comparison Figure 13 As can be seen from (a) and (c), (b) and (d) in the diagram, under the same operating conditions, the g of the dual-channel device... m I d It is approximately twice the value of the corresponding single-channel device. This is because dual-channel devices have two conductive channels, and the total 2DEG concentration is approximately twice the value of the corresponding single-channel device.

[0129] The specific on-resistance (R) of the HEMT of this invention on,sp Small, breakdown voltage (V) B High efficiency. In the HEMT of this invention, because the source and drain are on the same side of the gate, the lateral dimension of the device is effectively reduced; at the same time, the HEMT of this invention uses 3C-SiC as the potential well layer, in which the mobility of 2DEG is higher than that of 4H-SiC, especially the SiC heterojunction dual-channel HEMT of this invention, its R on,spThe values ​​are smaller than those in the literature [Zhou Q, et al., IEEE Trans Electron Devices, Vol. 60 (2013): 1075-1081; Xiong JY, et al., Science China Information Sciences, Vol. 59 (2016): 042410; Yang C, et al., Superlattice & Microstructures, Vol. 92 (2016): 92-99; Yang C, et al., Science China Information Sciences, Vol. 61 (2018): 062402.]. On the other hand, it is precisely because the band gap of 3C-SiC and 4H-SiC used in the HEMT of this invention is much larger than that of Si that its breakdown voltage is very high. For power devices, at the same voltage level, the device's R on,sp The smaller the value, the larger the power quality factor (FOM). The FOM values ​​of the single-channel and dual-channel HEMTs of this invention are 2.58 MW / mm². 2 4.36MW / mm 2 V B With R on,sp A good compromise between them.

[0130] In summary, the SiC heterojunction HEMT of this invention is a normally closed (normally off) device with a relatively high breakdown voltage and a threshold voltage (V). th The low on-resistance and low specific resistance result in high reliability. Furthermore, the reduced lateral dimensions of the device facilitate improved integration density and design freedom in power integrated circuits. The lattice constants and thermal conductivity of different crystals in SiC heterostructures are not significantly different, and the piezoelectric polarization effect at the heterostructure interface can be ignored, simplifying parameter control. Different SiC crystal forms share the same chemical properties, eliminating cross-diffusion contamination between chemical components during device fabrication and ensuring stable performance.

[0131] Implementing the embodiments of the present invention has the following beneficial effects:

[0132] Compared with traditional GaN-based heterojunction normally closed HEMTs, the elements on both sides of the heterojunction interface in the SiC heterojunction single and dual-channel HEMTs of this invention are the same (both are Si and C), which makes there is no diffusion contamination on both sides of the heterojunction interface, reduces process complexity, and improves device performance.

[0133] The above description is merely a preferred embodiment of the present invention and should not be construed as limiting the scope of the invention. Therefore, any equivalent variations made in accordance with the claims of the present invention are still within the scope of the present invention.

Claims

1. A method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT), characterized in that, Includes the following steps: S11. Select an unintentionally doped n-type 4H-SiC wafer as the substrate; S12. A 4H-SiC transition layer isomorphically epitaxially grown on the upper surface of the substrate, and a C-plane is epitaxially grown on the upper surface of the 4H-SiC transition layer. S13. An unintentionally doped 3C-SiC potential well layer is grown on the C-plane of the 4H-SiC transition layer. S14. An n-type doped 4H-SiC barrier layer is grown on the upper surface of the 3C-SiC well layer, and a Si surface is epitaxially grown on the upper surface of the 4H-SiC barrier layer. S15. An unintentionally doped 3C-SiC cap layer is grown on the Si surface of the 4H-SiC barrier layer. S16. Electrodes and protective films are fabricated to obtain a normally closed single-channel high electron mobility transistor with a 3C-SiC / 4H-SiC heterostructure.

2. The method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT) as described in claim 1, characterized in that, Step S11 specifically involves: Using an unintentionally doped n-type 4H-SiC wafer at a certain angle to the positive or negative axis as a substrate, hot-wall chemical vapor deposition (HWCVD) technology is selected, and hydrogen is used to etch the growth surface of the 4H-SiC wafer in the reaction chamber of the hot-wall chemical vapor deposition (HWCVD) system at a first predetermined temperature and pressure to remove dangling bonds, surface scratches and contaminants.

3. The method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT) as described in claim 2, characterized in that, Step S12 specifically involves: In the reaction chamber of the hot-wall chemical vapor deposition (HWCVD) system at the first predetermined temperature and pressure, a 4H-SiC transition layer with the same crystal structure as the substrate is isomorphically epitaxially grown on the growth surface etched on the substrate using a first mixed gas containing silane (SiH4), propane (C3H8), hydrogen (H2), and doped phosphine (PH3). A C-plane is then epitaxially grown on the upper surface of the 4H-SiC transition layer. When the thickness of the 4H-SiC transition layer reaches the first preset thickness, the silane (SiH4), propane (C3H8), and dopant phosphine (PH3) in the first mixed gas are turned off, and hydrogen (H2) is used to continue etching the surface of the 4H-SiC transition layer.

4. The method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT) as described in claim 3, characterized in that, Step S13 specifically involves: In the reaction chamber of a hot-wall chemical vapor deposition (HWCVD) system at a second predetermined temperature and pressure, an unintentionally doped 3C-SiC potential well layer is grown in a three-dimensional island shape on the C-surface of the 4H-SiC transition layer by a second mixed gas containing silane (SiH4), propane (C3H8), and hydrogen (H2). When the thickness of the 3C-SiC potential well layer reaches the second preset thickness, the silane (SiH4) and propane (C3H8) in the second mixed gas are turned off, and hydrogen (H2) is used to continue etching the surface of the 3C-SiC potential well layer. The 3C-SiC potential well layer and the C-plane 4H-SiC transition layer form a SiC heterostructure interface, which excites a two-dimensional electron gas 2DEG.

5. The method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT) as described in claim 4, characterized in that, Step S14 specifically involves: In the reaction chamber of the hot-wall chemical vapor deposition (HWCVD) system based on the first predetermined temperature and the predetermined pressure, an n-type doped 4H-SiC barrier layer is grown by two-dimensional step flow through the first mixed gas on the upper surface of the 3C-SiC potential well layer, and a Si surface is epitaxially grown on the upper surface of the 4H-SiC barrier layer. When the thickness of the 4H-SiC barrier layer reaches the third preset thickness, the silane (SiH4), propane (C3H8) and phosphine (PH3) in the first mixed gas are turned off, and hydrogen (H2) is used to continue etching the surface of the 4H-SiC barrier layer.

6. The method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT) as described in claim 5, characterized in that, Step S15 specifically involves: In the reaction chamber of the hot-wall chemical vapor deposition (HWCVD) system based on the second predetermined temperature and the predetermined pressure, an unintentionally doped 3C-SiC cap layer is grown in three dimensions on the Si surface of the 4H-SiC barrier layer using the second mixed gas. When the thickness of the 3C-SiC cap layer reaches the fourth preset thickness, the silane (SiH4) and propane (C3H8) in the second mixed gas are turned off, and hydrogen (H2) is used to continue etching the surface of the 3C-SiC cap layer. The 3C-SiC cap layer and the Si-faced 4H-SiC barrier layer form a SiC heterostructure interface, which excites two-dimensional hole gas 2DHG.

7. The method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT) as described in claim 6, characterized in that, Step S16 specifically involves: Using inductively coupled plasma (ICP) etching, gate grooves for forming longitudinal conduction channels and drain grooves for achieving ohmic contact between the drain and the two-dimensional electron gas (2DEG) lateral conduction channel are respectively fabricated on both sides of the multilayer SiC heterostructure. The multilayer SiC heterostructure is composed of a SiC heterostructure formed by the 4H-SiC transition layer and the 3C-SiC well layer, and a SiC heterostructure formed by the 4H-SiC barrier layer and the 3C-SiC cap layer. Phosphorus (P) ions are implanted into the 3C-SiC cap layer below the source electrode using an ion implantation process to form an N-type ion for adjusting the threshold voltage of the HEMT. + The multilayer SiC heterostructure on the left side of the drain is doped with P ions to form an N-type doped region for ohmic linking of the two-dimensional electrical (2DEG) lateral conduction channel to the drain. + Type-doped regions; Using electron beam evaporation technology, in the N + Alloy films are deposited in the doped regions to form ohmic contact source and drain electrodes; An electron beam evaporation process is used to deposit an insulating gate dielectric in the gate groove, followed by the deposition of a Schottky metal gate; wherein the insulating gate dielectric is one of SiO2, Al2O3, HfO2, or La2O3; A protective layer is formed by coating the outside of the multilayer SiC heterostructure using a coating technique. A light-shielding layer is coated on the outside of the protective layer to prevent light from shining from the side and affecting the device performance.

8. A method for fabricating a silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT), characterized in that, Includes the following steps: S21. Select an unintentionally doped n-type 4H-SiC wafer as the substrate; S22. An isomorphically epitaxial 4H-SiC transition layer is grown on the upper surface of the substrate, and a C-plane is epitaxially grown on the upper surface of the 4H-SiC transition layer. S23. An unintentionally doped 3C-SiC first potential well layer is grown on the C-plane of the 4H-SiC transition layer; S24. An n-type doped 4H-SiC first barrier layer is grown on the upper surface of the 3C-SiC first well layer, and a C-face is epitaxially grown on the upper surface of the 4H-SiC first barrier layer. S25. An unintentionally doped 3C-SiC second well layer is grown on the C-plane of the first barrier layer of 4H-SiC. S26. An n-type doped 4H-SiC second barrier layer is grown on the upper surface of the 3C-SiC second well layer, and a Si surface is epitaxially grown on the upper surface of the 4H-SiC second barrier layer. S27. An unintentionally doped 3C-SiC cap layer is grown on the Si surface of the second barrier layer of 4H-SiC. S28. Electrodes and protective films are fabricated to obtain a normally closed dual-channel high electron mobility transistor with a 3C-SiC / 4H-SiC heterostructure.

9. A silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT), characterized in that, It is fabricated using the method for fabricating silicon carbide (SiC) heterostructure normally closed high electron mobility transistors (HEMTs) as described in any one of claims 1-7.

10. A silicon carbide (SiC) heterostructure normally closed high electron mobility transistor (HEMT), characterized in that, It is fabricated using the method for fabricating silicon carbide (SiC) heterostructure normally closed high electron mobility transistors (HEMTs) as described in claim 8.

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