Power module and display device

Abstract

The embodiment of the present application discloses a power module, comprising a power module, a power management system and a step-down conversion circuit, the power module is used for outputting a power voltage, the power management system is electrically connected with the power module, and the power management system receives the power voltage and converts it into a first group of driving voltages; the step-down conversion circuit is electrically connected with the power module, and receives the power voltage and converts it into a second group of driving voltages, the second group of driving voltages is smaller than the power voltage, by independently setting the step-down conversion circuit, and making the step-down conversion circuit provide the second group of driving voltages for a time sequence control circuit, the load of the power management system is effectively reduced, the heat generation of the power management system is reduced, and the temperature rise phenomenon of the power module caused by heat generation is effectively controlled. The embodiment of the present application also discloses a display device comprising the foregoing power module.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to power modules and display devices. Background Technology

[0002] With the development of display technology, display devices are gradually moving towards larger sizes and higher refresh rates. The larger the size of the display panel, the greater the load on the power management system that provides the driving voltage to the display panel. When a large-size, high-refresh-rate display panel displays images, the excessive load on the power management system can cause its temperature to rise too high, easily exceeding the operating temperature limit of the power management system. This can lead to the power management system entering a protection state, causing the display panel to go into standby mode.

[0003] Currently, the usual method is to add a heat dissipation device near the power management system to cool it down. However, this method affects the overall structure of the display device and increases its space occupation. Summary of the Invention

[0004] In view of the shortcomings of the prior art, this application provides a power module and display device that effectively reduces the heat generation of the power management system and has a small space occupation.

[0005] This application discloses a power module, including a power module, a power management system, and a buck converter circuit. The power module is used to output a power supply voltage. The power management system is electrically connected to the power module and receives the power supply voltage and converts it into a first set of driving voltages. The buck converter circuit is electrically connected to the power module and receives the power supply voltage and converts it into a second set of driving voltages, where the second set of driving voltages is less than the power supply voltage.

[0006] Optionally, the buck converter circuit includes an enable unit and a buck unit. The enable unit is electrically connected to the buck unit. The enable unit receives the power supply voltage and outputs an enable signal to the buck unit based on the power supply voltage. The enable signal is used to start the buck unit to perform buck processing on the power supply voltage. The buck unit is used to buck process the power supply voltage and convert it into a second set of drive voltages.

[0007] Optionally, the buck converter circuit further includes a filtering and regulating unit and a voltage regulation feedback unit. The filtering and regulating unit is electrically connected to the buck unit and is used to receive the second set of driving voltages from the buck unit and perform filtering on the second set of driving voltages. The voltage regulation feedback unit is connected between the filtering and regulating unit and the ground terminal and is used to adjust the magnitude of the second set of driving voltages in the transmission line. Based on the adjusted second set of driving voltages, it outputs a feedback signal to the buck unit, and the buck unit adjusts the magnitude of the output second set of driving voltages based on the feedback signal.

[0008] Optionally, the buck converter circuit also includes an electrostatic discharge (ESD) protection unit, which is connected between the voltage regulation feedback unit and the ground terminal, and is used to perform ESD protection on the enable unit, buck unit, filter and voltage regulation unit and voltage regulation feedback unit connected in sequence.

[0009] Optionally, the enabling unit includes a first resistor, a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first terminal of the first resistor is connected to the power supply voltage, and the second terminal of the first resistor is connected to the step-down unit for dividing the power supply voltage. The first and second capacitors are connected in parallel between the power supply voltage and the ground terminal for filtering the power supply voltage. The third and fourth capacitors are connected in parallel between the second terminal and the ground terminal for filtering the power supply voltage after it has been divided by the first resistor, and are output as an enabling signal to the step-down unit.

[0010] Optionally, the step-down unit includes a first port, a second port, a third port, and a fourth port. The first port receives the power supply voltage. The second port is connected to the enable unit to receive an enable signal and to convert and output a second set of drive voltages when the enable signal is activated. The third port is connected to the voltage regulation feedback unit to receive a feedback signal. The step-down unit adjusts the magnitude of the second set of drive voltages according to the feedback signal. The fourth port is connected to the filter and voltage regulator unit, and the step-down unit outputs the second set of drive voltages to the filter and voltage regulator unit through the fourth port.

[0011] Optionally, the filtering and voltage regulation unit includes a fifth capacitor, a sixth capacitor, a second resistor, a third resistor, an inductor, and a first node. One end of the fifth capacitor is connected to the step-down unit, and the other end of the fifth capacitor is connected in series with the second resistor and the inductor, respectively, for receiving the second set of driving voltages from the step-down unit and filtering the second set of driving voltages. The first node is located between the second resistor and the inductor, and the third resistor and the sixth capacitor are connected in series between the first node and the ground terminal, for controlling the second set of driving voltages to stabilize within a preset range.

[0012] Optionally, the voltage regulation feedback unit includes a fourth resistor, a fifth resistor, a seventh capacitor, and a second node. The fourth and fifth resistors are connected in series between the filter and voltage regulator unit and the ground terminal to divide the second set of driving voltages output by the filter and voltage regulator unit. The seventh capacitor is connected in parallel with the fourth resistor to control the second set of driving voltages within a preset range. The second node is located between the fourth and fifth resistors and is connected to the third port of the step-down unit to output a feedback signal to the step-down unit based on the voltage division of the second set of driving voltages by the fifth resistor.

[0013] Optionally, the electrostatic discharge (ESD) protection unit includes an eighth capacitor, a ninth capacitor, a sixth resistor, and a diode. The eighth capacitor, the ninth capacitor, the sixth resistor, and the diode are connected in parallel between the voltage regulation feedback unit and the ground terminal to perform ESD protection on the enable unit, the buck unit, the filter and voltage regulation unit, and the voltage regulation feedback unit. At the same time, the eighth capacitor, the ninth capacitor, and the sixth capacitor are connected in parallel to perform filtering on the second set of drive voltages, and the diode is used to clamp the second set of drive voltages within a preset range.

[0014] This application also discloses a display device including a display module and the aforementioned power module. The display module includes a data driving circuit, a scan driving circuit, a timing control circuit, and a display panel. The data driving circuit, the scan driving circuit, and the display panel are connected to a power management system and are used to receive a first set of driving voltages from the power management system. The timing control circuit is connected to a buck converter circuit and receives a second set of driving voltages. Under the drive of the second set of driving voltages, it outputs a gate output control signal to the scan driving circuit and an output source output control signal to the data driving circuit. The data driving circuit outputs a data signal to the display panel based on the first set of driving voltages and the source output control signal. The scan driving circuit outputs a scan signal to the display panel based on the first set of driving voltages and the gate output control signal. The display panel displays an image based on the data signal and the scan signal.

[0015] Compared to existing technologies, by setting up a buck converter circuit independently of the power management system and making the buck converter circuit provide a second set of drive voltages for the timing control circuit, the load on the power management system is effectively reduced, the heat generated by the power management system is reduced, and the temperature rise of the power module caused by heat generation is effectively controlled. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of a display device provided in the first embodiment of this application;

[0018] Figure 2 for Figure 1 Internal circuit block diagram of the display device;

[0019] Figure 3 for Figure 2 A schematic diagram of the planar layout structure of the display module;

[0020] Figure 4 for Figure 2 Circuit block diagram of a step-down converter circuit;

[0021] Figure 5 for Figure 4 Equivalent circuit diagram of the step-down converter circuit;

[0022] Figure 6 This is a block diagram of the internal circuit of a display device provided in the first comparative embodiment of this application.

[0023] Explanation of reference numerals in the attached drawings: Display device-100, Display module-10, Power supply module-20, Support frame-30, Data drive circuit-11, Scan drive circuit-12, Display panel-13, Display area-13a, Timing control circuit-14, Pixel unit-15, First direction-F1, Second direction-F2, Data lines-S1~Sm, Scan lines-G1~Gn, Clock signal-CLK, Drive voltage-VDD, Power management system-21, Buck converter circuit-22, Power module-23, Data signal-Data, Clock signal-CLK, Horizontal synchronization signal-Hsyn, Vertical synchronization signal-Vsyn, Gate output control signal-Cg, Source Output control signal - Cs, enable unit - 221, buck unit - 222, filter and voltage regulation unit - 223, transmission line - N, voltage regulation feedback unit - 224, electrostatic protection unit - 225, first resistor - R1, first capacitor - C1, second capacitor - C2, third capacitor - C3, fourth capacitor - C4, first port - G1, second port - G2, third port - G3, fourth port - G4, fifth capacitor - C5, sixth capacitor - C6, second resistor - R2, third resistor - R3, inductor - L, fourth resistor - R4, fifth resistor - R5, seventh capacitor - C7, eighth capacitor - C8, ninth capacitor - C9, sixth resistor - R6, diode - D. Detailed Implementation

[0024] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.

[0025] The following descriptions of the embodiments are based on the accompanying illustrations and are used to illustrate specific embodiments in which this application can be implemented. The component designations used herein, such as "first," "second," etc., are merely for distinguishing the described objects and do not have any sequential or technical meaning. Unless otherwise specified, the terms "connection" and "linkage" used in this application include both direct and indirect connections (linkages). Directional terms used in this application, such as "up," "down," "front," "rear," "left," "right," "inner," "outer," "side," etc., are merely for reference to the accompanying drawings. Therefore, the use of directional terms is for better and clearer explanation and understanding of this application, and does not indicate or imply that the referred device or element must have a specific orientation, or be constructed and operated in a specific orientation; therefore, they should not be construed as limitations on this application.

[0026] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances. It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order.

[0027] Furthermore, the terms "comprising," "may include," "include," or "may include" used in this application indicate the presence of the corresponding functions, operations, elements, etc., disclosed, but do not limit the inclusion of one or more other functions, operations, elements, etc. Additionally, the terms "comprising" or "include" indicate the presence of the corresponding features, numbers, steps, operations, elements, components, or combinations thereof disclosed in the specification, but do not exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, and are intended to cover non-exclusive inclusion. Furthermore, when describing embodiments of this application, "may" is used to mean "one or more embodiments of this application." And the term "exemplary" is intended to refer to examples or illustrations.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0029] Please see Figure 1 , Figure 1This is a schematic diagram of the structure of a display device 100 according to the first embodiment of this application. The display device 100 includes a display module 10, a power module 20, and a support frame 30. The display module 10 and the power module 20 are fixed to the support frame 30. The power module 20 is disposed on the back of the display module 10, that is, the non-display surface of the display module 10. The power module 20 is used to provide power voltage for the display module 10 to display images. The support frame 30 provides fixation and protection for the display module 10 and the power module 20.

[0030] Please see Figure 2 , Figure 2 for Figure 1 Block diagram of the internal circuitry of the display device.

[0031] like Figure 2 As shown, the power module 20 is electrically connected to the display module 10, and is used to provide the display module 10 with a first set of driving voltages VDD1 and a second set of driving voltages VDD2. The power module 20 includes a power management system 21, a buck converter circuit 22, and a power module 23. The power management system 21 is electrically connected to the power module 23, and is used to receive the power supply voltage VCC from the power module 23 and convert it into the first set of driving voltages VDD1. The buck converter circuit 22 is electrically connected to the power module 23, and is used to receive the power supply voltage VCC and convert it into the second set of driving voltages VDD2, where the second set of driving voltages VDD2 is less than the power supply voltage VCC.

[0032] The display module 10 includes a data driving circuit 11, a scanning driving circuit 12, a display panel 13, and a timing control circuit 14.

[0033] The power management system 21 is electrically connected to the data driving circuit 11, the scan driving circuit 12, and the display panel 13, and is used to provide a first set of driving voltages VDD1 to the data driving circuit 11, the scan driving circuit 12, and the display panel 13. The data driving circuit 11 is driven by the first set of driving voltages VDD1 to output data signals to the display panel, and the scan driving circuit 12 outputs scan signals to the display panel 13 according to the first set of driving voltages VDD1 and the gate output control signal. The display panel 13 displays images according to the data signals and the scan signals.

[0034] The first set of driving voltages VDD1 includes data power signal, analog power signal, semi-analog voltage signal, gate high level signal, gate low level signal, common voltage, and ground voltage.

[0035] Specifically, the data power signal, analog power signal, and semi-analog voltage signal are output to the data driving circuit 11 to drive the data driving circuit 11 to output data signals to the pixel units in the display panel 13 to control the pixel units to display images. The common voltage is output to the display panel 13 to provide a reference voltage for the display panel 13. The reference voltage and the data voltage corresponding to the data signal in the pixel unit form an electric field to drive the liquid crystal in the pixel unit to deflect, thereby emitting light of a preset gray level.

[0036] The gate high-level signal and the gate low-level signal are output to the scan drive circuit 12. The scan drive circuit 12 outputs a scan signal to the pixel unit according to the gate high-level signal and the gate low-level signal, and controls the pixel unit to display the image in conjunction with the data signal.

[0037] The ground voltage is output to the data driving circuit 11, the scan driving circuit 12, and the display panel 13 to provide a low-voltage potential for them. In this embodiment, the low-voltage potential provided by the ground voltage can be 0V.

[0038] The timing control circuit 14 is electrically connected to the buck converter circuit 22 and receives the second set of driving voltages VDD2 from the buck converter circuit 22. Under the drive of the second set of driving voltages VDD2, the output source output control signal is sent to the data driving circuit 11 to control the data driving circuit 11 to output data signals, and the output gate output control signal is sent to the scan driving circuit 12 to control the scan driving circuit 12 to output scan signals.

[0039] In an exemplary embodiment, the power module 20 includes a first buck converter circuit and a second buck converter circuit. The first buck converter circuit and the second buck converter circuit are independently configured and each receives a second set of driving voltages VDD2 from the power module 23. The first buck converter circuit drives the timing control circuit 14 to operate according to the second set of driving voltages VDD2, and the second buck converter circuit outputs a semi-analog voltage signal to the data drive circuit 11 according to the second set of driving voltages VDD2, so as to drive the data drive circuit 11 to output a data signal. Of course, multiple buck converter circuits 22 can also be independently configured according to specific needs and each receive a second set of driving voltages VDD2 from the power module 23 to share the load of the power management system 21.

[0040] By setting the buck converter circuit 22 independently of the power management system to provide drive voltage for multiple functional modules in the display module 10, the load on the power management system is effectively reduced, thereby reducing the heat generation of the power management system.

[0041] Please see Figure 3 , Figure 3 for Figure 2The diagram shows the planar layout structure of module 10.

[0042] like Figure 3 As shown, the data driving circuit 11, the scan driving circuit 12, and the timing control circuit 14 are located in the non-display area of ​​the display panel 13.

[0043] The display area 13a of the display panel 13 has multiple data lines (Source lines) S1 to Sm and multiple scan lines (Gate lines) G1 to Gn arranged in a grid pattern. The scan lines G1 to Gn extend along a first direction F1, and the data lines S1 to Sm extend along a second direction F2. The first direction F1 and the second direction F2 are perpendicular to each other.

[0044] Pixel units 15 are provided at the alternation of multiple scan lines G1 to Gn and data lines S1 to Sm. In this embodiment, the pixel units 15 can be represented as P11 to P1m, P21 to P2m, ..., Pn1 to Pnm, respectively.

[0045] Scan lines G1 to Gn are connected to the scan drive circuit 12 and receive scan signals from the scan drive circuit 12. Data lines S1 to Sm are connected to the data drive circuit 11 and are used to receive data signals Data provided by the data drive circuit 11, which are stored and transmitted in the form of grayscale values.

[0046] Under the control of scan lines G1 to Gn, pixel unit 15 receives the grayscale value data voltage of the corresponding data signal Data provided by data lines S1 to Sm within a predetermined time period, and drives the liquid crystal layer (not shown) to deflect at a corresponding angle, thereby emitting light of corresponding brightness from the received backlight according to the corresponding deflection angle, so as to achieve image display by emitting light of corresponding brightness according to the image signal.

[0047] The timing control circuit 14 receives an image signal representing image information from the buck converter circuit 22, obtains a clock signal CLK for synchronization, a horizontal synchronization signal Hsyn, and a vertical synchronization signal Vsyn, and outputs a gate output control signal Cg for controlling the scan drive circuit 12, a source output control signal Cs for controlling the data drive circuit 11, and a data signal Data representing image information. In this embodiment, the timing control circuit 14 performs data adjustment processing on the original data signal to obtain the data signal Data, and then transmits the data signal Data to the data drive circuit 11.

[0048] The scan drive circuit 12 receives the gate output control signal Cg from the timing control circuit 14 and outputs scan signals to each scan line G1 to Gn. The data drive circuit 11 receives the source output control signal Cs from the timing control circuit 14 and outputs data signals Data to each data line S1 to Sm for image display by the driving elements in each pixel unit 15 in the display area 13a. The data signal Data provided to the display panel 13 is an analog grayscale voltage. The scan drive circuit 12 outputs scan signals to control the pixel unit 15 to receive the data signal Data output from the data drive circuit 11, thereby controlling the pixel unit 15 to display the corresponding image.

[0049] Please see Figure 4 , Figure 4 for Figure 2 The circuit block diagram of the step-down converter circuit.

[0050] like Figure 4 As shown, the buck converter circuit 22 includes an enable unit 221 and a buck unit 222. The enable unit 221 receives the power supply voltage VCC and outputs an enable signal EN to the buck unit 222 based on VCC. The enable signal EN is used to activate the buck unit 222 to perform a buck reduction process on the power supply voltage VCC. The buck unit 222 is used to step down the power supply voltage VCC and convert it into a second set of drive voltages VDD2. The buck unit 222 can be a BUCK integrated circuit.

[0051] The step-down unit 222 is connected to the transmission line N. The step-down unit 222 receives the enable signal EN from the enable unit 221 and outputs a second set of driving voltages VDD to the transmission line N, which then transmits the voltages to the preset functional module, i.e., the timing control circuit 14. The second set of driving voltages VDD2 is transmitted to the signal generation unit 141 and the signal receiving unit 142 in the timing control circuit 14. The signal generation unit 141 outputs a gate control signal to the scan driving circuit 12 and a source control signal to the data driving circuit 11 based on the second set of driving voltages VDD2. The signal receiving unit 142 receives external raw image signals based on the second set of driving voltages VDD2.

[0052] The buck converter circuit 22 also includes a filter and voltage regulation unit 223 and a voltage regulation feedback unit 224. The filter and voltage regulation unit 223 is connected to the buck unit 222 and is used to receive the second set of driving voltage VDD2 from the buck unit 222 and perform filtering processing on the second set of driving voltage VDD2 to filter out the ripple in the second set of driving voltage VDD2, so as to control the second set of driving voltage VDD2 output by the buck unit 222 to remain stable.

[0053] The voltage regulation feedback unit 224 is connected between the filter and voltage regulator unit 223 and the ground terminal E. It is used to adjust the magnitude of the second group of driving voltages VDD2 in the transmission line N and to output a feedback signal FB to the step-down unit 222 based on the adjusted second group of driving voltages VDD2. The step-down unit 222 adjusts the magnitude of the output second group of driving voltages VDD2 based on the feedback signal FB.

[0054] The step-down converter circuit 22 also includes an electrostatic discharge (ESD) protection unit 225, which is connected between the voltage regulation feedback unit 224 and the ground terminal E. When the transmission line N transmits the second set of driving voltage VDD2, the ESD protection unit 225 performs ESD protection on the enable unit 221, step-down unit 222, filter and voltage regulation unit 223 and voltage regulation feedback unit 224 connected in the transmission line N.

[0055] Please see Figure 5 , Figure 5 for Figure 4 The equivalent circuit diagram of the step-down converter circuit 22.

[0056] like Figure 5 As shown, the enable unit 221 includes a first resistor R1, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4. The first terminal CN1 of the first resistor R1 is connected to the power supply voltage VCC, and the second terminal CN2 is connected to the step-down unit 222. This step-down unit divides the power supply voltage VCC and transmits the divided power supply voltage VCC as an enable signal EN to the step-down unit 222. The first capacitor C1 and the second capacitor C2 are respectively connected between the power supply voltage VCC and the ground terminal E, used for filtering the power supply voltage VCC. The third capacitor C3 and the fourth capacitor C4 are connected in parallel between the second terminal CN2 and the ground terminal E, used for filtering the power supply voltage VCC after it has been divided by the first resistor R1. The enable unit 221 outputs the enable signal EN to the step-down unit 222 based on the power supply voltage VCC. The first resistor R1 can be 10KΩ, and the power supply voltage VCC can be 12V.

[0057] The step-down unit 222 includes a first port G1, a second port G2, a third port G3, and a fourth port G4. The first port G1 receives the power supply voltage VCC, serving as the ID port of the step-down unit 222. The second port G2 is connected to the enable unit 221 and receives the enable signal EN, used to convert and output the second set of drive voltage VDD2 when enabled by the enable signal EN. The third port G3 is connected to the voltage regulation feedback unit 224, used to adjust the magnitude of the second set of drive voltage VDD2 based on the feedback signal FB received by the self-regulating voltage feedback unit 224. The fourth port G4 is connected to the filter and voltage regulator unit 223, used to output the drive voltage VDD to the filter and voltage regulator unit 223.

[0058] The filtering and voltage regulation unit 223 includes a fifth capacitor C5, a sixth capacitor C6, a second resistor R2, a third resistor R3, and an inductor L. One end of the fifth capacitor C5 is connected to the step-down unit 222, and the other end of the fifth capacitor C5 is connected in series with the second resistor R2 and the inductor L. It is used to receive the second set of driving voltage VDD2 from the step-down unit 222 and filter the second set of driving voltage VDD2.

[0059] A first node Q1 is set between the second resistor R2 and the inductor L. The third resistor R3 and the sixth capacitor C6 are connected in series between the transmission line N and the first node Q1. One end of the third resistor R3 is connected between the second resistor R2 and the inductor L, and the other end of the third resistor R3 is connected to the sixth capacitor C6. This is used to control the second group of driving voltage VDD2 to stabilize within a preset range. The second resistor R2, the third resistor R3, the fifth capacitor C5, and the sixth capacitor C6 are used to control the received driving voltage VDD to tend to stabilize. The inductor L is used to perform filtering processing on the received driving voltage. When the current flowing through the inductor L increases, the self-induced electromotive force generated by the inductor L is opposite to the direction of the current to prevent the current from increasing. At the same time, some electrical energy is converted into magnetic field energy and stored in the inductor L. When the current flowing through the inductor L decreases, the self-induced electromotive force is in the same direction as the current to prevent the current from decreasing. At the same time, the stored energy is released to compensate for the decrease in current, so that the current and voltage waveforms filtered by the inductor L become smooth.

[0060] The voltage regulation feedback unit 224 includes a fourth resistor R4, a fifth resistor R5, and a seventh capacitor C7. The fourth resistor R4 and the fifth resistor R5 are connected in series between the filter and voltage regulator unit 223 and the ground terminal E, used to divide the second set of driving voltage VDD2 output by the filter and voltage regulator unit. The seventh capacitor C7 is connected in parallel with the fourth resistor R4, used to control the second set of driving voltage VDD2 within a preset range. The second node Q2 is located between the fourth resistor R4 and the fifth resistor R5, and is connected to the third port G3 of the buck converter 222, used to output a feedback signal FB to the buck converter 222 based on the voltage division of the second set of driving voltage VDD2 by the fifth resistor R5. The second set of driving voltage VDD2 output by the buck converter 22 can be controlled by controlling the resistance values ​​of the fourth resistor R4 and the fifth resistor R5, calculated as: VDD2 = 0.6 * (1 + R4 / R5), where 0.6 is a constant coefficient.

[0061] The electrostatic discharge (ESD) protection unit 225 includes an eighth capacitor C8, a ninth capacitor C9, a sixth resistor R6, and a diode D. The eighth capacitor, ninth capacitor C9, sixth resistor R6, and diode D are connected in parallel between the transmission line N and the ground terminal E to provide ESD protection for components connected to the transmission line N. Simultaneously, the eighth capacitor C8, ninth capacitor C9, and sixth capacitor C6 are connected in parallel to filter the second set of driving voltages VDD2. Diode D clamps the second set of driving voltages VDD2 within a preset range. Diode D is a transient voltage suppressor (TVS).

[0062] Please see Figure 6 , Figure 6 This is a block diagram of the internal circuitry of a display device provided in the first comparative embodiment of this application. Figure 6 As shown, the power supply module 20' is electrically connected to the display module 10 and is used to provide the display module 10 with a first set of driving voltages VDD1 and a second set of driving voltages VDD2.

[0063] The power module 20' includes a power management system 21 and a power module 23. The power management system 21 is electrically connected to the power module 23 and is used to receive the power supply voltage VCC from the power module 23 and convert it into a first set of driving voltages VDD1 and a second set of driving voltages VDD2.

[0064] The power management system 21 is electrically connected to the data driving circuit 11, the scan driving circuit 12, the display panel 13, and the timing control circuit 14. It outputs a first set of driving voltages VDD1 to the data driving circuit 11, the scan driving circuit 12, and the display panel 13, and outputs a second set of driving voltages VDD2 to the timing control circuit 14. In other words, the power management system 21 provides the driving voltage for image display to the display module 10.

[0065] Because the timing control circuit 14 needs to simultaneously output control signals to the data drive circuit 11 and the scan drive circuit 12 to control the data drive circuit 11 to output data signals and the scan drive circuit 12 to output scan signals, when the power management system 21 outputs the second set of drive voltage VDD2 to the timing control circuit 14, a large pump current is required to maintain the normal operation of the timing control circuit 14, resulting in a large load on the power management system 21. Furthermore, when the display panel 13 displays complex 4K videos or images, the load on the timing control circuit 14 increases, further increasing the pump current. At the same time, the power management system 21 also needs to provide drive voltage for the data drive circuit 11, the scan drive circuit 12, and the display panel 13, further increasing the load on the power management system 21 and causing the temperature to rise sharply. This can easily exceed the temperature threshold of the power management system 21, causing the power management system 21 to enter a protection state, which in turn causes the display panel 13 to stop displaying.

[0066] Compared to the power module 20' in the first comparative embodiment, this application... Figures 2-5 The power module 20 provided in the illustrated embodiment uses a separately configured buck converter circuit 22 to output a second set of drive voltage VDD2 to the timing control circuit 14. This effectively transfers the load of the power management system 21 to the buck converter circuit 22, reducing the load on the power management system 21 and its operating temperature. Since the buck converter circuit 22 only needs to provide drive voltage to the timing control circuit 14, its load remains within a controllable range, and its operating temperature is far below the temperature threshold, resulting in a lower overall temperature for the power module 20. Furthermore, the buck converter circuit 22 occupies little space and can be integrated into the power module 20 without altering its overall layout. Its production cost is also low, thus reducing the load and operating temperature of the power management system 21 while maintaining low cost. It should be understood that the application of this invention is not limited to the above examples. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A power supply module for providing power voltage to a display module for image display, characterized in that, The system includes a power module, a power management system, and a buck converter circuit. The power module outputs a power supply voltage. The power management system is electrically connected to the power module and the display module. The power management system receives the power supply voltage and converts it into a first set of driving voltages. The power management system provides the first set of driving voltages to a data driving circuit, a scan driving circuit, and a display panel. The data driving circuit outputs a data signal to the display panel based on the first set of driving voltages. The scan driving circuit outputs a scan signal to the display panel based on the first set of driving voltages and a gate output control signal. The display panel displays an image based on the data signal and the scan signal. The buck converter circuit is electrically connected to the power module and the display module. It receives the power supply voltage, converts it into a second set of driving voltages, and provides it to a timing control circuit in the display module. The power module also includes a first buck converter. The system includes a first buck converter circuit and a second buck converter circuit. The first buck converter circuit and the second buck converter circuit are independently configured and receive the second set of driving voltages respectively. The first buck converter circuit drives the timing control circuit according to the second set of driving voltages. Under the drive of the second set of driving voltages, the timing control circuit outputs a source output control signal to the data driving circuit to control the data driving circuit to output a data signal, and outputs a gate output control signal to the scan driving circuit to control the scan driving circuit to output a scan signal. The second buck converter circuit outputs a semi-analog voltage signal to the data driving circuit according to the second set of driving voltages to drive the data driving circuit to output the data signal. The second set of driving voltages is less than the power supply voltage. The buck converter circuit and the power management system are independently integrated and configured, and the first set of driving voltages and the second set of driving voltages are respectively provided to different loads.

2. The power supply module as described in claim 1, characterized in that, The buck converter circuit includes an enable unit and a buck unit. The enable unit is electrically connected to the buck unit. The enable unit receives the power supply voltage and outputs an enable signal to the buck unit based on the power supply voltage. The enable signal is used to start the buck unit to perform buck processing on the power supply voltage. The step-down unit is used to step down the power supply voltage and convert it into the second set of driving voltages.

3. The power module as described in claim 2, characterized in that, The buck converter circuit further includes a filtering and voltage regulation unit and a voltage regulation feedback unit. The filtering and voltage regulation unit is electrically connected to the buck unit and is used to receive the second set of driving voltages from the buck unit and perform filtering processing on the second set of driving voltages. The voltage regulation feedback unit is connected between the filter and voltage regulator unit and the ground terminal. It is used to adjust the magnitude of the second group of driving voltages in the transmission line and output a feedback signal to the step-down unit based on the adjusted second group of driving voltages. The step-down unit adjusts the magnitude of the output second group of driving voltages based on the feedback signal.

4. The power module as described in claim 3, characterized in that, The step-down converter circuit also includes an electrostatic discharge (ESD) protection unit, which is connected between the voltage regulation feedback unit and the ground terminal, and is used to perform ESD protection on the enable unit, the step-down unit, the filter and voltage regulation unit and the voltage regulation feedback unit connected in sequence.

5. The power supply module as described in claim 4, characterized in that, The enabling unit includes a first resistor, a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first terminal of the first resistor is connected to the power supply voltage, and the second terminal of the first resistor is connected to the step-down unit for dividing the power supply voltage. The first capacitor and the second capacitor are connected in parallel between the power supply voltage and the ground terminal for filtering the power supply voltage. The third capacitor and the fourth capacitor are connected in parallel between the second terminal and the ground terminal for filtering the power supply voltage after it has been divided by the first resistor, and are output as the enabling signal to the step-down unit.

6. The power module as described in claim 4 or 5, characterized in that, The step-down unit includes a first port, a second port, a third port, and a fourth port. The first port receives the power supply voltage. The second port is connected to the enable unit and is used to receive the enable signal and convert and output the second set of driving voltages when the enable signal is activated. The third port is connected to the voltage regulation feedback unit and is used to receive the feedback signal from the voltage regulation feedback unit. The step-down unit adjusts the magnitude of the second set of driving voltages according to the feedback signal. The fourth port is connected to the filter and voltage regulator unit, and the step-down unit outputs the second set of driving voltages to the filter and voltage regulator unit through the fourth port.

7. The power module as described in claim 6, characterized in that, The filtering and voltage regulation unit includes a fifth capacitor, a sixth capacitor, a second resistor, a third resistor, an inductor, and a first node. One end of the fifth capacitor is connected to the step-down unit, and the other end of the fifth capacitor is connected in series with the second resistor and the inductor in sequence. It is used to receive the second set of driving voltages from the step-down unit and to filter the second set of driving voltages. The first node is located between the second resistor and the inductor, and the third resistor and the sixth capacitor are connected in series between the first node and the ground terminal, which is used to control the second group of driving voltages to be stable within a preset range.

8. The power module as described in claim 7, characterized in that, The voltage regulation feedback unit includes a fourth resistor, a fifth resistor, a seventh capacitor, and a second node. The fourth resistor and the fifth resistor are connected in series between the filter and voltage regulator unit and the ground terminal, and are used to divide the second group of driving voltages output by the filter and voltage regulator unit. The seventh capacitor is connected in parallel with the fourth resistor and is used to control the second group of driving voltages to be within a preset range. The second node is located between the fourth resistor and the fifth resistor and is connected to the third port of the step-down unit, and is used to output the feedback signal to the step-down unit based on the voltage division of the second group of driving voltages by the fifth resistor.

9. The power supply module as described in claim 8, characterized in that, The electrostatic discharge (ESD) protection unit includes an eighth capacitor, a ninth capacitor, a sixth resistor, and a diode. The eighth capacitor, the ninth capacitor, the sixth resistor, and the diode are connected in parallel between the voltage regulation feedback unit and the ground terminal to perform ESD protection on the enabling unit, the buck unit, the filtering and regulating unit, and the voltage regulation feedback unit. At the same time, the eighth capacitor, the ninth capacitor, and the sixth capacitor are connected in parallel to perform filtering on the second group of driving voltages. The diode is used to clamp the second group of driving voltages within a preset range.

10. A display device, characterized in that, It includes a display module and a power module as described in any one of claims 1-9, wherein the display module includes a data driving circuit, a scan driving circuit, a timing control circuit, and a display panel; The data driving circuit, the scanning driving circuit and the display panel are connected to the power management system, and are used to receive the first set of driving voltages from the power management system; The timing control circuit is connected to the buck converter circuit and receives the second set of driving voltages. Under the drive of the second set of driving voltages, it outputs a gate control signal to the scan driving circuit and an outputs a source control signal to the data driving circuit. The data driving circuit outputs a data signal to the display panel based on the first set of driving voltages and the source output control signal. The scan driving circuit outputs a scan signal to the display panel based on the first set of driving voltages and the gate output control signal. The display panel displays an image based on the data signal and the scan signal.

Images