Wafer package and method of manufacturing the same

Abstract

The application discloses a wafer package and a manufacturing method thereof. The wafer package comprises a first wafer, a second wafer and an interconnection layer arranged between the first wafer and the second wafer. The interconnection layer comprises a carbon nanotube bundle frame and micro-nano metal filled in the carbon nanotube bundle frame. The wafer package can guarantee the connection strength between the two wafers and meet the conductivity and thermal conductivity requirements of the interconnection area between the wafers, so that the wafer package can meet the service requirements of high-power devices in harsher environments such as higher temperature and greater current density, and the reliability of the high-power devices is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and particularly relates to a wafer package and a manufacturing method thereof. BACKGROUND

[0002] Semiconductor power devices are developing towards miniaturization, integration, high power and multi-function. Under such a background, wafer level packaging emerges as the times require. Compared with traditional packaging, wafer level packaging has the characteristics of small packaging size, high transmission speed, high density connection, short production cycle and low process cost. With the gradual popularization of wafer level packaging in the fields of aerospace, power grid and high-speed rail, higher requirements are put forward for the reliability of wafer level packaging (WLP). Chip packaging and interconnection face higher challenges, such as greater connection strength, higher thermal and electrical conductivity, low-temperature connection and high-temperature service, and long-term reliability.

[0003] At present, the main packaging methods mainly include lead-free soldering and transient liquid phase connection. Among them, the melting point of the commonly used lead-free solder is relatively low, which cannot meet the characteristics of low-temperature connection and high-temperature service of high-power devices, and the interconnection layer formed by transient liquid phase connection has relatively low thermal conductivity and relatively high residual stress, so as to fail to provide an effective heat dissipation path and reliability for the power device.

[0004] Therefore, the prior art still needs to be improved and developed. SUMMARY

[0005] In view of the above problems in the prior art, the present application aims to provide a wafer package and a manufacturing method thereof, so as to solve the problem that the wafer package cannot provide an effective heat dissipation path and reliability for the power device.

[0006] The technical scheme of the present application is as follows:

[0007] A wafer package comprises a first wafer, a second wafer and an interconnection layer arranged between the first wafer and the second wafer; wherein the interconnection layer comprises a carbon nanotube bundle frame and micro-nano metal filled in the carbon nanotube bundle frame.

[0008] According to a further arrangement of the present application, the carbon nanotube bundle frame comprises a first carbon nanotube bundle and a second carbon nanotube bundle.

[0009] The first carbon nanotube bundle is arranged on the first wafer in a spaced manner.

[0010] The second carbon nanotube bundle is arranged on the second wafer in a spaced manner.

[0011] The first carbon nanotube bundle is inserted into the gap between the second carbon nanotube bundles to form the carbon nanotube bundle frame.

[0012] Further, the wafer package further comprises a first metal plating layer, and the first metal plating layer is arranged on the upper surface of the first wafer.

[0013] Further, the wafer package further comprises a first catalytic layer, and the first catalytic layer is arranged on the surface of the first metal plating layer.

[0014] Further, the wafer package further comprises a second metal plating layer, and the second metal plating layer is arranged on the upper surface of the second wafer.

[0015] Further, the wafer package further comprises a second catalytic layer, and the second catalytic layer is arranged on the surface of the second metal plating layer.

[0016] Further, the micro-nano metal is one or more of micro-nano gold, micro-nano silver or micro-nano copper, and the micro-nano metal is in the form of particles, blocks or sheets.

[0017] Further, the micro-nano metal is in the form of particles, and the size of the micro-nano metal is 5-5000 nanometers.

[0018] Based on the same inventive concept, the present application further provides a wafer package manufacturing method applied to the wafer package.

[0019] The first wafer and the second wafer are provided.

[0020] The carbon nanotube bundle frame is prepared between the first wafer and the second wafer.

[0021] The micro-nano metal sintering paste is filled into the carbon nanotube bundle frame based on capillary action.

[0022] After the excess micro-nano metal sintering paste is removed, the micro-nano metal is connected between the first wafer and the second wafer through heating treatment.

[0023] Further, the step of preparing the carbon nanotube bundle frame between the first wafer and the second wafer comprises:

[0024] The first carbon nanotube bundle is formed on the surface of the first wafer from bottom to top by using carbon-containing gas, and the second carbon nanotube bundle is formed on the surface of the second wafer from bottom to top by using carbon-containing gas.

[0025] connecting the first wafer and the second wafer together so that the first carbon nanotube bundle is inserted into the gap of the second carbon nanotube bundle and a carbon nanotube bundle frame is formed.

[0026] The wafer packaging manufacturing method further comprises, before the step of preparing the carbon nanotube bundle frame between the first wafer and the second wafer:

[0027] The bottom surface of the first wafer and the top surface of the second wafer are respectively subjected to a metal plating treatment so as to form a first metal plating layer on the bottom surface of the first wafer and a second metal plating layer on the top surface of the second wafer.

[0028] The wafer packaging manufacturing method further comprises:

[0029] A first catalytic layer is formed on the first metal plating layer by using a catalyst and through deposition, and a second catalytic layer is formed on the second metal plating layer by using a catalyst and through deposition.

[0030] The wafer packaging manufacturing method further comprises, after the step of preparing the carbon nanotube bundle frame between the first wafer and the second wafer:

[0031] The first wafer and the second wafer connected by the carbon nanotube bundle frame are placed in a vacuum cavity or a cavity with a reducing gas;

[0032] The wafer packaging manufacturing method further comprises, after the step of removing the excess micro-nano metal sintering paste and heating to connect the micro-nano metal between the first wafer and the second wafer:

[0033] The exhaust gas is discharged and treated.

[0034] The wafer packaging manufacturing method further comprises, after the step of removing the excess micro-nano metal sintering paste and heating to connect the micro-nano metal between the first wafer and the second wafer: BRIEF DESCRIPTION OF DRAWINGS

[0035] In order to make the technical solutions in the embodiments of the present application or the prior art clearer, the accompanying drawings needed in the embodiments or prior art description will be briefly introduced. Obviously, the accompanying drawings in the following description only show some embodiments of the present application, and for those skilled in the art, other drawings can be obtained from the structures shown in the drawings without any creative effort.

[0036] Figure 1 is a schematic diagram of the overall structure of wafer packaging in the present application.

[0037] Figure 2 is a schematic diagram of the connection of the first wafer and the second wafer in the present application.

[0038] Figure 3 is a schematic diagram before the carbon nanotube bundle frame is filled with nano-copper paste in the present application.

[0039] Figure 4 is a schematic diagram after the carbon nanotube bundle frame is filled with nano-copper paste in the present application.

[0040] Figure 5 is a schematic diagram of the structure of the first wafer and the first metal plating layer in the present application.

[0041] Figure 6 is a schematic diagram of the structure of the first catalytic layer and the first plating layer in the present application.

[0042] Figure 7 is a schematic diagram of the structure of the second wafer and the second metal plating layer in the present application.

[0043] Figure 8 is a schematic diagram of the structure of the second catalytic layer and the second metal plating layer in the present application.

[0044] Figure 9 is a schematic diagram of the structure of the first carbon nanotube bundle in the present application.

[0045] Figure 10 is a schematic diagram of the structure of the second carbon nanotube bundle in the present application.

[0046] Figure 11 is a schematic diagram of the flow of the wafer packaging manufacturing method in the present application.

[0047] Figure 12 is a schematic diagram of the connection of the first wafer and the second wafer in the wafer packaging manufacturing method of the present application.

[0048] Figure 13 is a schematic diagram of the first wafer and the second wafer after being connected and placed on a vacuum operation table in the wafer packaging manufacturing method of the present application.

[0049] Figure 14It is a schematic diagram of filling the copper nano sintering paste into the carbon nanotube bundle frame in the wafer packaging method of the present application.

[0050] Figure 15 It is a schematic diagram after filling the copper nano sintering paste into the carbon nanotube bundle frame in the wafer packaging method of the present application.

[0051] Figure 16 It is a schematic diagram of heating the copper nano sintering paste filled into the carbon nanotube bundle frame in the wafer packaging method of the present application.

[0052] In the drawings, 100, first wafer; 200, second wafer; 300, interconnection layer; 310, carbon nanotube bundle frame; 311, first carbon nanotube bundle; 312, second carbon nanotube bundle; 320, micro-nano metal sintering paste; 400, first metal plating layer; 500, first catalytic layer; 600, second metal plating layer; 700, second catalytic layer; 800, vacuum operation table. DETAILED DESCRIPTION

[0053] The present application provides a wafer package and a manufacturing method thereof. In order to make the purpose, technical scheme and effect of the present application more clear and explicit, the present application is further described in detail below with reference to the drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0054] In the embodiments and the scope of the application, unless the article is specifically limited in the text, "a", "an", "said" and "the" can also include plural forms. If the description of "first", "second" and the like is involved in the embodiments of the present application, the description of "first", "second" and the like is only for the purpose of description, and cannot be understood as indicating or implying the relative importance of the indicated technical features or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first", "second" can explicitly or implicitly include at least one of the features.

[0055] It should be further understood that the phrase "comprising" used in the specification of the present application means that the features, integers, steps, operations, elements and / or components exist, but does not exclude the existence or addition of one or more other features, integers, steps, operations, elements, components and / or their combinations. It should be understood that when we say that an element is "connected" or "coupled" to another element, it can be directly connected or coupled to the other element, or there can be intermediate elements. In addition, "connection" or "coupling" used herein can include wireless connection or wireless coupling. The phrase "and / or" used herein includes all or any unit and all combinations of the associated listed items.

[0056] Those skilled in the art of the technology can understand that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have meanings consistent with those in the context of the prior art, and unless specifically defined as such, should not be interpreted in an idealized or overly formal sense.

[0057] In addition, the technical solutions of various embodiments can be combined with each other, but it must be based on the fact that a person skilled in the art can realize it, when the combination of technical solutions appears contradictory or cannot be realized, it should be considered that the combination of technical solutions does not exist, and is not within the protection scope required by the present application.

[0058] For wafer-level packaging, the current mainstream packaging methods, such as lead-free soldering and transient liquid phase connection, have been unable to meet the use requirements of high-power devices. Metal nanoparticle sintering technology has received widespread attention due to its low-temperature interconnection and high-temperature service advantages. However, metal nanoparticle sintering technology still has defects, for example, metal silver has excellent electrical and thermal conductivity, so it is often prepared into nanoparticles for sintering, but the high cost of silver hinders its large-scale application in industry, and it also faces many problems such as electromigration and mismatch of thermal expansion coefficient. Since copper also has good electrical and thermal conductivity, and is low in cost and resistant to electromigration, nano-copper sintering has become an alternative to nano-silver sintering. However, nano-copper has a larger surface energy and is easily oxidized during sintering, forming copper oxides, which affects the connection strength and reduces the electrical and thermal conductivity.

[0059] Please refer to Figures 1 to 10 The present application provides a preferred embodiment of wafer packaging.

[0060] As Figures 1 to 4 shown, the present application provides a wafer packaging, which comprises: a first wafer 100, a second wafer 200 and an interconnection layer 300 disposed between the first wafer 100 and the second wafer 200; wherein the interconnection layer 300 comprises a carbon nanotube bundle frame 310 and a micro-nano metal filled in the carbon nanotube bundle frame 310.

[0061] Specifically, the carbon nanotube bundle has extremely high electrical and thermal conductivity. In the present application, when the first wafer 100 and the second wafer 200 are interconnected and packaged, the first wafer 100 and the second wafer 200 are connected by using the interconnection layer 300 composed of the carbon nanotube bundle frame 310 and the micro-nano metal (the micro-nano metal interconnection can be obtained after the micro-nano metal sintering paste 320 is filled into the carbon nanotube bundle frame 310 and heated). The carbon nanotube bundle is combined with the micro-nano metal sintering technology, so as to greatly compensate for the problems of the micro-nano metal, such as high cost, electromigration, mismatch of thermal expansion coefficient, and oxidation leading to loss of electrical and thermal conductivity, and the micro-nano metal can strengthen the connection strength between the first wafer 100 and the second wafer 200, thereby ensuring the connection strength between the first wafer 100 and the second wafer 200 (the micro-nano metal provides reliable mechanical protection between the interconnection layer and the wafer), and meeting the electrical and thermal conductivity requirements of the interconnection area between the first wafer 100 and the second wafer 200. The packaging reliability and electrical performance of the power device are greatly improved, and the power device can serve in a more harsh environment with higher temperature and greater current density, thereby improving the reliability of the power device.

[0062] Referring to Figure 2 and Figure 9 and Figure 10 In some embodiments, the carbon nanotube bundle frame 310 comprises: a first carbon nanotube bundle 311 and a second carbon nanotube bundle 312; the first carbon nanotube bundle 311 is arranged on the first wafer 100 in a spaced manner; the second carbon nanotube bundle 312 is arranged on the second wafer 200 in a spaced manner; and the first carbon nanotube bundle 311 is inserted into the gap between the second carbon nanotube bundle 312 to form the carbon nanotube bundle frame 310.

[0063] Specifically, the first carbon nanotube bundle 311 is formed on the bottom surface of the first wafer 100 in a high-density distribution by using a carbon-containing gas (such as carbon dioxide) from bottom to top, and the second carbon nanotube bundle 312 is formed on the top surface of the second wafer 200 in a high-density distribution by using the same process. After the first carbon nanotube bundle 311 and the first wafer 100 form effective connection, and the second carbon nanotube bundle 312 and the second wafer 200 form effective connection, the first wafer 100 and the second wafer 200 are connected together by flip-chip bonding technology under the action of external force, so that the first carbon nanotube bundle 311 is inserted into the gap of the second carbon nanotube bundle 312, and connection is formed under the action of van der Waals force, thereby constituting the carbon nanotube bundle frame 310.

[0064] Referring to Figure 1 , Figure 5 and Figure 9In a further implementation of the embodiment, the wafer package further comprises: a first metal plating layer 400; the first metal plating layer 400 is arranged on the upper surface of the first wafer 100.

[0065] Specifically, since the material of the interconnection layer 300 is not the same as that of the first wafer 100, there will be a metal difference between the materials, which will cause defects such as cracking during processing or service. Before the first carbon nanotube bundle 311 is formed on the first wafer 100, a metallization process is first performed on the bottom surface of the first wafer 100 to obtain a first metal plating layer 400, so as to adapt to the metal material of the interconnection layer 300, which is conducive to reducing the failure rate during processing, and in some cases can also reduce the processing difficulty, improve the reliability, heat dissipation and electrical conductivity of the electrical device. In some embodiments, the first metal plating layer 400 can be a copper metal plating layer, a silver metal plating layer, a gold metal plating layer, etc.

[0066] Please refer to Figure 6 and Figure 9 In a further implementation of the embodiment, the wafer package further comprises: a first catalytic layer 500; the first catalytic layer 500 is arranged on the surface of the first metal plating layer 400.

[0067] Specifically, cobalt (Co) or tricobalt tetroxide (Co3O4) is used as a catalyst to form a first catalytic layer 500 on the first metal plating layer 400 by deposition, and then the first carbon nanotube bundle 311 is formed on the first catalytic layer 500, which can make the first carbon nanotube bundle 311 grow upward along the vertical direction of the first wafer 100 (carbon nanotube bundles have excellent electrical and thermal conductivity in the length direction, but their electrical and thermal conductivity in the vertical direction will be greatly reduced), so that the growth of the first carbon nanotube bundle 311 is controllable and will not produce amorphous carbon or defects to the substrate. It should be noted that organic metal frameworks can also be used for pyrolysis to produce carbon nanotubes in a specific direction, so as to achieve controllable growth of carbon nanotubes and ensure that no amorphous carbon or defects are caused to the substrate, thereby ensuring good electrical and thermal conductivity between the wafers.

[0068] Please refer to Figure 7 and Figure 10 In a further implementation of the embodiment, the wafer package further comprises: a second metal plating layer 600; the second metal plating layer 600 is arranged on the upper surface of the second wafer 200.

[0069] Specifically, since the material of the interconnection layer 300 is not the same as that of the second wafer 200, there will be a metal difference between the materials, which will cause defects such as cracking during processing or service. Before forming the second carbon nanotube bundle 312 on the first wafer 100, a metallization process is first performed on the top surface of the second wafer 200 to obtain a second metal plating layer 600, so as to adapt to the metal material of the interconnection layer 300, thereby reducing the failure rate during processing, and in some cases, the processing difficulty can also be reduced, and the reliability, heat dissipation and conductivity of the electrical device are improved. In some embodiments, the second metal plating layer 600 can be a copper metal plating layer, a silver metal plating layer, a gold metal plating layer, etc.

[0070] Referring to Figure 8 and Figure 10 In a further implementation of the embodiment, the wafer package further comprises: a second catalytic layer 700; the second catalytic layer 700 is arranged on the surface of the second metal plating layer 600.

[0071] Specifically, cobalt (Co) or tricobalt tetroxide (Co3O4) is used as a catalyst to form a second catalytic layer 700 on the second metal plating layer 600 by deposition, and then the second carbon nanotube bundle 312 is formed on the second catalytic layer 700, so that the second carbon nanotube bundle grows along the vertical direction of the second wafer 200 upward, and the growth of the second carbon nanotube bundle 312 is controllable, and no amorphous carbon or defects to the substrate are caused.

[0072] In some embodiments, the micro-nano metal can be one of, but not limited to, micro-nano gold, micro-nano silver or micro-nano copper, and can also be micro-nano nickel, micro-nano titanium, or binary, ternary alloys and coated structures of the above-mentioned metals.

[0073] The micro-nano metal has a shape of particles, blocks or sheets. When the micro-nano metal is in the form of particles, the size of the micro-nano metal is 5-5000 nanometers, for example, 5nm, 100nm, 5000nm, etc. It should be noted that the filled micro-nano metal particles can be mixed particles of micro metal and nano metal.

[0074] In an implementation, the micro-nano metal can be micro-nano copper, which has a lower cost and can strengthen the connection strength between the first wafer 100 and the second wafer 200. Even though the micro-nano copper will be oxidized after sintering, affecting the conductivity and thermal conductivity, the carbon nanotube bundle can make up for this defect.

[0075] Referring to Figure 11 In some embodiments, the present application also provides a wafer package manufacturing method applied to the above-mentioned wafer package, which comprises the following steps:

[0076] S100, providing a first wafer and a second wafer;

[0077] S200, preparing a carbon nanotube bundle frame between the first wafer and the second wafer

[0078] S300, filling a micro-nano metal sintering paste into the carbon nanotube bundle frame based on capillary action;

[0079] Specifically, after the first wafer and the second wafer are connected by the carbon nanotube bundle frame, the carbon nanotube bundle frame has good connection strength in the vertical direction, but the connection strength in the horizontal direction cannot be guaranteed, so by filling a fluid micro-nano metal sintering paste into the carbon nanotube bundle frame on one side of the carbon nanotube bundle frame, under the capillary action, the micro-nano metal sintering paste can be uniformly filled into the gap between the carbon nanotube bundles, filling the gap of the entire carbon nanotube bundle frame, to strengthen the connection strength of the interconnection layer between the first wafer and the second wafer, as shown in Figure 14 By using capillary action to fill the micro-nano metal sintering paste, without additional printing equipment (the micro-nano metal paste is attached to the first wafer or the second wafer by printing or spraying, etc.), the cumbersome process flow can be reduced.

[0080] S400, removing the excess micro-nano metal sintering paste and then performing heating treatment to connect the micro-nano metal between the first wafer and the second wafer.

[0081] Specifically, at room temperature, the micro-nano metal is dispersed or dispersed under the wrapping of organic matter in the paste, only after reaching a certain temperature, the organic solvent volatilizes or disappears, which can make the micro-nano metal form interconnection. After removing the excess micro-nano metal sintering paste, the connected first wafer and second wafer are heated by the pressure head and the base, and after the micro-nano metal forms interconnection, the connection between the first wafer and the second wafer is completed, as shown in Figure 16 .

[0082] In the above method, when the chip and the substrate are interconnected and packaged, the first wafer and the second wafer are connected by using the interconnection layer composed of the carbon nanotube bundle frame and the nano-copper, which greatly makes up for the problems of the micro-nano metal, such as high cost, electromigration, mismatch of thermal expansion coefficient, and oxidation leading to the loss of conductive and thermal properties, and the micro-nano metal can strengthen the connection strength between the first wafer and the second wafer, so as to ensure the connection strength between the first wafer and the second wafer, and meet the conductive and thermal requirements of the interconnection area between the first wafer and the second wafer, so that the packaging reliability and electrical performance of the power device are greatly improved. In an implementation manner, the micro-nano metal sintering paste can be a micro-nano copper sintering paste.

[0083] In some embodiments, the step S200 comprises the following steps:

[0084] S210, using carbon-containing gas to directionally form a plurality of spaced first carbon nanotube bundles on the surface of the first wafer from bottom to top, and using carbon-containing gas to directionally form a plurality of spaced second carbon nanotube bundles on the surface of the second wafer from bottom to top;

[0085] S220, connecting the first wafer and the second wafer together, so that the first carbon nanotube bundles are inserted into the gaps between the second carbon nanotube bundles, and a carbon nanotube bundle frame is formed;

[0086] Specifically, after the first carbon nanotube bundles form effective connection with the first wafer, and after the second carbon nanotube bundles form effective connection with the second wafer, the first wafer and the second wafer are connected together under the action of external force by using flip-chip bonding technology, that is, the first carbon nanotube bundles are inserted into the gaps between the second carbon nanotube bundles, to form a high-density carbon nanotube bundle frame, as shown in Figure 12 Since the first wafer is connected with the second wafer by using flip-chip technology, it can be applied to large-scale production.

[0087] In some embodiments, the step S200 further comprises the following steps before the step S200:

[0088] S110, respectively performing metal plating layer treatment on the bottom surface of the first wafer and the top surface of the second wafer, to form a first metal plating layer on the bottom surface of the first wafer, and to form a second metal plating layer on the top surface of the second wafer.

[0089] S120, using a catalyst to form a first catalyst layer on the first metal plating layer by deposition, and using a catalyst to form a second catalyst layer on the second metal plating layer by deposition.

[0090] Specifically, since the material of the interconnection layer is not the same as the material of the first wafer and the second wafer, there is a metal difference between the materials, which can cause defects such as cracking during processing or service. Before the carbon nanotube bundles are formed on the first wafer and the second wafer, the bottom surface of the first wafer and the top surface of the second wafer are first subjected to a metal plating process to obtain a metal plating layer, so as to adapt the metal material of the interconnection layer, which is conducive to reducing the failure rate during processing, and in some cases can also reduce the processing difficulty, improve the reliability, heat dissipation and conductivity of the electrical device. In some embodiments, the metal plating layer can be a copper metal plating layer, a silver metal plating layer, a gold metal plating layer, etc.

[0091] In addition, since the carbon nanotube bundles have anisotropic characteristics in terms of electrical conductivity and thermal conductivity, it is difficult to produce directionally if the carbon nanotube bundles are formed in a random orientation by high-energy irradiation, film rolling, ultrasonic vibration, etc. The carbon nanotube bundles implanted in the above manner not only have a high cost, but also have a high probability of generating amorphous carbon to damage the chip and the substrate. The present application uses a gas deposition process, uses cobalt (Co) or tricobalt tetroxide (Co3O4) as a catalyst to form a first catalytic layer on the first metal plating layer and a second catalytic layer on the second metal plating layer, and then forms a second carbon nanotube bundle and a first carbon nanotube bundle on the bottom surface of the first wafer and the top surface of the second wafer, respectively, by introducing carbon-containing gas from bottom to top. The first carbon nanotube bundle can grow upward along the vertical direction of the first wafer, and the second carbon nanotube bundle can grow along the vertical direction of the second wafer, so that the growth of the carbon nanotube bundle is controllable, and the first carbon nanotube bundle and the second carbon nanotube bundle can be directionally connected, without generating amorphous carbon or causing defects to the substrate.

[0092] After step S200, the method further includes:

[0093] S230, placing the first wafer and the second wafer after the carbon nanotube bundle frame is connected in a vacuum cavity or in a cavity with a reducing gas;

[0094] Specifically, since the micro-nano metal sintering paste (such as nano-copper sintering paste) is easy to oxidize in air, by placing the first wafer and the second wafer after connection in a vacuum cavity or in a cavity with a reducing gas, it is helpful to inhibit the influence of copper oxidation on the connection strength.

[0095] The purpose of placing the first wafer and the second wafer connected by the carbon nanotube bundle frame in the vacuum cavity or in the cavity with reducing gas is the same, but one of the implementation manners can be selected according to the processing environment or condition, for example, for the occasion with low oxidation requirement, the air can be exhausted by vacuumizing. For the production environment with high oxidation requirement, the micro-nano metal which has been oxidized or partially oxidized can be reduced from its oxide to itself (for example, copper is reduced from copper oxide or cuprous oxide to copper itself) by introducing reducing gas. In one implementation manner, when the first wafer and the second wafer connected need to be placed in a vacuum cavity, the first wafer and the second wafer connected can be placed in the vacuum operation table 800 as shown in Figures 13 to 16 .

[0096] The step S400 further includes the following steps:

[0097] S500, the exhaust gas is discharged for treatment. If the reducing gas is used to inhibit the oxidation of copper, after the heating is completed, the exhaust gas is discharged for treatment, and then the sintered interconnection sample (chip package) is removed.

[0098] In summary, the wafer package and the manufacturing method thereof provided by the present application greatly make up for the problems of the micro-nano metal, such as the high cost, electromigration, mismatch of thermal expansion coefficient, and the loss of conductive and thermal performance caused by oxidation, by combining the carbon nanotube with the nano-copper sintering technology. The micro-nano metal can strengthen the connection strength between the first wafer and the second wafer, so that the packaging reliability and electrical performance (electrical connection and heat dissipation) of the power device are greatly improved, the power device can serve in a more harsh environment with higher temperature and greater current density, and the reliability of the power device is improved. At the same time, the whole chip packaging process is realized based on the flip chip connection technology, which provides a good industrial foundation for large-scale application of the process.

[0099] It should be understood that the application of the present application is not limited to the above examples, and those skilled in the art can make improvements or changes according to the above description, and all these improvements and changes shall belong to the protection scope of the appended claims of the present application.

Claims

1. A wafer packaging fabrication method, characterized in that, include: Provide the first wafer and the second wafer; Metallization plating is performed on the bottom surface of the first wafer and the top surface of the second wafer, respectively, to form a first metal plating on the bottom surface of the first wafer and a second metal plating on the top surface of the second wafer. A first catalytic layer is formed on the first metal coating by deposition using a catalyst; a second catalytic layer is formed on the second metal coating by deposition using a catalyst. A carbon nanotube bundle framework is fabricated between a first wafer and a second wafer, comprising: forming a plurality of spaced first carbon nanotube bundles oriented from bottom to top on the surface of the first wafer using a carbon-containing gas; forming a plurality of spaced second carbon nanotube bundles oriented from bottom to top on the surface of the second wafer using a carbon-containing gas; connecting the first wafer and the second wafer together so that the first carbon nanotube bundles are inserted into the gaps between the second carbon nanotube bundles to form a carbon nanotube bundle framework; Micro-nano metal sintering paste is filled into the carbon nanotube bundle framework based on capillary action; After removing excess micro / nano metal sintering paste, heat treatment is performed to connect the micro / nano metal between the first wafer and the second wafer.

2. The wafer packaging fabrication method according to claim 1, characterized in that, The step of fabricating a carbon nanotube bundle framework between the first wafer and the second wafer further includes: The first and second wafers connected to the carbon nanotube bundle framework are placed in a vacuum chamber or in a chamber containing a reducing gas. The step of removing excess micro / nano metal sintering paste and then performing heat treatment to connect the micro / nano metal between the first wafer and the second wafer further includes: Waste gas is treated for emission.

3. A wafer package fabricated by the wafer packaging fabrication method according to claim 1 or 2, characterized in that, include: A first wafer, a second wafer, and an interconnect layer disposed between the first wafer and the second wafer; wherein the interconnect layer includes a carbon nanotube bundle framework and micro / nano metals filled within the carbon nanotube bundle framework; The carbon nanotube bundle framework includes: a first carbon nanotube bundle and a second carbon nanotube bundle; the first carbon nanotube bundle is spaced apart on the first wafer; the second carbon nanotube bundle is spaced apart on the second wafer; the first carbon nanotube bundle is inserted into the gap between the second carbon nanotube bundles to form the carbon nanotube bundle framework. The wafer package further includes: a first metal plating layer and a first catalyst layer, wherein the first metal plating layer is disposed on the upper surface of the first wafer, and the first catalyst layer is disposed on the surface of the first metal plating layer; The wafer package further includes: a second metal plating layer and a second catalyst layer, wherein the second metal plating layer is disposed on the upper surface of the second wafer, and the second catalyst layer is disposed on the surface of the second metal plating layer.

4. The wafer packaging according to claim 3, characterized in that, The micro / nano metal is one or more of micro / nano gold, micro / nano silver, or micro / nano copper; the shape of the micro / nano metal is granular, bulk, or sheet-like.

5. The wafer packaging according to claim 3, characterized in that, The micro / nano metal is in the form of particles, and the size of the micro / nano metal is 5-5000 nanometers.

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