A PMOS device structure with a germanium-silicon source-drain region and a manufacturing method thereof

Abstract

The application discloses a PMOS device structure with a germanium-silicon source-drain region and a manufacturing method thereof, wherein a germanium-silicon cap layer is additionally arranged between a germanium-silicon main body layer and a silicon cap layer, and the germanium concentration in the germanium-silicon cap layer is gradually decreased from bottom to top by adjusting the germanium precursor flow and the flow ratio between reaction gases in the first germanium-silicon epitaxial reaction gas, so that a germanium-silicon buffer layer with gradually decreasing concentration is formed between the germanium-silicon main body layer and the silicon cap layer, and the probability of lattice mismatch at the interface between the germanium-silicon intrinsic layer and the silicon cap layer can be obviously reduced, so that the relaxation defect problem can be effectively solved; and in the gradient temperature rising stage before the silicon cap layer is formed, the surface of the germanium-silicon cap layer is activated by using the second germanium-silicon epitaxial reaction gas without germanium precursor, so that the germanium-silicon crystal surface is always in an active state of heat absorption and heat release, and thus the risk of relaxation on the crystal surface can be greatly reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor integrated circuit process, and particularly relates to a PMOS device structure with a germanium-silicon source-drain region and a manufacturing method thereof. BACKGROUND

[0002] With the continuous development of the miniaturization of ultra-large integrated circuits, the size of circuit elements is getting smaller and smaller and the operating speed is getting faster and faster, and how to improve the drive current of the circuit elements is becoming increasingly important.

[0003] Embedded germanium-silicon technology (eSiGe) is a kind of strain silicon technology for improving the performance of PMOS transistor devices, which can improve the mobility of channel holes and thus improve the current driving capability of PMOS transistors by forming a germanium-silicon (SiGe) stress layer in the source-drain region of the PMOS transistor in a selective epitaxy manner.

[0004] Please refer to Figure 1 which shows a prior PMOS device structure with a germanium-silicon source-drain region. The current PMOS germanium-silicon epitaxial film layer structure is roughly divided into a germanium-silicon seed layer (SiGe Seed) 15, a germanium-silicon bulk layer (SiGe Bulk) 14 and a silicon cap layer (Si Cap) 13 formed in the source-drain trench 11 from bottom to top. Its manufacturing process generally includes the following steps:

[0005] (1) First, form the source-drain trench 11 on both sides of the gate 12 in the substrate 10, and then grow the germanium-silicon seed layer 15 containing a lower germanium concentration in the source-drain trench 11 to improve the relaxation defects;

[0006] (2) Continue to grow the germanium-silicon bulk layer 14 containing a higher germanium concentration on the germanium-silicon seed layer 15 to provide strain;

[0007] (3) Perform gradient heating under a hydrogen atmosphere;

[0008] (4) Continue to grow the silicon cap layer 13 (for forming a NiSi metal silicide layer) on the germanium-silicon bulk layer 14.

[0009] However, due to the high germanium concentration in the germanium-silicon bulk layer 14, the high-concentration germanium-silicon bulk layer 14 and the silicon cap layer 13 at the interface have a lattice mismatch, and thus are prone to relaxation defects. At the same time, the heating process during the gradient heating stage before growing the silicon cap layer 13 usually needs 6-10 minutes, and the reaction is in a stopped state during this period, so the longer waiting time also easily causes relaxation risk on the surface of the germanium-silicon crystal which does not react. SUMMARY

[0010] The present application aims to overcome the above-mentioned defects in the prior art, and provides a PMOS device structure with a germanium-silicon source-drain region and a manufacturing method thereof.

[0011] To achieve the above-mentioned object, the technical solution of the present application is as follows:

[0012] The present application provides a PMOS device structure with a germanium-silicon source-drain region, comprising:

[0013] a substrate;

[0014] a gate electrode provided on the substrate and source-drain regions located on both sides of the gate electrode;

[0015] The source-drain region comprises, from bottom to top, a germanium-silicon seed layer, a germanium-silicon main body layer, a germanium-silicon cap layer and a silicon cap layer.

[0016] The germanium-silicon cap layer has a surface treated by a germanium-silicon epitaxial reaction gas without a germanium precursor in a gradient temperature rising process.

[0017] Further, the source-drain region is provided with a source-drain trench, and the germanium-silicon seed layer, the germanium-silicon main body layer, the germanium-silicon cap layer and the silicon cap layer are formed in the source-drain trench from bottom to top, and the surface of the germanium-silicon main body layer is exposed from the source-drain trench and higher than the surface of the substrate.

[0018] Further, the germanium concentration in the germanium-silicon cap layer decreases from bottom to top.

[0019] Further, the germanium concentration in the germanium-silicon main body layer increases from bottom to top, and the germanium concentration in the germanium-silicon cap layer decreases from bottom to top from being consistent with the germanium concentration in the surface of the germanium-silicon main body layer to 5-10%.

[0020] The present application also provides a manufacturing method of a PMOS device structure with a germanium-silicon source-drain region, comprising:

[0021] providing a substrate;

[0022] forming a gate electrode on the substrate and forming a source-drain trench on the surface of the substrate on both sides of the gate electrode;

[0023] adopting a first germanium-silicon epitaxial reaction gas containing a silicon precursor, a germanium precursor and an etching gas to form, from bottom to top, a germanium-silicon seed layer, a germanium-silicon main body layer and a germanium-silicon cap layer in the source-drain trench by epitaxial growth;

[0024] performing a gradient temperature rising process and simultaneously adopting a second germanium-silicon epitaxial reaction gas without a germanium precursor to treat the surface of the germanium-silicon cap layer;

[0025] forming a silicon cap layer on the treated surface of the germanium-silicon cap layer.

[0026] Further, when forming the germanium silicon cap layer, the flow rate of the germanium precursor in the first germanium silicon epitaxial reaction gas is gradually reduced.

[0027] Further, the flow rate of the germanium precursor in the first germanium silicon epitaxial reaction gas is gradually reduced to 1 / 10 of the initial value.

[0028] Further, when forming the germanium silicon cap layer, the flow rate ratio between the silicon precursor, the germanium precursor and the etching gas satisfies:

[0029] The initial ratio of the silicon precursor: the germanium precursor: the etching gas is 1:8:2.5 at the beginning of the process, and is linearly changed to the final ratio of the silicon precursor: the germanium precursor: the etching gas 2:1:2 at the end of the process.

[0030] Further, when processing the surface of the germanium silicon cap layer, the flow rate ratio between the silicon precursor and the etching gas satisfies:

[0031] The silicon precursor: the etching gas is 1:1.

[0032] Further, the flow rate of the silicon precursor and the etching gas is gradually reduced to half of the initial value.

[0033] Further, the silicon precursor includes dichlorosilane, the germanium precursor includes germane, and the etching gas includes HCl.

[0034] As can be seen from the above technical solutions, the germanium silicon cap layer is additionally arranged between the germanium silicon main body layer and the silicon cap layer, and the flow rate of the germanium precursor and the flow rate ratio between the reaction gases in the first germanium silicon epitaxial reaction gas are adjusted, so that the germanium concentration in the germanium silicon cap layer is gradually reduced from bottom to top, thereby forming a germanium silicon buffer layer with gradually reduced concentration between the germanium silicon main body layer and the silicon cap layer, which can significantly reduce the probability of lattice mismatch at the interface between the germanium silicon intrinsic layer and the silicon cap layer, and thus effectively solve the relaxation defect problem. In addition, in the gradient temperature rising stage before forming the silicon cap layer, the surface of the germanium silicon cap layer is activated by using the second germanium silicon epitaxial reaction gas without the germanium precursor, so that the germanium silicon crystal surface is always in an active state of heat absorption and heat release, thereby greatly reducing the risk of relaxation on the crystal surface. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1 It is a schematic diagram of a PMOS device structure with a germanium silicon source-drain region;

[0036] Figure 2 It is a schematic diagram of a PMOS device structure with a germanium silicon source-drain region according to a preferred embodiment of the present application.

[0037] Figure 3 A flow chart of a method for manufacturing a PMOS device structure with a germanium-silicon source / drain region according to an embodiment of the present application. DETAILED DESCRIPTION

[0038] In order to make the objects, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below. Obviously, the described embodiments are only a part instead of all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall into the scope of the present application. Unless otherwise defined, the technical terms or scientific terms used herein should be understood as their common meanings to those of ordinary skill in the art to which the present application belongs. The words "comprise", "comprising", "include", "including" or similar words in this text mean that the elements or objects before the words encompass the elements or objects listed after the words and their equivalents, and do not exclude other elements or objects.

[0039] The specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0040] Please refer to Figure 2 , Figure 2 A schematic diagram of a PMOS device structure with a germanium-silicon source / drain region according to an embodiment of the present application. As shown in Figure 2 , a PMOS device structure with a germanium-silicon source / drain region according to an embodiment of the present application includes: a substrate 100, a gate 102 disposed on the substrate 100, and source / drain regions located on both sides of the gate 102.

[0041] Among the source / drain regions, a germanium-silicon seed layer (SiGe Seed) 106, a germanium-silicon bulk layer (SiGe Bulk) 105, a germanium-silicon cap layer (SiGe Cap) 104, and a silicon cap layer (Si Cap) 103 are formed from bottom to top. Moreover, the germanium concentration in the germanium-silicon cap layer 104 decreases from bottom to top, and the germanium-silicon cap layer 104 has an upper surface treated by a germanium-silicon epitaxial reaction gas (second germanium-silicon epitaxial reaction gas) without germanium precursor in a gradient temperature process.

[0042] Please refer to Figure 2 In a preferred embodiment, the substrate 100 can be a conventional semiconductor substrate 100, for example, a silicon material substrate 100 formed of single crystal silicon, polycrystalline silicon, or amorphous silicon, or a silicon-on-insulator (SOI) substrate 100, etc. The substrate 100 can also be a substrate 100 formed of other semiconductor materials or other structures.

[0043] The gate 102 can adopt a conventional gate 102 structure, such as a metal gate structure with sidewalls. This invention is not limited thereto.

[0044] In a preferred embodiment, the source / drain region may be provided with a source / drain trench 101; a germanium-silicon seed layer 106, a germanium-silicon main body layer 105, a germanium-silicon capping layer 104, and a silicon capping layer 103 are formed from bottom to top in the source / drain trench 101.

[0045] In a preferred embodiment, the upper surface of the germanium-silicon host layer 105 is exposed in the source-drain trench 101 and is higher than the upper surface of the substrate 100.

[0046] In a preferred embodiment, the germanium concentration in the germanium-silicon host layer 105 increases from bottom to top; the germanium concentration in the germanium-silicon capping layer 104 decreases from bottom to top, and decreases from a lower surface state consistent with the germanium concentration in the upper surface of the germanium-silicon host layer 105 to an upper surface state with a germanium concentration of 5% to 10%.

[0047] In a preferred embodiment, the germanium concentration in the germanium-silicon host layer 105 can increase from 30% to 40% from bottom to top; the germanium concentration in the germanium-silicon capping layer 104 can decrease from 40% to 5% to 10% from bottom to top.

[0048] In a preferred embodiment, the thickness of the germanium-silicon capping layer 104 can be about 15 to 35 angstroms.

[0049] The following detailed description, in conjunction with the accompanying drawings, provides a method for fabricating a PMOS device structure with germanium-silicon source and drain regions according to the present invention.

[0050] Please see Figure 3 And in conjunction with reference Figure 2 The present invention provides a method for fabricating a PMOS device structure with germanium-silicon source / drain regions, which can be used to fabricate, for example... Figure 2 A PMOS device structure having germanium-silicon source / drain regions may include the following steps:

[0051] Step S1: Provide a substrate 100.

[0052] In a preferred embodiment, substrate 100 may be, for example, a silicon substrate 100.

[0053] Step S2: A gate 102 is formed on the substrate 100, and source / drain trenches 101 are formed on the surface of the substrate 100 on both sides of the gate 102.

[0054] In a preferred embodiment, the gate 102 structure can be formed on the silicon substrate 100 using conventional gate processes.

[0055] Next, conventional photolithography and etching processes can be used to form source / drain trenches 101 on the surface of the silicon substrate 100 on both sides of the gate 102.

[0056] Step S3: Forming a germanium-silicon seed layer 106, a germanium-silicon body layer 105 and a germanium-silicon cap layer 104 from bottom to top in the source-drain trench 101 by epitaxial growth using a first germanium-silicon epitaxial reaction gas containing a silicon precursor, a germanium precursor and an etching gas, and decreasing the germanium concentration in the germanium-silicon cap layer 104 from bottom to top.

[0057] In a preferred embodiment, the silicon precursor in the first germanium-silicon epitaxial reaction gas can include dichlorosilane (DCS) or the like, the germanium precursor can include germane (GeH4) or the like, and the etching gas can include HCl or the like.

[0058] In the source-drain trench 101, the first germanium-silicon epitaxial reaction gas can be first introduced to form a conventional germanium-silicon seed layer 106 with a low germanium concentration on the inner wall of the source-drain trench 101 by epitaxial growth.

[0059] Then, the first germanium-silicon epitaxial reaction gas can be continuously introduced to further grow the germanium-silicon body layer 105 on the formed germanium-silicon seed layer 106.

[0060] In a preferred embodiment, when forming the germanium-silicon body layer 105, the flow rate of germane in the first germanium-silicon epitaxial reaction gas can be gradually increased so that the germanium concentration in the formed germanium-silicon body layer 105 increases from bottom to top. For example, the germanium concentration in the formed germanium-silicon body layer 105 can be increased from 30% to 40% from bottom to top by gradually increasing the flow rate of germane in the first germanium-silicon epitaxial reaction gas.

[0061] Then, the first germanium-silicon epitaxial reaction gas can be continuously introduced to further grow the germanium-silicon cap layer 104 on the formed germanium-silicon body layer 105.

[0062] In a preferred embodiment, when forming the germanium-silicon cap layer 104, the flow rate of germane in the first germanium-silicon epitaxial reaction gas can be gradually decreased so that the germanium concentration in the formed germanium-silicon cap layer 104 decreases from bottom to top.

[0063] In a preferred embodiment, when forming the germanium-silicon cap layer 104, the flow rate of germane in the first germanium-silicon epitaxial reaction gas can be gradually decreased so that the germanium concentration in the formed germanium-silicon cap layer 104 decreases from bottom to top from the same as that in the upper surface of the germanium-silicon body layer 105 to a state of 5% to 10%.

[0064] In a preferred embodiment, when forming the germanium-silicon cap layer 104, the process temperature can be the same as that when forming the germanium-silicon body layer 105. And the first germanium-silicon epitaxial reaction gas can be set in a linearly gradual change manner according to the flow rate. For example, the initial proportion of the first germanium-silicon epitaxial reaction gas at the beginning of the process can be set as follows:

[0065] DCS:GeH4:HCl≌1:8:2.5;

[0066] At the end of the process, the termination ratio of the first GeSi epitaxial reaction gas can be set as:

[0067] DCS:GeH4:HCl≌2:1:2.

[0068] Wherein, when the flow ratio between DCS, GeH4and HCl is about equal to the above ratio, the fluctuation range of each ratio can be plus or minus 10%.

[0069] In a preferred embodiment, when forming the GeSi cap layer 104, and at the end of the process, the flow rate of germane in the first GeSi epitaxial reaction gas can be gradually reduced to 1 / 10 of the initial value.

[0070] The thickness of the formed GeSi cap layer 104 can be about 15-35 angstroms, and the germanium concentration in the GeSi cap layer 104 gradually decreases from the same as the GeSi main body layer 105 to about 5-10%, which can serve as a buffer layer between the GeSi main body layer 105 and the silicon cap layer 103.

[0071] Step S4: Perform a gradient temperature process, and use a second GeSi epitaxial reaction gas without a germanium precursor to treat the surface of the GeSi cap layer 104.

[0072] In a preferred embodiment, a gradient temperature process (Ramp up) is performed to gradually increase the temperature to the process temperature of the silicon cap layer 103, and in this process, the state of the second GeSi epitaxial reaction gas without germane can be formed by stopping the flow of germane and maintaining the flow of DCS and HCl in the first GeSi epitaxial reaction gas.

[0073] In a preferred embodiment, the DCS and HCl gases can be continuously flowed. And the second GeSi epitaxial reaction gas can be set in a linearly gradient manner according to the flow size.

[0074] When activating the surface of the GeSi cap layer 104, attention should be paid to control the gas ratio. For example, the initial set ratio of the second GeSi epitaxial reaction gas can be set as:

[0075] DCS:HCl≌1:1;

[0076] At the end of the process, the flow rate of the second GeSi epitaxial reaction gas can be halved from the initial value, and the ratio can be set as:

[0077] DCS:HCl≌1:1.

[0078] Wherein, when the flow ratio between DCS and HCl is about equal to the above ratio, the fluctuation range of each ratio can be plus or minus 10%.

[0079] This processing step does not need to grow a film layer, but can keep the crystal surface of the germanium-silicon cap layer 104 in an active state of heat absorption and heat release, thereby greatly reducing the risk of relaxation.

[0080] Step S5: forming a silicon cap layer 103 on the surface of the processed germanium-silicon cap layer 104.

[0081] After that, a conventional epitaxy process can be used to further form a silicon cap layer 103 on the surface of the processed germanium-silicon cap layer 104.

[0082] In summary, by adding a germanium-silicon cap layer 104 between the germanium-silicon body layer 105 and the silicon cap layer 103, and by adjusting the flow rate of the germanium precursor and the flow rate ratio between the reaction gases in the first germanium-silicon epitaxial reaction gas, the germanium concentration in the germanium-silicon cap layer 104 is made to decrease from bottom to top, thereby forming a germanium-silicon buffer layer with gradually decreasing concentration between the germanium-silicon body layer 105 and the silicon cap layer 103, which can significantly reduce the probability of lattice mismatch at the interface between the germanium-silicon intrinsic layer and the silicon cap layer 103, thus effectively solving the problem of relaxation defects. Moreover, by using the second germanium-silicon epitaxial reaction gas containing no germanium precursor to activate the surface of the germanium-silicon cap layer 104 during the gradient heating stage before forming the silicon cap layer 103, the germanium-silicon crystal surface is kept in an active state of heat absorption and heat release at all times, thereby greatly reducing the risk of relaxation on the crystal surface.

[0083] Although the embodiments of the present application have been described in detail above, it is obvious to those skilled in the art that various modifications and changes can be made to these embodiments. However, it should be understood that such modifications and changes are within the scope and spirit of the present application as claimed in the claims. Moreover, the present application described herein can have other embodiments and can be implemented or realized in various ways.

Claims

1. A PMOS device structure having a germanium-silicon source-drain region, characterized by, include: Substrate; A gate electrode is disposed on the substrate and source / drain regions are located on both sides of the gate electrode; The source / drain region includes a germanium-silicon seed layer, a germanium-silicon host layer, a germanium-silicon capping layer, and a silicon capping layer formed from bottom to top; The germanium-silicon capping layer has a surface that has been activated by a germanium-silicon epitaxial reactive gas without germanium precursors during a gradient heating process.

2. The PMOS device structure with a germanium silicon source drain region of claim 1, wherein, The source / drain region is provided with a source / drain trench. The germanium-silicon seed layer, the germanium-silicon host layer, the germanium-silicon capping layer, and the silicon capping layer are formed in the source / drain trench from bottom to top, and the surface of the germanium-silicon host layer is exposed from the source / drain trench and is higher than the surface of the substrate.

3. The PMOS device structure with a germanium silicon source drain region of claim 1, wherein, The germanium concentration in the germanium-silicon capping layer decreases from bottom to top; and / or, the germanium concentration in the germanium-silicon main body layer increases from bottom to top, and the germanium concentration in the germanium-silicon capping layer decreases from the same level as the germanium concentration on the surface of the germanium-silicon main body layer to 5% to 10% from bottom to top.

4. A method for fabricating a PMOS device structure having a germanium- silicon source-drain region, the method comprising: include: Provide a substrate; A gate is formed on the substrate, and source / drain trenches are formed on the substrate surfaces on both sides of the gate. A first germanium-silicon epitaxial reaction gas containing silicon precursor, germanium precursor and etching gas is used to form a germanium-silicon seed layer, a germanium-silicon host layer and a germanium-silicon capping layer from bottom to top in the source-drain trench through epitaxial growth. A gradient heating process is performed, and a second germanium-silicon epitaxial reaction gas without germanium precursor is used to activate the surface of the germanium-silicon capping layer. A silicon cap layer is formed on the surface of the treated germanium-silicon cap layer.

5. The method for fabricating a PMOS device structure with germanium-silicon source / drain regions according to claim 4, characterized in that, When forming the germanium-silicon capping layer, the flow rate of germanium precursor in the first germanium-silicon epitaxial reaction gas is gradually reduced, so that the germanium concentration in the formed germanium-silicon capping layer decreases from bottom to top.

6. The method of fabricating a PMOS device structure with a germanium silicon source-drain region of claim 5, wherein, The flow rate of germanium precursor in the first germanium-silicon epitaxial reaction gas is gradually reduced to 1 / 10 of the initial value.

7. The method of fabricating a PMOS device structure with a germanium silicon source-drain region of claim 5, wherein, During the formation of the germanium-silicon capping layer, the flow ratio between the silicon precursor, the germanium precursor, and the etching gas satisfies the following: The initial ratio of silicon precursor: germanium precursor: etching gas is 1:8:2.5 at the start of the process, and then gradually changes linearly according to the flow rate to a final ratio of 2:1:2 at the end of the process.

8. The method of fabricating a PMOS device structure with a germanium silicon source-drain region of claim 4, wherein, When processing the surface of the germanium-silicon capping layer, the flow rate ratio between the silicon precursor and the etching gas satisfies: Silicon precursor: etching gas ≌ 1:

1.

9. The method for fabricating a PMOS device structure with germanium-silicon source / drain regions according to claim 8, characterized in that, The flow rates of the silicon precursor and the etching gas are gradually reduced to half of the initial values.

10. The method of fabricating a PMOS device structure with a germanium silicon source-drain region of claim 4, wherein, The silicon precursor includes dichlorosilane, the germanium precursor includes germanane, and the etching gas includes HCl.

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