An error detection and correction method, system, device and storage medium based on a two-dimensional matrix
By using a two-dimensional matrix-based error detection and correction method in memory, the correction sub-matrix is calculated and filtered, the data error problems caused by single-particle flip and multi-unit flip are solved, which improves the reliability of the memory and reduces hardware overhead.
Patent Information
- Application Number
- CN202211122842.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-15
- Publication Date
- 2025-06-17
- Estimated Expiration
- 2042-09-15
AI Technical Summary
The prior art is difficult to effectively solve the memory data error problem caused by single-particle flip and single-particle multi-unit flip, and there are many redundant bits in verification, which increases hardware overhead.
The error detection and correction method based on two-dimensional matrix is used to calculate the correction submatrix by horizontal, vertical, diagonal and check bits on the data block, and perform preliminary positioning and filtering of error candidate bits, and use block check bits and line check bits to correct error elements.
It realizes effective error detection and correction of memory data, improves the reliability of memory in the radiated environment, reduces redundant bits for verification, simplifies the encoding and decoding process, and reduces hardware overhead.
Smart Images

Figure CN115421966B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of integrated circuit space radiation applications, and relates to an error detection and correction method, system, device, and storage medium based on a two-dimensional matrix. Background Art
[0002] There are a large number of high-energy particles in cosmic space. When high-energy particles impinge on a memory, they can cause defects or electrical damage to the memory's storage cells, resulting in single-event upsets (SEUs) or multiple-bit single-event upsets (MBSEUs), causing data errors, and further affecting the reliability of spacecraft in cosmic space, and even leading to the failure of space missions. Memory hardening techniques based on error correction codes (ECC) target data and use ECC methods to detect and correct errors, which can well solve the problems of SEUs or MBSEUs, thereby improving the reliability of the memory. In the ECC method, the parity bit redundancy determines the number of memory cells occupied, and the complexity of encoding and decoding determines the hardware overhead of the circuit.
[0003] The earliest ECC method is the Hamming code, which can use very few parity bits to correct 1-bit errors or detect 2-bit errors by comparing the relationship between the syndrome and the error pattern. The SEC-DED code adds one more parity bit on the basis of the Hamming code, detecting 2-bit random errors while correcting 1-bit errors. Other Hamming code-like codes achieve the purpose of detecting more errors by continuously improving the parity check matrix. These methods can well solve the problem of SEUs, but for multiple-bit flips, Hamming code-like codes are powerless.
[0004] To solve the problem of MBSEUs, an ECC method with stronger error correction ability needs to be proposed. The two-dimensional matrix code method refers to using different ECC methods in the horizontal and vertical directions of the matrix to locate multiple-bit errors and achieve error correction. However, the existing matrix codes usually involve a relatively large number of parity bits and have a large redundancy overhead. ECC codes such as RS codes, BCH codes, and Golay codes have relatively strong abilities to correct random errors, but their decoding is relatively complex, and some codes require multiple clock cycles for calculation, increasing the hardware overhead and latency. Summary of the Invention
[0005] The purpose of the present invention is to solve the problems in the prior art that it is difficult to achieve data errors in the memory caused by SEUs and MBSEUs, and there are many parity redundant bits, and to provide an error detection and correction method, system, device, and storage medium based on a two-dimensional matrix.
[0006] To achieve the above object, the present invention adopts the following technical solutions:
[0007] An error detection and correction method based on a two-dimensional matrix proposed by the present invention includes the following steps:
[0008] Obtain the parity bits in the horizontal direction, vertical direction, diagonal direction and data blocks of the two-dimensional matrix;
[0009] Calculate the syndrome according to the parity bit information, and obtain the syndrome matrix of the two-dimensional matrix according to the syndrome;
[0010] Based on the syndrome matrix information, perform preliminary positioning, change the true error bit elements obtained by the preliminary positioning, and obtain a new syndrome matrix;
[0011] Screen out the error candidate bits according to the new syndrome matrix, and use the set of all error candidate bits as the error candidate bit set;
[0012] When the error candidate bit set is empty and the elements in the two-dimensional matrix are error-free, end the decoding; when the error candidate bit set is non-empty and there are error elements in the two-dimensional matrix, then use block parity bit screening and line parity bit screening to correct the error elements in sequence, so as to realize error detection and correction of the two-dimensional matrix.
[0013] Preferably, the method for obtaining the parity bits p in the horizontal direction, vertical direction, diagonal direction and data blocks of the two-dimensional matrix is as follows:
[0014]
[0015] Among them, d1 is the first element of the original data, d2 is the second element of the original data, d k-1 is the (k - 1)-th element of the original data, d k is the k-th element of the original data, k is the total number of bits of the original data, is the exclusive OR operation;
[0016] The method for calculating the syndrome S p is as follows:
[0017]
[0018] Among them, p' is the read parity bit, p" is the parity bit obtained by re-encoding the read data, d1' is the first element in the read data, d2' is the second element in the read data, d k-1 ' is the (k - 1)-th element in the read data, d k ' is the k-th element in the read data.
[0019] Preferably, the method for obtaining the syndrome matrix of the two-dimensional matrix according to the syndrome is as follows:
[0020]
[0021] Among them, i is the number of rows of the two-dimensional matrix, j is the number of columns of the two-dimensional matrix, k is the number of diagonals of the two-dimensional matrix, l is the number of data blocks of the two-dimensional matrix, and S hi is the horizontal syndrome, and S h0 , S h1 , S h2 , S h3 , S h4 , S h5 , S h6 , S h7 are the syndromes corresponding to each row; S vj is the vertical syndrome, and S v0 , S v1 , S v2 , S v3 , S v4 , S v5 , S v6 , S v7 are the syndromes corresponding to each column; S dk is the diagonal syndrome, and S d0 , S d1 , S d2 , S d3 , S d4 , S d5 , S d6 , S d7 are the syndromes corresponding to each diagonal; S bl is the block syndrome, and S b0 , S b1 , S b2 , S b3 are the syndromes corresponding to each data block.
[0022] Preferably, the method for performing preliminary positioning based on the syndrome matrix information and changing the true error bit elements obtained by the preliminary positioning is as follows:
[0023] When the line check bits in the horizontal, vertical, and diagonal directions of the two-dimensional matrix are interleaved to the same element bit, this element bit is the true error bit, and the logical value of the true error bit is flipped to implement the change of the true error bit elements in the two-dimensional matrix.
[0024] Preferably, the method for screening out error candidate bits according to the new syndrome matrix is as follows:
[0025] If the error check bits in any two of the horizontal, vertical, and diagonal direction check bits of the two-dimensional matrix are interleaved at a point, then this point is recorded as an error candidate bit.
[0026] Preferably, the method for correcting error elements by using block check bit screening is as follows:
[0027] For an element in the set of error candidate bits, when the element is the only error candidate bit in a certain data block and the syndrome of this block is 0, the element is not an error bit; when the element is the only error candidate bit in a certain data block and the syndrome of this block is 1, the data is an error bit;
[0028] After traversing all the elements in the set of error candidate bits, remove the elements that are not error bits, and flip the elements that are error bits; if the set of error candidate bits is empty, the decoding ends; if there are error bits, recalculate the set of error candidate bits after re-encoding. If the recalculated set of error candidate bits is empty, the decoding ends; otherwise, start iterating from the preliminary positioning. If no error bits are found and the set of error candidate bits is not empty, use the line check bits for screening.
[0029] Preferably, the method for correcting error elements by using line check bits for screening is as follows:
[0030] For an element in the set of error candidate bits, when the element is the only error candidate bit in a certain row / column / diagonal and the horizontal / vertical / diagonal syndrome is 0, the element is not an error bit; when the element is the only error candidate bit in a certain row / column / diagonal and the horizontal / vertical / diagonal syndrome is 1, the data is an error bit;
[0031] After traversing all the elements in the set of error candidate bits, remove the elements that are not error bits, and flip the elements that are error bits; if the set of error candidate bits is empty, the decoding ends; if there are error bits, recalculate the set of error candidate bits after re-encoding. If the recalculated set of error candidate bits is empty, the decoding ends; otherwise, start iterating from the preliminary positioning until the set of error candidate bits is empty and the decoding ends.
[0032] A system for error detection and correction method based on a two-dimensional matrix proposed by the present invention includes:
[0033] A first data acquisition module, which is used to acquire the check bits in the horizontal direction, vertical direction, diagonal direction and data blocks of the two-dimensional matrix;
[0034] The second data acquisition module is used to calculate the syndrome according to the check bit information, and obtain the syndrome matrix of the two-dimensional matrix according to the syndrome;
[0035] A third data acquisition module, which is used to perform preliminary positioning based on the syndrome matrix information, change the real error bit elements obtained by the preliminary positioning, and obtain a new syndrome matrix;
[0036] A fourth data acquisition module, which is used to screen out the error candidate bits according to the new syndrome matrix, and use the set of all error candidate bits as the set of error candidate bits;
[0037] An error detection and correction module for data, which is used to end the decoding when the set of error candidate bits is empty and there are no errors in the elements of the two-dimensional matrix; when the set of error candidate bits is non-empty and there are error elements in the two-dimensional matrix, block check bit screening and line check bit screening are successively used to correct the error elements to achieve error detection and correction of the two-dimensional matrix.
[0038] A computer device includes a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, the steps of the error detection and correction method based on a two-dimensional matrix are implemented.
[0039] A computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the error detection and correction method based on a two-dimensional matrix are implemented.
[0040] Compared with the prior art, the present invention has the following beneficial effects:
[0041] An error detection and correction method based on a two-dimensional matrix proposed by the present invention uses a two-dimensional matrix model to encode the data of horizontal, vertical, diagonal, and data blocks respectively, generating less redundant check bits. Decoding is performed through the change information of the check bits to achieve correcting 2 random errors or detecting 4 or fewer errors, improving the reliability of the memory in a radiation environment. Based on the two-dimensional matrix, the present invention uses preliminary positioning to exclude interference terms and limit the range of error bits, making the calculation simpler; block check bit screening and line check bit screening are used to correct the error elements, which can exclude non-error bits in the set of error candidate bits and locate some error bits. Therefore, the error detection and correction method proposed by the present invention is convenient for solving the cases of single-event upset and single-event multiple-cell upset, and has less check bit redundancy, a simple encoding and decoding method, and can achieve the purpose of error detection and correction of memory data.
[0042] Furthermore, only simple exclusive OR calculations are involved in encoding and decoding, resulting in less hardware overhead.
[0043] Furthermore, through the general formulas of check bits and syndrome, a theoretical basis is provided for calculating the check bit and syndrome matrix in encoding and decoding.
[0044] Furthermore, the syndrome matrix can detect errors by whether there is a value of 1, and at the same time provides the row, column, diagonal, and data block positions where the error is located, providing a basis for subsequent error positioning.
[0045] Furthermore, by screening the error candidate bits according to the new syndrome matrix, some error bits can be located to simplify the calculation of the error candidate bits.
[0046] The present invention provides a system for error detection and correction method based on a two-dimensional matrix. By dividing the system into a first data acquisition module, a second data acquisition module, a third data acquisition module, a fourth data acquisition module, and an error detection and correction module for data, the modular idea is adopted to make each module independent of each other, which is convenient for unified management of each module. BRIEF DESCRIPTION OF THE DRAWINGS
[0047] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.
[0048] Figure 1 It is a flowchart of the error detection and correction method based on a two-dimensional matrix of the present invention.
[0049] Figure 2 It is a diagram of the two-dimensional matrix arrangement and check bit generation of the present invention.
[0050] Figure 3 It is a decoding flowchart of the present invention.
[0051] Figure 4 It is a system diagram of the error detection and correction system based on a two-dimensional matrix of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0052] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Usually, the components of the embodiments of the present invention described and illustrated in the drawings here can be arranged and designed in various different configurations.
[0053] Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents the selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.
[0054] It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.
[0055] In the description of the embodiments of the present invention, it should be noted that if terms such as "upper", "lower", "horizontal", "inner", etc. are used to indicate the orientation or positional relationship, it is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the invention product is usually placed during use. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, so it should not be construed as a limitation of the present invention. In addition, terms such as "first", "second", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.
[0056] The following further describes the present invention in detail with reference to the drawings:
[0057] A error detection and correction method based on a two-dimensional matrix proposed by the present invention, as Figure 1 shown, includes the following steps:
[0058] S1. Obtain the parity bits on the horizontal direction, vertical direction, diagonal direction and data block of the two-dimensional matrix;
[0059] The method for obtaining the parity bits p on the horizontal direction, vertical direction, diagonal direction and data block of the two-dimensional matrix is as follows:
[0060]
[0061] Among them, d1 is the first element of the original data, d2 is the second element of the original data, d k-1 is the (k - 1)-th element of the original data, d k is the k-th element of the original data, k is the total number of bits of the original data, is the exclusive OR operation;
[0062] S2. Calculate the syndrome according to the parity bit information, and obtain the syndrome matrix of the two-dimensional matrix according to the syndrome;
[0063] The method for calculating the syndrome S p according to the parity bit information is as follows:
[0064]
[0065] Among them, p' is the read parity bit, p" is the parity bit obtained by re-encoding the read data, d1' is the first element in the read data, d2' is the second element in the read data, d k-1 ' is the (k - 1)-th element in the read data, d k ' is the k-th element in the read data.
[0066] The method for obtaining the syndrome matrix of the two-dimensional matrix according to the syndrome is as follows:
[0067]
[0068] Among them, i is the number of rows of the two-dimensional matrix, j is the number of columns of the two-dimensional matrix, k is the number of diagonals of the two-dimensional matrix, l is the number of data blocks of the two-dimensional matrix, and S hi is the horizontal syndrome, S h0 , S h1 , S h2 , S h3 , S h4 , S h5 , S h6 , S h7 is the syndrome corresponding to each row; S vj is the vertical syndrome, S v0 , S v1 , S v2 , S v3 , S v4 , S v5 , S v6 , S v7 is the syndrome corresponding to each column; S dk is the diagonal syndrome, S d0 , S d1 , S d2 , S d3 , S d4 , S d5 , S d6 , S d7 is the syndrome corresponding to each diagonal; S bl is the block syndrome, S b0 , S b1 , S b2 , S b3 is the syndrome corresponding to each data block.
[0069] S3. Perform preliminary positioning based on the syndrome matrix information, change the true error bit elements obtained from the preliminary positioning, and obtain a new syndrome matrix;
[0070] The method of performing preliminary positioning based on the syndrome matrix information and changing the true error bit elements obtained from the preliminary positioning is as follows:
[0071] When the line check bits in the horizontal, vertical, and diagonal directions of the two-dimensional matrix are interleaved to the same element bit, this element bit is the true error bit, and the logical value of the true error bit is flipped to achieve the change of the true error bit elements in the two-dimensional matrix.
[0072] S4. Screen out the error candidate bits according to the new syndrome matrix, and use the set of all error candidate bits as the error candidate bit set;
[0073] The method for screening out error candidate bits according to the new syndrome matrix is as follows:
[0074] If the error check bits in any two directions among the horizontal, vertical, and diagonal directions of the two-dimensional matrix are intertwined at a point, then this point is recorded as an error candidate bit.
[0075] S5. When the set of error candidate bits is empty and there are no errors in the elements of the two-dimensional matrix, decoding ends; when the set of error candidate bits is non-empty and there are error elements in the two-dimensional matrix, block check bit screening and line check bit screening are successively used to correct the error elements, realizing error detection and correction of the two-dimensional matrix.
[0076] The method for correcting error elements by using block check bit screening is as follows:
[0077] For the elements in the set of error candidate bits, when an element is the only error candidate bit in a certain data block and the syndrome of this block is 0, this element is not an error bit; when an element is the only error candidate bit in a certain data block and the syndrome of this block is 1, this data is an error bit.
[0078] After traversing the elements in the set of error candidate bits, the elements that are not error bits are removed, and the elements that are error bits are flipped; if the set of error candidate bits is empty, decoding ends; if there are error bits, after re-encoding, calculate the set of error candidate bits. If the recalculated set of error candidate bits is empty, decoding ends; otherwise, start iterating from the preliminary positioning. If no error bits are found and the set of error candidate bits is non-empty, then use line check bit screening.
[0079] The method for correcting error elements by using line check bit screening is as follows:
[0080] For the elements in the set of error candidate bits, when an element is the only error candidate bit in a certain row / column / diagonal and the horizontal / vertical / diagonal syndrome is 0, this element is not an error bit; when an element is the only error candidate bit in a certain row / column / diagonal and the horizontal / vertical / diagonal syndrome is 1, this data is an error bit.
[0081] After traversing the elements in the set of error candidate bits, the elements that are not error bits are removed, and the elements that are error bits are flipped; if the set of error candidate bits is empty, decoding ends; if there are error bits, after re-encoding, calculate the set of error candidate bits. If the recalculated set of error candidate bits is empty, decoding ends; otherwise, start iterating from the preliminary positioning until the set of error candidate bits is empty, and decoding ends.
[0082] A method for error detection and correction based on a two-dimensional matrix proposed by the present invention realizes the purpose of data error detection and correction by encoding and decoding on the basis of the two-dimensional matrix. The specific steps are as follows:
[0083] Encoding: AsFigure 2 As shown, the data is arranged in the form of a two-dimensional matrix at the logical level, and the check bits are calculated respectively in the horizontal direction, vertical direction, diagonal direction, and data blocks (upper left, upper right, lower left, lower right). That is, in the horizontal direction, taking rows as units, eight check bits h0 to h7 are generated; in the vertical direction, taking columns as units, eight check bits v0 to v7 are generated; in the diagonal direction, the diagonals are grouped so that each diagonal has 8 data bits, and eight check bits d0 to d7 are generated; four check bits b0 to b3 are generated on the data blocks.
[0084] Decoding: It mainly includes steps such as calculating the syndrome matrix, preliminary positioning, calculating the set of error candidate bits, block check bit screening, and line check bit screening. Error detection is performed by checking the information of the initial syndrome matrix; through the judgment of each process, the error bits that meet the requirements are found to achieve the purpose of error correction.
[0085] The following is a further description in combination with Figure 3 :
[0086] Error detection mechanism: For the k-bit data d to be strengthened, the check bit p is calculated through the exclusive OR operation between data bits, as shown in formula (1). When an odd number of data bits are flipped, the check bit p is also flipped.
[0087]
[0088] During decoding, first read out the k-bit data d' from the memory, the read check bit p', and the check bit p" obtained by re-encoding the data d'. Then, the syndrome S can be calculated according to formula (2) p . When an odd number of errors occur in the codeword composed of the check bit and the data, the value of the syndrome S p is 1.
[0089]
[0090] Encoding:
[0091] The first step is to logically divide the 64-bit data D 0,0 …D 7,7 (as Figure 2 shown) into a two-dimensional matrix of 8 rows and 8 columns at the logical level. It should be noted that the arranged two-dimensional matrix is only logically divided here to facilitate the calculation of the corresponding check bits and will not affect the actual layout of the storage unit.
[0092] The second step is to calculate the check bits. Use Figure 2The grouping method in it is used to calculate its parity bits respectively by formula (1), generating a total of 28 parity bits: h0 to h7, v0 to v7, d0 to d7, and b0 to b3. Among them, a total of 24 parity bits are generated in the horizontal, vertical, and diagonal directions, which are mainly used to find candidate bits and the real error bits, and are collectively referred to as line parity bits below; the parity bits calculated for the data blocks are used to determine whether the data has changed and assist in finding the real error bits, and are collectively referred to as block parity bits below.
[0093] Decoding: As can be seen from the encoding method, a data D i,j participates in the calculation of four parity bits. Therefore, when the data D i,j flips, it will affect the four parity bits related to the data D i,j ; while when a parity bit changes, it will only affect one parity bit, and two data bits will affect at most two parity bits together. Based on the above encoding characteristics, the data D i,j is decoded, and the decoding steps are as follows:
[0094] 1). Calculate the syndrome matrix H: When decoding, all the data D i,j needs to be re-encoded first. According to formula (2), the syndromes of different dimensions and different groups are calculated respectively to form the syndrome matrix H, that is:
[0095]
[0096] Among them, S hi , S vj , S dk , S bl represent the horizontal syndrome, vertical syndrome, diagonal syndrome, and block syndrome respectively, and 0 is used to fill the matrix. When the syndrome is 1, it means that the codeword composed of the data D i,j and its calculated parity bits on this row / column / diagonal / data block has an odd number of errors.
[0097] Error detection is mainly judged by the element values in the initially calculated syndrome matrix H. If all element values are 0, it means there is no error; otherwise, an error occurs, and error correction is performed within the error correction ability or a detected error is prompted.
[0098] 2). Preliminary positioning: Only use the change information of the line parity bits for preliminary positioning. When the line parity bits in the three directions are intertwined to the same data bit, this data bit is the real error bit. Based on this, the logical value of the error bit that meets the requirements is flipped for the next operation.
[0099] 3). Obtain the set of error candidate bits
[0100] If the data is modified during the initial error correction, the data is re-encoded and the syndrome matrix is updated. Based on the existing syndrome matrix, the error candidate bits are selected using the line check bits. Since the lines in any two directions intersect at a point, this point is selected as the error candidate bit, and all the error candidate bits form the error candidate bit set.
[0101] When the error candidate bit set is empty, the data D i,j has no error, and the decoding ends.
[0102] When the error candidate bit set is non-empty, the error bit is included in the error candidate bit set, and further judgment of the error bit is required.
[0103] 4) Block check bit screening
[0104] For the data in the error candidate bit set, when the data D i,j is the only error candidate bit in a certain data block and the syndrome of this block is 0, this data is not an error bit; when the data D i,j is the only error candidate bit in a certain data block and the syndrome of this block is 1, this data is an error bit.
[0105] After traversing all the elements of the error candidate bit set, the data that is not an error bit is removed, and the elements that are error bits are flipped. If the error candidate bit set is empty, the decoding ends; if an error bit is found, after re-encoding, the error candidate bit set is calculated. If the recalculated error candidate bit set is empty, the decoding ends; otherwise, start from the preliminary positioning and iterate according to the process. If no error bit is found and the error candidate bit set is non-empty, then use the line check bits for screening.
[0106] 5) Line check bit screening
[0107] For the data in the error candidate bit set, when the data D i,j is the only error candidate bit in a certain row / column / diagonal and the horizontal / vertical / diagonal syndrome is 0, this data is not an error bit; when the data D i,j is the only error candidate bit in a certain row / column / diagonal and the horizontal / vertical / diagonal syndrome is 1, this data is an error bit.
[0108] After traversing all the elements of the error candidate set, the data that is not an error bit is removed, and the elements that are error bits are flipped. If the error candidate bit set is empty, the decoding ends; if an error bit is found, after re-encoding, the error candidate bit set is calculated. If the recalculated error candidate bit set is empty, the decoding ends; otherwise, start from the preliminary positioning and iterate according to the process. If no error bit is found and the error candidate bit set is non-empty, continue to use the line check bits for screening until the error candidate bit set is empty and the decoding ends.
[0109] A system for error detection and correction method based on two-dimensional matrix proposed by the present invention, as Figure 4 shown, includes: a first data acquisition module, a second data acquisition module, a third data acquisition module, a fourth data acquisition module, and an error detection and correction module for data;
[0110] The first data acquisition module is used to acquire the parity bits on the horizontal direction, vertical direction, diagonal direction and data blocks of the two-dimensional matrix;
[0111] The second data acquisition module is used to calculate the syndrome according to the parity bit information, and obtain the syndrome matrix of the two-dimensional matrix according to the syndrome;
[0112] The third data acquisition module is used to perform preliminary positioning based on the syndrome matrix information, change the real error bit elements obtained by the preliminary positioning, and obtain a new syndrome matrix;
[0113] The fourth data acquisition module is used to screen out the error candidate bits according to the new syndrome matrix, and take the set of all error candidate bits as the error candidate bit set;
[0114] The error detection and correction module for data is used to end the decoding when the error candidate bit set is empty and the elements in the two-dimensional matrix are error-free; when the error candidate bit set is non-empty and there are error elements in the two-dimensional matrix, block parity bit screening and line parity bit screening are successively used to correct the error elements, so as to realize error detection and correction of the two-dimensional matrix.
[0115] A terminal device provided by an embodiment of the present invention. The terminal device of this embodiment includes: a processor, a memory, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps in the above-mentioned method embodiments are implemented. Alternatively, when the processor executes the computer program, the functions of each module / unit in the above-mentioned device embodiments are implemented.
[0116] The computer program can be divided into one or more modules / units, and the one or more modules / units are stored in the memory and executed by the processor to complete the present invention.
[0117] The terminal device can be a computing device such as a desktop computer, a notebook, a palm computer, and a cloud server. The terminal device may include, but is not limited to, a processor and a memory.
[0118] The processor may be a Central Processing Unit (CPU), or may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field-Programmable Gate Arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
[0119] The memory can be used to store the computer program and / or module(s). By running or executing the computer program and / or module(s) stored in the memory, and by invoking the data stored in the memory, the processor implements various functions of the terminal device.
[0120] If the modules / units integrated in the terminal device are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, to implement all or part of the processes in the above method embodiments of the present invention, it can also be completed by instructing relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the above method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in the form of source code, object code, executable file, or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disc, computer memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc. It should be noted that the content included in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium does not include electrical carrier signals and telecommunication signals.
[0121] An error detection and correction method based on a two-dimensional matrix proposed by the present invention adopts a two-dimensional matrix model to encode the data of horizontal, vertical, diagonal, and data blocks respectively, generating 28 check bits with less check bit redundancy. Decoding is performed through the change information of the check bits to achieve correcting random 2-bit errors (data bits and check bits) or detecting errors within 4 bits (data bits and check bits), improving the reliability of the memory in a radiation environment. At the same time, only simple exclusive OR calculations are involved in the encoding and decoding, with relatively small hardware overhead. The purpose of the present invention is to solve the problem that the data of the memory is incorrect due to single-event upsets and single-event multiple cell upsets. An ECC method is designed based on a two-dimensional matrix (m rows and n columns). This method has less check redundancy bits, a simple encoding and decoding method, and can achieve the purpose of error detection and correction of memory data. Compared with the ECC encoding that corrects 1 bit and detects 2 bits, the technology of the present invention has the ability to correct 2 bits and detect 4 bits, and can support the anti-radiation hardening requirements of high-grade devices. Compared with the existing ECC encoding that corrects 2 bits and detects 3 / 4 bits, the encoding of the present invention uses fewer check bits and does not use complex Hamming codes, which can greatly reduce the hardware cost of implementation and achieve devices with higher operating frequencies under the same process conditions.
[0122] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, various changes and modifications can be made to the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. A method for error detection and correction based on a two-dimensional matrix, characterized in that, It includes the following steps: Obtain the parity bits in the horizontal direction, vertical direction, diagonal direction and data blocks of the two-dimensional matrix; Calculate the syndrome according to the parity bit information, and obtain the syndrome matrix of the two-dimensional matrix according to the syndrome; Perform preliminary positioning based on the syndrome matrix information, change the true error bit elements obtained by the preliminary positioning, and obtain a new syndrome matrix; Screen out the error candidate bits according to the new syndrome matrix, and use the set of all error candidate bits as the error candidate bit set; When the error candidate bit set is empty and the elements in the two-dimensional matrix are error-free, the decoding ends; when the error candidate bit set is non-empty and there are error elements in the two-dimensional matrix, block parity bit screening and line parity bit screening are successively used to correct the error elements, realizing error detection and correction of the two-dimensional matrix; Method for obtaining check bits in horizontal, vertical, diagonal directions and on data blocks of a two-dimensional matrix is as follows: (1) Among them, is the first element of the original data, is the second element of the original data, is the (k - 1)-th element of the original data, is the k-th element of the original data, is the total number of bits of the original data, is the exclusive OR operation; Calculate the syndrome based on the check bit information The method is as follows: (2) wherein, is the read check bit, is the check bit obtained by re - encoding the read data, is the first element in the read data, is the second element in the read data, is the (k - 1)th element in the read data, is the kth element in the read data; The method for obtaining the syndrome matrix of the two-dimensional matrix according to the syndrome is as follows: Among them, is the number of rows of the two-dimensional matrix, is the number of columns of the two-dimensional matrix, is the number of diagonals of the two-dimensional matrix, is the number of data blocks of the two-dimensional matrix, is the horizontal syndrome, is the syndrome corresponding to each row; is the vertical syndrome, is the syndrome corresponding to each column; is the diagonal syndrome, is the syndrome corresponding to each diagonal; is the block syndrome, is the syndrome corresponding to each data block.
2. The method for error detection and correction based on a two-dimensional matrix according to claim 1, characterized in that, The method for performing preliminary positioning based on the syndrome matrix information and changing the true error bit elements obtained by the preliminary positioning is as follows: When the line parity bits in the horizontal direction, vertical direction and diagonal direction of the two-dimensional matrix are interleaved to the same element bit, this element bit is the true error bit, and the logical value of the true error bit is flipped to realize the change of the true error bit elements in the two-dimensional matrix.
3. The method for error detection and correction based on a two-dimensional matrix according to claim 1, characterized in that, The method for screening out the error candidate bits according to the new syndrome matrix is as follows: If the error check bits in any two of the horizontal direction, vertical direction and diagonal direction of the two-dimensional matrix are interleaved at a point, then this point is recorded as an error candidate bit.
4. The method for error detection and correction based on a two-dimensional matrix according to claim 1, characterized in that, The method for correcting the error elements by using block parity bit screening is as follows: For the elements in the error candidate bit set, when the element is the only error candidate bit in a certain data block and the syndrome of this data block is 0, this element is not an error bit; when the element is the only error candidate bit in a certain data block and the syndrome of this block is 1, this data is an error bit; After traversing the elements in the error candidate bit set, remove the elements that are not error bits and flip the elements that are error bits; if the error candidate bit set is empty, the decoding ends; If there are error bits, calculate the error candidate bit set after re-encoding. If the recalculated error candidate bit set is empty, the decoding ends, otherwise iterate from the preliminary positioning. If no error bits are found and the error candidate bit set is non-empty, then use the line parity bits for screening.
5. The method for error detection and correction based on a two-dimensional matrix according to claim 4, characterized in that, The method for correcting the error elements by using line parity bit screening is as follows: For the elements in the error candidate bit set, when the element is the only error candidate bit in a certain row / column / diagonal and the horizontal / vertical / diagonal syndrome is 0, this element is not an error bit; when the element is the only error candidate bit in a certain row / column / diagonal and the horizontal / vertical / diagonal syndrome is 1, this data is an error bit; After traversing the elements in the error candidate bit set, remove the elements that are not error bits and flip the elements that are error bits; if the error candidate bit set is empty, the decoding ends; If there are error bits, calculate the error candidate bit set after re-encoding. If the recalculated error candidate bit set is empty, the decoding ends, otherwise iterate from the preliminary positioning until the error candidate bit set is empty and the decoding ends.
6. A system using the method for error detection and correction based on a two-dimensional matrix according to any one of claims 1 to 5, characterized in that, It includes: The first data acquisition module, which is used to acquire the horizontal direction, vertical direction, diagonal direction of the two-dimensional matrix, and the parity bits on the data block; The second data acquisition module is used to calculate the syndrome according to the parity bit information, and acquire the syndrome matrix of the two-dimensional matrix according to the syndrome; The third data acquisition module, which is used to perform preliminary positioning based on the syndrome matrix information, change the real error bit elements obtained by the preliminary positioning, and acquire a new syndrome matrix; The fourth data acquisition module, which is used to screen out the error candidate bits according to the new syndrome matrix, and use the set of all error candidate bits as the error candidate bit set; The error detection and correction module of the data, which is used to end the decoding when the error candidate bit set is empty and the elements in the two-dimensional matrix are error-free; when the error candidate bit set is non-empty and there are error elements in the two-dimensional matrix, the block parity bit screening and line parity bit screening are successively used to correct the error elements, so as to realize the error detection and correction of the two-dimensional matrix.
7. A computer device, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it realizes the steps of the error detection and correction method based on the two-dimensional matrix described in any one of claims 1 to 5.
8. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it realizes the steps of the error detection and correction method based on the two-dimensional matrix described in any one of claims 1 to 5.
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