A CMOS temperature sensor circuit
By combining a current generator, a bidirectional current integrator, and a dual threshold comparator in the CMOS temperature sensor circuit, the problems of high power consumption and high cost of CMOS temperature sensors over a wide temperature range are solved, achieving stable and economical temperature detection.
Patent Information
- Application Number
- CN202211169862.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-23
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2042-09-23
AI Technical Summary
Existing CMOS temperature sensors consume high power and are expensive over a wide temperature range, making it difficult to balance stability and cost-effectiveness.
A combined circuit structure consisting of a current generator, a bidirectional current integrator, a reference voltage generator, and a dual threshold comparator is used to generate a current proportional to temperature, which is then integrated and compared to output a first-order linear signal, simplifying circuit design.
Stable temperature detection over a wide temperature range was achieved, reducing power consumption and chip footprint, and improving the circuit's economy and reliability.
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Figure CN115452186B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of sensors, in particular to a CMOS temperature sensor circuit. BACKGROUND
[0002] Temperature sensors are widely used in various circuit systems as the core components of temperature measuring functional instruments, and are often used in some systems that are very sensitive to temperature in order to ensure the normal operation of the system. Therefore, stable and reliable temperature sensors are increasingly valued.
[0003] At present, due to the wide application of CMOS technology, temperature sensor chips based on CMOS technology have become the research focus at present. In order to obtain a wider temperature detection range, complex circuits are often involved, which makes the temperature sensor itself occupy more chip area and consume more power, thereby increasing the cost. SUMMARY
[0004] In order to solve the problem that the existing temperature sensor cannot balance the wide temperature range, power consumption and cost, the present application provides a CMOS temperature sensor circuit which can ensure a wide temperature range while reducing power consumption and cost.
[0005] The technical scheme is as follows: a CMOS temperature sensor circuit, characterized in that it comprises:
[0006] a current generator for generating a current proportional to temperature;
[0007] a bidirectional current integrator for integrating the current in a positive or negative direction to obtain an output voltage Vint;
[0008] a reference voltage generator for generating reference voltages VH and VL with a temperature system of 0;
[0009] a double-threshold comparator for comparing the reference voltages VH and VL with the output voltage Vint respectively to obtain an output signal f;
[0010] The current generator comprises a PMOS tube PM1 and a PMOS tube PM2, the drain and the gate of the PMOS tube PM2 are connected, the gate of the PMOS tube PM1, the source end of an NMOS tube NM4 are connected, the drain end of the PMOS tube PM1 is connected with the gate and the source of an NMOS tube NM3, the gate end of the NMOS tube NM4, the drain end of the NMOS tube NM3 is connected with the gate and the source of an NMOS tube NM1, the gate of an NMOS tube NM2, the drain of the NMOS tube NM4 is connected with the source of the NMOS tube NM2, the drain of the NMOS tube NM2 is connected with one end of a resistor R, the other end of the resistor R and the drain of the NMOS tube NM1 are grounded, the source of the PMOS tube PM1 and the source of the PMOS tube PM2 are connected with VDD, the drain of the PMOS tube PM2 is the current output end of the current generator, and the generated current Ichagre is:
[0011] ------------- (1)
[0012] wherein, , is the electron mobility, is the gate capacitance, W1 / L1 is the width-length ratio of the NMOS tube NM1, K is the proportional coefficient of the NMOS tube NM2 and the NMOS tube NM1,
[0013] The first-order derivative of formula (1) with respect to temperature is:
[0014] ------------- (2);
[0015] wherein, TC Icharge is the temperature coefficient of the current Ichagre, TC R is the temperature coefficient of the resistor R, α and μ are constants, and T0 is the room temperature.
[0016] The bidirectional current integrator comprises a PMOS tube PM3, the gate of the PMOS tube PM3 receives the current output by the current generator, the source is connected with VDD, and the drain is connected with the source of a PMOS tube PM4 and the source of a PMOS tube PM5; the drain of the PMOS tube PM4 is connected with the source and the gate of an NMOS tube NM5 and the gate of an NMOS tube NM6; the drain of the PMOS tube PM5 is connected with the source of the NMOS tube NM6 and one end of a capacitor C; the drain of the NMOS tube NM6, the drain of the NMOS tube NM6 and the other end of the capacitor C are grounded; the drain end of the PMOS tube PM5 outputs the integrated voltage; the gate of the PMOS tube PM4 and the gate of the PMOS tube PM5 are respectively feedback value receiving ends;
[0017] The double threshold comparator comprises a high threshold comparator and a low threshold comparator, the input end of the high threshold comparator inputs a reference voltage VH and an output voltage Vint, the input end of the low threshold comparator inputs a reference voltage VL and the output voltage Vint, the output end of the high threshold comparator is connected with the S end of an RS flip-flop, the output end of the low threshold comparator is connected with the R end of the RS flip-flop, the Q end of the RS flip-flop is connected with the input end of a first inverter, the S end of the RS flip-flop is connected with the input end of a second inverter, the output end of the first inverter and the output end of the second inverter are both feedback value output ends, the output end of the second inverter is further connected with the input end of a third inverter, and the output end of the third inverter outputs a signal f of a temperature sensor, and f is expressed as:
[0018] -----------(3)
[0019] The first order derivative of the output signal f to temperature can be expressed as:
[0020] -----------(4)
[0021] Wherein f0 is the output signal frequency at room temperature, and T0 is room temperature.
[0022] After the application, the current generator generates a current proportional to temperature, the output voltage is integrated after passing through a bidirectional current integrator, the output signal is obtained by comparing the reference voltage VH and VL with the double threshold comparator, the output signal has a first order linear relationship with temperature change, has a wide temperature range, and has a simple circuit structure, saves the chip area, and reduces the power consumption and cost. BRIEF DESCRIPTION OF DRAWINGS
[0023] Figure 1 It is a system block diagram of the application;
[0024] Figure 2 It is a circuit principle diagram of the application;
[0025] Figure 3 It is a relationship diagram of the output signal frequency and temperature. DETAILED DESCRIPTION
[0026] As shown in Figure 1 , Figure 2 Fig. 1, a CMOS temperature sensor circuit comprises:
[0027] A current generator 101 generates a current proportional to temperature;
[0028] The bidirectional current integrator 102 integrates the current in positive or negative direction to obtain an output voltage Vint.
[0029] The reference voltage generator 104 generates reference voltages VH and VL with a temperature system of 0.
[0030] The double threshold comparator 103 compares the reference voltages VH and VL with the output voltage Vint respectively to obtain an output signal f.
[0031] The current generator comprises a PMOS tube PM1 and a PMOS tube PM2, the drain and gate of the PMOS tube PM2 are connected to each other and connected to the gate of the PMOS tube PM1 and the source end of an NMOS tube NM4, the drain of the PMOS tube PM1 is connected to the gate and source of an NMOS tube NM3, the gate of the NMOS tube NM4, the drain of the NMOS tube NM3 is connected to the gate and source of an NMOS tube NM1 and the gate of an NMOS tube NM2, the drain of the NMOS tube NM4 is connected to the source of the NMOS tube NM2, the drain of the NMOS tube NM2 is connected to one end of a resistor R, the other end of the resistor R and the drain of the NMOS tube NM1 are both grounded, the source of the PMOS tube PM1 and the source of the PMOS tube PM2 are both connected to VDD, and the drain of the PMOS tube PM2 is the current output end of the current generator, and the generated current Ichagre is:
[0032] (1)
[0033] wherein, , is the electron mobility, is the gate capacitance, W1 / L1 is the width-length ratio of the NMOS tube NM1, and K is the proportional coefficient of the NMOS tube NM2 and the NMOS tube NM1,
[0034] Taking the first-order derivative of the formula (1) with respect to temperature, then:
[0035] (2);
[0036] wherein, TC Icharge is the temperature coefficient of the current Ichagre, TC R is the temperature coefficient of the resistor R, and α and μ are constants, and T0 is the room temperature of 27℃.
[0037] The current Ichagre generated by the current generator is only related to the temperature coefficient of the resistor.
[0038] The bidirectional current integrator mainly functions to bidirectionally integrate the current Ichagre generated by the current generator according to the high and low levels of the output signal f, and the voltage generated by the integration is Vint. The bidirectional current integrator comprises a PMOS transistor PM3, the gate of the PMOS transistor PM3 receives the current output by the current generator, the source is connected to VDD, and the drain is connected to the source of a PMOS transistor PM4 and the source of a PMOS transistor PM5, the drain of the PMOS transistor PM4 is connected to the source and the gate of an NMOS transistor NM5 and the gate of an NMOS transistor NM6, the drain of the PMOS transistor PM5 is connected to the source of the NMOS transistor NM6 and one end of a capacitor C, the drain of the NMOS transistor NM6, the drain of the NMOS transistor NM6 and the other end of the capacitor C are all grounded, the drain of the PMOS transistor PM5 outputs the voltage after the integration, and the gates of the PMOS transistor PM4 and the PMOS transistor PM5 are respectively feedback value receiving ends. Since the temperature coefficient of the capacitor C is particularly small, about 10 -6 / C, the temperature coefficient of the voltage Vint generated by the upper plate of the capacitor is only related to the temperature coefficient of Ichagre.
[0039] The reference voltage generator generates two threshold voltages VH and VL, wherein the temperature coefficients of VH and VL are 0.
[0040] The dual-threshold comparator comprises a high threshold comparator CH and a low threshold comparator CL, the input end of the high threshold comparator CH inputs the reference voltage VH and the output voltage Vint, the input end of the low threshold comparator CL inputs the reference voltage VL and the output voltage Vint, the output end of the high threshold comparator CH is connected to the S end of an RS flip-flop, the output end of the low threshold comparator CL is connected to the R end of the RS flip-flop, the Q end of the RS flip-flop is connected to the input end of a first inverter 201, the end of the RS flip-flop is connected to the input end of a second inverter 202, the output end of the first inverter 201 and the output end of the second inverter 202 are both feedback value output ends, the output end of the second inverter 202 is further connected to the input end of a third inverter 203, and the output end of the third inverter 203 outputs the signal f of the temperature sensor, and f is expressed as:
[0041] -----------(3)
[0042] The first-order derivative of the output signal f with respect to temperature can be expressed as:
[0043] -----------(4)
[0044] wherein f0 is the output signal frequency at room temperature, and T0 is room temperature 27℃. The frequency of the clock generated by the oscillator reflects the temperature characteristic. As can be seen, the output signal and the temperature change are in a first-order linear relationship, such asFigure 3 The application is shown in the figure.
[0045] The circuit structure of the application is simple, can save chip area, reduce cost, and the circuit structure is stable and has a large temperature detection range.
Claims
1. A CMOS temperature sensor circuit, characterized in that, It includes: A current generator produces a current that is proportional to temperature; A bidirectional current integrator integrates the current in either the positive or negative direction to obtain the output voltage Vint. A reference voltage generator produces reference voltages VH and VL when the temperature system is 0. A dual threshold comparator compares the reference voltages VH and VL with the output voltage Vint, respectively, to obtain the output signal f; The current generator includes PMOS transistors PM1 and PM2. The drain and gate of PMOS transistor PM2 are connected together and connected to the gate of PMOS transistor PM1 and the source of NMOS transistor NM4. The drain of PMOS transistor PM1 is connected to the gate and source of NMOS transistor NM3 and the gate of NMOS transistor NM4. The drain of NMOS transistor NM3 is connected to the gate and source of NMOS transistor NM1 and the gate of NMOS transistor NM2. The drain of NMOS transistor NM4 is connected to the source of NMOS transistor NM2. The drain of NMOS transistor NM2 is connected to one end of resistor R. The other end of resistor R and the drain of NMOS transistor NM1 are both grounded. The sources of PMOS transistors PM1 and PM2 are both connected to VDD. The drain of PMOS transistor PM2 is the current output terminal of the current generator, and the generated current Ichagre is: in, μ n For electron mobility, C ox Let W1 be the gate capacitance, W1 / L1 be the width-to-length ratio of NMOS transistor NM1, and K be the scaling factor of NMOS transistor NM2 to NMOS transistor NM1. Taking the first derivative of equation (1) with respect to temperature, we have: Among them, TC Icharge TC is the temperature coefficient of the current Ichagre. R Let R be the temperature coefficient of resistance, α and μ be constants, and T0 be room temperature. The bidirectional current integrator includes a PMOS transistor PM3. The gate of PMOS transistor PM3 receives the current output from the current generator, its source is connected to VDD, and its drain is connected to the source of PMOS transistor PM4 and the source of PMOS transistor PM5. The drain of PMOS transistor PM4 is connected to the source and gate of NMOS transistor NM5 and the gate of NMOS transistor NM6. The drain of PMOS transistor PM5 is connected to the source of NMOS transistor NM6 and one end of capacitor C. The drain of NMOS transistor NM6, the drain of NMOS transistor NM6, and the other end of capacitor C are all grounded. The drain of PMOS transistor PM5 outputs the integrated voltage. The gates of PMOS transistor PM4 and PMOS transistor PM5 are feedback value receiving terminals.
2. The CMOS temperature sensor circuit according to claim 1, characterized in that, The dual threshold comparator includes a high threshold comparator and a low threshold comparator. The high threshold comparator receives a reference voltage VH as its input and outputs a voltage Vint as its output. The low threshold comparator receives a reference voltage VL as its input and outputs a voltage Vint as its output. The output of the high threshold comparator is connected to the S terminal of an RS flip-flop, and the output of the low threshold comparator is connected to the R terminal of the RS flip-flop. The Q terminal of the RS flip-flop is connected to the input of a first inverter. The first inverter's output is connected to the input of the second inverter. Both the first and second inverters' outputs are feedback value outputs. The second inverter's output is also connected to the input of the third inverter. The third inverter's output outputs a signal f from the temperature sensor, where f is represented as: Combining formulas (1) and (2), the first derivative of the output signal f with respect to temperature can be expressed as: f(T)=f0(1+TC Icharge (T-T0))-----------(4) Where f0 is the output signal frequency at room temperature, and T0 is the room temperature.
Citation Information
Patent Citations
CMOS temperature sensor circuit
CN218273198U