amplification circuit
By introducing an aliasing cancellation circuit into the amplifier and using an energy storage module and a frequency-selective filter or delay circuit operating alternately, the aliasing problem caused by the switched capacitor is solved, and the quality of the output signal is improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- MEDIATEK INC
- Filing Date
- 2022-06-01
- Publication Date
- 2026-05-19
AI Technical Summary
In amplifiers with input capacitors, feedback circuits controlled by switched capacitors cause aliasing tone to mix with the clock signal, affecting the quality of the output signal.
An aliasing cancellation circuit is employed, including an energy storage module and a frequency-selective filter or delay circuit, which uses alternating charging and discharging of capacitors to eliminate or reduce aliasing in the feedback signal.
It effectively reduces or eliminates aliasing in the feedback signal, improving the quality of the output signal.
Smart Images
Figure CN115483892B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention generally relate to an amplification technique, and more specifically, to an amplification circuit having an aliasing tone cancellation circuit. Background Technology
[0002] In amplifiers with input capacitors for DC blocking, switched capacitors are typically used as feedback circuits to provide high impedance and stabilize the operating points at the amplifier's input and output. However, since the switched capacitors are controlled by a clock signal, the amplifier's output signal will mix with the clock signal, producing a lower-frequency aliasing tone at the amplifier's input. This aliasing tone is also processed by the amplifier, thus affecting the output signal. Summary of the Invention
[0003] The following summary is illustrative only and is not intended to be limiting in any way. That is, it provides an overview to introduce the concepts, key points, benefits, and advantages of the novel and non-obvious techniques described herein. Selected embodiments are further described in the detailed description below. Therefore, the following summary is neither intended to identify the essential features of the claimed subject matter nor to define the scope of the claimed subject matter.
[0004] One of the objectives of this application is to provide an amplifier circuit with an aliasing cancellation circuit that can reduce aliasing caused by feedback circuitry.
[0005] In a first aspect, the present invention provides an amplifier circuit, comprising: a first input terminal for receiving a first input signal; a first capacitor coupled to the first input terminal; an amplifier coupled to the first capacitor for receiving the first input signal through the first capacitor to generate a first output signal; a first feedback circuit coupled between the first input terminal and the first output terminal of the amplifier for generating a first feedback signal based on the first output signal, wherein the first feedback circuit includes a first energy storage module, the first energy storage module includes a first switched capacitor; and a first aliasing tone cancellation circuit coupled between the first input terminal of the amplifier circuit and the first input terminal of the amplifier for generating a first signal based on the first input signal to cancel or reduce the aliasing tone of the first feedback signal.
[0006] In some embodiments, the first aliasing tone cancellation circuit includes a second energy storage module, which includes a second switched capacitor.
[0007] In some embodiments, the second switched capacitor is a copy of the first switched capacitor.
[0008] In some embodiments, the first aliasing tone cancellation circuit further includes: a frequency selective filter; wherein the first input signal is processed by the frequency selective filter to generate a processed signal, and the second energy storage module receives the processed signal and generates the first signal to eliminate or reduce the aliasing tone of the first feedback signal.
[0009] In some embodiments, the first aliasing tone cancellation circuit further includes: a frequency selective filter; and a delay circuit; wherein the first input signal is processed by the frequency selective filter and the delay circuit to generate a processed signal, and the second energy storage module receives the processed signal and generates the first signal to eliminate or reduce the aliasing tone of the first feedback signal.
[0010] In some embodiments, the first aliasing tone cancellation circuit further includes: a frequency selective filter; a delay circuit; and a voltage scaling circuit; wherein the first input signal is processed by the frequency selective filter, the delay circuit, and the voltage scaling circuit to generate a processed signal, and the second energy storage module receives the processed signal and generates the first signal to eliminate or reduce the aliasing tone of the first feedback signal.
[0011] In some embodiments, the first feedback circuit further includes a voltage scaling circuit.
[0012] In some embodiments, the first feedback circuit further includes a voltage scaling circuit and a frequency selective filter.
[0013] In some embodiments, the second switched capacitor has an earlier sampling edge than the first switched capacitor.
[0014] In some embodiments, the first aliasing tone cancellation circuit further includes a voltage scaling circuit; wherein the first input signal is processed by the voltage scaling circuit to generate a processed signal, and the second energy storage module receives the processed signal and generates the first signal to eliminate or reduce the aliasing tone of the first feedback signal.
[0015] In some embodiments, the amplifier circuit further includes: a second input terminal for receiving a second input signal; a second capacitor coupled to the second input terminal; a second feedback circuit coupled between the second input terminal and the second output terminal of the amplifier for generating a second feedback signal based on the second output signal, wherein the second feedback circuit includes a third energy storage module, the third energy storage module including a third switched capacitor; and a second aliasing cancellation circuit coupled between the second input terminal of the amplifier circuit and the second input terminal of the amplifier for generating a second signal based on the second input signal to eliminate or reduce the aliasing tone of the second feedback signal; wherein the first input signal and the second input signal constitute a differential signal, and the amplifier is used to receive the first input signal and the second input signal through the first capacitor and the second capacitor to generate the first output signal and the second output signal.
[0016] In some embodiments, the first aliasing tone cancellation circuit includes a second energy storage module having a second switched capacitor, and the second aliasing tone cancellation circuit includes a fourth energy storage module having a fourth switched capacitor.
[0017] In some embodiments, the second switched capacitor is a copy of the first switched capacitor, and the fourth switched capacitor is a copy of the third switched capacitor.
[0018] The present invention is provided by way of example and is not intended to be limiting. Other embodiments and advantages are described in the following detailed description. The invention is defined by the claims. These and other objects of the invention will be readily understood by those skilled in the art upon reading the following detailed description of the preferred embodiments shown in the accompanying drawings. A detailed description will be given in the following embodiments with reference to the accompanying drawings. Attached Figure Description
[0019] The accompanying drawings (in which the same numerals denote the same components) illustrate embodiments of the present invention. The included drawings are used to provide a further understanding of embodiments of the present disclosure, and are incorporated in and constitute a part of the present disclosure. The drawings illustrate implementations of embodiments of the present disclosure and, together with the description, serve to explain the principles of the embodiments of the present disclosure. It is understood that the drawings are not necessarily drawn to scale, as some components may be shown out of proportion to actual dimensions in order to clearly illustrate the concepts of the embodiments of the present disclosure.
[0020] Figure 1 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0021] Figure 2 An embodiment of the present invention is shown Figure 1 The first stage of the amplifier circuit shown.
[0022] Figure 3 An embodiment of the present invention is shown Figure 1 The second stage of the amplifier circuit shown.
[0023] Figure 4 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0024] Figure 5 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0025] Figure 6 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0026] Figure 7 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0027] Figure 8 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0028] Figure 9 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0029] Figure 10 An embodiment of the present invention is shown Figure 9 The switching control mechanism of the amplifier circuit shown.
[0030] Figure 11 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0031] Figure 12 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0032] Figure 13 This is a schematic diagram of an amplifier circuit according to an embodiment of the present invention.
[0033] In the following detailed description, numerous specific details are set forth for illustrative purposes so that those skilled in the art may gain a more thorough understanding of the embodiments of the invention. However, it will be apparent that one or more embodiments may be practiced without these specific details, and different embodiments may be combined as needed, and should not be limited to the embodiments illustrated in the accompanying drawings. Detailed Implementation
[0034] The following description illustrates preferred embodiments of the present invention and is intended only to exemplify the technical features of the invention, not to limit the scope of the invention. Throughout this specification and claims, certain terms are used to refer to specific elements. Those skilled in the art should understand that manufacturers may use different names for the same element. Therefore, this specification and claims do not distinguish elements by differences in name, but rather by differences in function. The terms "element," "system," and "device" used in this invention can refer to computer-related entities, where the computer can be hardware, software, or a combination of hardware and software. The terms "comprising" and "including" as used in the following description and claims are open-ended terms and should be interpreted as "comprising, but not limited to...". Furthermore, the term "coupled" refers to an indirect or direct electrical connection. Therefore, if a device is described as coupled to another device, it means that the device can be directly electrically connected to the other device, or indirectly electrically connected to the other device through other devices or connection means.
[0035] Unless otherwise indicated, the corresponding numbers and symbols in the various figures generally refer to the corresponding parts. The figures are drawn to clearly illustrate the relevant parts of the embodiments and are not necessarily drawn to scale.
[0036] The terms "basically" or "roughly" as used in this document mean that, within an acceptable range, a person skilled in the art can solve the technical problem to be solved and basically achieve the desired technical effect. For example, "roughly equal to" means a method that a person skilled in the art can accept with a certain margin of error from "exactly equal to" without affecting the correctness of the result.
[0037] Figure 1 This is a schematic diagram of an amplifier circuit 100 according to an embodiment of the present invention. Figure 1As shown, the amplifier circuit 100 (e.g., a DC-blocking amplifier) includes two input terminals N1 and N2, two capacitors C1 and C2, an amplifier 190, two feedback capacitors C3 and C4, and four storage blocks 110, 120, 130, and 140. In this embodiment, capacitors C1 and C2 serve as DC-blocking circuits, and are coupled between the input terminals of amplifier 190 and the input terminals N1 and N2 of amplifier circuit 100. For example, one end of capacitor C1 is coupled to input terminal N1, and the other end of capacitor C1 is coupled to the positive input node of amplifier 190; one end of capacitor C2 is coupled to input terminal N2, and the other end of capacitor C2 is coupled to the negative input node of amplifier 190. Feedback capacitor C3 is coupled between the negative output node and the positive input node of amplifier 190, and feedback capacitor C4 is coupled between the positive output node and the negative input node of amplifier 190. Each of energy storage modules (e.g., an energy storage module may represent a module for storing charge / energy) 110 and 120 includes a switched capacitor, for example, in... Figure 1 In the example, the switched capacitor includes a capacitor Cf and four switches P1-P4; the energy storage module 110 is coupled between the negative output terminal and the negative input terminal of the amplifier 190, and the energy storage module 120 is coupled between the positive output terminal and the positive input terminal of the amplifier 190. It should be noted that the component reference numerals in the embodiments and drawings of this invention do not distinguish between superscripts and subscripts. For example, P1 described in the embodiments refers to the same thing as P1 in the drawings; similarly, Cf described in the embodiments refers to the same thing as Cf in the drawings. f The references are the same. Each of energy storage module 130 and energy storage module 140 includes a switched capacitor, for example, in Figure 1In the example, the switched capacitor includes a capacitor Cf and four switches P1'-P4', wherein the energy storage module 130 is coupled between the negative input terminal of the amplifier 190 and the input terminal N1 of the amplifier circuit 100, and the energy storage module 140 is coupled between the positive input terminal of the amplifier 190 and the input terminal N2 of the amplifier circuit 100. In this embodiment, the amplifier circuit 100 can be used to receive differential input signals Vip and Vim to generate differential output signals Vom and Vop, for example, the differential input signals may be audio signals from a microphone.
[0038] exist Figure 1 In the illustrated embodiment, since the direct current (DC) voltages of the differential input signals Vip and Vim may be different, capacitors C1 and C2, acting as DC blocking circuits, ensure that amplifier 190 is not affected by different DC voltages. Energy storage modules 110 and 120 are configured to provide suitable operating points (DC voltages) to the positive / negative input and output terminals of amplifier 190. Furthermore, since switches P1-P4 are controlled by clock signals, the output signals Vom and Vop are mixed by these clock signals, generating aliasing tones that affect the output signals Vom and Vop. In this embodiment, energy storage modules 130 and 140 can be used as aliasing cancellation circuits to cancel (or interchangeably describe as "eliminate") or reduce the aliasing tones of the feedback signals generated by energy storage modules 110 and 120, thereby improving the quality of the output signals Vom and Vop. Understandably, the aliasing cancellation circuit can also be interchangeably described as an "aliasing reduction circuit," which is used to reduce or eliminate the aliasing of feedback signals generated by feedback circuits (e.g., energy storage modules 110 and 120).
[0039] Specifically, refer to Figure 2 , Figure 2The first phase of the amplifier circuit 100 is shown, in which switches P2 and P4 in energy storage modules 110 and 120 are enabled (or alternatively described as "on"), while switches P1 and P3 in energy storage modules 110 and 120 are disabled (or alternatively described as "off" or "not on"), and switches P2' and P4' in energy storage modules 130 and 140 are enabled, while switches P1' and P3' in energy storage modules 130 and 140 are disabled. In the first stage, capacitors Cf in energy storage modules 110-140 are charged or discharged, such that capacitors Cf in energy storage modules 130 and 110 have equal and opposite charges (e.g., the charge of capacitor Cf in energy storage module 130 is "-Q", while the charge of capacitor Cf in energy storage module 110 is "+Q"), and capacitors Cf in energy storage module 140 and 120 have equal and opposite charges (e.g., the charge of capacitor Cf in energy storage module 140 is "+Q", while the charge of capacitor Cf in energy storage module 120 is "-Q"). Then, referring to... Figure 3 , Figure 3 A second stage of the amplifier circuit 100 is shown immediately following the first stage. Switches P1 and P3 in energy storage modules 110 and 120 are enabled, while switches P2 and P4 in energy storage modules 110 and 120 are disabled. Similarly, switches P1' and P3' in energy storage modules 130 and 140 are enabled, while switches P2' and P4' in energy storage modules 130 and 140 are disabled. In this second stage, capacitor Cf in energy storage module 110 is connected to (or interchangeably described as "is connected to") capacitor Cf in energy storage module 130, resulting in charge sharing between energy storage modules 110 and 130. Therefore, aliasing generated by energy storage module 110 is eliminated (or reduced) via energy storage module 130 (i.e., aliasing will not enter the negative input of amplifier 190). Similarly, capacitor Cf in energy storage module 120 is connected to / is connected to capacitor Cf in energy storage module 140, thereby causing charge sharing between energy storage modules 120 and 140. Therefore, aliasing generated by energy storage module 120 is eliminated (or reduced) through energy storage module 140 (i.e., aliasing will not enter the positive input of amplifier 190). In summary, amplifier circuit 100 operates alternately in the first and second stages.
[0040] In this embodiment, energy storage module 130 is a replica of energy storage module 110, and energy storage module 140 is a replica of energy storage module 120. Specifically, energy storage module 130 has the same circuit structure as energy storage module 110, and energy storage module 140 has the same circuit structure as energy storage module 120. Furthermore, the clock signals used to control energy storage modules 130 / 140 are substantially the same as the clock signals used to control energy storage modules 110 / 120. However, the invention is not limited to this. In other embodiments, energy storage modules 130 / 140 and 110 / 120 can have different circuit designs, provided that energy storage modules 130 / 140 can eliminate or reduce the aliasing of the feedback signals generated by energy storage modules 110 / 120.
[0041] Figure 4 This is a schematic diagram of an amplifier circuit 400 according to an embodiment of the present invention. Figure 4 As shown, the amplifier circuit 400 includes two input terminals N1 and N2, two capacitors C1 and C2, an amplifier 490, two feedback capacitors C3 and C4, two energy storage modules 410 and 420, and two aliasing tone cancellation circuits 403 and 404. The aliasing tone cancellation circuit 403 includes an energy storage module 430 and a frequency-selective circuit. In this embodiment, the DC blocking circuit 432 is used as the frequency-selective circuit. The aliasing tone cancellation circuit 404 includes an energy storage module 440 and a frequency-selective circuit. In this embodiment, the DC blocking circuit 442 is used as the frequency-selective circuit. In this embodiment, capacitors C1 and C2 serve as DC blocking circuits. Capacitors C1 and C2 are coupled between the input terminals of amplifier 490 and the input terminals N1 and N2 of amplifier circuit 400. For example, one end of capacitor C1 is coupled to input terminal N1, and the other end is coupled to the positive input terminal of amplifier 490; one end of capacitor C2 is coupled to input terminal N2, and the other end is coupled to the negative input terminal of amplifier 490. Feedback capacitor C3 is a variable capacitor coupled between the negative output terminal and the positive input terminal of amplifier 490; and feedback capacitor C4 is a variable capacitor coupled between the positive output terminal and the negative input terminal of amplifier 490. The capacitance of each of feedback capacitors C3 and C4 can be adjusted by using… Figure 4 The factor (or interchangeably, "g") shown is scaled (e.g., C3 / g, C4 / g). Each of energy storage modules 410 and 420 includes a switched capacitor, for example, in Figure 4In the example, the switched capacitor includes a capacitor Cf and four switches P1-P4. Energy storage module 410 is coupled between the negative output and negative input of amplifier 490, and energy storage module 420 is coupled between the positive output and positive input of amplifier 490. Energy storage modules 410 and 420 are coupled to bias voltages VCM1 and VCM2. DC blocking circuit 432 includes a capacitor Cb and a resistor Rb, with resistor Rb coupled to bias voltage VCM3. Capacitor Cb is coupled to input terminal N1. DC blocking circuit 442 includes a capacitor Cb and a resistor Rb, with resistor Rb coupled to bias voltage VCM3. Capacitor Cb is coupled to input terminal N2. Each of energy storage modules 430 and 440 includes a switched capacitor, for example, in... Figure 4 In the example, the switched capacitor includes a capacitor Cf and four switches P1'-P4'. Energy storage module 430 is coupled between the negative input terminal of amplifier 490 and DC blocking circuit 432, and energy storage module 440 is coupled between the positive input terminal of amplifier 490 and DC blocking circuit 442. The capacitor Cf in each of energy storage modules 430 and 440 can be scaled by a factor "g", for example, g*Cf. In this embodiment, amplifier circuit 400 can be used to receive differential input signals Vip and Vim to generate differential output signals Vom and Vop. For example, the differential input signals can be audio signals from a microphone.
[0042] exist Figure 4 In the illustrated embodiment, the DC blocking circuit 432 receives the input signal Vip to block the direct current (DC) component and generate an alternating current (AC) signal. The energy storage module 430 receives this AC signal and generates a signal to eliminate or reduce the aliasing tone of the feedback signal generated by the energy storage module 410 (which can be considered a first feedback circuit). Similarly, the DC blocking circuit 442 receives the input signal Vim to block the DC component and generate an AC signal. The energy storage module 440 receives this AC signal and generates a signal to eliminate or reduce the aliasing tone generated by the energy storage module 420. See also, for example, [reference to...]. Figure 2It can be understood that the capacitor Cf in the aliasing cancellation circuit (including the energy storage module 430) samples the input signal Vip (i.e., receives the input signal Vip), and the capacitor Cf in the first feedback circuit (including the energy storage module 410) samples the output signal Vom (i.e., receives the output signal Vom). Therefore, the capacitor Cf in the first feedback circuit (including the energy storage module 410) and the capacitor Cf in the aliasing cancellation circuit (including the energy storage module 430) have opposite charge polarities. In addition, since charge Q = C * V, that is, the voltage signal on the capacitor is proportional to the charge stored on the capacitor, if the charge of the aliasing cancellation circuit (including the energy storage module 430) can cancel / cancel out the charge of the first feedback circuit (including the energy storage module 410), the change in static charge is zero. Therefore, the voltage change at the amplifier input can be reduced, that is, the aliasing caused by the feedback signal of the feedback circuit is reduced. Therefore, when the DC voltages of the input signals Vip and Vim are different, the aliasing tone cancellation circuits 403 and 404 can outperform the input signals. Figure 1 The illustrated embodiment works better.
[0043] Figure 5 This is a schematic diagram of an amplifier circuit 500 according to an embodiment of the present invention. Figure 5 As shown, the amplifier circuit 500 includes two input terminals N1 and N2, two capacitors C1 and C2, an amplifier 590, two feedback capacitors C3 and C4, two energy storage modules 510 and 520, and two aliasing tone cancellation circuits 503 and 504. The aliasing tone cancellation circuit 503 includes an energy storage module 530, a frequency selection circuit (in this embodiment, the DC blocking circuit 532 is used as the frequency selection circuit), and a delay circuit 534. The aliasing tone cancellation circuit 504 includes an energy storage module 540, a frequency selection circuit (in this embodiment, the DC blocking circuit 542 is used as the frequency selection circuit), and a delay circuit 544. In this embodiment, capacitors C1 and C2 serve as DC blocking circuits. Capacitors C1 and C2 are coupled between the input terminals of amplifier 590 and the input terminals N1 and N2 of amplifier circuit 500. For example, one end of capacitor C1 is coupled to input terminal N1, and the other end is coupled to the positive input terminal of amplifier 590; one end of capacitor C2 is coupled to input terminal N2, and the other end is coupled to the negative input terminal of amplifier 590. Feedback capacitor C3 is a variable capacitor coupled between the negative output terminal and the positive input terminal of amplifier 590; feedback capacitor C4 is a variable capacitor coupled between the positive output terminal and the negative input terminal of amplifier 590. The capacitance coefficient of each of feedback capacitors C3 and C4 can be adjusted by using… Figure 5 The factor "g" shown is scaled (e.g., C3 / g, C4 / g). Each of energy storage modules 510 and 520 includes a switched capacitor, for example, in Figure 5 In the example, the switched capacitor includes a capacitor Cf and four switches P1-P4. Energy storage module 510 is coupled between the negative output and negative input terminals of amplifier 590, and energy storage module 520 is coupled between the positive output and positive input terminals of amplifier 590. Energy storage modules 510 and 520 are coupled to bias voltages VCM1 and VCM2. Each of delay circuits 534 and 544 includes a capacitor Cd and a resistor Rd, respectively. Delay circuit 534 is coupled to input terminal N1, and delay circuit 544 is coupled to input terminal N2. DC blocking circuit 532 includes a capacitor Cb and a resistor Rb, with resistor Rb coupled to bias voltage VCM3. DC blocking circuit 542 includes a capacitor Cb and a resistor Rb, with resistor Rb coupled to bias voltage VCM3. Each of energy storage modules 530 and 540 includes a switched capacitor. Figure 5 In the example, the switched capacitor includes a capacitor Cf and four switches P1'-P4'. Energy storage module 530 is coupled between the negative input of amplifier 590 and DC blocking circuit 532, and energy storage module 540 is coupled between the positive input of amplifier 590 and DC blocking circuit 542. The capacitor Cf in each of energy storage modules 530 and 540 can be scaled by a factor / factor "g" (e.g., g*Cf). In this embodiment, amplifier circuit 500 can be used to receive differential input signals Vip and Vim to generate differential output signals Vom and Vop.
[0044] exist Figure 5 In the illustrated embodiment, delay circuit 534 delays the input signal Vip to generate a delayed input signal (or alternatively, a "delayed input signal"). DC blocking circuit 532 receives this delayed input signal to block (or alternatively, "isolate") the DC component and generate an AC signal. Energy storage module 530 receives this AC signal to generate a signal for eliminating or reducing aliasing generated by energy storage module 510. Similarly, delay circuit 544 delays the input signal Vim to generate a delayed input signal. DC blocking circuit 542 receives this delayed input signal to block the DC component and generate an AC signal. Energy storage module 540 receives this AC signal and generates a signal for eliminating or reducing aliasing generated by energy storage module 520. Therefore, when the amplifier 590 and the energy storage modules 510 and 520 have a large signal delay, the aliasing cancellation circuits 503 and 504 with delay circuits can accurately eliminate or reduce the aliasing of the feedback signals generated by the energy storage modules 510 and 520.
[0045] Figure 6 This is a schematic diagram of an amplifier circuit 600 according to an embodiment of the present invention. Figure 6 As shown, the amplifier circuit 600 includes two input terminals N1 and N2, two capacitors C1 and C2, an amplifier 690, two feedback capacitors C3 and C4, two energy storage modules 610 and 620, and two aliasing tone cancellation circuits 603 and 604. The aliasing tone cancellation circuit 603 includes an energy storage module 630, a frequency selection circuit (in this embodiment, the DC blocking circuit 632 is used as the frequency selection circuit), and a delay circuit 634. The aliasing tone cancellation circuit 604 includes an energy storage module 640, a frequency selection circuit (in this embodiment, the DC blocking circuit 642 is used as the frequency selection circuit), and a delay circuit 644. In this embodiment, capacitors C1 and C2 serve as DC blocking circuits. Capacitors C1 and C2 are coupled between the input terminals of amplifier 690 and the input terminals N1 and N2 of amplifier circuit 600. For example, one end of capacitor C1 is coupled to input terminal N1, and the other end is coupled to the positive input terminal of amplifier 690; one end of capacitor C2 is coupled to input terminal N2, and the other end is coupled to the negative input terminal of amplifier 690. Feedback capacitor C3 is a variable capacitor coupled between the negative output terminal and the positive input terminal of amplifier 690, and feedback capacitor C4 is a variable capacitor coupled between the positive output terminal and the negative input terminal of amplifier 690. The capacitance of each of feedback capacitors C3 and C4 can be adjusted by using… Figure 6 The factor "g" shown is scaled (e.g., C3 / g, C4 / g). Each of energy storage modules 610 and 620 includes a switched capacitor, for example, in Figure 6In the example, the switched capacitor includes a capacitor Cf and four switches P1-P4. Energy storage module 610 is coupled between the negative output and positive input of amplifier 690, and energy storage module 620 is coupled between the positive output and negative input of amplifier 690. Energy storage modules 610 and 620 are coupled to bias voltages VCM1 and VCM2. In some embodiments, energy storage modules 610 and 620 can be considered as feedback circuits. For example, a first feedback circuit (including energy storage module 610) is coupled between the first input and first output of the amplifier to generate a first feedback signal based on a first output signal (e.g., Vom). This first feedback circuit includes a first energy storage module, which includes a first switched capacitor. A first aliasing cancellation circuit (e.g., including an energy storage module 630) is coupled between the first input terminal of the amplifier circuit and the first input terminal of the amplifier to generate a first signal based on the first input signal (e.g., Vip) to eliminate or reduce the aliasing of the first feedback signal. In some embodiments, the first signal and the high-frequency component (high-frequency component) of the first feedback signal are substantially equal in magnitude (or less) but opposite in polarity, thereby eliminating or reducing the aliasing generated by the first feedback signal through the additional aliasing cancellation circuit. Each of delay circuits 634 and 644 includes a capacitor Cd and a resistor Rd, wherein delay circuit 634 is coupled to input terminal N1, and delay circuit 644 is coupled to input terminal N2. DC blocking circuit 632 includes a capacitor Cb and a resistor Rb, the resistor Rb being coupled to a bias voltage VCM3. DC blocking circuit 642 includes a capacitor Cb and a resistor Rb, the resistor Rb being coupled to a bias voltage VCM3. Each of energy storage modules 630 and 640 includes a switched capacitor, comprising a capacitor Cf and four switches P1'-P4'. Energy storage module 630 is coupled between the positive input terminal of amplifier 690 and DC blocking circuit 632, and energy storage module 640 is coupled between the negative input terminal of amplifier 690 and DC blocking circuit 642. The capacitor Cf in each of energy storage modules 630 and 640 can be scaled by a factor "g" (e.g., g*Cf). In this embodiment, amplifier circuit 600 can be used to receive differential input signals Vip and Vim to generate differential output signals Vom and Vop.
[0046] exist Figure 6In the illustrated embodiment, delay circuit 634 delays the input signal Vip to generate a delayed input signal. DC blocking circuit 632 receives this delayed input signal to block the DC component and generate an AC signal. Energy storage module 630 receives this AC signal to generate a signal for eliminating or reducing aliasing generated by energy storage module 610. Similarly, delay circuit 644 delays the input signal Vim to generate a delayed input signal. DC blocking circuit 642 receives this delayed input signal to block the DC component and generate an AC signal. Energy storage module 640 receives this AC signal to generate a signal for eliminating or reducing aliasing generated by energy storage module 620. Therefore, when amplifier 690 and energy storage modules 610 and 620 have a large signal delay, aliasing cancellation circuits 603 and 604 with delay circuits can accurately eliminate or reduce aliasing in the feedback signals generated by energy storage modules 610 and 620.
[0047] Figure 7 This is a schematic diagram of an amplifier circuit 700 according to an embodiment of the present invention. Figure 7 As shown, the amplifier circuit 700 includes two input terminals N1 and N2, two capacitors C1 and C2, an amplifier 790, two feedback capacitors C3 and C4, two feedback circuits 701 and 702, and two aliasing tone cancellation circuits 703 and 704. Feedback circuit 701 includes an energy storage module 710 and a voltage scaling circuit 716; feedback circuit 702 includes an energy storage module 720 and a voltage scaling circuit 726; aliasing tone cancellation circuit 703 includes an energy storage module 730, a frequency selection circuit (in this embodiment, the DC blocking circuit 732 is used as the frequency selection circuit), a delay circuit 734, and a voltage scaling circuit 736; and aliasing tone cancellation circuit 704 includes an energy storage module 740, a frequency selection circuit (in this embodiment, the DC blocking circuit 742 is used as the frequency selection circuit), a delay circuit 744, and a voltage scaling circuit 746. In this embodiment, capacitors C1 and C2 serve as DC blocking circuits. Capacitors C1 and C2 are coupled between the input terminals of amplifier 790 and the input terminals N1 and N2 of amplifier circuit 700. For example, one end of capacitor C1 is coupled to input terminal N1, and the other end is coupled to the positive input terminal of amplifier 790; one end of capacitor C2 is coupled to input terminal N2, and the other end is coupled to the negative input terminal of amplifier 790. Feedback capacitor C3 is a variable capacitor coupled between the negative output terminal and the positive input terminal of amplifier 790. Feedback capacitor C4 is also a variable capacitor coupled between the positive output terminal and the negative input terminal of amplifier 790. The capacitance of each of feedback capacitors C3 and C4 can be adjusted by using… Figure 7The scaling factor "g" shown is used for scaling (e.g., C3 / g, C4 / g). Each of the voltage scaling circuits 716, 726, 736, and 746 includes resistors R1 and R2 connected in series. Each of the energy storage modules 710 and 720 includes a switched capacitor, in Figure 7 In the example, the switched capacitor includes a capacitor Cf and four switches P1-P4. Energy storage module 710 and voltage scaling circuit 716 are coupled between the negative output and negative input terminals of amplifier 790, and energy storage module 720 and voltage scaling circuit 726 are coupled between the positive output and positive input terminals of amplifier 790. Energy storage modules 710 and 720 are coupled to bias voltages VCM1 and VCM2. Resistor R2 in compressor circuits 716 and 726 can be connected to bias voltage VCM5. Each of delay circuits 734 and 744 includes a capacitor Cd and a resistor Rd. Delay circuit 734 is coupled between energy storage module 730 and voltage scaling circuit 736, and delay circuit 744 is coupled between energy storage module 740 and voltage scaling circuit 746. DC blocking circuit 732 includes capacitor Cb and resistor Rb (resistor Rb coupled to bias voltage VCM3), and is coupled between input terminal N1 and voltage scaling circuit 736. DC blocking circuit 742 includes capacitor Cb and resistor Rb (resistor Rb coupled to bias voltage VCM3), and is coupled between input terminal N2 and voltage scaling circuit 746. Resistor R2 in voltage scaling circuits 736 and 746 may be coupled to another bias voltage VCM4. Each of energy storage modules 730 and 740 includes a switched capacitor. Figure 7 In the example, the switched capacitor includes a capacitor Cf and four switches P1'-P4'. Energy storage module 730 is coupled between the negative input of amplifier 790 and delay circuit 734, and energy storage module 740 is coupled between the positive input of amplifier 790 and delay circuit 744. The capacitor Cf in each of energy storage modules 730 and 740 can be scaled by a factor "g" (e.g., g*Cf). In this embodiment, amplifier circuit 700 can be used to receive differential input signals Vip and Vim to generate differential output signals Vom and Vop.
[0048] exist Figure 7In the illustrated embodiment, the DC blocking circuit 732 receives the input signal Vip to block / intercept the DC component and generate an AC signal (e.g., assuming the generated AC signal is Vac). The voltage scaling circuit 736 scales the AC signal to generate a scaled signal (which is k*Vac, where k is a default value between 0 and 1, e.g., 0.5). The delay circuit 734 delays the scaled signal to generate a delayed signal (also interchangeably described as a "delayed signal"). The energy storage module 730 receives the delayed signal to generate a signal for canceling or reducing aliasing generated by the energy storage module 710. Similarly, the DC blocking circuit 742 receives the input signal Vim to block the DC component and generate an AC signal. The voltage scaling circuit 746 scales the AC signal to generate a scaled signal. The delay circuit 744 delays the scaled signal to generate a delayed signal. The energy storage module 740 receives the delayed signal to generate a signal for canceling / eliminating or reducing aliasing generated by the energy storage module 720. Therefore, when the DC voltages of the input signals Vip and Vim are different and the amplifiers 790 and energy storage modules 710 and 720 have a large signal delay, the aliasing cancellation circuits 703 and 704 with delay circuits can accurately eliminate or reduce the aliasing of the feedback signals generated by the energy storage modules 710 and 720. Furthermore, by designing the voltage scaling circuits 716, 726, 736, and 746, the capacitance of capacitor Cf can be designed to be smaller.
[0049] Figure 8 This is a schematic diagram of an amplifier circuit 800 according to an embodiment of the present invention. Figure 8As shown, the amplifier circuit 800 includes two input terminals N1 and N2, two capacitors C1 and C2, an amplifier 890, two feedback capacitors C3 and C4, two feedback circuits 801 and 802, and two aliasing tone cancellation circuits 803 and 804. Feedback circuit 801 includes an energy storage module 810, a frequency selection circuit (in this embodiment, the DC blocking circuit 812 is used as the frequency selection circuit), and a voltage scaling circuit 816. Feedback circuit 802 includes an energy storage module 820, a frequency selection circuit (in this embodiment, the DC blocking circuit 822 is used as the frequency selection circuit), and a voltage scaling circuit 826. Aliasing tone cancellation circuit 803 includes an energy storage module 830, a frequency selection circuit (in this embodiment, the DC blocking circuit 832 is used as the frequency selection circuit), a delay circuit 834, and a voltage scaling circuit 836. Aliasing tone cancellation circuit 804 includes an energy storage module 840, a frequency selection circuit (in this embodiment, the DC blocking circuit 842 is used as the frequency selection circuit), a delay circuit 844, and a voltage scaling circuit 846. In this embodiment, capacitors C1 and C2 serve as DC blocking circuits. Capacitors C1 and C2 are coupled between the input terminals of amplifier 890 and the input terminals N1 and N2 of amplifier circuit 800. For example, one end of capacitor C1 is coupled to input terminal N1, and the other end of capacitor C1 is coupled to the positive input terminal of amplifier 890. One end of capacitor C2 is coupled to input terminal N2, and the other end of capacitor C2 is coupled to the negative input terminal of amplifier 890. Feedback capacitor C3 is a variable capacitor coupled between the negative output terminal and the positive input terminal of amplifier 890. Feedback capacitor C4 is also a variable capacitor coupled between the positive output terminal and the negative input terminal of amplifier 890. The capacitance of each of feedback capacitors C3 and C4 can be adjusted by using... Figure 8 The scaling factor “g” is shown. Each of the voltage scaling circuits 816, 826, 836, and 846 includes resistors R1 and R2 connected in series. Each of the DC blocking circuits 812 and 822 includes a capacitor Cb and a resistor Rb (resistor Rb is coupled to the bias voltage VCM2). Each of the energy storage modules 810 and 820 includes a switched capacitor, in Figure 8In the example, the switched capacitor includes a capacitor Cf and four switches P1-P4. Energy storage module 810, voltage scaling circuit 816, and DC blocking circuit 812 are coupled between the negative output and negative input of amplifier 890 (e.g., energy storage module 810 is coupled to the negative output of amplifier 890 via voltage scaling circuit 816 and DC blocking circuit 812). Energy storage module 820, voltage scaling circuit 826, and DC blocking circuit 822 are coupled between the positive output and positive input of amplifier 890 (e.g., energy storage module 820 is coupled to the positive output of amplifier 890 via voltage scaling circuit 826 and DC blocking circuit 822). Energy storage modules 810 and 820 are coupled to bias voltages VCM1 and VCM2. Delay circuits 834 and 844 each include a capacitor Cd and a resistor Rd, wherein delay circuit 834 is coupled between energy storage module 830 and voltage scaling circuit 836, and delay circuit 844 is coupled between energy storage module 840 and voltage scaling circuit 846. DC blocking circuit 832 includes a capacitor Cb and a resistor Rb, resistor Rb being coupled to bias voltage VCM3, and DC blocking circuit 832 is coupled between input terminal N1 and voltage scaling circuit 836. DC blocking circuit 842 includes a capacitor Cb and a resistor Rb, resistor Rb being coupled to bias voltage VCM3, and DC blocking circuit 842 is coupled between input terminal N2 and voltage scaling circuit 846. Each of energy storage module 830 and energy storage module 840 includes a switched capacitor, for example, in... Figure 8 In the example, the switched capacitor includes a capacitor Cf and four switches P1'-P4'. Energy storage module 830 is coupled between the negative input of amplifier 890 and delay circuit 834, and energy storage module 840 is coupled between the positive input of amplifier 890 and delay circuit 844. The capacitor Cf in each of energy storage modules 830 and 840 can be scaled by a factor "g". In this embodiment, amplifier circuit 800 can be used to receive differential input signals Vip and Vim to generate differential output signals Vom and Vop.
[0050] exist Figure 8In the illustrated embodiment, the DC blocking circuit 832 receives the input signal Vip to block the DC component and generate an AC signal. The voltage scaling circuit 836 scales the AC signal to generate a scaled signal, the delay circuit 834 delays the scaled signal to generate a delayed signal, and the energy storage module 830 receives the delayed signal to generate a signal for eliminating or reducing aliasing generated by the energy storage module 810. Similarly, the DC blocking circuit 842 receives the input signal Vim to block the DC component and generate an AC signal. The voltage scaling circuit 846 scales the AC signal to generate a scaled signal, the delay circuit 844 delays the scaled signal to generate a delayed signal, and the energy storage module 840 receives the delayed signal to generate a signal for canceling / eliminating or reducing aliasing generated by the energy storage module 820. Therefore, when the DC voltages of the input signals Vip and Vim are different and the amplifiers 890 and energy storage modules 810 and 820 have a large signal delay, the aliasing cancellation circuits 803 and 804, which have delay circuits and DC blocking circuits, can accurately eliminate or reduce the aliasing of the feedback signals generated by the energy storage modules 810 and 820. Furthermore, by designing voltage scaling circuits 816, 826, 836, and 846, the capacitance of capacitor Cf can be made smaller. Moreover, by designing DC blocking circuits 812 and 822 in the feedback circuits 801 and 802 respectively, the feedback circuits 801 / 802 and the aliasing cancellation circuits 803 / 804 can have a balanced structure.
[0051] Figure 9 This is a schematic diagram of an amplifier circuit 900 according to an embodiment of the present invention. Figure 9As shown, the amplifier circuit 900 includes two input terminals N1 and N2, two capacitors C1 and C2, an amplifier 990, two feedback capacitors C3 and C4, two energy storage modules (considered as feedback circuits) 910 and 920, and two aliasing tone cancellation circuits 903 and 904. The aliasing tone cancellation circuit 903 includes an energy storage module 930 and a frequency selection circuit (in this embodiment, the DC blocking circuit 932 is used as the frequency selection circuit), and the aliasing tone cancellation circuit 904 includes an energy storage module 940 and a frequency selection circuit (in this embodiment, the DC blocking circuit 942 is used as the frequency selection circuit). In this embodiment, capacitors C1 and C2 serve as DC blocking circuits. Capacitors C1 and C2 are coupled between the input terminals of amplifier 990 and the input terminals N1 and N2 of amplifier circuit 900. For example, one end of capacitor C1 is coupled to input terminal N1, and the other end is coupled to the positive input terminal of amplifier 990; one end of capacitor C2 is coupled to input terminal N2, and the other end is coupled to the negative input terminal of amplifier 990. Feedback capacitor C3 is a variable capacitor coupled between the negative output terminal and the positive input terminal of amplifier 990, and feedback capacitor C4 is a variable capacitor coupled between the positive output terminal and the negative input terminal of amplifier 990. The capacitance of each of feedback capacitors C3 and C4 can be adjusted by using… Figure 9 The scaling factor "g" is shown. Each of energy storage modules 910 and 920 includes a switched capacitor, for example, in Figure 9 In the example, the switched capacitor includes a capacitor Cf and four switches P1-P4. Energy storage module 910 is coupled between the negative output and negative input of amplifier 990, and energy storage module 920 is coupled between the positive output and positive input of amplifier 990. Energy storage modules 910 and 920 are coupled to bias voltages VCM1 and VCM2. DC blocking circuit 932 includes a capacitor Cb and a resistor Rb (resistor Rb is coupled to bias voltage VCM3), wherein capacitor Cb is coupled to input terminal N1. DC blocking circuit 942 includes a capacitor Cb and a resistor Rb (resistor Rb is coupled to bias voltage VCM3), wherein capacitor Cb is coupled to input terminal N2. Each of energy storage modules 930 and 940 includes a switched capacitor, for example, a capacitor Cf and four switches P1'-P4'. Energy storage module 930 is coupled between the negative input terminal of amplifier 990 and DC blocking circuit 932, and energy storage module 940 is coupled between the positive input terminal of amplifier 990 and DC blocking circuit 942. The capacitor Cf in each of energy storage modules 930 and 940 can be scaled by a factor "g". In this embodiment, amplifier circuit 900 can be used to receive differential input signals Vip and Vim to generate differential output signals Vom and Vop. For example, the differential input signals can be audio signals from a microphone.
[0052] exist Figure 9 In the illustrated embodiment, the DC blocking circuit 932 receives the input signal Vip to block the DC component and generate an AC signal, and the energy storage module 930 receives the AC signal to generate a signal for eliminating or reducing aliasing generated by the energy storage module 910. Similarly, the DC blocking circuit 942 receives the input signal Vim to block the DC component and generate an AC signal, and the energy storage module 940 receives the AC signal to generate a signal for eliminating or reducing aliasing generated by the energy storage module 920. Furthermore, the aliasing cancellation circuits 903 / 904 do not have a physical delay circuit; however, the energy storage modules 930 and 940 can be controlled to have an earlier sampling edge (i.e., the energy storage modules 930 and 940 complete sampling earlier than the energy storage modules 910 and 920) to have a delay function. Specifically, refer to... Figure 10 Switches P1, P3, P1', and P3' are controlled by the same clock signal. Switches P2, P4, P2', and P4' are enabled, while switches P1, P3, P1', and P3' are disabled. Furthermore, the sampling period of switches P2' / P4' is shorter than that of switches P2 / P4 (thus, energy storage modules 930 and 940 complete sampling earlier than energy storage modules 910 and 920). By using... Figure 10 The switches shown, energy storage modules 930 and 940 can have a delay function. Please refer to them together. Figure 9 and Figure 10 After the falling edge (negative edge) of the clock signal P2' / P4', the energy storage modules 930 and 940 complete the charge sampling of the input signal (Vip / Vin). This signal reaches the output (Vom / Vop) after a delay (td) of the amplifier 990. Then, the falling edge (negative edge) of P2 / P4, which is td slower, samples the output signal (Vom / Vop) onto the energy storage modules 910 and 920. At this time, the signals / charges sampled by the two energy storage modules are the same. Finally, the rising edge (positive edge) of P1 / P3 / P1' / P3' cancels out the two identical sampled charges.
[0053] Figure 11 This is a schematic diagram of an amplifier circuit 1100 according to an embodiment of the present invention. Figure 11As shown, the amplifier circuit 1100 includes two input terminals N1 and N2, two capacitors C1 and C2, an amplifier 1190, two feedback capacitors C3 and C4, two energy storage modules 1110 and 1120, and two aliasing tone cancellation circuits 1103 and 1104. The aliasing tone cancellation circuit 1103 includes an energy storage module 1130 and a voltage scaling circuit 1136, and the aliasing tone cancellation circuit 1104 includes an energy storage module 1140 and a voltage scaling circuit 1146. In this embodiment, capacitors C1 and C2 are used as DC blocking circuits. Capacitors C1 and C2 are coupled between the input terminal of the amplifier 1190 and the input terminals N1 and N2 of the amplifier circuit 1100. For example, one end of capacitor C1 is coupled to input terminal N1, and the other end of capacitor C1 is coupled to the positive input terminal of the amplifier 1190; one end of capacitor C2 is coupled to input terminal N2, and the other end of capacitor C2 is coupled to the negative input terminal of the amplifier 1190. Feedback capacitor C3 is a variable capacitor coupled between the negative output and positive input terminals of amplifier 1190, and feedback capacitor C4 is also a variable capacitor coupled between the positive output and negative input terminals of amplifier 1190. The capacitance of each of feedback capacitors C3 and C4 can be adjusted by using... Figure 11 The scaling factor "g" is shown. Each of energy storage modules 1110 and 1120 includes a switched capacitor, for example, in Figure 11 In the example, the switched capacitor includes a capacitor Cf and four switches P1-P4. Energy storage module 1110 is coupled between the negative output and negative input terminals of amplifier 1190, and energy storage module 1120 is coupled between the positive output and positive input terminals of amplifier 1190. Energy storage modules 1110 and 1120 are coupled to bias voltages VCM1 and VCM2. Each of voltage scaling circuits 1136 and 1146 includes two resistors with resistance values of "(g-1)*R" and "R", where R represents a predetermined resistance value. Each of energy storage modules 1130 and 1140 includes a switched capacitor, for example, in... Figure 11 In this example, the switched capacitor includes a capacitor Cf and four switches P1'-P4'. Energy storage module 1130 is coupled between the negative input terminal of amplifier 1190 and voltage scaling circuit 1136, and energy storage module 1140 is coupled between the positive input terminal of amplifier 1190 and voltage adjustment circuit 1146. In this embodiment, amplifier circuit 1100 can be used to receive differential input signals Vip and Vim to generate differential output signals Vom and Vop.
[0054] exist Figure 11In the illustrated embodiment, voltage scaling circuit 1136 scales the input signal Vip to generate a scaled signal, and energy storage module 1130 receives the scaled signal to generate a signal for eliminating or reducing aliasing generated by energy storage module 1110. Similarly, voltage scaling circuit 1146 scales the input signal Vim to generate a scaled signal, and energy storage module 1140 receives the scaled signal to generate a signal for eliminating or reducing aliasing generated by energy storage module 1120. By designing voltage scaling circuits 1136 and 1146, the capacitance of capacitor Cf can be designed to be smaller.
[0055] Figure 12 This is a schematic diagram of an amplifier circuit 1200 according to an embodiment of the present invention. Figure 12 As shown, the amplifier circuit 1200 includes two input terminals N1 and N2, two capacitors C1 and C2, an amplifier 1290, two feedback capacitors C3 and C4, two feedback circuits 1201 and 1202, and two aliasing tone cancellation circuits 1203 and 1204. Feedback circuit 1201 includes an energy storage module 1210, a DC blocking circuit 1212, a voltage scaling circuit 1216, and two filters 1218 and 1219. Feedback circuit 1202 includes an energy storage module 1220, a DC blocking circuit 1212, a voltage scaling circuit 1216, and two filters 1218 and 1219. The circuit includes a DC circuit 1222, a voltage scaling circuit 1226, and two filters 1228 and 1229; the aliasing tone cancellation circuit 1203 includes an energy storage module 1230, a DC blocking circuit 1232, a delay circuit 1234, a voltage scaling circuit 1236, and two filters 1238 and 1239; the aliasing tone cancellation circuit 1204 includes an energy storage module 1240, a DC blocking circuit 1242, a delay circuit 1244, a voltage scaling circuit 1246, and two filters 1248 and 1249. In this embodiment, the amplifier circuit 1200 can be used to receive differential input signals Vip and Vim to generate differential output signals Vom and Vop. For example, the differential input signals can be audio signals from a microphone.
[0056] In amplifier circuit 1200, refer to Figures 1 to 11In the embodiments shown above, the aliasing cancellation circuit 1203 is configured to receive an input signal Vip to generate a signal for eliminating or reducing the aliasing tone of the feedback signal generated by the feedback circuit 1201, and the aliasing cancellation circuit 1204 is configured to receive an input signal Vim to generate a signal to eliminate or reduce the aliasing tone of the feedback signal generated by the feedback circuit 1202. The DC blocking circuits 1212 / 1222 / 1232 / 1242 are configured to block the DC component of the received signal. The delay circuits 1234 / 1244 are configured to delay the received signal. The voltage scaling circuits 1216 / 1226 / 1236 / 1246 are configured to perform scaling operations on the received signal. The filters 1218 / 1228 / 1238 / 1248 are configured to filter out unwanted frequency components of the received signal, wherein filters 1218 / 1228 are matched with filters 1238 / 1248. Filters 1219 / 1229 / 1239 / 1249 are configured to filter out unwanted frequency components of the received signal, wherein filters 1219 / 1229 are fully or partially matched with filters 1239 / 1249. Energy storage modules 1210 / 1220 / 1230 / 1240 include switched capacitors. (See reference...) Figures 1 to 11 In the embodiments shown above, at least a portion of the DC blocking circuit 1212, the voltage scaling circuit 1216, and the filters 1218 and 1219 can be removed from the feedback circuit 1201, and the positions of the DC blocking circuit 1212 and the voltage scaling circuit 1216 can be interchanged. At least a portion of the DC blocking circuit 1222, the voltage scaling circuit 1226, and the filters 1228 and 1229 can be removed from the feedback circuit 1202, and the positions of the DC blocking circuit 1222 and the voltage scaling circuit 1226 can be interchanged. At least a portion of the DC blocking circuit 1232, the delay circuit 1234, the voltage scaling circuit 1236, and the filters 1238 and 1239 can be removed from the aliasing tone cancellation circuit 1203, and the positions of any two of these components can be interchanged. At least a portion of the DC blocking circuit 1242, delay circuit 1244, voltage scaling circuit 1246, and filters 1248 and 1249 can be removed from the aliasing tone cancellation circuit 1204, and the positions of any two of these components are interchangeable. Furthermore, any module, including energy storage modules 1210 / 1220 / 1230 / 1240, is interchangeable, and... Figure 12 Any two or more modules in the system can be combined.
[0057] Furthermore, the connections from the two differential sides of energy storage modules 1230 and 1240 to amplifier 1290 can be interchanged depending on the type of energy storage modules 1230 and 1240. Specifically, in one embodiment, energy storage module 1230 is coupled to the positive input terminal of amplifier 1290, while energy storage module 1240 is coupled to the negative input terminal of amplifier 1290. In another embodiment, energy storage module 1230 is coupled to the negative input terminal of amplifier 1290, while energy storage module 1240 is coupled to the positive input terminal of amplifier 1290.
[0058] It is worth noting that the DC blocking circuits 1212 / 1222 / 1232 / 1242 described above can be replaced by any suitable frequency selective filter, and the energy storage modules 1210 / 1220 / 1230 / 1240 can be implemented using any suitable switched capacitors.
[0059] exist Figures 1 to 12 The illustrated embodiment shows an amplifier circuit with a differential structure, but the invention is not limited thereto; that is, those skilled in the art can apply this concept to other inventions. Figures 1 to 12 The implementation of the single-ended structure shown in the embodiments will be readily apparent; therefore, the implementation of the single-ended structure will not be described in detail in this invention. Figure 13 This is a schematic diagram of an amplifier circuit 1300 according to an embodiment of the present invention. Figure 13 As shown, the amplifier circuit 1300 includes an input terminal N1, a capacitor C1, an amplifier 1390, a feedback capacitor C3, a feedback circuit 1301, and an aliasing tone cancellation circuit 1303. The feedback circuit 1301 includes an energy storage module 1310, a DC blocking circuit 1312, a voltage scaling circuit 1316, and two filters 1318 and 1319. The aliasing tone cancellation circuit 1303 includes an energy storage module 1330, a DC blocking circuit 1332, a delay circuit 1334, a voltage scaling circuit 1336, and two filters 1338 and 1339. In this embodiment, the amplifier circuit 1300 can be used to receive an input signal Vip to generate an output signal Vom. Since those skilled in the art can understand the working principle of the amplifier circuit 1300 after reading the above embodiments, its details will not be repeated here.
[0060] In short, in the amplifier circuit of the present invention, by using an aliasing cancellation circuit between the input terminal of the amplifier circuit and the input terminal of the internal amplifier (the amplifier included in the amplifier circuit), the aliasing generated by the feedback circuit of the internal amplifier can be eliminated or reduced, thereby greatly improving the signal quality of the output signal. Furthermore, by introducing a voltage scaling circuit, the disturbance of the feedback circuit to the input terminal can be further reduced, and the size requirements of the capacitors can be reduced, resulting in a smaller area.
[0061] The use of ordinal terms such as “first,” “second,” and “third” in the claims to modify claim elements does not in itself indicate any priority, precedence, or order of one claim element relative to another claim element, or the chronological order of the execution of method actions. Rather, it is merely used as a marker to distinguish one claim element with the same name from another element with the same name.
[0062] While the invention has been described by way of example and according to preferred embodiments, it should be understood that the invention is not limited to the disclosed embodiments. Rather, it is intended to cover various variations and similar structures (as will be apparent to those skilled in the art), such as combinations or substitutions of different features in different embodiments. Therefore, the scope of the appended claims should be given the broadest interpretation to cover all such variations and similar structures.
Claims
1. An amplifier circuit, characterized in that, The amplifier circuit includes: The first input terminal is used to receive the first input signal; A first capacitor is coupled to the first input terminal; An amplifier, coupled to the first capacitor, is used to receive the first input signal through the first capacitor in order to generate a first output signal; A first feedback circuit, coupled between the first input terminal and the first output terminal of the amplifier, is used to generate a first feedback signal based on the first output signal. The first feedback circuit includes a first energy storage module, which includes a first switched capacitor, and... A first aliasing tone cancellation circuit is coupled between the first input terminal of the amplifier circuit and the first input terminal of the amplifier, and is used to generate a first signal according to the first input signal to eliminate or reduce the aliasing tone of the first feedback signal. The first aliasing tone cancellation circuit includes: A second energy storage module, the second energy storage module including a second switched capacitor; and Frequency selective filter; The first input signal is processed by the frequency-selective filter to generate a processed signal, and the second energy storage module receives the processed signal and generates the first signal to eliminate or reduce the aliasing tone of the first feedback signal.
2. The amplifier circuit as described in claim 1, characterized in that, The second switched capacitor is a copy of the first switched capacitor.
3. The amplifier circuit as described in claim 1, characterized in that, The first aliasing tone cancellation circuit also includes: Delay circuit; The first input signal is processed by the frequency-selective filter and the delay circuit to generate the processed signal.
4. The amplifier circuit as described in claim 1, characterized in that, The first aliasing tone cancellation circuit also includes: Delay circuits; and Voltage scaling circuit; The first input signal is processed by the frequency selection filter, the delay circuit, and the voltage scaling circuit to generate the processed signal.
5. The amplifier circuit as described in claim 4, characterized in that, The first feedback circuit also includes a voltage scaling circuit.
6. The amplifier circuit as described in claim 4, characterized in that, The first feedback circuit also includes a voltage scaling circuit and a frequency selective filter.
7. The amplifier circuit as described in claim 1, characterized in that, The second switched capacitor has an earlier sampling edge than the first switched capacitor.
8. The amplifier circuit as described in claim 1, characterized in that, The amplifier circuit also includes: The second input terminal is used to receive the second input signal; A second capacitor is coupled to the second input terminal; A second feedback circuit, coupled between the second input and second output terminals of the amplifier, is used to generate a second feedback signal based on the second output signal. The second feedback circuit includes a third energy storage module, which includes a third switched capacitor. The second aliasing tone cancellation circuit is coupled between the second input terminal of the amplifier circuit and the second input terminal of the amplifier, and is used to generate a second signal according to the second input signal to eliminate or reduce the aliasing tone of the second feedback signal. The first input signal and the second input signal constitute a differential signal, and the amplifier is used to receive the first input signal and the second input signal through the first capacitor and the second capacitor to generate the first output signal and the second output signal.
9. The amplifier circuit as described in claim 8, characterized in that, The first aliasing tone cancellation circuit includes a second energy storage module having a second switched capacitor, and the second aliasing tone cancellation circuit includes a fourth energy storage module having a fourth switched capacitor.
10. The amplifier circuit as described in claim 9, characterized in that, The second switched capacitor is a copy of the first switched capacitor, and the fourth switched capacitor is a copy of the third switched capacitor.
11. An amplifier circuit, characterized in that, The amplifier circuit includes: The first input terminal is used to receive the first input signal; A first capacitor is coupled to the first input terminal; An amplifier, coupled to the first capacitor, is used to receive the first input signal through the first capacitor in order to generate a first output signal; A first feedback circuit, coupled between the first input terminal and the first output terminal of the amplifier, is used to generate a first feedback signal based on the first output signal. The first feedback circuit includes a first energy storage module, which includes a first switched capacitor, and... A first aliasing tone cancellation circuit is coupled between the first input terminal of the amplifier circuit and the first input terminal of the amplifier, and is used to generate a first signal according to the first input signal to eliminate or reduce the aliasing tone of the first feedback signal. The first aliasing tone cancellation circuit includes: A second energy storage module, the second energy storage module including a second switched capacitor; and Voltage scaling circuit; The first input signal is processed by the voltage scaling circuit to generate a processed signal, and the second energy storage module receives the processed signal and generates the first signal to eliminate or reduce the aliasing tone of the first feedback signal.