Display panel and display device

Abstract

A display panel and a display device. The display panel includes a display area and a binding area located to one side of the display area. The binding area includes a routing area, a bending area, and a composite circuit area, arranged sequentially in a direction away from the display area. The bending area is configured to bend so that the composite circuit area flips to the back of the display area. Within a plane perpendicular to the display panel, the binding area includes a display substrate and a first functional layer located on the light-emitting surface of the display substrate. The first functional layer includes a cover layer, at least the surface of the cover layer proximal to the bending area being a curved surface. The bending area conforms to the curved surface of the cover layer after being bent.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to, but are not limited to, the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of organic light emitting diode (OLED) display technology, consumers have higher and higher requirements for the display effects of display products. Extremely narrow bezels have become a new trend in the development of display products. Therefore, the narrow bezel design has received more and more attention in the design of OLED display products.

[0003] The inventors of the present application have discovered through research that in some technologies, the thickness of the border of the display panel located on the side of the binding area is relatively large. Summary of the Invention

[0004] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0005] Embodiments of the present disclosure provide a display panel and a display device to solve the problem of a thick frame of the display panel located on one side of the binding area.

[0006] On the one hand, an embodiment of the present disclosure provides a display panel, comprising a display area and a binding area located on one side of the display area, the binding area comprising a routing area, a bending area and a composite circuit area sequentially arranged in a direction away from the display area, the bending area being configured to flip the composite circuit area to the back of the display area by bending; in a plane perpendicular to the display panel, the binding area comprises a display substrate and a first functional layer located on the light-emitting side surface of the display substrate; the first functional layer comprises a cover layer, and at least the surface of the cover layer close to the bending area is set as a curved surface; the bending area is fitted with the curved surface of the cover layer after bending.

[0007] In an exemplary embodiment, in a plane parallel to the display panel, the thickness of the edge of the cover layer close to the bending area is greater than the thickness of the edge of the cover layer at other positions.

[0008] In an exemplary embodiment, the curvature radius of the curved surface of the cover layer at a side close to the bending area is smaller than the curvature radius of the curved surface of the cover layer at other positions.

[0009] In an exemplary embodiment, the cover layer covering the display area and the wiring area is a plane; in a direction perpendicular to the display panel, the thickness of the curved surface of the cover layer close to the bending area is greater than the thickness of the cover layer in the wiring area, and the curved surface of the cover layer close to the bending area and the plane covering the wiring area form a boss portion.

[0010] In an exemplary embodiment, the first functional layer includes a polarizing layer arranged on the light-emitting side surface of the display substrate, an adhesive layer arranged on the side of the polarizing layer away from the display substrate, and the cover layer arranged on the side of the adhesive layer away from the display substrate; the adhesive layer is filled in the boss portion.

[0011] In an exemplary embodiment, the bending area includes a protective adhesive layer arranged on the light-emitting side surface of the display substrate, the protective adhesive layer extends from the routing area to the composite circuit area, and the protective adhesive layer located in the routing area is arranged on the side of the polarizing layer away from the display area; after the bending area is bent, the protective adhesive layer is in contact with the curved surface of the cover layer.

[0012] In an exemplary embodiment, in a plane perpendicular to the display panel, the binding area also includes a second functional layer located on the backlight side surface of the display substrate; the second functional layer includes a back film layer arranged on the backlight side surface of the display substrate, a heat dissipation layer arranged on the side of the back film layer away from the display substrate, and a spacer layer arranged on the side of the heat dissipation layer away from the display substrate.

[0013] In an exemplary embodiment, the back film layer is arranged in the display area and the binding area, and a back film opening is opened in the back film layer at a position corresponding to the bending area. The back film layer in the back film opening is removed to expose the backlight side surface of the display substrate.

[0014] In an exemplary embodiment, the relative surfaces of the back film layer located on both sides of the back film opening are set as inclined surfaces, and the first angle between the inclined surfaces of the back film layer and the direction perpendicular to the display panel is set to be greater than or equal to 5 degrees and less than or equal to 20 degrees.

[0015] On the other hand, an embodiment of the present disclosure provides a display device including the display panel as described above.

[0016] The display panel proposed in the disclosed embodiments has a curved surface on at least the side of the cover layer near the bending region, which helps reduce the thickness of the bezel on the bending region side. By arranging the bending region to align with the curved surface of the cover layer after bending, the curved surface of the cover layer not only provides support for the bending region but also further reduces the thickness of the bezel on the side of the display panel on the bending region side, making the display panel more aesthetically pleasing. This solves the problem of a thicker bezel on the side of the display panel on the binding region side.

[0017] Still other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings are used to provide a further understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation to the technical solution of the present disclosure.

[0019] Figure 1 is a structural diagram of a display panel;

[0020] Figure 2 It is a structural schematic diagram of a display substrate;

[0021] Figure 3 for Figure 2 A side view of the substrate is shown in FIG.

[0022] Figure 4 This is a schematic diagram of the planar structure of a display area in a display substrate;

[0023] Figure 5 is a schematic diagram of an equivalent circuit of a pixel driving circuit;

[0024] Figure 6 is a schematic diagram of a cross-sectional structure of a display panel;

[0025] Figure 7 is a top view of a display panel;

[0026] Figure 8 for Figure 7 A cross-sectional view of the cover layer of the display panel;

[0027] Figure 9 is a top view of another display panel;

[0028] Figure 10 is a schematic cross-sectional structural diagram of a display panel according to an exemplary embodiment of the present disclosure;

[0029] Figure 11 for Figure 10 A top view of the display panel is shown in FIG.

[0030] Figure 12 for Figure 11 A cross-sectional view of the cover layer of the display panel along the AA direction;

[0031] Figure 13 Schematic diagram of the angle between the back film layer and the display substrate in the flat state. DETAILED DESCRIPTION

[0032] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Note that the embodiments can be implemented in a variety of different forms. A person skilled in the art can easily understand that the methods and contents can be transformed into various forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. In the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other in any way.

[0033] The present disclosure includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The disclosed embodiments, features, and elements of the present disclosure may also be combined with any conventional features or elements to form a unique inventive solution defined by the claims. Any features or elements of any embodiment may also be combined with features or elements from other inventive solutions to form another unique inventive solution defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in this disclosure may be implemented individually or in any appropriate combination. Therefore, the embodiments are not subject to other limitations except for the limitations set forth in the appended claims and their equivalents. In addition, various modifications and changes may be made within the scope of protection of the appended claims.

[0034] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps in the specific order described. As will be understood by those skilled in the art, other orders of steps are also possible. Therefore, the specific order of the steps set forth in the specification should not be interpreted as a limitation on the claims. In addition, the claims to the method and / or process should not be limited to performing their steps in the order written, and those skilled in the art can readily understand that these orders can be changed and still remain within the spirit and scope of the disclosed embodiments.

[0035] In the drawings, the size of one or more components, layer thicknesses, or regions may be exaggerated for clarity. Therefore, one embodiment of the present disclosure is not necessarily limited to these dimensions, and the shapes and sizes of one or more components in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate idealized examples, and one embodiment of the present disclosure is not limited to the shapes or values ​​shown in the drawings.

[0036] In this specification, ordinal numbers such as “first”, “second” and “third” are provided to avoid confusion among constituent elements, and are not intended to limit the number.

[0037] In this specification, for convenience, words and phrases indicating orientation or positional relationships, such as "middle," "upper," "lower," "front," "back," "vertical," "horizontal," "top," "bottom," "inside," and "outside," are used to illustrate the positional relationships of constituent elements with reference to the accompanying drawings. This is merely for the purpose of facilitating the description of this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limiting the present disclosure. The positional relationships of constituent elements may be appropriately changed depending on the direction in which each constituent element is described. Therefore, the present disclosure is not limited to the words and phrases described in the specification and may be appropriately replaced according to the circumstances.

[0038] In this specification, unless otherwise specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they can refer to fixed, removable, or integral connections; mechanical or electrical connections; direct connections, indirect connections through intermediaries, or internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in this disclosure.

[0039] In this specification, a transistor refers to a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to the region through which current primarily flows.

[0040] In this specification, the first electrode can be a drain electrode and the second electrode can be a source electrode, or vice versa. The functions of "source electrode" and "drain electrode" may be interchanged when using transistors with opposite polarity or when the direction of current changes during circuit operation. Therefore, in this specification, "source electrode" and "drain electrode" may be interchanged.

[0041] In this specification, "electrically connected" includes components connected together via an element having some electrical function. There are no particular limitations on the "element having some electrical function" as long as it enables transmission of electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with various functions.

[0042] In this specification, "parallel" refers to a state where the angle formed by two straight lines is greater than -10° and less than 10°, and thus also includes a state where the angle is greater than -5° and less than 5°. Furthermore, "perpendicular" refers to a state where the angle formed by two straight lines is greater than 80° and less than 100°, and thus also includes a state where the angle is greater than 85° and less than 95°.

[0043] The triangles, rectangles, trapezoids, pentagons or hexagons in this specification are not in the strict sense, but may be approximate triangles, rectangles, trapezoids, pentagons or hexagons, etc. There may be some small deformations caused by tolerances, and there may be chamfers, arc edges and deformations.

[0044] The term "about" in the present disclosure refers to a numerical value that is not strictly defined and allows for process and measurement errors.

[0045] Figure 1 Schematic diagram of the structure of a display panel. Figure 1As shown, a display panel may include a timing controller, a data driver, a scan driver, a light-emitting driver, and a pixel array. The timing controller is connected to the data driver, scan driver, and light-emitting driver, respectively. The data driver is connected to a plurality of data signal lines (D1 to Dn), the scan driver is connected to a plurality of scan signal lines (S1 to Sm), and the light-emitting driver is connected to a plurality of light-emitting signal lines (E1 to Eo). The pixel array may include a plurality of sub-pixels Pxij, where i and j may be natural numbers. At least one sub-pixel Pxij may include a circuit unit and a light-emitting unit connected to the circuit unit. The circuit unit may include at least a pixel driving circuit, which is connected to the scan signal lines, the data signal lines, and the light-emitting signal lines, respectively. In an exemplary embodiment, the timing controller may provide grayscale values ​​and control signals suitable for the specifications of the data driver to the data driver, clock signals and scan start signals suitable for the specifications of the scan driver to the scan driver, and clock signals and emission stop signals suitable for the specifications of the light-emitting driver to the light-emitting driver. The data driver can generate data voltages to be supplied to data signal lines D1, D2, D3, ..., and Dn using grayscale values ​​and control signals received from a timing controller. For example, the data driver can sample grayscale values ​​using a clock signal and apply data voltages corresponding to the grayscale values ​​to data signal lines D1 to Dn on a per-pixel basis, where n can be a natural number. The scan driver can generate scan signals to be supplied to scan signal lines S1, S2, S3, ..., and Sm by receiving clock signals, scan start signals, and the like from the timing controller. For example, the scan driver can sequentially supply scan signals having on-level pulses to scan signal lines S1 to Sm. For example, the scan driver can be configured as a shift register and can sequentially transmit scan start signals provided in the form of on-level pulses to the next-stage circuit under the control of a clock signal, where m can be a natural number. The light driver can generate emission signals to be supplied to light signal lines E1, E2, E3, ..., and Eo by receiving clock signals, emission stop signals, and the like from the timing controller. For example, the light emitting driver may sequentially provide an emission signal having an off-level pulse to the light emitting signal lines E1 to Eo. For example, the light emitting driver may be configured in the form of a shift register and may generate an emission signal in a manner such that an emission stop signal provided in the form of an off-level pulse is sequentially transmitted to a next-stage circuit under the control of a clock signal. o may be a natural number.

[0046] In an exemplary embodiment, on a plane perpendicular to the display panel, the display panel may include a display substrate, a first functional layer disposed on a light emitting surface of the display substrate, and a second functional layer disposed on a backlight surface of the display substrate. Figure 2This is a schematic diagram of the structure of a display substrate, showing the state of the binding area before bending. Figure 3 for Figure 2 The side view of the substrate is shown in FIG, which illustrates the bent state of the binding area after bending. Figure 2 and Figure 3 As shown, in a plane parallel to the display panel, the display substrate may include at least a display area 100, a binding area 200 located on one side of the display area 100, and a border area 300 located on the other side of the display area 100. In an exemplary embodiment, the display area 100 may be a flat area including a plurality of sub-pixels Pxij forming a pixel array. The plurality of sub-pixels Pxij are configured to display dynamic or still images. The display area 100 may be referred to as an active area (AA). In an exemplary embodiment, the display substrate may be deformable, such as being curled, bent, folded, or rolled.

[0047] In an exemplary embodiment, the binding area 200 may include a routing area 210, a bending area 220, and a composite circuit area 230, arranged sequentially in a direction away from the display area 100. The routing area 210 may be connected to the display area 100 and may include at least a plurality of data transmission lines, which are configured to connect to the data signal lines of the display area. The bending area 220 may be connected to the routing area 210 and may include a composite insulating layer provided with grooves, configured to bend the binding area to fit onto the back surface of the display area 100, so that the binding area 200 can overlap the display area 100 in a direction perpendicular to the plane of the display area. The composite circuit area 230 may include at least a driver chip area and a binding pin area. An integrated circuit (IC) 240 may be bonded to the driver chip area, and a flexible printed circuit (FPC) 250 may be bonded to the binding pin area.

[0048] In an exemplary embodiment, the integrated circuit 240 may be bonded to the driver chip region via an anisotropic conductive film or other means. The integrated circuit 240 may generate the driving signals required to drive the sub-pixels and provide the driving signals to the sub-pixels in the display area 100. For example, the driving signals may be data signals that drive the brightness of the sub-pixels. In an exemplary embodiment, the bonding pin region may include a plurality of pins (PINs), and the flexible circuit board 250 may be bonded to the plurality of pins.

[0049] Figure 4 FIG. 1 is a schematic diagram of the planar structure of a display area in a display substrate. Figure 4As shown, the display substrate may include a plurality of pixel units P arranged in a matrix. At least one pixel unit P may include a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light. Each sub-pixel may include a circuit unit and a light-emitting unit. The circuit unit may include at least a pixel driving circuit. The pixel driving circuit is respectively connected to a scan signal line, a data signal line, and a light-emitting signal line. The pixel driving circuit is configured to receive a data voltage transmitted by the data signal line under the control of the scan signal line and the light-emitting signal line, and output a corresponding current to the light-emitting unit. The light-emitting unit in each sub-pixel is respectively connected to the pixel driving circuit of the sub-pixel. The light-emitting unit is configured to emit light of a corresponding brightness in response to the current output by the connected pixel driving circuit.

[0050] In an exemplary embodiment, the first subpixel P1 may be a red subpixel (R) that emits red light, the second subpixel P2 may be a blue subpixel (B) that emits blue light, and the third subpixel P3 may be a green subpixel (G) that emits green light. In an exemplary embodiment, the subpixels may be rectangular, diamond-shaped, pentagonal, or hexagonal, and the three subpixels may be arranged horizontally, vertically, or in a triangular pattern, although this disclosure is not limited thereto.

[0051] In an exemplary embodiment, a pixel unit may include four sub-pixels. For example, the four sub-pixels may include a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel that emits white (W) light. In another example, the four sub-pixels may include a red sub-pixel, a blue sub-pixel, and two green sub-pixels. In an exemplary embodiment, the four sub-pixels may be arranged horizontally, vertically, in a square, or in a diamond shape, etc., which is not limited in this disclosure.

[0052] Figure 5 FIG. 1 is a schematic diagram of an equivalent circuit of a pixel driving circuit. In an exemplary embodiment, the pixel driving circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C or 8T1C structure. Figure 5 As shown, the pixel driving circuit may include 7 transistors (first transistor T1 to seventh transistor T7) and 1 storage capacitor C, and the pixel driving circuit is respectively connected to 6 signal lines (data signal line D, first scanning signal line S1, second scanning signal line S2, light emitting signal line E, initial signal line INIT and first power line VDD).

[0053] In an exemplary embodiment, the pixel driving circuit may include a first node N1, a second node N2, and a third node N3. The first node N1 is respectively connected to the first electrode of the third transistor T3, the second electrode of the fourth transistor T4, and the second electrode of the fifth transistor T5, the second node N2 is respectively connected to the second electrode of the first transistor, the first electrode of the second transistor T2, the gate electrode of the third transistor T3, and the second end of the storage capacitor C, and the third node N3 is respectively connected to the second electrode of the second transistor T2, the second electrode of the third transistor T3, and the first electrode of the sixth transistor T6.

[0054] In an exemplary embodiment, a first end of the storage capacitor C is connected to the first power line VDD, and a second end of the storage capacitor C is connected to the second node N2 , ie, the second end of the storage capacitor C is connected to the gate electrode of the third transistor T3 .

[0055] The gate electrode of the first transistor T1 is connected to the second scan signal line S2, the first electrode of the first transistor T1 is connected to the initial signal line INIT, and the second electrode of the first transistor is connected to the second node N2. When an on-level scan signal is applied to the second scan signal line S2, the first transistor T1 transmits an initial voltage to the gate electrode of the third transistor T3, so that the charge amount of the gate electrode of the third transistor T3 is initialized.

[0056] The gate electrode of the second transistor T2 is connected to the first scan signal line S1, the first electrode of the second transistor T2 is connected to the second node N2, and the second electrode of the second transistor T2 is connected to the third node N3. When the on-level scan signal is applied to the first scan signal line S1, the second transistor T2 connects the gate electrode of the third transistor T3 to the second electrode.

[0057] The gate electrode of the third transistor T3 is connected to the second node N2, that is, the gate electrode of the third transistor T3 is connected to the second end of the storage capacitor C. The first electrode of the third transistor T3 is connected to the first node N1, and the second electrode of the third transistor T3 is connected to the third node N3. The third transistor T3 can be called a driving transistor. The third transistor T3 determines the amount of driving current flowing between the first power line VDD and the second power line VSS based on the potential difference between the gate electrode and the first electrode of the third transistor T3.

[0058] A gate electrode of the fourth transistor T4 is connected to the first scan signal line S1, a first electrode of the fourth transistor T4 is connected to the data signal line D, and a second electrode of the fourth transistor T4 is connected to the first node N1. The fourth transistor T4 can be called a switching transistor, a scan transistor, etc. When an on-level scan signal is applied to the first scan signal line S1, the fourth transistor T4 inputs the data voltage of the data signal line D to the pixel driving circuit.

[0059] The gate electrode of the fifth transistor T5 is connected to the light-emitting signal line E, the first electrode of the fifth transistor T5 is connected to the first power line VDD, and the second electrode of the fifth transistor T5 is connected to the first node N1. The gate electrode of the sixth transistor T6 is connected to the light-emitting signal line E, the first electrode of the sixth transistor T6 is connected to the third node N3, and the second electrode of the sixth transistor T6 is connected to the first electrode of the light-emitting element EL. The fifth transistor T5 and the sixth transistor T6 can be referred to as light-emitting transistors. When an on-level light-emitting signal is applied to the light-emitting signal line E, the fifth transistor T5 and the sixth transistor T6 form a drive current path between the first power line VDD and the second power line VSS, thereby causing the light-emitting element EL to emit light.

[0060] The gate electrode of the seventh transistor T7 is connected to the second scan signal line S2, the first electrode of the seventh transistor T7 is connected to the initial signal line INIT, and the second electrode of the seventh transistor T7 is connected to the first electrode of the light emitting element EL. When an on-level scan signal is applied to the second scan signal line S2, the seventh transistor T7 transmits an initial voltage to the first electrode of the light emitting element EL to initialize or release the charge accumulated in the first electrode of the light emitting element EL.

[0061] In an exemplary embodiment, the light emitting unit EL may be an OLED including a stacked first electrode (anode), an organic light emitting layer, and a second electrode (cathode), or may be a QLED including a stacked first electrode (anode), a quantum dot light emitting layer, and a second electrode (cathode).

[0062] In an exemplary embodiment, the second electrode of the light emitting unit EL is connected to the second power line VSS, the signal of the second power line VSS is a continuously provided low level signal, and the signal of the first power line VDD is a continuously provided high level signal.

[0063] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 may be a P-type transistor or an N-type transistor. Using the same type of transistors in the pixel driving circuit can simplify the process flow, reduce the manufacturing difficulty of the display panel, and improve the product yield. In some possible implementations, the first transistor T1 to the seventh transistor T7 may include P-type transistors and N-type transistors.

[0064] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 may be low-temperature polysilicon thin-film transistors, or oxide thin-film transistors, or both. The active layer of the low-temperature polysilicon thin-film transistors is made of low-temperature polysilicon (LTPS), while the active layer of the oxide thin-film transistors is made of oxide semiconductor (Oxide). Low-temperature polysilicon thin-film transistors have advantages such as high mobility and fast charging, while oxide thin-film transistors have advantages such as low leakage current. Integrating low-temperature polysilicon thin-film transistors and oxide thin-film transistors on a display substrate to form a low-temperature polycrystalline oxide (LTPO) display substrate leverages the advantages of both, enabling low-frequency driving, reducing power consumption, and improving display quality.

[0065] Taking the case where all seven transistors are P-type transistors as an example, the operation process of the pixel driving circuit may include:

[0066] The first phase A1, known as the reset phase, involves a low-level signal on the second scan signal line S2, while high-level signals on the first scan signal line S1 and the light-emitting signal line E. The low-level signal on the second scan signal line S2 turns on the first transistor T1 and the seventh transistor T7. Turning on the first transistor T1 allows the initial voltage on the initial signal line INIT to be supplied to the second node N2, initializing the storage capacitor C and clearing the existing data voltage in the storage capacitor. Turning on the seventh transistor T7 allows the initial voltage on the initial signal line INIT to be supplied to the first electrode of the OLED, initializing (resetting) the first electrode of the OLED and clearing the pre-stored voltage within it, completing initialization. The high-level signals on the first scan signal line S1 and the light-emitting signal line E turn off the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6. During this phase, the OLED does not emit light.

[0067] In the second phase A2, also known as the data writing phase or threshold compensation phase, the signal on the first scan signal line S1 is low, the signals on the second scan signal line S2 and the light-emitting signal line E are high, and the data signal line D outputs a data voltage. During this phase, since the second end of the storage capacitor C is low, the third transistor T3 is turned on. The low signal on the first scan signal line S1 turns on the second transistor T2 and the fourth transistor T4. The conduction of the second transistor T2 and the fourth transistor T4 causes the data voltage output by the data signal line D to be supplied to the second node N2 via the first node N1, the turned-on third transistor T3, the third node N3, and the turned-on second transistor T2. The difference between the data voltage output by the data signal line D and the threshold voltage of the third transistor T3 is then charged into the storage capacitor C. The voltage at the second end of the storage capacitor C (second node N2) is Vd - |Vth|, where Vd is the data voltage output by the data signal line D and Vth is the threshold voltage of the third transistor T3. The high signal on the second scan signal line S2 turns off the first transistor T1 and the seventh transistor T7. The signal of the light emitting signal line E is a high level signal, which turns off the fifth transistor T5 and the sixth transistor T6.

[0068] In the third phase A3, known as the light-emitting phase, the signal on the light-emitting signal line E is a low-level signal, while the signals on the first scan signal line S1 and the second scan signal line S2 are high-level signals. The low-level signal on the light-emitting signal line E turns on the fifth transistor T5 and the sixth transistor T6. The power supply voltage output from the first power supply line VDD provides a driving voltage to the first electrode of the OLED through the turned-on fifth transistor T5, third transistor T3, and sixth transistor T6, driving the OLED to emit light.

[0069] During the driving process of the pixel driving circuit, the driving current flowing through the third transistor T3 (driving transistor) is determined by the voltage difference between its gate electrode and the first electrode. Since the voltage at the second node N2 is Vdata-|Vth|, the driving current of the third transistor T3 is:

[0070] I=K*(Vgs-Vth) 2 =K*[(Vdd-Vd+|Vth|)-Vth] 2 =K*(Vdd-Vd) 2

[0071] Wherein, I is the driving current flowing through the third transistor T3, that is, the driving current driving the OLED, K is a constant, Vgs is the voltage difference between the gate electrode and the first electrode of the third transistor T3, Vth is the threshold voltage of the third transistor T3, Vd is the data voltage output by the data signal line D, and Vdd is the power supply voltage output by the first power supply line VDD.

[0072] Figure 6 This is a schematic diagram of the cross-sectional structure of a display panel, illustrating the state of the binding area after bending. Figure 6 As shown, on a plane parallel to the display panel, the display panel may include at least a display area 100 and a binding area 200 located on one side of the display area 100. The binding area 200 may include at least a routing area 210, a bending area 220 and a composite circuit area 230 arranged in sequence along a direction away from the display area 100. The routing area 210 may be connected to the display area 100, the bending area 220 may be connected to the routing area 210, and the composite circuit area 230 may be connected to the bending area 220. The bending area 220 is provided with a bending groove. The bending area 220 may be bent so that the composite circuit area 230 is adhered to the back of the display area 100. The composite circuit area 230 may overlap with the display area 100 in a direction perpendicular to the plane of the display area.

[0073] In an exemplary embodiment, the display panel may include, on a plane perpendicular to the display panel, a display substrate 10, a first functional layer disposed on a first side surface (light-emitting surface) of the display substrate 10, and a second functional layer disposed on a second side surface (backlight surface) of the display substrate 10. The first functional layer may include at least a polarizing layer 20 disposed on the first side surface of the display substrate 10, an adhesive layer 30 disposed on a side of the polarizing layer 20 away from the display substrate 10, and a cover layer 40 disposed on a side of the adhesive layer 30 away from the display substrate 10. The second functional layer may include at least a backing film layer 50 disposed on the second side surface of the display substrate 10, a heat dissipation layer 60 disposed on a side of the backing film layer 50 away from the display substrate 10, and a spacer layer 70 disposed on a side of the heat dissipation layer 60 away from the display substrate 10.

[0074] In an exemplary embodiment, the polarizing layer 20 may be attached to the first side surface of the display substrate 10, and the polarizing layer 20 may be located only in the display area 100 and the wiring area 210. In an exemplary embodiment, the polarizing layer 20 may be attached to the first side surface of the display substrate 10 using a pressure-sensitive adhesive (PSA).

[0075] In an exemplary embodiment, the adhesive layer 30 is configured to adhere the cover layer 40 to the polarizing layer 20. The adhesive layer 30 may be located only in the display area 100 and the wiring area 210, and the cover layer 40 may extend from the display area 100 to the bending area 220. In an exemplary embodiment, the adhesive layer 30 may be made of optically clear adhesive (OCA), and the cover layer 40 may be made of cover glass (CG) or a flexible plastic such as colorless polyimide (CPI).

[0076] In an exemplary embodiment, the backing film layer 50 is configured to support the display substrate 10 and can be disposed in the display area 100 and the binding area 200. The backing film layer 50 in the binding area 200 has a backing film opening 50-1, and the position of the backing film opening 50-1 can correspond to the bending area 220. The backing film layer 50 within the backing film opening 50-1 is removed, that is, the backing film layer 50 in the binding area 200 is disposed in the wiring area 210 and the composite circuit area 230. In an exemplary embodiment, the backing film layer 50 can be made of a low-modulus polymer film material, such as a flexible film material such as polyolefin, polyimide, and polyurethane.

[0077] In an exemplary embodiment, the heat dissipation layer 60 is configured to dissipate heat generated during operation of the display substrate and may be located only in the display area 100 and the wiring area 210. In an exemplary embodiment, the heat dissipation layer 60 may include a first heat dissipation layer (not shown) and a second heat dissipation layer (not shown) sequentially disposed in a direction away from the cover layer 40. The first heat dissipation layer may include a mesh adhesive layer and a buffer layer, the buffer layer being made of, for example, a foam material. The second heat dissipation layer may include a copper foil layer.

[0078] In an exemplary embodiment, the spacer layer 70 is configured to adhere to the heat dissipation layer 60 of the wiring area 210 and the back film layer 50 of the composite circuit area 230 , and may be located only in the display area 100 and the wiring area 210 .

[0079] In an exemplary embodiment, the bending region 220 of the display panel includes a protective adhesive layer 80 disposed on the first side surface of the display substrate 10. The protective adhesive layer 80 may extend from the wiring region 210 to the composite circuit region 230 to include the display substrate in the bending region 220. Figure 6 As shown, the protective adhesive layer 80 of the wiring area 210 can be located on the side of the polarizing layer 20 away from the display area, and the protective adhesive layer 80 of the composite circuit area 230 can cover a portion of the composite circuit area 230. In other embodiments, the protective adhesive layer 80 of the composite circuit area 230 can cover the entire composite circuit area 230. The protective adhesive layer 80 can provide protection for the curved arc area.

[0080] In an exemplary embodiment, the cover layer 40 has a 3D structure, and the edge of one side of the cover layer 40 corresponding to the bending area 220 is set as a curved surface. The 3D structure of the display panel helps to achieve a narrower frame, making the product more beautiful and enhancing the user experience.

[0081] like Figure 6As shown, when the cover layer 40 is bonded to the display substrate 10, the protective adhesive layer 80 located in the bending area 220 is easily adhered to the inner surface of the cover layer 40, and the protective adhesive layer 80 needs to be peeled off from the cover layer 40, which will bring additional time and cost, and improper operation may also cause cracks in the display substrate 10. In some technologies, a first distance a is preset between the inner surface of the cover layer 40 and the protective adhesive layer 80. The first distance a is the maximum distance between the inner surface of the cover layer 40 and the protective adhesive layer 80. The minimum value of a is about 1 mm. This can ensure that the protective adhesive layer 80 will not adhere to the cover layer 40 during the bonding process of the cover layer 40 and the display substrate 10, thereby avoiding cracks in the display substrate 10 that may be caused during the peeling process. However, this design increases the frame thickness of the display panel on the side of the binding area 200, and the display panel is not aesthetically pleasing. In order to narrow the bezel thickness of the display panel on the binding area 200 side, some designs will thin the thickness of the edge of the cover layer 40 near the protective adhesive layer 80. However, although this approach can reduce the bezel thickness, it will also reduce the edge strength of the cover layer 40 and reduce product quality.

[0082] Figure 7 It is a top view of a display panel, illustrating the positional relationship between the display substrate 10 and the cover layer 40 . Figure 8 for Figure 7 A cross-sectional view of the cover layer of the panel is shown in FIG. Figure 7 and Figure 8 As shown, the display panel can be circular, and the cover layer 40 can be a 3D curved cover layer, which covers the display substrate 10. In a plane parallel to the display panel, the minimum value of the first distance a1 between the inner surface of the cover layer 40 and the protective adhesive layer 80 is about 1 mm. The thickness of the edge of the cover layer 40 is b1, which is about 1.1 mm. Therefore, on the side close to the bending area 220, the minimum value of the frame thickness of the display panel is about a1+b1=1+1.1=2.1 mm. Figure 8 In the embodiment, the circumferential edge of the cover layer 40 is a curved surface, and the curvature radius R1 of the curved surface of the cover layer 40 is approximately 0.9 mm.

[0083] Figure 9 It is a top view of another display panel, illustrating the positional relationship between the display substrate 10 and the cover layer 40 . Figure 9 and Figure 7 The difference is that Figure 9 The thickness of the cover layer 40 at both sides of the edge close to the protective adhesive layer 80 is reduced by d1, and the thickness of the edge of the cover layer 40 at other positions is still b1. Figure 9The middle cover layer 40 is circular, and the distance between the edges of the protective adhesive layer 80 and the edge of the cover layer 40 is the shortest. By thinning the thickness d1 of the edge of the cover layer 40 near the protective adhesive layer 80, the first distance a2 between the edge of the bending area 220 near the cover layer 40 and the inner surface of the edge of the cover layer 40 can be reduced accordingly. The minimum value of a2 is about 0.7 mm. Then, on the side of the bending area 220, the minimum value of the border thickness of the cover layer 40 is about a2+b1=0.7+1.1=1.8 mm. It can be seen that by thinning the thickness d1 of the edge of the cover layer 40 near the protective adhesive layer 80, the border thickness on the side of the bending area 220 can be reduced, but Figure 9 The thickness d1 of the thinnest portion of the edge of the middle cover plate layer 40 is only 0.8 mm, resulting in relatively low strength of the cover plate layer 40 . Figure 9 The curvature radius of the curved portion of the middle cover layer 40 can be Figure 8 The same as in , no further description is given here.

[0084] An exemplary embodiment of the present disclosure provides a display panel, comprising a display area and a binding area located on one side of the display area, wherein the binding area comprises a routing area, a bending area and a composite circuit area sequentially arranged in a direction away from the display area, and the bending area is configured to flip the composite circuit area to the back of the display area by bending; in a plane perpendicular to the display panel, the binding area comprises a display substrate and a first functional layer located on a light-emitting side surface of the display substrate; the first functional layer comprises a cover layer, and at least a surface of the cover layer close to the bending area is set to a curved surface; the bending area is conformed to the curved surface of the cover layer after bending.

[0085] The display panel proposed in the disclosed embodiments has a curved surface on at least the side of the cover layer near the bending region, which helps reduce the thickness of the bezel on the bending region side. By arranging the bending region to align with the curved surface of the cover layer after bending, the curved surface of the cover layer not only provides support for the bending region but also further reduces the thickness of the bezel on the side of the display panel on the bending region side, making the display panel more aesthetically pleasing. This solves the problem of a thicker bezel on the side of the display panel on the binding region side.

[0086] In an exemplary embodiment, in a plane parallel to the display panel, the thickness of the edge of the cover layer close to the bending area is greater than the thickness of the edge of the cover layer at other positions.

[0087] In this embodiment, since the bending area fits the curved surface of the cover layer after bending, the first distance is cancelled. Therefore, the edge of the cover layer close to the bending area can be locally thickened. While ensuring a narrow frame, the impact resistance of the cover layer can be increased, thereby improving product quality.

[0088] In an exemplary embodiment, the curvature radius of the curved surface of the cover layer at a side close to the bending area is smaller than the curvature radius of the curved surface of the cover layer at other positions.

[0089] In this embodiment, since the edge of the cover layer close to the bending area is locally thickened and the curvature radius of the curved surface of the cover layer close to the bending area is set to be smaller, the overall thickness of the curved surface of the cover layer close to the bending area is thicker, which can increase the impact resistance of the cover layer and improve product quality.

[0090] In an exemplary embodiment, the cover layer covering the display area and the wiring area is a plane; in a direction perpendicular to the display panel, the thickness of the curved surface of the cover layer close to the bending area is greater than the thickness of the cover layer in the wiring area, and the curved surface of the cover layer close to the bending area and the plane covering the wiring area form a boss portion.

[0091] In an exemplary embodiment, the first functional layer includes a polarizing layer arranged on the light-emitting side surface of the display substrate, an adhesive layer arranged on the side of the polarizing layer away from the display substrate, and the cover layer arranged on the side of the adhesive layer away from the display substrate; the adhesive layer is filled in the boss portion.

[0092] In this embodiment, in the direction perpendicular to the display panel, a boss portion is formed by utilizing the height difference between the curved surface of the cover layer close to the bending area and the plane covering the wiring area, and the adhesive layer is filled in the boss portion. This can reduce the distance between the curved surface of the display substrate and the cover layer close to the bending area. After the bending area is bent, the bending arc area is closer to the curved surface of the cover layer, which can reduce the stress accumulated in the film layer located in the bending area, thereby helping to extend the service life of the display substrate.

[0093] In an exemplary embodiment, the bending area includes a protective adhesive layer arranged on the light-emitting side surface of the display substrate, the protective adhesive layer extends from the routing area to the composite circuit area, and the protective adhesive layer located in the routing area is arranged on the side of the polarizing layer away from the display area; after the bending area is bent, the protective adhesive layer is in contact with the curved surface of the cover layer.

[0094] In an exemplary embodiment, in a plane perpendicular to the display panel, the binding area also includes a second functional layer located on the backlight side surface of the display substrate; the second functional layer includes a back film layer arranged on the backlight side surface of the display substrate, a heat dissipation layer arranged on the side of the back film layer away from the display substrate, and a spacer layer arranged on the side of the heat dissipation layer away from the display substrate.

[0095] In an exemplary embodiment, the back film layer is arranged in the display area and the binding area, and a back film opening is opened in the back film layer at a position corresponding to the bending area. The back film layer in the back film opening is removed to expose the backlight side surface of the display substrate.

[0096] In an exemplary embodiment, the relative surfaces of the back film layer located on both sides of the back film opening are set as inclined surfaces, and the first angle between the inclined surfaces of the back film layer and the direction perpendicular to the display panel is set to be greater than or equal to 5 degrees and less than or equal to 20 degrees.

[0097] In an exemplary embodiment, a first angle between the inclined surface of the back film layer and a direction perpendicular to the display panel is set to 10 degrees.

[0098] Figure 10 FIG is a schematic diagram of a cross-sectional structure of a display panel according to an exemplary embodiment of the present disclosure, illustrating the state of the binding area after being bent. Figure 10 As shown, on a plane parallel to the display panel, the display panel of the exemplary embodiment of the present disclosure may include at least a display area 100 and a binding area 200 located on one side of the display area 100. The binding area 200 may include at least a routing area 210, a bending area 220, and a composite circuit area 230, which are sequentially arranged in a direction away from the display area 100. On a plane perpendicular to the display area, the display panel may include a display substrate 10, a first functional layer disposed on a first side surface (light emitting surface) of the display substrate 10, and a second functional layer disposed on a second side surface (backlight surface) of the display substrate 10.

[0099] In an exemplary embodiment, the first functional layer of this embodiment may include at least a polarizing layer 20 disposed on the first side surface of the display substrate 10, an adhesive layer 30 disposed on the side of the polarizing layer 20 away from the display substrate 10, and a cover layer 40 disposed on the side of the adhesive layer 30 away from the display substrate 10, wherein at least the surface of the cover layer 40 close to the bending region 220 is configured as a curved surface. Figure 6 The difference between the structures shown is that the inner surface of the cover layer 40 near the bending area 220 in this embodiment is in contact with the display substrate 10 located in the bending area 220 after bending. By using the inner surface of the curved portion of the cover layer 40 to be in contact with the bending arc area of ​​the display substrate 10 after bending, the bending arc area of ​​the display substrate 10 can be protected. In an exemplary embodiment, the structure of the second functional layer of this embodiment can be the same as Figure 6 In this embodiment, by arranging the inner surface of the curved portion of the cover layer 40 to fit the curved arc region of the bent display substrate 10, the thickness of the frame of the display panel on the binding region side is greatly reduced, and the appearance of the display panel is more beautiful.

[0100] In an exemplary embodiment, Figure 10 As shown, the cover layer 40 may include a planar area and a curved area. The planar area includes the cover layer 40 covering the display area 100 and the wiring area 210 , and the curved area includes at least the curved surface of the cover layer 40 close to the bending area 220 . Figure 11 for Figure 10 The top view of the display panel in FIG. 1 shows the positional relationship between the display substrate 10 and the cover layer 40. Figure 11 The middle display panel is circular, and the curved area of ​​the cover layer 40 is arranged to surround the flat area. Figure 12 for Figure 11 The cross-sectional view of the cover layer of the display panel along the AA direction is shown in FIG. Figures 10 to 12 As shown, in a plane parallel to the display panel, the thickness b3 of the edge of the cover layer 40 near the bending region 220 can be set to be greater than the thickness b4 of the edge of the cover layer 40 at other locations. The thickness of the edge of the cover layer 40 can be the distance between the surface of the edge of the cover layer 40 near the display substrate 10 and the surface of the edge away from the display substrate 10. Figure 11 In the embodiment, the thickness b3 of the edge of the cover layer 40 near the bending region 220 is about 1.7 mm, and the thickness b4 of the edge of the cover layer 40 at other positions is about 1.1 mm. Since the cover layer 40 is attached to the display substrate 10 at the bending region 220, Figure 11 The thickness of the frame of the middle cover layer 40 on the side of the bending area 220 is approximately equal to the thickness b3 of the edge of the cover layer 40 close to the side of the bending area 220, which is about 1.7 mm. Figure 11 The thickness of the frame of the display panel on the bending area 220 side is greater than Figure 7 The display panel shown in FIG has a frame thickness of 0.4 mm on the side of the bending area 220. Figure 11 The thickness of the frame of the display panel on the bending area 220 side is greater than Figure 9 The display panel shown in FIG has a frame thickness of 0.1 mm on the side of the bending area 220, and Figure 11 The display panel has a thicker frame on the side of the bending area 220. Figure 11 The thickness of the thinnest edge of the display panel is still 1.1 mm. The display panel has a narrower border and better impact resistance, and the product quality is better.

[0101] In an exemplary embodiment, the display panel may be in other shapes, such as a triangle, a quadrilateral, an ellipse, or other polygonal shapes, and the present disclosure is not limited thereto. The number and distribution of the curved surfaces included in the cover layer 40 may be set as needed. For example, in the case of a rectangular display panel, only the cover layer 40 on the side adjacent to the bending region 220 may be provided with a curved surface. Alternatively, the cover layer 40 on the side adjacent to the bending region 220 and the cover layer 40 on one or both sides adjacent to the bending region 220 may be provided with a curved surface. Alternatively, the circumferential edges of the cover layer 40 may all be curved surfaces, and the present disclosure is not limited thereto.

[0102] In an exemplary embodiment, the radius of curvature R2 of the curved surface of the cover layer 40 on the side close to the bending zone 220 may be smaller than the radius of curvature R3 of the curved surface area of ​​the cover layer 40 at other locations. The thickness b3 of the edge of the cover layer 40 on the side close to the bending zone 220 is larger, and the radius of curvature of the curved surface of the cover layer 40 on the side close to the bending zone 220 is smaller, so that the thickness of the curved surface of the cover layer 40 on the side close to the bending zone 220 is greater than the thickness of the curved surface of the cover layer 40 at other locations. After bending, the bending zone 220 is closer to the cover layer 40, the bonding area with the cover layer 40 is larger, and the shape after bending is smoother, which helps to reduce the stress accumulation of the film layer located in the bending zone 220. The cover layer 40 can better provide support for the display substrate 10 located in the bending zone 220. Figure 12 In the figure, R2 is approximately 0.85, and R3 is approximately 0.9. The values ​​of b3, b4, R2, and R3 can be set as needed to meet different frame thicknesses and cover layer strength requirements. By adjusting the curvature radius R2 of the curved area of ​​the cover layer 40 near the bending area 220, the shape of the display substrate 10 and the cover layer 40 at the bonding position can be adjusted.

[0103] In an exemplary embodiment, in a direction perpendicular to the display panel, the thickness of the curved surface of the cover layer 40 near the bending area 220 is greater than the thickness of the cover layer 40 in the routing area 210. The thickness of the cover layer 40 in the curved area may be the distance between the section of the curved surface where the outer surface of the cover layer 40 is located and the section of the curved surface where the corresponding inner surface of the cover layer 40 is located. In a direction perpendicular to the display panel, compared to the inner surface of the cover layer 40 near the bending area 220, the inner surface of the cover layer 40 in the flat area bulges toward the side away from the display substrate 10, forming a boss portion between the curved area and the flat area. After bending, the display substrate 10 located in the bending area 220 is fitted with the cover layer 40 in the curved area. Combined Figure 10 and Figure 12 The thickness of the cover layer 40 in the routing area 210 is h, the thickness of the boss portion is H, and the thickness of the curved surface of the cover layer 40 close to the bending area 220 is h+H.

[0104] In an exemplary embodiment, the bending region 220 of the display panel includes a protective adhesive layer 80 disposed on the first side surface of the display substrate 10. The protective adhesive layer 80 may extend from the wiring region 210 to the composite circuit region 230 to include the display substrate in the bending region 220. Figure 10 As shown, the protective adhesive layer 80 of the wiring area 210 can be located on the side of the polarizing layer 20 away from the display area 100, and the protective adhesive layer 80 of the composite circuit area 230 can cover a portion of the composite circuit area 230. In other embodiments, the protective adhesive layer 80 of the composite circuit area 230 can cover the entire composite circuit area 230. After the display substrate 10 is bent, the protective adhesive layer 80 conforms to the inner surface of the curved surface of the cover layer 40, and the protective adhesive layer 80 can further provide protection for the curved arc area.

[0105] In an exemplary embodiment, in a plane perpendicular to the display panel, the binding area 200 further includes a second functional layer located on the second side surface of the display substrate 10. The second functional layer includes a backing film layer 50 disposed on the second side surface of the display substrate 10, a heat dissipation layer 60 disposed on a side of the backing film layer 50 away from the display substrate 10, and a spacer layer 70 disposed on a side of the heat dissipation layer 60 away from the display substrate 10.

[0106] In an exemplary embodiment, Figure 10 As shown, the adhesive layer 30 can be filled in the boss portion, and the thickness H of the boss portion can be equal to the thickness of the adhesive layer 30. The thickness of the adhesive layer 30 can be the distance between the surface of the adhesive layer 30 close to the display substrate 10 and the surface of the adhesive layer 30 away from the display substrate 10. After the adhesive layer 30 is filled in the boss portion, the thickness of the protective adhesive layer 80 can be set to just fit the curved area of ​​the cover layer 40, which can reduce the deformation of the display substrate 10 in the bending area 220, thereby reducing the stress accumulation of the display substrate 10 in the bending area 220. In other embodiments, the adhesive layer 30 and the polarizing layer 20 can be set to fill the boss portion, and the thickness H of the boss portion can be set to be equal to the sum of the thicknesses of the adhesive layer 30 and the polarizing layer 20, and the thickness of the protective adhesive layer 80 can be set accordingly. Parameters such as the thickness H of the boss portion, the thickness of the adhesive layer 30, the thickness of the protective adhesive layer 80, and the thickness of other related film layers can be set as needed so that the protective adhesive layer 80 can be better attached to the curved surface area of ​​the cover layer 40. This disclosure does not limit this.

[0107] Figure 13 Schematic diagram of the angle between the back film layer and the display substrate in the flat state. Figure 13As shown, the back film layer 50 can be arranged in the display area 100 and the binding area 200, and the back film layer 50 is provided with a back film opening 50-1 at a position corresponding to the bending area 220, and the back film layer 50 in the back film opening 50-1 is removed, that is, the back film layer 50 of the binding area 200 is respectively arranged in the routing area 210 and the composite circuit area 230. The relative surfaces of the back film layer 50 located on both sides of the back film opening 50-1 can be set as inclined surfaces, and the first angle β between the inclined surface of the back film layer 50 and the direction perpendicular to the display substrate 10 can be set to be greater than or equal to 5 degrees and less than or equal to 20 degrees. In an exemplary embodiment, the first angle β between the inclined surface of the back film layer 50 and the direction perpendicular to the display substrate 10 can be set to 10 degrees. In an exemplary embodiment, the back film opening 50-1 can be prepared by a laser patterning process, such as Figure 13 As shown, the second angle α between the inclined surface of the back film layer 50 and the direction perpendicular to the display substrate 10 can be used as the angle of laser cutting when forming the back film opening 50-1. The second angle α can be complementary to the first angle β. In some technologies, the second angle α of laser cutting is about 155 degrees. In this embodiment, the second angle α can be set to be greater than or equal to 160 degrees and less than or equal to 175 degrees. In an exemplary embodiment, the second angle α can be set to 170 degrees, so that after laser cutting, the following can be obtained. Figure 13 The back film layer 50 is shown. In this embodiment, by increasing the cutting angle during laser cutting of the back film, the inclined surface of the back film layer 50 is made steeper than the inclined angle of the display substrate 10. When the bending area 220 is bent, the bending shape of the bending arc area is more easily aligned with the curved surface of the cover layer 40. In other embodiments, the opposing surfaces of the back film layer 50 located on both sides of the back film opening 50-1 can be configured as inclined curved surfaces or wavy shapes, etc., which are not limited by this disclosure.

[0108] The present disclosure also provides a display device comprising the display panel described in any of the above embodiments. The display device can be any product or component with a display function, such as an LED display, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigation system, etc., but the present disclosure is not limited thereto.

[0109] Although the embodiments disclosed herein are as described above, the contents described herein are merely embodiments for facilitating understanding of the present invention and are not intended to limit the present invention. Any person skilled in the art may make any modifications and variations in the form and details of the embodiments without departing from the spirit and scope of the present invention. However, the scope of patent protection of the present invention shall remain subject to the scope defined by the appended claims.

Claims

1. A display panel, characterized in that: The display panel comprises a display area and a binding area located on one side of the display area, wherein the binding area comprises a routing area, a bending area and a composite circuit area sequentially arranged in a direction away from the display area, and the bending area is configured to flip the composite circuit area to the back of the display area by bending; in a plane perpendicular to the display panel, the binding area comprises a display substrate and a first functional layer located on a light-emitting side surface of the display substrate; the first functional layer comprises a polarizing layer arranged on the light-emitting side surface of the display substrate, an adhesive layer arranged on a side of the polarizing layer away from the display substrate, and a cover layer arranged on a side of the adhesive layer away from the display substrate, wherein at least a surface of the cover layer close to the bending area is configured to be a curved surface; the bending area is in contact with the curved surface of the cover layer after being bent; The cover layer covering the display area and the wiring area is a plane; in a direction perpendicular to the display panel, the thickness of the curved surface of the cover layer near the bending area is greater than the thickness of the cover layer in the wiring area, and the curved surface of the cover layer near the bending area and the plane covering the wiring area form a boss portion; the adhesive layer fills the boss portion, and the thickness of the boss portion is equal to the thickness of the adhesive layer; The bending area includes a protective adhesive layer arranged on the light-emitting side surface of the display substrate, the protective adhesive layer extends from the routing area to the composite circuit area, and the protective adhesive layer located in the routing area is arranged on the side of the polarizing layer away from the display area; the thickness of the protective adhesive layer is matched with the curved surface of the cover layer, so that after the bending area is bent, the protective adhesive layer is in contact with the curved surface of the cover layer.

2. The display panel according to claim 1, wherein: In a plane parallel to the display panel, the thickness of the edge of the cover layer close to the bending area is greater than the thickness of the edge of the cover layer at other positions.

3. The display panel according to claim 2, wherein: The curvature radius of the curved surface of the cover layer at the side close to the bending area is smaller than the curvature radius of the curved surface of the cover layer at other positions.

4. The display panel according to claim 1, wherein: In a plane perpendicular to the display panel, the binding area also includes a second functional layer located on the backlight side surface of the display substrate; the second functional layer includes a back film layer arranged on the backlight side surface of the display substrate, a heat dissipation layer arranged on the side of the back film layer away from the display substrate, and a spacer layer arranged on the side of the heat dissipation layer away from the display substrate.

5. The display panel according to claim 4, wherein: The back film layer is arranged in the display area and the binding area. The back film layer is provided with a back film opening at a position corresponding to the bending area. The back film layer in the back film opening is removed to expose the backlight side surface of the display substrate.

6. The display panel according to claim 5, wherein: The relative surfaces of the back film layer located on both sides of the back film opening are set as inclined surfaces, and the first angle between the inclined surfaces of the back film layer and the direction perpendicular to the display panel is set to be greater than or equal to 5 degrees and less than or equal to 20 degrees.

7. A display device, characterized in that: The device comprises the display panel according to any one of claims 1 to 6.

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