Neural circuit, detection circuit, detection system and circuit preparation method

Abstract

The application discloses a kind of nerve circuit, detection circuit, detection system and circuit preparation method, nerve circuit includes first sensor, second sensor, first load resistance, second load resistance, third load resistance, fourth load resistance, first output resistance, second output resistance, first capacitor, second capacitor, first memristor and second memristor, wherein, first sensor and second sensor will be converted into first excitation signal and second excitation signal in turn to the motion state of the object perceived by outside world, first load resistance, second load resistance, third load resistance and fourth load resistance can divide voltage to first excitation signal and second excitation signal, and generate the two response signals of opposite intensity change trend and provide first memristor and second memristor respectively, first memristor and second memristor change or keep the resistance state of itself according to the intensity of received response signal, to output or not output pulse signal.

Description

Technical Field

[0001] This invention relates to the field of bionic electronics, and more particularly to a neural circuit, a detection circuit, a detection system, and a method for fabricating the circuit. Background Technology

[0002] Spiking neural networks (SNNs) possess advantages such as event-driven processing and sparse coding, making them an ideal choice for constructing high-efficiency in-memory computing data processing units and considered a next-generation neuromorphic computing technology. Artificial visual neurons built using SNNs can convert external analog signals into system pulse signals, making them crucial for constructing systems that simulate biological vision.

[0003] However, traditional artificial visual neuron circuits are mainly based on CMOS circuits, which often require many transistors or complex logic gate circuits, resulting in complex structures, high power consumption, and poor miniaturization. Summary of the Invention

[0004] This application provides a neural circuit, a detection circuit, a detection system, and a circuit fabrication method, which solves the technical problem of complex structures in existing artificial visual neural circuits.

[0005] In a first aspect, this application provides a neural circuit, including a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor, and a second memristor;

[0006] One end of the first sensor, one end of the first load resistor, and one end of the fourth load resistor are connected; one end of the second sensor, one end of the second load resistor, and one end of the third load resistor are connected; the other end of the first load resistor, the other end of the second load resistor, one end of the first capacitor, and one end of the first memristor are connected; the other end of the third load resistor, the other end of the fourth load resistor, one end of the second capacitor, and one end of the second memristor are connected.

[0007] The other end of the first memristor serves as the first output terminal, used to output a first pulse signal, and is connected to one end of the first output resistor; the other end of the second memristor serves as the second output terminal, used to output a second pulse signal, and is connected to one end of the second output resistor.

[0008] The other end of the first capacitor is connected to the other end of the first output resistor and then grounded; the other end of the second capacitor is connected to the other end of the second output resistor and then grounded; and the other ends of the first sensor and the second sensor are respectively grounded.

[0009] Optionally, the first load resistor and the third load resistor have the same resistance value, the second load resistor and the fourth load resistor have the same resistance value, and the resistance values ​​of the first load resistor and the third load resistor are greater than the resistance values ​​of the second load resistor and the fourth load resistor.

[0010] Optionally, the relative positions of the first sensor and the second sensor on the circuit board are set in a horizontal or vertical direction;

[0011] When the first sensor and the second sensor are positioned vertically on the circuit board, the neural circuit is used to detect the direction of motion of the object in the vertical direction.

[0012] When the first sensor and the second sensor are positioned in the horizontal direction of the circuit board, the neural circuit is used to detect the direction of motion of the object in the horizontal direction.

[0013] In a second aspect, this application provides a motion direction detection circuit, including a first detection circuit and a second detection circuit, wherein the first detection circuit and the second detection circuit are respectively neural circuits as described in any of the first aspects above;

[0014] In the first detection circuit, the first sensor and the second sensor are arranged on the circuit board in a vertical direction to detect the direction of motion of the object in the vertical direction.

[0015] The first and second sensors in the second detection circuit are arranged horizontally on the circuit board to detect the direction of motion of the object in the horizontal direction.

[0016] Thirdly, this application provides a collision detection system, including N motion direction detection circuits as described in the second aspect above, where N is a natural number greater than or equal to 1.

[0017] Fourthly, this application provides a circuit fabrication method, wherein two of the circuits are connected in parallel to form any of the neural circuits described in the first aspect, the method comprising:

[0018] Deposit an isolation layer on a semiconductor substrate;

[0019] A first electrode layer is deposited on the isolation layer;

[0020] The first output resistor and the first memristor are sequentially fabricated from bottom to top on the surface of the first region of the first electrode layer, and a capacitor dielectric layer and a second electrode layer are sequentially deposited from bottom to top on the surface of the second region of the first electrode layer, wherein the first electrode layer, the capacitor dielectric layer and the second electrode layer constitute the first capacitor.

[0021] An insulating layer is deposited on a third region of the first electrode layer, wherein the insulating layer separates the first output resistor layer and the first memristor from the first capacitor;

[0022] A load resistor, a first sensor, and a third electrode layer are sequentially fabricated from bottom to top on the surfaces of the first memristor, the insulating layer, and the first capacitor, wherein the load resistor includes the first load resistor and the second load resistor.

[0023] Optionally, the step of sequentially fabricating a first output resistor and a first memristor from bottom to top on the surface of a first region of the first electrode layer includes:

[0024] A first output resistor layer is deposited on the surface of a first region of the first electrode layer;

[0025] A bottom electrode layer, a functional layer, and a top electrode layer are deposited sequentially from bottom to top on the surface of the first output resistor layer to form the memristor.

[0026] Optionally, the material of the functional layer is VO2, NbOx, SiO2:Ag, HfO2, SiNx, TaOx, a-Si:Cu, or a-Si:Ag.

[0027] Optionally, the thickness of the functional layer is 5nm to 50nm.

[0028] Optionally, the material of the sensing material layer is cadmium sulfide, cadmium selenide, cadmium telluride, gallium arsenide, or zinc sulfide.

[0029] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0030] The neural circuit provided in this application includes a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor, and a second memristor. The first and second sensors sequentially convert the motion state of the sensed external object into a first excitation signal and a second excitation signal. Based on the connection relationship provided in this application, the first, second, third, and fourth load resistors can divide the first and second excitation signals, generating two response signals with opposite intensity trends, which are respectively provided to the first and second memristors. The first and second memristors change or maintain their resistance state according to the intensity of the received response signals, thus outputting or not outputting pulse signals. Therefore, the direction of motion of the external object can be determined based on the output states of the first and second memristors.

[0031] Compared with traditional artificial visual neuron circuits, the neural circuit provided in this application has a simple structure, does not include complex logic gate circuits, and therefore has low power consumption and good scalability. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a schematic diagram of the neural circuit in the embodiments of this application;

[0034] Figure 2 This is a schematic diagram of the motion direction detection circuit in an embodiment of this application;

[0035] Figure 3 This is a schematic diagram of the collision detection system in the embodiments of this application;

[0036] Figure 4 This is a schematic diagram of the field of view of the collision detection system in the embodiments of this application;

[0037] Figure 5 This is a schematic diagram of the circuit fabrication method in the embodiments of this application;

[0038] Figure 6 The embodiments of this application are adopted Figure 5 A schematic diagram of the circuit structure fabricated using the circuit fabrication method shown. Detailed Implementation

[0039] This application provides a neural circuit that solves the technical problem of complex structures in existing artificial visual neural circuits.

[0040] The technical solution of this application embodiment is to solve the above-mentioned technical problems, and the general idea is as follows:

[0041] A neural circuit is provided, comprising a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor, and a second memristor;

[0042] One end of the first sensor, one end of the first load resistor, and one end of the fourth load resistor are connected; one end of the second sensor, one end of the second load resistor, and one end of the third load resistor are connected; the other end of the first load resistor, the other end of the second load resistor, one end of the first capacitor, and one end of the first memristor are connected; the other end of the third load resistor, the other end of the fourth load resistor, one end of the second capacitor, and one end of the second memristor are connected.

[0043] The other end of the first memristor serves as the first output terminal, used to output a first pulse signal, and is connected to one end of the first output resistor; the other end of the second memristor serves as the second output terminal, used to output a second pulse signal, and is connected to one end of the second output resistor.

[0044] The other end of the first capacitor is connected to the other end of the first output resistor and then grounded; the other end of the second capacitor is connected to the other end of the second output resistor and then grounded; and the other ends of the first sensor and the second sensor are respectively grounded.

[0045] To better understand the above technical solutions, the following will provide a detailed explanation of the technical solutions in conjunction with the accompanying drawings and specific implementation methods.

[0046] Example 1

[0047] This embodiment provides a neural circuit, such as Figure 1 As shown, it includes a first sensor 1110, a second sensor 1120, a first load resistor 1210, a second load resistor 1220, a third load resistor 1230, a fourth load resistor 1240, a first output resistor 1310, a second output resistor 1320, a first capacitor 1410, a second capacitor 1420, a first memristor 1510, and a second memristor 1520;

[0048] One end of the first sensor 1110, one end of the first load resistor 1210, and one end of the fourth load resistor 1240 are connected; one end of the second sensor 1120, one end of the second load resistor 1220, and one end of the third load resistor 1230 are connected; the other end of the first load resistor 1210, the other end of the second load resistor 1220, one end of the first capacitor 1410, and one end of the first memristor 1510 are connected; the other end of the third load resistor 1230, the other end of the fourth load resistor 1240, one end of the second capacitor 1420, and one end of the second memristor 1520 are connected.

[0049] The other end of the first memristor 1510 serves as the first output terminal for outputting the first pulse signal and is connected to one end of the first output resistor 1310; the other end of the second memristor 1520 serves as the second output terminal for outputting the second pulse signal and is connected to one end of the second output resistor 1320.

[0050] The other end of the first capacitor 1410 is connected to the other end of the first output resistor 1310 and then grounded; the other end of the second capacitor 1420 is connected to the other end of the second output resistor 1320 and then grounded; the other ends of the first sensor 1110 and the second sensor 1120 are respectively grounded.

[0051] In specific implementation, the first sensor 1110 and the second sensor 1120 are used to sense the motion state of external objects and can convert the sensed motion state into excitation signals. The first sensor 1110 and the second sensor 1120 can be photoelectric sensors or pressure sensors, etc., without limitation. The motion state of an object specifically refers to its direction of motion, such as moving from left to right or from right to left in the horizontal direction, or moving from top to bottom or from bottom to top in the vertical direction. The neural circuit provided in this application is designed to determine the motion direction of external moving objects.

[0052] In a specific embodiment, the distribution direction of the relative positions of the first sensor 1110 and the second sensor 1120 on the circuit board can be used to determine whether the neural circuit is used to detect the direction of motion in the horizontal direction or the direction of motion in the vertical direction. That is, the relative positions of the first sensor 1110 and the second sensor 1120 on the circuit board can be set in either a horizontal or vertical direction: when the first sensor 1110 and the second sensor 1120 are set in the vertical direction of the circuit board, the neural circuit is used to detect the direction of motion of the object in the vertical direction; when the first sensor 1110 and the second sensor 1120 are set in the horizontal direction of the circuit board, the neural circuit is used to detect the direction of motion of the object in the horizontal direction. Figure 1 In the neural circuit shown, the first and second sensors are arranged vertically on the circuit board to detect the direction of motion of an object in the vertical direction.

[0053] In a specific embodiment, the first load resistor 1210 and the fourth load resistor 1240 are connected in parallel, the second load resistor 1220 and the third load resistor 1230 are connected in parallel, and the first load resistor 1210 and the second load resistor 1220 are connected together to the first memristor 1510, and the third load resistor 1230 and the fourth load resistor 1240 are connected together to the second memristor 1520. In addition, the first load resistor 1210 and the third load resistor 1230 have the same resistance value, the second load resistor 1220 and the fourth load resistor 1240 have the same resistance value, and the resistance values ​​of the first load resistor 1210 and the third load resistor 1230 are greater than the resistance values ​​of the second load resistor 1220 and the fourth load resistor 1240. Therefore, the first excitation signal generated by the first sensor 1110 and the second excitation signal generated by the second sensor 1120, after being divided by these four resistors, can generate two response signals with opposite intensity change trends. These signals are then provided to the first memristor 1510 and the second memristor 1520, respectively. The first memristor 1510 and the second memristor 1520 change or maintain their resistance state according to the intensity of the received response signal, thus outputting or not outputting a pulse signal. Therefore, the direction of motion of an external object can be determined based on the output states of the first and second memristors. It should be noted that memristors have threshold switching characteristics. That is, when a voltage is applied to a single device, if the applied voltage exceeds the device's threshold voltage, the device's resistance state will change from a high resistance state to a low resistance state; if the applied voltage is lower than the device's holding voltage, the device's resistance state will return to a high resistance state.

[0054] Specifically, with Figure 1For example, when an external object moves vertically from top to bottom, the first sensor 1110 first senses the object's motion and generates a first excitation signal. After being divided by the first load resistors 1210 and 1240, the signal is applied to the first capacitors 1410 and 1420 respectively. The second sensor 1120 then senses the object's motion and generates a second excitation signal. After being divided by the second load resistor 1220 and the third load resistor 1230, the signal is applied to the first capacitors 1410 and 1420 respectively. In other words, the first capacitor 1410 and the second capacitor 1420 will each receive two pulse signals. Since the resistance values ​​of the first load resistor 1210 and the third load resistor 1230 are greater than the resistance values ​​of the second load resistor 1220 and the fourth load resistor 1240, the strength of the two pulse signals on the first capacitor 1410 is initially small and then increases. After the first pulse signal is amplified by the second pulse signal, the voltage across the first capacitor 1410 can exceed the threshold voltage of the first memristor 1520. Therefore, the first memristor 1510 switches to a low-resistance state, and the first capacitor 1410 discharges through the first memristor 1510, thus enabling the first memristor 1510 to output a pulse signal. However, the strength of the two pulse signals on the second capacitor 1420 is initially large and then decreases, failing to reach the threshold voltage of the second memristor 1520. Therefore, the second memristor 1520 is in a high-resistance state and cannot output a pulse signal. Consequently, the first memristor 1510 responds to the downward movement. Similarly, when an external object moves from bottom to top in the vertical direction, the first memristor 1510 is in a high-resistance state and the second memristor 1520 is in a low-resistance state. Therefore, the second memristor 1520 outputs a pulse signal, while the first memristor 1510 cannot output a pulse signal. That is, the second memristor 1520 responds to the external object moving from bottom to top.

[0055] Similarly, when the relative positions of the first sensor 1110 and the second sensor 1120 on the circuit board are set in the horizontal direction, based on the same analysis process, the first memristor 1510 can respond to horizontal movement from left to right, while the second memristor 1520 can respond to horizontal movement of an object from right to left.

[0056] In addition, this embodiment also provides a specific structure for the first memristor 1510 and the first memristor 1520, including a bottom electrode, a top electrode, and a functional layer located between the two. The bottom electrode can be made of inert conductive materials such as Pd, Pt, Si, W, or Au, and its thickness can be 10 nm to 200 nm; the functional layer can be made of SiO2, SiO2:Ag, or NbO. x HfO2, SiN x TaO xAlternatively, it can be a-Si:Cu or a-Si:Ag mixed materials, where the value of x varies depending on the different stoichiometric ratios, and its thickness can be 3nm to 50nm; the top electrode material can be conductive materials such as TiN, Poly-Si, Pd, Pt, W, Cu, Ag or Au, and its thickness can be 10nm to 100nm.

[0057] The technical solutions described in the embodiments of this application have at least the following technical effects or advantages:

[0058] The neural circuit provided in this embodiment includes a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor, and a second memristor. The first and second sensors sequentially convert the motion state of the sensed external object into a first excitation signal and a second excitation signal. Based on the connection relationship provided in this application, the first, second, third, and fourth load resistors can divide the first and second excitation signals, generating two response signals with opposite intensity trends, which are respectively provided to the first and second memristors. The first and second memristors change or maintain their resistance state according to the intensity of the received response signals, thus outputting or not outputting pulse signals. Therefore, the direction of motion of the external object can be determined based on the output states of the first and second memristors.

[0059] Compared with traditional artificial visual neuron circuits, the neural circuit provided in this application has a simple structure, does not include complex logic gate circuits, and therefore has low power consumption and good scalability.

[0060] Example 2

[0061] This embodiment provides a motion direction detection circuit, such as Figure 2 As shown, it includes a first detection circuit 201 and a second detection circuit 202, which are neural circuits described in the above embodiment 1.

[0062] In the first detection circuit 201, the first sensor 1110 and the second sensor 1120 are arranged vertically on the circuit board to detect the direction of motion of the object in the vertical direction; in the second detection circuit 202, the first sensor 1130 and the second sensor 1140 are arranged horizontally on the circuit board to detect the direction of motion of the object in the horizontal direction.

[0063] In the specific implementation process, the first detection circuit 201 and the second detection circuit 202 respectively realize the detection of the motion direction of the object in the vertical and horizontal directions according to the principle introduced in Embodiment 1. For the sake of brevity, they will not be described in detail here.

[0064] The motion direction detection circuit provided in this embodiment can simultaneously detect the motion direction of an object in both the vertical and horizontal directions, and has a simple structure and low power consumption.

[0065] Example 3

[0066] This embodiment provides a collision detection system, such as Figure 3 As shown, it includes N motion direction detection circuits provided in Embodiment 2, where N is a natural number greater than or equal to 1.

[0067] In a specific embodiment, the collision detection system can be composed of four motion direction detection circuits provided in Embodiment 2. These four motion direction detection circuits can be arranged on the circuit board in an up-down-left-right manner to comprehensively detect the direction of moving objects while taking into account the manufacturing cost of the devices.

[0068] Figure 4 This demonstration illustrates the collision detection process. Each box contains a motion direction detection circuit, and each small circle within each box represents a memristor in that circuit. The intersection of the boxes represents a moving object. Specifically, these four motion direction detection circuits can be viewed as a large receptive field composed of four smaller receptive fields in the biological retina. When an object appears in the center of the field of vision and gradually approaches, the projection onto the receptive field is a process of gradually enlarging from a small dot. This enlargement process stimulates the sensors in the collision detection system, causing eight neurons in the system to respond simultaneously, thereby determining whether a head-on collision will occur.

[0069] Example 4

[0070] Based on the same inventive concept, this embodiment provides a circuit fabrication method, wherein two of these circuits connected in parallel can form the neural circuit in Embodiment 1, such as... Figure 5 As shown, the method includes:

[0071] Step S501: Deposit an isolation layer on the semiconductor substrate;

[0072] Step S502: Deposit a first electrode layer on the isolation layer;

[0073] Step S503: The first output resistor and the first memristor are sequentially fabricated from bottom to top on the surface of the first region of the first electrode layer, and a capacitor dielectric layer and a second electrode layer are sequentially deposited from bottom to top on the surface of the second region of the first electrode layer, wherein the first electrode layer, the capacitor dielectric layer and the second electrode layer constitute the first capacitor.

[0074] Step S504: Deposit an insulating layer on a third region of the first electrode layer, wherein the insulating layer separates the first output resistor layer and the first memristor from the first capacitor.

[0075] Step S505: A load resistor, a first sensor, and a third electrode layer are sequentially fabricated from bottom to top on the surfaces of the first memristor, the insulating layer, and the first capacitor, wherein the load resistor includes the first load resistor and the second load resistor.

[0076] Below, in conjunction with Figures 5-6 Detailed introduction to the circuit fabrication method:

[0077] First, step S501 is performed to deposit an isolation layer 6200 on the semiconductor substrate 6100. In specific implementations, the semiconductor substrate 6100 can be a silicon substrate, a quartz substrate, or an organic flexible thin film substrate, etc., and is not limited thereto. The isolation layer 6200 can specifically be SiO2, SiN, etc., and its thickness is between 100nm and 300nm. This isolation layer can be deposited by chemical vapor deposition or thermal oxidation.

[0078] Then, step S502 is performed to deposit a first electrode layer 6300 on the isolation layer. Specifically, the first electrode layer 6300 can be deposited on the surface of the isolation layer by magnetron sputtering, ion beam sputtering, or electron beam evaporation. The material of the first electrode layer is not limited, as long as it is conductive.

[0079] Next, step S503 is performed, in which the first output resistor and the first memristor are sequentially prepared from bottom to top on the surface of the first region of the first electrode layer, and a capacitor dielectric layer and a second electrode layer are sequentially deposited from bottom to top on the surface of the second region of the first electrode layer, wherein the first electrode layer, the capacitor dielectric layer and the second electrode layer constitute the first capacitor.

[0080] Specifically, a first output resistance film 6410 can be prepared in a first region of the first electrode layer 6300 by magnetron sputtering, ion beam sputtering, or electron beam evaporation. The resistance value of this film can be set according to the high and low resistance states of the functional layer in the first memristor, for example, it can be 1Ω to 10kΩ. The first region can be the left, middle, or right side of the first electrode layer, and this application does not limit it. Then, a bottom electrode 6420 is deposited on the first output resistor film. The bottom electrode can be made of inert conductive materials such as TiN, Poly-Si, Pd, Pt, W, or Au, and the deposition thickness can be 10 nm to 200 nm. Next, a functional layer 6430 is deposited on the bottom electrode. The functional layer can be made of materials such as VO2, NbOx, SiO2:Ag, HfO2, SiNx, TaOx, a-Si:Cu, a-Si:Ag, etc., as long as it is a material with volatile threshold transition characteristics. Its thickness can be between 5 nm and 50 nm. The functional layer can be prepared by commonly used methods such as chemical vapor deposition, magnetron sputtering, electron beam evaporation, pulsed laser deposition, and atomic layer deposition. Finally, a top electrode 6440 is deposited on the functional layer 6430. The thickness of the top electrode is 10 nm to 100 nm, and the material can be conductive materials such as TiN, Poly-Si, Pd, Pt, W, Cu, Ag, or Au. Here, the bottom electrode 6420, the functional layer 6430, and the top electrode 6440 constitute the first memristor.

[0081] After the first memristor is fabricated, the first capacitor can be fabricated in the second region of the first electrode layer. Specifically, the second region can be located on the left, middle, or right side of the first electrode layer, as long as it can be distinguished from the region where the first memristor is located. A capacitor dielectric layer film 6310 is deposited on the first electrode layer 6300 by magnetron sputtering, ion beam sputtering, or electron beam evaporation. The dielectric constant and thickness of the deposited capacitor dielectric layer film can be selected according to actual requirements.

[0082] Next, step S504 is executed, depositing an insulating layer on the third region of the first electrode layer, wherein the insulating layer separates the first output resistor layer and the first memristor from the first capacitor. The third region refers to the portion of the first electrode layer excluding the first and second regions. On the third region, an insulating layer 6500 is first deposited, and the material used for deposition can be an insulating material such as SiN or SiO2. Then, the insulating layer is etched to a depth sufficient to expose the top electrode and the capacitor dielectric layer. Afterward, a second electrode layer 6320 is deposited on the capacitor dielectric layer, and the material of the second electrode layer can be an inert conductive material such as Pd, Pt, W, or Au. The first electrode layer 6300, the capacitor dielectric layer 6310, and the second electrode layer 6320 constitute the first capacitor.

[0083] Finally, step S505 is executed, whereby a load resistor, the first sensor, and a third electrode layer are sequentially fabricated from bottom to top on the surfaces of the first memristor, the insulating layer, and the first capacitor. The load resistor includes both the first load resistor and the second load resistor. Specifically, a load resistor layer 6600 can be deposited on the surfaces of the first memristor, the insulating layer, and the first capacitor using magnetron sputtering, ion beam sputtering, or electron beam evaporation. The load resistor layer 6600 includes two regions: a first load resistor region and a second load resistor region. The load resistor layer can connect the top electrode 6440 and the second electrode layer 6320 to achieve parallel connection between the first memristor and the first capacitor. The resistance value of the load resistor layer 6600 can be set according to the actual speed of the external object, for example, from 1Ω to 10kΩ.

[0084] Then, a first sensor 6700 is fabricated on the load resistor layer 6600. In specific implementation, this first sensor can be a photoelectric sensor, and its material can be selected from photosensitive materials such as cadmium sulfide, cadmium selenide, cadmium telluride, gallium arsenide, and zinc sulfide. Common methods in the prior art can be used to deposit the first sensing layer. Finally, a third electrode layer 6800 (i.e., ground terminal) is deposited on the first sensing layer. The material of the third electrode layer can be a common conductive material, and this application does not limit it.

[0085] The circuit fabrication method provided in this embodiment is used to fabricate a part of the neural circuit in Embodiment 1. By connecting two such circuits in parallel, the neural circuit in Embodiment 1 can be obtained.

[0086] The neural circuit obtained using the circuit fabrication method provided in this embodiment includes a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor, and a second memristor. The first and second sensors sequentially convert the motion state of the sensed external object into a first excitation signal and a second excitation signal. Based on the connection relationship provided in this application, the first, second, third, and fourth load resistors can divide the first and second excitation signals, generating two response signals with opposite intensity trends, which are respectively provided to the first and second memristors. The first and second memristors change or maintain their resistance state according to the intensity of the received response signals, thus outputting or not outputting pulse signals. Therefore, the direction of motion of the external object can be determined based on the output states of the first and second memristors.

[0087] Compared with traditional artificial visual neuron circuits, the neural circuit provided in this application has a simple structure, does not include complex logic gate circuits, and therefore has low power consumption, high integration, and good miniaturization.

[0088] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0089] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A neural circuit, characterized in that, It includes a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor, and a second memristor; One end of the first sensor, one end of the first load resistor, and one end of the fourth load resistor are connected; one end of the second sensor, one end of the second load resistor, and one end of the third load resistor are connected; the other end of the first load resistor, the other end of the second load resistor, one end of the first capacitor, and one end of the first memristor are connected; the other end of the third load resistor, the other end of the fourth load resistor, one end of the second capacitor, and one end of the second memristor are connected. The other end of the first memristor serves as the first output terminal, used to output a first pulse signal, and is connected to one end of the first output resistor; the other end of the second memristor serves as the second output terminal, used to output a second pulse signal, and is connected to one end of the second output resistor. The other end of the first capacitor is connected to the other end of the first output resistor and then grounded; the other end of the second capacitor is connected to the other end of the second output resistor and then grounded; the other ends of the first sensor and the other ends of the second sensor are respectively grounded. The first load resistor and the third load resistor have the same resistance value, the second load resistor and the fourth load resistor have the same resistance value, and the resistance values ​​of the first load resistor and the third load resistor are greater than the resistance values ​​of the second load resistor and the fourth load resistor.

2. The neural circuit as described in claim 1, characterized in that, The relative positions of the first sensor and the second sensor on the circuit board are set in either a horizontal or vertical direction. When the first sensor and the second sensor are positioned vertically on the circuit board, the neural circuit is used to detect the direction of motion of the object in the vertical direction. When the first sensor and the second sensor are positioned in the horizontal direction of the circuit board, the neural circuit is used to detect the direction of motion of the object in the horizontal direction.

3. A motion direction detection circuit, characterized in that, It includes a first detection circuit and a second detection circuit, wherein the first detection circuit and the second detection circuit are respectively the neural circuits as described in claim 1 or 2; In the first detection circuit, the first sensor and the second sensor are arranged on the circuit board in a vertical direction to detect the direction of motion of the object in the vertical direction. The first and second sensors in the second detection circuit are arranged horizontally on the circuit board to detect the direction of motion of the object in the horizontal direction.

4. A collision detection system, characterized in that, It includes N motion direction detection circuits as described in claim 3, where N is a natural number greater than or equal to 1.

5. A method for fabricating a circuit, characterized in that, The two circuits are connected in parallel to form the neural circuit as described in claim 1 or 2, and the method includes: Deposit an isolation layer on a semiconductor substrate; A first electrode layer is deposited on the isolation layer; The first output resistor and the first memristor are sequentially fabricated from bottom to top on the surface of the first region of the first electrode layer, including: depositing a first output resistor layer on the surface of the first region of the first electrode layer; and sequentially depositing a bottom electrode layer, a functional layer and a top electrode layer on the surface of the first output resistor layer from bottom to top to form the memristor. A capacitor dielectric layer and a second electrode layer are deposited sequentially from bottom to top on the surface of the second region of the first electrode layer, wherein the first electrode layer, the capacitor dielectric layer and the second electrode layer constitute the first capacitor; An insulating layer is deposited on a third region of the first electrode layer, wherein the insulating layer separates the first output resistor layer and the first memristor from the first capacitor; A load resistor, a first sensor, and a third electrode layer are sequentially fabricated from bottom to top on the surfaces of the first memristor, the insulating layer, and the first capacitor, wherein the load resistor includes the first load resistor and the second load resistor.

6. The circuit fabrication method as described in claim 5, characterized in that, The material of the functional layer is VO2 and NbO. x SiO2:Ag, HfO2, SiN x TaO x a-Si:Cu or a-Si:Ag.

7. The circuit fabrication method as described in claim 5, characterized in that, The thickness of the functional layer is 5nm~50nm.

8. The circuit fabrication method as described in claim 5, characterized in that, The material of the first sensor is cadmium sulfide, cadmium selenide, cadmium telluride, gallium arsenide, or zinc sulfide.

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