A method and system for avoiding empty page reads in NAND Flash controller simulation verification

Abstract

This invention provides a method and system for avoiding empty page reads in NAND Flash controller simulation verification. Before batch read and write tests, the data of each function point state is pre-loaded into a text file. If the address to be read is an address that has not been written to, the data of the current function point state will be driven to the interface. This solves the problem of pre-loading some data in the NAND Flash simulation model, which consumes simulation time and affects the randomness of function point tests, and avoids the problem of empty page reads.

Description

Technical Field

[0001] This invention relates to the field of NAND Flash controller simulation testing, and more specifically to a method and system for avoiding reading empty pages in NAND Flash controller simulation verification. Background Technology

[0002] In simulation testing of NAND Flash controllers, it is often necessary to simulate actual behavior by continuously issuing read and write commands to verify their functionality. During function point checks, the address, data, and current state of the corresponding function point are recorded for each write command. When reading from the same address, the state of the corresponding function point must remain consistent with that during the write operation. Then, data checks are performed to verify the correctness of the corresponding function point. For example, if CRC check is enabled during data writing, CRC check information will be present in the corresponding data stream. When reading from the same address, CRC check must also be enabled for data verification to validate the correctness of the CRC check function. However, in actual verification, if the software operation is followed—erasing, writing, and then reading—batch erase and write operations would consume a significant amount of simulation time, making this verification method impractical. If random read operations are performed without batch write operations, numerous empty page reads will be encountered, which only verifies a portion of the NAND Flash controller's functionality.

[0003] To address the above issues, there are currently two solutions. The first is to pre-write some data to certain addresses before performing read / write verification. When a read command is issued, the address read is the address of the pre-written data. This method can solve the problem of reading empty pages, but pre-writing data to certain addresses consumes a significant amount of simulation time, greatly reducing simulation efficiency. The second method is to pre-load some data into the corresponding memory address space of the Nand Flash model before performing read / write verification. When a read command is issued, the address read is the address of the data pre-loaded into the Nand Flash model. This method can also solve the problem of reading empty pages, but in this method of loading data in the background of the Nand Flash model, the loaded data is fixed, and the on / off state of the function points is also fixed. Taking the CRC function point as an example, the CRC function is enabled when the Nand Flash model is loaded in the background. When reading this address, CRC must be enabled; otherwise, data checking will fail. This affects the randomness of verifying function points, resulting in slower convergence of function coverage. Summary of the Invention

[0004] The purpose of this invention is to provide a method and corresponding system for avoiding empty page reads in the simulation verification of Nand Flash controllers, which can solve the above-mentioned empty page read problem without affecting the randomness of the corresponding function point test.

[0005] To achieve the above objectives, the present invention employs the following technical solution:

[0006] A method for avoiding empty page reads in NAND Flash controller simulation verification includes the following steps:

[0007] S01) Save the data streams of all function point states separately to form a data stream pool;

[0008] S02) Nand Flash data stream input;

[0009] S03) Determine whether a read command or a write command is issued during the read / write test;

[0010] S04) If it is a write command, the address to be written is stored; if it is a read command, it is determined whether the address to be read has been written. If the address has not been written, the current data stream will be replaced by the data in the data stream pool.

[0011] S05) Determine whether the data stream transmission is complete. If not, continue with step S03.

[0012] Preferably, step S03, which determines the read / write test command, involves sampling the commands in the Nand Flash.

[0013] Preferred methods for sampling commands to the Nand Flash include:

[0014] The command to sample the Nand Flash interface determines the interface orientation;

[0015] If the interface is in write data state, sample the interface signal DQx to determine whether the currently transmitted data is a write command;

[0016] If the interface is in read data state, sample the interface signal DQx to determine whether the currently transmitted data is a read command.

[0017] The preferred method for determining the interface direction is:

[0018] Define the variable rw_flag with a value of 1 for write data status and 0 for read data status. The rising edge of the RE# interface signal is used to determine the read data status and rw_flag is set to 1. The rising edge of the CLE interface signal is used to determine the write data status and rw_flag is set to 0.

[0019] Preferably, step S04 is:

[0020] If it is a write command, then by sampling the rising and falling edges of DQS and defining a variable write_cnt for counting, the Plane address, Block address, Page address, and Column address of the current write data are determined, and these write addresses are stored in the write address array waddr[].

[0021] If it is a read command, then by sampling the rising edge of DQS and defining a variable read_cnt for counting, determine the Plane address, Block address, Page address, and Column address of the current data being written. By traversing the addresses in waddr[], determine whether the current address has been written. If it has not been written, find the corresponding data in the data stream pool according to the status of the function point for reading the current address, and temporarily store it in the temporary storage array rdata[] in the data stream pool. This completes the replacement of the current empty page data stream with the data stream in the data pool. Then, the data in rdata[] is driven to the DQx interface by the rising and falling edges of the DQS signal.

[0022] Preferably, the data streams in step S01 are saved to text files to form a data stream pool.

[0023] This invention also discloses a system for implementing the above-mentioned method for avoiding empty page reads in the simulation verification of NAND Flash controllers, comprising:

[0024] The data transmission status judgment module is used to determine the direction of the incoming Nand Flash data stream;

[0025] The read data address judgment module is connected to the data transmission status judgment module and is used to determine whether the address to be read has been written.

[0026] The write data storage module, connected to the data transmission status judgment module, is used to store the write address;

[0027] The data stream selection module under the current function point status is connected to the data read address determination module.

[0028] The data stream pool is connected to the data stream selection module in the current function point state.

[0029] The advantages of this invention are: before batch read / write test simulation, the data of each functional point state is pre-loaded into a text file. If the address to be read is an address that has not been written to, the data of the current functional point state will be driven to the interface. This method can avoid the problem of reading empty pages, does not occupy simulation test operation time, does not reduce simulation test efficiency, and can also ensure the randomness of the test. Attached Figure Description

[0030] Figure 1 This is a data flowchart of the present invention;

[0031] Figure 2 This is a schematic diagram of the method flow of the present invention. Detailed Implementation

[0032] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0033] This embodiment discloses a method such as Figure 1 The system shown, which implements the method for avoiding empty page reads in the simulation verification of the Nand Flash controller, includes: a data transmission status judgment module, a data read address judgment module, a data write data storage module, a data stream selection module under the current function point status, and a data stream pool.

[0034] The data transmission direction determination module determines the direction of the incoming Nand Flash data stream, identifying whether it is in a read or write state. Since the Nand Flash port is bidirectional, the method used to determine the current data stream direction is to sample the Nand Flash commands and then determine whether it is a write or read command. If it is a write command, the data stream direction is write; otherwise, it is read.

[0035] The write address storage module stores the write address when it determines that the current data flow direction is write.

[0036] The read data address judgment module determines whether the address to be read has been written. If it has been written, the input data stream will not be replaced. If it has not been written, the current data stream will be replaced with the data stream in the data stream pool.

[0037] In the current function point state, the data stream selection module will select the corresponding data stream from the data pool to replace the current data stream if the address being read has not been written.

[0038] The data stream pool is a collection of data streams under the states of various functional points. Before the simulation starts, the data streams under the relevant functional point states are put into a text file. During the simulation, the data streams are replaced according to the current state of the functional point.

[0039] This embodiment also discloses a method for avoiding empty page reads in the simulation verification of a NAND Flash controller applied to this system. For the specific process, please refer to... Figure 2 The steps include:

[0040] S01) Save the data streams of all function point states to text files to form a data stream pool, in preparation for data stream replacement in future simulations;

[0041] S02) Nand Flash data stream input;

[0042] (S03) The direction of the interface is determined by sampling the commands of the Nand Flash interface. First, a variable `rw_flag` needs to be defined (1 for write data state, 0 for read data state). By sampling the rising edge of the RE# interface signal, it is determined that the state is read data, and `rw_flag` is set to 1. By sampling the rising edge of the CLE interface signal, it is determined that the state is write data, and `rw_flag` is set to 0. If it is write data (rw_flag=1), proceed to step four; otherwise, proceed to step five.

[0043] S04) Determine whether the currently transmitted data is a write command (8'h80) by sampling the interface signal DQx. If it is a write command, then sample the rising and falling edges of DQS and define a variable write_cnt to count, determine the Plane address, Block address, Page address, and Column address of the currently written data, and store these addresses in the write address array waddr[].

[0044] S05) By sampling the interface signal DQx, determine whether the currently transmitted data is a read command (8'he0). If it is a read command, then sample the rising edge of DQS and define a variable read_cnt to count, and determine the Plane address, Block address, Page address, and Column address of the currently written data. By traversing the addresses in waddr[], determine whether the current address has been written. If it has not been written, execute S06-S08; otherwise, directly execute S08.

[0045] S06) Based on the status of the function point that reads the current address, find the corresponding text file in the data pool, and then load the data of the text file into the array rdata[].

[0046] S07) Replace the current empty page data stream with the data stream in the data pool, and drive the data in rdata[] to the DQx interface through the rising and falling edges of the DQS signal.

[0047] S08) Determine whether the data stream transmission is complete. If not, continue with step S03.

[0048] Finally, it should be noted that the above description is only a preferred embodiment of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for avoiding reading empty pages in Nand Flash controller simulation verification, characterized in that, The method comprises the steps of: S01) saving data streams in all function point states respectively to form a data stream pool; S02) Nand Flash data stream input; S03) sampling the command of the Nand Flash to determine whether a read command or a write command is sent in the read-write test; S04) if it is a write command, storing the write address, and if it is a read command, determining whether the read address has been written, and if it is an address that has not been written, the current data stream is replaced by the data in the data stream pool; S05) determining whether the data stream is transmitted, and if not, continuing to perform step S03; The sampling method of the command of the Nand Flash comprises: sampling the command of the Nand Flash interface to determine the interface direction; if the interface is in a write data state, sampling the interface signal DQx to determine whether the current transmitted data is a write command; if the interface is in a read data state, sampling the interface signal DQx to determine whether the current transmitted data is a read command.

2. The method for avoiding reading empty pages in Nand Flash controller emulation verification according to claim 1, wherein, The method for determining the interface direction comprises: defining a variable rw_flag, wherein the value of the variable rw_flag is 1 in a write data state and 0 in a read data state, determining the read data state by sampling the rising edge of the RE# interface signal and assigning the value 1 to the variable rw_flag, and determining the write data state by sampling the rising edge of the CLE interface signal and assigning the value 0 to the variable rw_flag.

3. The method for avoiding reading empty pages in Nand Flash controller emulation verification according to claim 1, wherein, The step S04 comprises: if it is a write command, counting the Plane address, Block address, Page address and Column address of the current write data by sampling the rising edge and falling edge of the DQS and defining a variable write_cnt, and storing the write addresses in the write address array waddr[]; and if it is a read command, counting the Plane address, Block address, Page address and Column address of the current write data by sampling the rising edge of the DQS and defining a variable read_cnt, determining whether the current address has been written by traversing the addresses in the waddr[], if the current address has not been written, finding the corresponding data in the data stream pool according to the state of the function point of the current address, temporarily storing the data in the temporary array rdata[] in the data stream pool, replacing the data stream of the current read empty page with the data stream in the data pool, and then driving the data in the rdata[] to the DQx interface through the rising edge and falling edge of the DQS signal.

4. The method for avoiding reading empty pages in Nand Flash controller emulation verification according to claim 1, wherein, The data streams in the step S01 are saved in text files to form the data stream pool.

5. A system for avoiding reading empty pages in the simulation verification of the Nand Flash controller according to any one of claims 1-4, characterized in that, The method comprises: a data transmission state determination module for determining the direction of the data stream transmitted to the Nand Flash: sampling the command of the Nand Flash, and then determining whether it is a write command or a read command, if the interface is in a write data state, sampling the interface signal DQx to determine whether the current transmitted data is a write command; and if the interface is in a read data state, sampling the interface signal DQx to determine whether the current transmitted data is a read command. The read data address judging module is connected with the data transmission state judging module and is used for judging whether the read address has been written or not. The write data storage module is connected with the data transmission state judging module and is used for storing the written address. The current function point state data flow selection module is connected with the read data address judging module. The data flow pool is connected with the current function point state data flow selection module.

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