A method, device, equipment and readable medium for optimizing PCB impedance emulation

By designing the PCB coupon traces into multiple segments and combining them with time-domain reflectometry and DOE testing, the problems of resource waste and high design risk in traditional PCB testing methods are solved, achieving more efficient simulation testing optimization and design guidance.

CN115544953BActive Publication Date: 2025-11-07INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202211192029.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-28
Publication Date
2025-11-07
Estimated Expiration
2042-09-28

AI Technical Summary

Technical Problem

Traditional PCB design and testing methods cannot effectively fit simulation test results with different impedances, resulting in wasted resources and high costs. In particular, design references are insufficient and the risks are high in immersion liquid cooling environments.

Method used

The PCB coupon traces are designed into multiple segments, each with a different line width or spacing. Combined with time-domain reflectometry (TDAR) testing and DOE experiments, impedance changes under different environments are analyzed, and significant factors are extracted for simulation result fitting.

Benefits of technology

It reduces the time and resource waste of traditional testing, improves the fit between test results and simulation results, provides more reliable design guidance, and reduces design risks.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides a PCB impedance simulation test optimization method, device, equipment and readable medium, and the method comprises the following steps: designing the traces of a PCB coupon into multiple segments according to the impedance of a to-be-tested PCB, each segment having a different line width; determining the use environment of the to-be-tested PCB; in response to the use environment of the to-be-tested PCB being use in air, testing the impedance of the traces of the PCB coupon using a time domain reflectometer and obtaining a test result; and analyzing the line width of the traces of the PCB coupon that meets the design standard according to the test result. Through the scheme of the application, the time and resources wasted by the traditional test method can be reduced, the test result can be better fitted with the simulation result, and effective guidance can be provided for subsequent design.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of computers, and more particularly to a PCB impedance simulation measurement optimization method, device, equipment and readable medium. BACKGROUND

[0002] In today's era, not only the clock frequency is increasing, but the signal integrity problem becomes more serious, and the time for designers to solve the signal integrity problem and design new products is increasingly shortened. Product designers have only one opportunity to put a product into the market, so the product must run successfully the first time. To ensure the smooth operation of the server and the proper use of each interface and component of the server, measuring each signal of the server is an important part. PCB (printed circuit board), also known as printed board, is one of the important components of the electronic industry. Almost every electronic device, from a small electronic watch to a computer, from a large computer to a communication electronic device, as long as there are electronic components such as integrated circuits, in order to electrically interconnect each component, a printed board must be used. If the impedance of each component in the circuit diagram is known, and the impedance of the combination of the components is known, the electrical characteristics of any model and any interconnection can be estimated. Therefore, impedance is very important in various aspects of signal integrity analysis.

[0003] The traditional PCB design and test method can only test the impedance of a single case of the trace, has high uncertainty, needs to print different PCB coupons for different impedances, which is a waste of resources, cannot better fit the comparison between the simulation and the measurement, wastes test time, and has a high cost to solve the problem, which requires re-design and printing of the PCB for testing. If there is a need for immersion liquid cooling, there is no data for design reference, and the risk is high. SUMMARY

[0004] Therefore, the purpose of the embodiments of the present application is to provide a PCB impedance simulation measurement optimization method, device, equipment and readable medium, which can reduce the time and resources wasted by the traditional test method, better fit the test results and simulation results, and effectively guide the subsequent design.

[0005] Based on the above purpose, one aspect of an embodiment of the present application provides a PCB impedance simulation measurement optimization method, comprising the following steps:

[0006] designing the traces of the PCB coupon into multiple segments according to the impedance of the PCB to be tested, each segment having a different line width;

[0007] determining the use environment of the PCB to be tested;

[0008] in response to the use environment of the PCB to be tested being used in air, testing the impedance of the PCB coupon trace using a time domain reflectometer and obtaining a test result;

[0009] analyzing the line width of the PCB coupon trace that meets the design standard according to the test result.

[0010] According to one embodiment of the present application, the trace of the PCB coupon is designed into multiple segments according to the impedance of the PCB to be tested, each segment having a different line width, including:

[0011] According to the impedance of the PCB to be tested, the PCB coupon is designed into multiple groups of traces, each group of traces is designed into multiple segments, each segment has a different line width, and each group of traces has a different line spacing.

[0012] According to one embodiment of the present application, it further comprises:

[0013] in response to the use environment of the PCB to be tested being used in air, testing the impedance of each group of traces in the PCB coupon using a time domain reflectometer and obtaining a second test result;

[0014] According to the second test result, the data of the best line width and line spacing of the PCB coupon trace is analyzed.

[0015] According to one embodiment of the present application, it further comprises:

[0016] in response to the use environment of the PCB to be tested being used in a cooling liquid, soaking the PCB coupon in a preset model of cooling liquid for a threshold time;

[0017] testing the impedance of the PCB coupon trace under the current DK value;

[0018] changing the DK value of the cooling liquid, and testing the impedance of the PCB coupon trace under the changed DK value;

[0019] extracting different DK values and different line widths as significant factors for DOE testing to analyze the impact and risk on the PCB product.

[0020] Another aspect of the embodiments of the present application also provides a device for optimizing PCB impedance simulation, the device comprising:

[0021] a design module configured to design the trace of the PCB coupon into multiple segments according to the impedance of the PCB to be tested, each segment having a different line width;

[0022] a judgment module configured to determine the use environment of the PCB to be tested;

[0023] The test module is configured to test the impedance of the PCB coupon trace using a time domain reflectometer and obtain a test result in response to the use environment of the PCB to be tested being used in air.

[0024] The analysis module is configured to analyze the line width of the PCB coupon trace that meets the design standard according to the test result.

[0025] According to an embodiment of the present application, the design module is further configured to:

[0026] design the PCB coupon into a plurality of groups of traces according to the impedance of the PCB to be tested, each group of traces being designed into a plurality of segments, each segment having a different line width, and each group of traces having a different trace spacing.

[0027] According to an embodiment of the present application, the test module is further configured to:

[0028] test the impedance of each group of traces in the PCB coupon using a time domain reflectometer and obtain a second test result in response to the use environment of the PCB to be tested being used in air.

[0029] analyze the data of the best line width and trace spacing of the PCB coupon trace according to the second test result.

[0030] According to an embodiment of the present application, the test module is further configured to:

[0031] soak the PCB coupon in a preset type of coolant for a threshold time in response to the use environment of the PCB to be tested being used in coolant.

[0032] test the impedance of the PCB coupon trace at the current DK value.

[0033] change the DK value of the coolant, and test the impedance of the PCB coupon trace at the changed DK value.

[0034] extract different DK values and different line widths as significant factors for DOE testing to analyze the impact and risk on the PCB product.

[0035] Another aspect of the embodiments of the present application also provides a computer device, which comprises:

[0036] at least one processor; and

[0037] a memory storing computer instructions executable on the processor, the instructions being executed by the processor to implement the steps of any of the above methods.

[0038] Another aspect of the embodiments of the present application also provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the steps of any one of the above methods.

[0039] The embodiments of the present application have the following beneficial technical effects: the PCB impedance simulation measurement optimization method provided by the embodiments of the present application can reduce the time and resources wasted by the traditional test method, can better fit the test results with the simulation results, and can effectively guide the subsequent design. BRIEF DESCRIPTION OF DRAWINGS

[0040] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other embodiments can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0041] Figure 1 a schematic flow chart of the PCB impedance simulation measurement optimization method according to one embodiment of the present application;

[0042] Figure 2 a schematic diagram of the PCB coupon trace according to one embodiment of the present application;

[0043] Figure 3 a schematic diagram of the PCB coupon trace test according to one embodiment of the present application;

[0044] Figure 4 a schematic diagram of the PCB impedance simulation measurement optimization device according to one embodiment of the present application;

[0045] Figure 5 a schematic diagram of the computer device according to one embodiment of the present application;

[0046] Figure 6 a schematic diagram of the computer readable storage medium according to one embodiment of the present application. DETAILED DESCRIPTION

[0047] In order to make the objects, technical solutions and advantages of the present application clearer, the embodiments of the present application are further described in detail below with reference to the drawings and in conjunction with the specific embodiments.

[0048] Based on the above purpose, in a first aspect of embodiments of the present application, an embodiment of a method for PCB impedance simulation optimization is provided. Figure 1 A schematic flowchart of the method is shown.

[0049] As shown in Figure 1 , the method can include the following steps:

[0050] S1 designs the traces of the PCB coupon into multiple segments according to the impedance of the PCB to be tested, each segment having a different line width. It is known that the conventional PCB coupon design and test method is designed for testing of the same line width and spacing, and different coupons need to be designed for different impedance traces, such as 85 ohm and 100 ohm differential line impedance, which need two kinds of coupons and are tested respectively. This method is more wasteful of test resources and time, and the cost of solving problems is higher, which requires re-design and test by panel. The stack information of 85 ohm and 100 ohm traces in the same layer is completely the same, only the line width and spacing are different, thereby distinguishing the different impedances. This is because the characteristic impedance formula is Z=L / C, and the self-induction of the transmission line is affected by the line width, so L will change, and Z will also be affected. Therefore, the traces on the coupon can be designed in a segmented form, and traces of different line widths can be designed in the same coupon, as shown in Figure 2 .

[0051] S2 determines the use environment of the PCB to be tested. The use environment of the PCB includes use in air, which is the common use environment of the PCB, and another environment is that the PCB needs to be used in a submerged liquid cooling environment, i.e. the PCB needs to be submerged in cooling liquid.

[0052] S3 tests the impedance of the PCB coupon traces using a time domain reflectometer in response to the use environment of the PCB to be tested being used in air and obtains a test result. If the PCB is used in air, the impedance is tested using TDR (time domain reflectometer), and the impedance at both ends of the coupon is tested. The test result can feedback the change of the impedance data in time domain in real time, as shown in Figure 3 .

[0053] S4 analyzes the line width of the PCB coupon traces that meet the design standard according to the test result. In the case of different line widths of the currently designed coupon, the impedance curve displayed on the TDR will also change in real time with the change of the line width, and at this time, the analysis result can be analyzed according to different stages to see whether different impedance designs meet the standard.

[0054] By using the technical solution of the present application, the wasted time and resources of the traditional test method can be reduced, the test result can be better fitted with the simulation result, and effective guidance can be provided for subsequent design.

[0055] In a preferred embodiment of the present application, the traces of the PCB coupon are designed into multiple segments according to the impedance of the PCB to be tested, each segment having a different line width, including:

[0056] According to the impedance of the PCB to be tested, the PCB coupon is designed into multiple groups of traces, each group of traces is designed into multiple segments, each segment has a different line width, and each group of traces has a different line spacing. In addition to the design of different impedances on the same coupon, the line width and line spacing can also be fine-tuned when designing the same impedance, thereby fine-tuning the impedance, i.e. designing multiple groups of traces, each group of traces also includes different line widths, and the spacing between each group of traces is also different. Because it is difficult to ensure that the design is exactly the same during processing after the design is completed, multiple lines with gradually changing line widths can be designed by fine-tuning the line width and line spacing at this time. At this time, by testing, the best case of the gradually changing line width can be determined, and a more reliable reference is provided when the version is changed, and the margin of the impedance design can also be determined to determine the risk of signal integrity.

[0057] In a preferred embodiment of the present application, it also includes:

[0058] In response to the use environment of the PCB to be tested being used in air, the impedance of each group of traces in the PCB coupon is tested using a time domain reflectometer and a second test result is obtained;

[0059] According to the second test result, the data of the best line width and line spacing of the traces of the PCB coupon are analyzed.

[0060] In a preferred embodiment of the present application, it also includes:

[0061] In response to the use environment of the PCB to be tested being used in cooling liquid, the PCB coupon is soaked in a preset model of cooling liquid for a threshold time;

[0062] Test the impedance of the traces of the PCB coupon under the current DK value;

[0063] Change the DK value of the cooling liquid, and test the impedance of the traces of the PCB coupon under the changed DK value;

[0064] Extract different DK values and different line width as significant factor to carry out DOE test to analyze the influence and risk on PCB product. When PCB needs to be used in immersion liquid cooling environment, the surface layer medium is changed from air to liquid (FC-40 (cooling liquid model) is commonly used on the market), at this time, the surface layer DK (dielectric constant) value is changed, the surface layer impedance will be greatly changed, the PCB coupon needs to be soaked in FC-40 for half an hour before testing, the cooling liquid can also use other models of cooling liquid, and the soaking time can also be adjusted according to the need, after the soaking is completed, the test is started, an impedance result of different line width under the DK value is obtained, at this time, the DK value of FC-40 is changed by adding high DK value liquid, so that the impedance test results of multiple conditions under the immersion liquid cooling are obtained. Extract different DK values and different line width as significant factor under this design scheme, combine the results, identify the more influential factors in the system, the size of the influence, and the possible relationship between the factors, in order to promote the design and development of the product, and optimize, control or improve the existing product (or system). The test results can also be compared with the simulation results to analyze the risk.

[0065] By using the technical solution of the present application, the waste of time and resources in the traditional test method can be avoided, and the fine tuning design of the same impedance line width and the change of the surface layer DK value can better fit the test results with the simulation results, and there are more choices when problems occur. When the next revision is made, there is a relatively reliable reference to effectively guide the subsequent design.

[0066] It should be noted that those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by a computer program to instruct related hardware to complete. The above-mentioned program can be stored in a computer readable storage medium. When the program is executed, it can include the processes of the above-mentioned embodiment methods. The storage medium can be a magnetic disc, an optical disc, a read-only memory (ROM) or a random access memory (RAM), etc. The above-mentioned computer program embodiments can achieve the same or similar effects as the corresponding any of the above-mentioned method embodiments.

[0067] In addition, the method disclosed in the embodiments of the present application can also be implemented as a computer program executed by a CPU, which can be stored in a computer readable storage medium. When the computer program is executed by the CPU, the above-mentioned functions defined in the method disclosed in the embodiments of the present application are executed.

[0068] Based on the above-mentioned purpose, a second aspect of the embodiments of the present application proposes a PCB impedance simulation and test optimization device, as shown inFigure 4 As shown, the device 200 comprises:

[0069] a design module configured to design the traces of the PCB coupon into a plurality of segments each having a different line width according to the impedance of the PCB to be tested;

[0070] a judgment module configured to determine the usage environment of the PCB to be tested;

[0071] a test module configured to, in response to the usage environment of the PCB to be tested being used in air, test the impedance of the traces of the PCB coupon using a time domain reflectometer and obtain a test result;

[0072] an analysis module configured to analyze the line width of the traces of the PCB coupon that meet the design standard according to the test result.

[0073] In a preferred embodiment of the present application, the design module is further configured to:

[0074] design the PCB coupon into a plurality of groups of traces, each group of traces being designed into a plurality of segments each having a different line width, and each group of traces having a different line spacing.

[0075] In a preferred embodiment of the present application, the test module is further configured to:

[0076] in response to the usage environment of the PCB to be tested being used in air, test the impedance of each group of traces of the PCB coupon using a time domain reflectometer and obtain a second test result;

[0077] analyze the data of the best line width and line spacing of the traces of the PCB coupon according to the second test result.

[0078] In a preferred embodiment of the present application, the test module is further configured to:

[0079] in response to the usage environment of the PCB to be tested being used in coolant, immerse the PCB coupon in a preset model of coolant for a threshold time;

[0080] test the impedance of the traces of the PCB coupon at the current DK value;

[0081] change the DK value of the coolant, and test the impedance of the traces of the PCB coupon at the changed DK value;

[0082] extract different DK values and different line widths as significant factors for DOE testing to analyze the impact and risk on the PCB product.

[0083] Based on the above purpose, a third aspect of the embodiments of the present application provides a computer device. Figure 5 A schematic diagram of an embodiment of the computer device provided by the present application is shown. As shown in the figure, Figure 5 The embodiment of the present application includes the following devices: at least one processor 21; and a memory 22, the memory 22 storing computer instructions 23 executable on the processor, the instructions being executed by the processor to implement the following method:

[0084] Design the traces of the PCB coupon into multiple segments according to the impedance of the PCB to be tested, each segment having a different line width;

[0085] Determine the use environment of the PCB to be tested;

[0086] In response to the use environment of the PCB to be tested being used in air, test the impedance of the traces of the PCB coupon using a time domain reflectometer and obtain a test result;

[0087] According to the test result, analyze the line width of the traces of the PCB coupon that meets the design standard.

[0088] In a preferred embodiment of the present application, designing the traces of the PCB coupon into multiple segments according to the impedance of the PCB to be tested includes:

[0089] Design the traces of the PCB coupon into multiple groups, each group of traces being designed into multiple segments, each segment having a different line width, and each group of traces having a different line spacing.

[0090] In a preferred embodiment of the present application, it further includes:

[0091] In response to the use environment of the PCB to be tested being used in air, test the impedance of each group of traces of the PCB coupon using a time domain reflectometer and obtain a second test result;

[0092] According to the second test result, analyze the data of the best line width and line spacing of the traces of the PCB coupon.

[0093] In a preferred embodiment of the present application, it further includes:

[0094] In response to the use environment of the PCB to be tested being used in coolant, soak the PCB coupon in a preset model of coolant for a threshold time;

[0095] Test the impedance of the traces of the PCB coupon under the current DK value;

[0096] Change the DK value of the coolant, and test the impedance of the PCB coupon trace under the changed DK value;

[0097] Extract different DK values and different line widths as significant factors to perform DOE test to analyze the impact and risk on the PCB product.

[0098] Based on the above purposes, a fourth aspect of the embodiments of the present application provides a computer readable storage medium. Figure 6 An embodiment of the computer readable storage medium provided by the present application is shown. As shown in the figure, Figure 6 The computer readable storage medium 31 stores a computer program 32 which performs the following method when executed by a processor:

[0099] According to the impedance of the PCB to be tested, the trace of the PCB coupon is designed into multiple segments, each segment having a different line width;

[0100] Determine the use environment of the PCB to be tested;

[0101] In response to the use environment of the PCB to be tested being used in air, use a time domain reflectometer to test the impedance of the PCB coupon trace and obtain a test result;

[0102] According to the test result, analyze the line width in the PCB coupon trace that meets the design standard.

[0103] In a preferred embodiment of the present application, according to the impedance of the PCB to be tested, the trace of the PCB coupon is designed into multiple segments, each segment having a different line width, which includes:

[0104] According to the impedance of the PCB to be tested, the PCB coupon is designed into multiple groups of traces, each group of traces is designed into multiple segments, each segment has a different line width, and each group of traces has a different line spacing.

[0105] In a preferred embodiment of the present application, it further includes:

[0106] In response to the use environment of the PCB to be tested being used in air, use a time domain reflectometer to test the impedance of each group of traces in the PCB coupon and obtain a second test result;

[0107] According to the second test result, analyze the data of the best line width and line spacing of the PCB coupon trace.

[0108] In a preferred embodiment of the present application, it further includes:

[0109] in response to the usage environment of the PCB to be tested being used in a coolant, the PCB coupon is soaked in a preset model of coolant for a threshold time;

[0110] testing the impedance of the PCB coupon trace at the current DK value;

[0111] changing the DK value of the coolant, and testing the impedance of the PCB coupon trace at the changed DK value;

[0112] extracting different DK values and different line widths as significant factors to perform a DOE test to analyze the impact and risk on the PCB product.

[0113] In addition, the method disclosed by the embodiment of the present application can also be implemented as a computer program executed by a processor, which can be stored in a computer readable storage medium. When the computer program is executed by the processor, the above-mentioned functions defined in the method disclosed by the embodiment of the present application are performed.

[0114] In addition, the above-mentioned method steps and system units can also be implemented by using a controller and a computer readable storage medium for storing a computer program for enabling the controller to implement the above-mentioned steps or unit functions.

[0115] Those skilled in the art will also appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein can be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the particular application and design constraints imposed on the overall system. Skilled persons can implement the functions described in various ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the embodiments disclosed herein.

[0116] In one or more exemplary designs, the functions described can be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions can be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media can be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code means in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or other wire-based, fiber-based, or wireless technologies, then the coaxial cable, fiber optic cable, twisted pair, DSL, or other wire-based, fiber-based, or wireless technologies are included in the definition of medium. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0117] The foregoing is a summary of the example embodiments disclosed herein, but it should be noted that various changes and modifications can be made without departing from the scope of the embodiments disclosed by the claims. The functions, steps and / or actions of the method claims described herein need not be performed in any particular order. Furthermore, although elements of the embodiments disclosed herein can be described or claimed in individual form, other embodiments can also include a plurality of those elements in combination.

[0118] It should be understood that, as used herein, "a" or "an" can mean one or more things unless context clearly indicates otherwise. It should also be understood that "and / or" as used herein means any and all possible combinations of one or more of the associated listed items.

[0119] The above example embodiment numbers are merely for description, and do not represent the advantages or disadvantages of the embodiments.

[0120] Those skilled in the art can understand that all or part of the steps of the above-mentioned embodiments can be completed by hardware, or by program instructing relevant hardware to complete, and the program can be stored in a computer readable storage medium. The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0121] Those skilled in the art shall understand that the above discussion of any embodiment is only exemplary, and is not intended to imply that the scope (including claims) of the embodiments of the present application is limited to these examples; the technical features in the above embodiments or different embodiments can also be combined, and there are many other changes of different aspects of the embodiments of the present application as above. In order to be brief, they are not provided in details. Therefore, any omission, modification, equivalent replacement, improvement, etc. made in the spirit and principle of the embodiments of the present application shall be included in the protection scope of the embodiments of the present application.

Claims

1. A method for PCB impedance simulation and optimization, characterized in that, The method comprises the following steps: designing the PCB coupon into a plurality of groups of traces according to the impedance of the PCB to be tested, each group of traces being designed into a plurality of segments, each segment having a different trace width, and each group of traces having a different trace spacing; determining the use environment of the PCB to be tested; in response to the use environment of the PCB to be tested being used in air, testing the impedance of each group of traces in the PCB coupon using a time domain reflectometer, and fine-tuning the impedance by fine-tuning the trace width and the trace spacing of each group of traces to determine the data of the best trace width and trace spacing of the traces of the PCB coupon; analyzing the trace width of the traces of the PCB coupon that meet the design criteria according to the test results.

2. The method of claim 1, wherein, Further comprising: in response to the use environment of the PCB to be tested being used in coolant, soaking the PCB coupon in a preset model of coolant for a threshold time; testing the impedance of the traces of the PCB coupon at the current DK value; changing the DK value of the coolant, and testing the impedance of the traces of the PCB coupon at the changed DK value; extracting different DK values and different trace widths as significant factors for DOE testing to analyze the impact and risk on the PCB product.

3. An apparatus for PCB impedance emulation optimization, comprising: The device comprises: a design module configured to design the PCB coupon into a plurality of groups of traces according to the impedance of the PCB to be tested, each group of traces being designed into a plurality of segments, each segment having a different trace width, and each group of traces having a different trace spacing; a judgment module configured to determine the use environment of the PCB to be tested; a test module configured to, in response to the use environment of the PCB to be tested being used in air, test the impedance of each group of traces in the PCB coupon using a time domain reflectometer, and fine-tune the impedance by fine-tuning the trace width and the trace spacing of each group of traces to determine the data of the best trace width and trace spacing of the traces of the PCB coupon; an analysis module configured to analyze the trace width of the traces of the PCB coupon that meet the design criteria according to the test results.

4. The apparatus of claim 3, wherein, The test module is further configured to: in response to the use environment of the PCB to be tested being used in coolant, soak the PCB coupon in a preset model of coolant for a threshold time; test the impedance of the traces of the PCB coupon at the current DK value; change the DK value of the coolant, and test the impedance of the traces of the PCB coupon at the changed DK value; extract different DK values and different trace widths as significant factors for DOE testing to analyze the impact and risk on the PCB product.

5. A computer device, characterized by comprise: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executed by the processor to implement the steps of the method of any one of claims 1-2.

6. A computer-readable storage medium storing a computer program, the computer program comprising instructions that, when executed by a computer, cause the computer to perform the method of any one of claims 1 to 5. The computer program is executed by the processor to implement the steps of the method of any one of claims 1-2. The computer program is executed by the processor to implement the steps of the method of any one of claims 1-2.

Citation Information

Patent Citations

  • Test coupon for managing characteristic impedance and print circuit board with the same

    JP2014093340A