Gallium nitride power device, method of manufacture and chip

Abstract

The application belongs to the technical field of semiconductors, and provides a gallium nitride power device, a preparation method and a chip. The gallium nitride power device comprises a semiconductor substrate, a first channel layer, a second channel layer, a first barrier layer, a second barrier layer, a cap layer, a source electrode, a drain electrode, a gate electrode, a cathode electrode, an anode electrode, a first isolation region and a second isolation region. During the operation of the gallium nitride power device, the electric field intensity at the anode electrode and the cathode electrode is large, and the electric field peak is large, which can cause the breakdown voltage of the power device to be low. According to the embodiment of the application, the first isolation region and the second isolation region are arranged, the electron migration distance is increased, the electric field peak at the anode electrode and the cathode electrode is weakened, the electric field is more uniform, and the performance of the power device is improved.

Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, and in particular relates to a gallium nitride power device, its fabrication method, and a chip. Background Technology

[0002] HEMT (High Electron Mobility Transistor) devices, as typical representatives of third-generation wide bandgap semiconductor materials, have a series of material performance advantages such as large bandgap, strong breakdown electric field, high electron saturation drift velocity and good chemical stability, making them a popular material for developing high-performance power electronic devices.

[0003] However, gallium nitride high electron mobility transistors (GaN HEMTs) have low breakdown voltage capability and are more prone to breakdown under high inductance application conditions because they do not have parasitic diodes, which greatly limits their application. Summary of the Invention

[0004] To address the aforementioned technical problems, this application provides a gallium nitride power device, a fabrication method, and a chip, aiming to solve the problem of low breakdown voltage in existing gallium nitride power devices.

[0005] A first aspect of this application provides a gallium nitride power device, the gallium nitride power device comprising:

[0006] Semiconductor substrate;

[0007] A first channel layer and a second channel layer are both disposed on the semiconductor substrate, and the first channel layer and the second channel layer do not contact each other;

[0008] A first barrier layer and a second barrier layer, wherein the first barrier layer is disposed on the first channel layer and the second barrier layer is disposed on the second channel layer;

[0009] A capping layer is disposed on the first barrier layer;

[0010] The source electrode is disposed on the first channel layer and is in contact with the first side of the first barrier layer;

[0011] The drain electrode is disposed on the first channel layer and is in contact with the second side of the first barrier layer;

[0012] The gate electrode is disposed on the capping layer;

[0013] A cathode electrode is disposed on the second channel layer and is in contact with the second side of the second barrier layer;

[0014] An anode electrode is disposed on the second channel layer and is in contact with the first side of the second barrier layer;

[0015] The first isolation region is located between the second barrier layer and the anode electrode and extends into the second channel layer;

[0016] The second isolation region is located between the second barrier layer and the cathode electrode and extends into the second channel layer.

[0017] In one embodiment, the gallium nitride power device further includes:

[0018] An ion implantation region is disposed between the cathode electrode and the anode electrode, and the ion implantation region is disposed within the second barrier layer, for depleting the two-dimensional electron gas in the second channel layer.

[0019] In one embodiment, the doping concentration of the ion implantation region gradually decreases from the middle region toward the cathode electrode and toward the anode electrode.

[0020] In one embodiment, the gallium nitride power device further includes:

[0021] Multiple third isolation zones divide the second barrier layer into multiple barrier regions, and the third isolation zones extend into the second channel layer.

[0022] In one embodiment, the thickness of the third isolation region gradually increases from the middle region toward the cathode electrode and toward the anode electrode.

[0023] In one embodiment, the first isolation zone and the second isolation zone have the same thickness.

[0024] In one embodiment, the first isolation region and the second isolation region extend into the second channel layer to a thickness greater than half the thickness of the second channel layer.

[0025] In one embodiment, the thickness of the third isolation zone is less than the thickness of the first isolation zone.

[0026] A second aspect of this application provides a method for fabricating a gallium nitride power device, comprising:

[0027] A first channel layer and a second channel layer are sequentially formed on a semiconductor substrate; wherein the first channel layer and the second channel layer are not in contact with each other;

[0028] A first barrier layer is formed on the first channel layer, and a second barrier layer is formed on the second channel layer;

[0029] A capping layer is formed on the first barrier layer;

[0030] A source electrode and a drain electrode are formed in the first channel layer; wherein the source electrode is in contact with a first side of the first barrier layer, and the drain electrode is in contact with a second side of the first barrier layer; a gate electrode is formed on the capping layer;

[0031] A cathode electrode is formed on the second channel layer, wherein the cathode electrode is in contact with a second side of the second barrier layer; an anode electrode is formed on the second channel layer, wherein the anode electrode is in contact with a first side of the second barrier layer;

[0032] A first isolation region is formed between the second barrier layer and the anode electrode, extending into the second channel layer;

[0033] A second isolation region is formed between the second barrier layer and the cathode electrode and extends into the second channel layer.

[0034] A third aspect of this application provides a chip including at least one gallium nitride power device as described in any of the preceding claims; or the chip includes at least one gallium nitride power device fabricated by the fabrication method described above.

[0035] The beneficial effects of this application embodiment compared to the prior art are as follows: During the operation of gallium nitride power devices, the electric field strength at the anode and cathode electrodes is relatively large, and the electric field peaks are large, which leads to a lower breakdown voltage of the power device. This application embodiment, by setting a first isolation region and a second isolation region, can increase the electron migration distance, reduce the electric field peaks at the anode and cathode electrodes, make the electric field more uniform, and improve the performance of the power device. Attached Figure Description

[0036] Figure 1 This is a top view schematic diagram of a gallium nitride power device provided in one embodiment of this application;

[0037] Figure 2 This is a front view schematic diagram of a gallium nitride power device provided in one embodiment of this application;

[0038] Figure 3 This is a rear view schematic diagram of a gallium nitride power device provided in one embodiment of this application;

[0039] Figure 4 This is a schematic diagram of the structure of a gallium nitride power device provided in one embodiment of this application. Figure 1 ;

[0040] Figure 5 This is a schematic diagram of the structure of a gallium nitride power device provided in one embodiment of this application. Figure 2 ;

[0041] Figure 6 This is a schematic diagram of the fabrication steps of a gallium nitride power device according to an embodiment of this application;

[0042] Figure 7 This is a schematic diagram of the formation of a first trench layer and a second trench layer provided in one embodiment of this application;

[0043] Figure 8 This is a schematic diagram of the formation of the first barrier layer and the second barrier layer according to an embodiment of this application;

[0044] Figure 9 This is a schematic diagram of the capping layer after it has been formed, provided in one embodiment of this application;

[0045] Figure 10 This is a schematic diagram of the formation of a cathode electrode, an anode electrode, a gate electrode, a drain electrode, and a source electrode provided in one embodiment of this application;

[0046] Figure 11 This is a schematic diagram of the formation of the first isolation region and the second isolation region provided in one embodiment of this application. Detailed Implementation

[0047] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0048] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0049] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0050] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means one or more, unless otherwise explicitly specified.

[0051] In this application specification, references to "one embodiment," "some embodiments," or "embodiment" mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," "in a particular embodiment," "in a particular application," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. Furthermore, in one or more embodiments, specific features, structures, or characteristics may be combined in any suitable manner.

[0052] HEMT (High Electron Mobility Transistor) devices, as typical representatives of third-generation wide bandgap semiconductor materials, have a series of material performance advantages such as large bandgap, strong breakdown electric field, high electron saturation drift velocity and good chemical stability, making them a popular material for developing high-performance power electronic devices.

[0053] However, gallium nitride high electron mobility transistors (GaN HEMTs) have low breakdown voltage capability and are more prone to breakdown under high inductance application conditions because they do not have parasitic diodes, which greatly limits their application.

[0054] To address the aforementioned technical problems, this application provides a gallium nitride power device, as shown in the following embodiment. Figure 1 , Figure 2 , Figure 3 As shown, the gallium nitride power device includes: a semiconductor substrate 10, a first channel layer 20, a second channel layer 30, a first barrier layer 40, a second barrier layer 50, a capping layer 60, a cathode electrode 70, an anode electrode 80, a first isolation region 90, a second isolation region 100, a source electrode 140, a drain electrode 150D, and a gate electrode 160.

[0055] Specifically, the first channel layer 20 and the second channel layer 30 are both disposed on the semiconductor substrate 10, and the first channel layer 20 and the second channel layer 30 are not in contact with each other. A first barrier layer 40 is disposed on the first channel layer 20, and a second barrier layer 50 is disposed on the second channel layer 30. A capping layer 60 is disposed on the first barrier layer 40. A source electrode 140 is disposed on the first channel layer 20, and the source electrode 140 is in contact with a first side of the first barrier layer 40. A drain electrode 150 is disposed on the first channel layer 20, and the drain electrode 150 is in contact with a second side of the first barrier layer 40. A gate electrode 160 is disposed on the capping layer 60. A cathode electrode 70 is disposed on the second channel layer 30, and the cathode electrode 70 is in contact with a second side of the second barrier layer 50. An anode electrode 80 is disposed on the second channel layer 30, and the anode electrode 80 is in contact with a first side of the second barrier layer 50. The first isolation region 90 is located between the second barrier layer 50 and the anode electrode 80 and extends into the second channel layer 30. The second isolation region 100 is located between the second barrier layer 50 and the cathode electrode 70 and extends into the second channel layer 30.

[0056] In this embodiment, both the first channel layer 20 and the second channel layer 30 are disposed on the semiconductor substrate 10, and the first channel layer 20 and the second channel layer 30 do not contact each other. It is understood that the first channel layer 20 and the second channel layer 30 are located on the same horizontal plane, and the first channel layer 20 and the second channel layer 30 are made of the same material. The first channel layer 20 and the second channel layer 30 can be integrally formed on the semiconductor substrate 10 in one step, and then made to make complementary contact between the first channel layer 20 and the second channel layer 30 by shearing. Alternatively, an insulating material can be placed between the first channel layer 20 and the second channel layer 30 to prevent them from contacting each other. By ensuring that the first channel layer 20 and the second channel layer 30 do not contact each other, they can avoid interfering with each other, reducing mutual interference between the first channel layer 20 and the second channel layer 30, allowing the first channel layer 20 and the second channel layer 30 to perform their respective functions, and improving the stability of the gallium nitride power device.

[0057] In this embodiment, since existing gallium nitride power devices generally lack parasitic diodes, their breakdown voltage capability is low under high inductance application conditions, making them prone to breakdown and severely limiting their applications. By setting the cathode electrode 70 on the second channel layer 30 and contacting the second side of the second barrier layer 50; and setting the anode electrode 80 on the second channel layer 30 and contacting the first side of the second barrier layer 50, a diode function can be achieved, serving as the body diode of the gallium nitride power device. The cathode electrode 70 can be connected in series with the drain electrode 150, or the anode electrode 80 can be connected in series with the source electrode 140. Specifically, in different application scenarios, the cathode electrode 70 can be connected to the drain electrode 150, or the anode electrode 80 can be connected to the source electrode 140. It should be noted that only one implementation method can be selected: either connecting the cathode electrode 70 to the drain electrode 150 or connecting the anode electrode 80 to the source electrode 140. For example, when the cathode electrode 70 is connected to the drain electrode 150, the anode electrode 80 cannot be connected to the source electrode 140, and vice versa. The purpose of this arrangement is to connect the body diode formed by the cathode electrode 70, anode electrode 80, second channel layer 30, and second barrier layer 50 to the drain electrode 150 or source electrode 140 in series, rather than in parallel.

[0058] In this embodiment, a first isolation region 90 is disposed between the second barrier layer 50 and the anode electrode 80 and extends into the second channel layer 30, and the first isolation region 90 is in contact with the anode electrode 80; a second isolation region 100 is disposed between the second barrier layer 50 and the cathode electrode 70 and extends into the second channel layer 30, and the second isolation region 100 is in contact with the cathode electrode 70. Specifically, the first isolation region 90 and the second isolation region 100 are respectively disposed on both sides of the second barrier layer 50 near the anode electrode 80 and the cathode electrode 70. This is because the electric field strength and electric field peaks are relatively large at the anode electrode 80 and the cathode electrode 70 during the operation of the gallium nitride power device, which leads to a lower breakdown voltage of the power device. By setting the first isolation region 90 and the second isolation region 100, the electron migration distance can be increased, the electric field peaks at the anode electrode 80 and the cathode electrode 70 can be reduced, the electric field can be made more uniform, and the performance of the power device can be improved.

[0059] In one embodiment, reference Figure 4 As shown, the gallium nitride power device also includes an ion implantation region 110.

[0060] Specifically, the ion implantation region 110 is located between the cathode electrode 70 and the anode electrode 80, and the ion implantation region 110 is located within the second barrier layer 50 to deplete the two-dimensional electron gas in the second channel layer 30.

[0061] In this embodiment, when the gallium nitride power device is operating, it generates a corresponding two-dimensional electron gas (2DEG) in the first channel layer 20 and the second channel layer 30. Although this reduces the on-resistance, it also results in a lower breakdown voltage of the power device. This embodiment of the application provides an ion implantation region 110, which can form a PN junction with the second channel layer 30, generating a longitudinal electric field. This field cancels out a portion of the two-dimensional electron gas, making the lateral electric field more uniform. This, in turn, increases the reverse breakdown voltage of the body diode formed by the cathode electrode 70, anode electrode 80, and ion implantation region 110, further improving the reverse breakdown voltage of the gallium nitride power device.

[0062] In this embodiment, by setting the first isolation region 90 and the second isolation region 100, it is also possible to prevent the ion diffusion of the ion implantation region 110 from contaminating the anode electrode 80 and the cathode electrode 70 during ion implantation, thereby affecting the stability of the power device.

[0063] In one embodiment, the ions implanted in the ion implantation region 110 are hydrogen ions or fluoride ions.

[0064] In one embodiment, when fluorine ions are implanted in the ion implantation region 110, interstitial doping is used. Specifically, interstitial doping refers to doping in the interstitial space.

[0065] In one embodiment, the doping concentration of the ion implantation region 110 gradually decreases from the middle region toward the cathode electrode 70 and the anode electrode 80.

[0066] In this embodiment, the doping concentration of the ion implantation region 110 gradually increases from the middle region towards the cathode electrode 70 and the anode electrode 80. It is understood that the doping concentration of the ion implantation region 110 is higher closer to the cathode electrode 70 and the anode electrode 80, and lower further away from the cathode electrode 70 and the anode electrode 80. This is because when the gallium nitride power device is in operation, the electric field peaks near the cathode electrode 70 and the anode electrode 80 are high. By setting a higher doping concentration in the ion implantation region 110 closer to the cathode electrode 70 and the anode electrode 80, more of the two-dimensional electron gas in the second channel layer 30 can be depleted, resulting in a more uniform lateral electric field. This can better reduce the electric field peaks at the cathode electrode 70 and the anode electrode 80, further improving the reverse breakdown voltage of the gallium nitride power device.

[0067] In one embodiment, reference Figure 4 As shown, the gallium nitride power device also includes: multiple third isolation regions 120.

[0068] Specifically, multiple third isolation regions 120 divide the second barrier layer 50 into multiple barrier regions, and the third isolation regions 120 extend into the second channel layer 30. In this embodiment, the multiple third isolation regions 120 dividing the second barrier layer 50 into multiple barrier regions can be understood as follows: the multiple third isolation regions 120 are respectively disposed within the second barrier layer 50, thereby dividing the second barrier layer 50 into multiple barrier regions, with the multiple third isolation regions 120 and the multiple barrier regions being spaced apart. By setting multiple third isolation regions 120 to divide the second barrier layer 50 into multiple barrier regions, on the one hand, it can prevent ion diffusion from the ion implantation region 110 from contaminating the anode electrode 80 and cathode electrode 70, thereby affecting the stability of the power device. On the other hand, the multiple third isolation regions 120 can increase the electron migration distance, reduce the electric field peak at the anode electrode 80 and cathode electrode 70, make the electric field more uniform, and improve the performance of the power device.

[0069] In one embodiment, reference Figure 4 As shown, the gallium nitride power device also includes: multiple fourth isolation regions 130.

[0070] Specifically, multiple fourth isolation regions 130 divide the ion implantation region 110 into multiple implantation units, and the fourth isolation regions 130 extend into the second channel layer 30. In this embodiment, by setting multiple fourth isolation regions 130 in the implantation region, multiple independent implantation units are formed. This prevents the random diffusion of fluoride ions during implantation. By dividing the ion implantation region 110 into multiple implantation units using multiple fourth isolation regions 130, the concentration of implanted ions in each implantation unit can be controlled, resulting in more stable device performance.

[0071] In one embodiment, reference Figure 5 As shown, the thickness of the third isolation region 120 gradually increases from the middle region toward the cathode electrode 70 and the anode electrode 80.

[0072] In this embodiment, reference Figure 5As shown, the thickness of the third isolation region 120 is greater closer to the cathode electrode 70 and the anode electrode 80, and smaller further away from the cathode electrode 70 and the anode electrode 80. For example, H1 and H2 are the thicknesses of the third isolation region 120 closer to the cathode electrode 70, and H3 is the thickness of the third isolation region 120 closer to the ion implantation region 110; where H1 > H2 > H3. Because when the gallium nitride power device is in operation, the electric field peaks near the cathode electrode 70 and the anode electrode 80 are high. By setting the thickness of the third isolation region 120 closer to the cathode electrode 70 and the anode electrode 80 to be larger, the lateral electric field can be made more uniform, which can better reduce the electric field peaks at the cathode electrode 70 and the anode electrode 80, and further improve the reverse breakdown voltage of the gallium nitride power device.

[0073] In one embodiment, reference Figure 5 As shown, the width of the third isolation region 120 gradually increases from the middle region toward the cathode electrode 70 and the anode electrode 80.

[0074] For details, please refer to Figure 5 As shown, the width of the third isolation region 120 is larger closer to the cathode electrode 70 and the anode electrode 80, and smaller further away from the cathode electrode 70 and the anode electrode 80. For example, W1 and W2 are the widths of the third isolation region 120 closer to the cathode electrode 70, and W3 is the thickness of the third isolation region 120 closer to the ion implantation region 110; where W1 > W2 > W3. Because when the gallium nitride power device is in operation, the electric field peaks near the cathode electrode 70 and the anode electrode 80 are high. By setting the width of the third isolation region 120 closer to the cathode electrode 70 and the anode electrode 80 to be larger, the lateral electric field can be made more uniform, which can better reduce the electric field peaks at the cathode electrode 70 and the anode electrode 80, and further improve the reverse breakdown voltage of the gallium nitride power device.

[0075] In one embodiment, the first isolation zone 90 and the second isolation zone 100 have the same thickness.

[0076] Specifically, the first isolation region 90 contacts the anode electrode 80, and the second isolation region 100 contacts the cathode electrode 70. The first and second isolation regions 90 and 100 increase the electron migration distance, reduce the electric field peaks at the anode electrode 80 and cathode electrode 70, making the electric field more uniform and improving the performance of the power device. Furthermore, the first and second isolation regions 90 and 100 can prevent ion diffusion from the ion implantation region 110 from contaminating the anode electrode 80 and cathode electrode 70 during ion implantation, thus affecting the stability of the power device. In this embodiment, by setting the thickness of the first and second isolation regions 90 to be the same, the effect of reducing the electric field peaks at the anode electrode 80 and cathode electrode 70 is consistent, thereby improving the performance of the power device.

[0077] In one embodiment, the first isolation region 90 and the second isolation region 100 extend into the second channel layer 30 with a thickness greater than half the thickness of the second channel layer 30. In this embodiment, by setting the thickness of the first isolation region 90 and the second isolation region 100 extending into the second channel layer 30 to be greater than half the thickness of the second channel layer 30, it is more effective to prevent ion diffusion from the ion implantation region 110 during ion implantation from contaminating the anode electrode 80 and the cathode electrode 70, thereby affecting the stability of the power device.

[0078] In one embodiment, reference Figure 5 As shown, the thickness of the third isolation region 120 is less than the thickness of the first isolation region 90. For example, H1, H2, and H3 are all less than H4. In this embodiment, because the first isolation region 90 and the third isolation region 120 have the function of regulating the electric field, and the electric field peaks at the anode electrode 80 and the cathode electrode 70 are higher, and the first isolation region 90 is closer to the anode electrode 80, the thickness of the first isolation region 90 is set to be larger. This can make the lateral electric field more uniform, better reduce the electric field peaks at the cathode electrode 70 and the anode electrode 80, and further improve the reverse breakdown voltage of the gallium nitride power device.

[0079] In one embodiment, the first channel layer 20 and the second channel layer 30 are GaN.

[0080] In this embodiment, the first channel layer 20 and the second channel layer 30 can both be made of gallium nitride material, for example, by depositing gallium nitride material on the semiconductor substrate 10 or by epitaxially growing gallium nitride material, and their thickness and width are the same.

[0081] In one embodiment, the first barrier layer 40 and the second barrier layer 50 are AlGaN.

[0082] In this embodiment, the first barrier layer 40 and the second barrier layer 50 can both be made of aluminum gallium nitride (ANU) material. For example, the first barrier layer 40 is formed by depositing ANU material on the first channel layer 20 or by epitaxially growing ANU material, and the second barrier layer 50 is formed by depositing ANU material on the second channel layer 30 or by epitaxially growing ANU material.

[0083] In one embodiment, the capping layer 60 is P-GaN.

[0084] In this embodiment, P-GaN is formed by doping GaN with a p-type dopant, wherein the p-type dopant can be boron, gallium, aluminum, etc.

[0085] In one embodiment, the anode electrode 80 is made of Schottky metal and the cathode electrode 70 is made of ohmic metal.

[0086] In one embodiment, the Schottky metal can be a layer of platinum, gold, silver, or a conductive semiconductor layer, etc. The ohmic metal is a combination of Ti, Al, Ti, and Au materials.

[0087] In a specific application, Schottky metal is a combination of Ni and Au materials.

[0088] In one embodiment, the thicknesses of the ohmic metals Ti, Al, Ti, and Au are 15 nm, 250 nm, 50 nm, and 150 nm, respectively, and the thicknesses of the Schottky metals Ni and Au are 70 nm and 30 nm, respectively.

[0089] In this embodiment, by setting the anode electrode 80 to Schottky metal, the anode is a Schottky contact, which can provide a higher Schottky barrier height. By setting the thickness of Ni and Au in the Schottky metal to 70nm and 30nm respectively, the leakage current of the anode electrode 80 is further reduced, a higher forward threshold voltage is provided, and the overall performance of the gallium nitride power device is improved.

[0090] In one embodiment, there may be multiple cathode electrodes 70, each disposed on a plurality of second channel layers 30 and respectively contacting a second side of a plurality of second barrier layers 50. There may also be multiple anode electrodes 80, each disposed on a plurality of second channel layers 30 and respectively contacting a first side of a plurality of second barrier layers 50. A corresponding first isolation region 90 and a second isolation region 100 are provided between each cathode unit and each anode unit.

[0091] In this embodiment, there are multiple cathode electrodes 70 and multiple anode electrodes 80. A first isolation region 90 and a second isolation region 100 are provided between each cathode electrode 70 and anode electrode 80. Each cathode and anode, along with its corresponding first isolation region 90 and second isolation region 100, constitutes a body diode. Multiple cathode electrodes 70 and multiple anode electrodes 80 can form multiple body diodes, which can be connected in parallel or series. This allows for adjustment of the gallium nitride (GaN) power device's voltage and current withstand capabilities. For example, when multiple body diodes are connected in parallel, the GaN power device's high current withstand capability can be adjusted. Similarly, when multiple body diodes are connected in series, the GaN power device's high voltage withstand capability can be adjusted. This operation increases the voltage and current withstand capabilities of the GaN power device, expanding its application scenarios.

[0092] In one embodiment, the gallium nitride power device further includes: a plurality of P-type doped regions, all of which are disposed between the anode electrode 80 and the cathode electrode 70 and are located on the second barrier layer 50.

[0093] In this embodiment, the P-type doped region is P-GaN. When the gallium nitride power device is operating, it generates a corresponding two-dimensional electron gas in the first channel layer 20 and the second channel layer 30. Although this reduces the on-resistance, it also results in a lower breakdown voltage of the power device. By setting multiple P-type doped regions, and the P-type doped regions are P-GaN, multiple P-type doped regions can form a PN junction with the second channel layer 30, generating a vertical electric field. This cancels out some of the two-dimensional electron gas, making the lateral electric field more uniform. This improves the reverse breakdown voltage of the body diode formed by the cathode electrode 70 and the anode electrode 80, and further improves the reverse breakdown voltage of the gallium nitride power device.

[0094] In one embodiment, the gallium nitride power device further includes: a plurality of metal field plates, all disposed between the anode electrode 80 and the cathode electrode 70, and the metal field plates are located on the second barrier layer 50.

[0095] In this embodiment, the metal field plate can be any one of gold, silver, copper, aluminum, platinum, etc. By setting multiple metal field plates, which are located on the second barrier layer 50, and the metal field plates can be any one of gold, silver, copper, aluminum, platinum, etc., multiple metal field plates can form a PN junction with the second channel layer 30, generating a vertical electric field, thereby canceling out part of the two-dimensional electron gas, making the lateral electric field more uniform, and further improving the reverse breakdown voltage of the gallium nitride power device.

[0096] This application also provides a method for fabricating a gallium nitride power device, referencing... Figure 6 As shown, it includes steps S10 to S50.

[0097] Step S10: Reference Figure 7 As shown, a first channel layer 20 and a second channel layer 30 are sequentially formed on a semiconductor substrate 10; wherein the first channel layer 20 and the second channel layer 30 are not in contact with each other.

[0098] In this embodiment, selective etching is performed on the semiconductor substrate 10 to etch out the positions of the first channel layer 20 and the second channel layer 30, respectively. Then, the corresponding semiconductor materials are filled in the corresponding positions of the first channel layer 20 and the second channel layer 30. For example, GaN material is filled in the regions of the first channel layer 20 and the second channel layer 30.

[0099] In one specific application, the semiconductor substrate 10 is a sapphire substrate.

[0100] Step S20: Reference Figure 8 As shown, a first barrier layer 40 is formed on the first channel layer 20, and a second barrier layer 50 is formed on the second channel layer 30.

[0101] In this embodiment, a first barrier layer 40 is epitaxially formed on the first channel layer 20, and a second barrier layer 50 is epitaxially formed on the second channel layer 30, wherein the first barrier layer 40 and the second barrier layer 50 are filled with AlGaN material.

[0102] Step S30: Reference Figure 9 As shown, a capping layer 60 is formed on the first barrier layer 40.

[0103] In this embodiment, the capping layer 60 is made of P-GaN.

[0104] Step S40: Reference Figure 10 As shown, a source electrode 140 and a drain electrode 150 are formed in the first channel layer 20; wherein the source electrode 140 is in contact with the first side of the first barrier layer 40, and the drain electrode 150 is in contact with the second side of the first barrier layer 40; a gate electrode 160 is formed on the capping layer 60.

[0105] In a specific application, a mask is used to determine the shape of the source electrode 140, drain electrode 150, and gate electrode 160, and metal is deposited on the mask to form the source electrode 140, drain electrode 150, and gate electrode 160.

[0106] Step S50: Reference Figure 10As shown, a cathode electrode 70 is formed on the second channel layer 30; wherein the cathode electrode 70 is in contact with the second side of the second barrier layer 50; and an anode electrode 80 is formed on the second channel layer 30; wherein the anode electrode 80 is in contact with the first side of the second barrier layer 50.

[0107] Step S60: Reference Figure 11 As shown, a first isolation region 90 is formed between the second barrier layer 50 and the anode electrode 80 and extends into the second channel layer 30; a second isolation region 100 is formed between the second barrier layer 50 and the cathode electrode 70 and extends into the second channel layer 30.

[0108] In this embodiment, the first isolation region 90 is in contact with the anode electrode 80, and the second isolation region 100 is in contact with the cathode electrode 70. The first isolation region 90 and the second isolation region 100 can be formed by first depositing a silicon oxide layer on a defined area of ​​the second barrier layer 50, and then patterning this silicon nitride layer to form a hard mask. Next, steep trenches are formed by etching. Finally, oxide is filled into the trenches to form the first isolation region 90 and the second isolation region 100.

[0109] In one specific application, a mask is used to determine the shape of the cathode electrode 70 and the anode electrode 80, and metal is deposited on the mask to form the cathode electrode 70 and the anode electrode 80.

[0110] In one embodiment, the anode electrode 80 is made of Schottky metal and the cathode electrode 70 is made of ohmic metal.

[0111] In one embodiment, the Schottky metal can be a layer of platinum, gold, silver, or a conductive semiconductor layer, etc. The ohmic metal is a combination of Ti, Al, Ti, and Au materials.

[0112] In a specific application, Schottky metal is a combination of Ni and Au materials.

[0113] In one embodiment, the thicknesses of the ohmic metals Ti, Al, Ti, and Au are 15 nm, 250 nm, 50 nm, and 150 nm, respectively, and the thicknesses of the Schottky metals Ni and Au are 70 nm and 30 nm, respectively.

[0114] In this embodiment, by setting the anode electrode 80 to Schottky metal, the anode is a Schottky contact, which can provide a higher Schottky barrier height. By setting the thickness of Ni and Au in the Schottky metal to 70nm and 30nm respectively, the leakage current of the anode electrode 80 is further reduced, a higher forward threshold voltage is provided, and the overall performance of the gallium nitride power device is improved.

[0115] This application also provides a chip comprising at least one gallium nitride power device as described above; or a chip comprising at least one gallium nitride power device fabricated by the fabrication method described above.

[0116] In this embodiment, the chip includes a source terminal, a drain terminal, and a gate terminal, and also includes at least one gallium nitride power device. Since the gallium nitride power device includes a first isolation region 90 and a second isolation region 100, it can increase the electron migration distance, reduce the electric field peaks at the anode electrode 80 and the cathode electrode 70, make the electric field more uniform, improve the performance of the power device, and thus enable the chip to be used for higher breakdown voltages.

[0117] In one embodiment, when the cathode electrode 70 is connected in series with the drain electrode 150, the drain terminal of the chip is connected to the anode electrode 80 through a via, the source terminal of the chip is connected to the source electrode 140 of the gallium nitride power device through a via, and the source terminal of the chip is connected to the gate electrode 160. When the anode electrode 80 is connected in series with the source electrode 140, the source terminal of the chip is connected to the cathode electrode 70 through a via, the drain terminal of the chip is connected to the drain electrode 150 through a via, and the source terminal of the chip is connected to the gate electrode 160. Therefore, in general, there are no devices below the source and drain terminals of a chip. However, the design of this application can increase the breakdown voltage of the chip while increasing the space requirements. Furthermore, this application can manufacture the gallium nitride power device without using an additional photomask, avoiding cumbersome manufacturing processes.

[0118] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0119] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A gallium nitride power device, characterized in that, The gallium nitride power device includes: Semiconductor substrate; A first channel layer and a second channel layer are both disposed on the semiconductor substrate, and the first channel layer and the second channel layer are not in contact with each other; A first barrier layer and a second barrier layer, wherein the first barrier layer is disposed on the first channel layer and the second barrier layer is disposed on the second channel layer; A capping layer is disposed on the first barrier layer; The source electrode is disposed on the first channel layer and is in contact with the first side of the first barrier layer; The drain electrode is disposed on the first channel layer and is in contact with the second side of the first barrier layer; The gate electrode is disposed on the capping layer; A cathode electrode is disposed on the second channel layer and is in contact with the second side of the second barrier layer; An anode electrode is disposed on the second channel layer and is in contact with the first side of the second barrier layer; The first isolation region is located between the second barrier layer and the anode electrode and extends into the second channel layer; The second isolation region is located between the second barrier layer and the cathode electrode and extends into the second channel layer; Multiple third isolation regions divide the second barrier layer into multiple barrier regions, and the third isolation regions extend into the second channel layer; the thickness of the third isolation regions gradually increases from the middle region toward the cathode electrode and toward the anode electrode.

2. The gallium nitride power device as described in claim 1, characterized in that, The gallium nitride power device also includes: An ion implantation region is disposed between the cathode electrode and the anode electrode, and the ion implantation region is disposed within the second barrier layer, for depleting the two-dimensional electron gas in the second channel layer.

3. The gallium nitride power device as described in claim 2, characterized in that, The doping concentration in the ion implantation region gradually decreases from the middle region toward the cathode electrode and toward the anode electrode.

4. The gallium nitride power device as described in claim 1, characterized in that, The first isolation zone and the second isolation zone have the same thickness.

5. The gallium nitride power device as described in claim 1, characterized in that, The thickness of the first isolation zone and the second isolation zone extending into the second channel layer is greater than half the thickness of the second channel layer.

6. The gallium nitride power device as described in claim 4, characterized in that, The thickness of the third isolation zone is less than the thickness of the first isolation zone.

7. A method for fabricating a gallium nitride power device as described in any one of claims 1-6, characterized in that, include: A first channel layer and a second channel layer are sequentially formed on a semiconductor substrate; wherein the first channel layer and the second channel layer are not in contact with each other; A first barrier layer is formed on the first channel layer, and a second barrier layer is formed on the second channel layer; A capping layer is formed on the first barrier layer; A source electrode and a drain electrode are formed in the first channel layer; wherein the source electrode is in contact with a first side of the first barrier layer, and the drain electrode is in contact with a second side of the first barrier layer; a gate electrode is formed on the capping layer; A cathode electrode is formed on the second channel layer, wherein the cathode electrode is in contact with a second side of the second barrier layer; an anode electrode is formed on the second channel layer, wherein the anode electrode is in contact with a first side of the second barrier layer; A first isolation region is formed between the second barrier layer and the anode electrode, extending into the second channel layer; A second isolation region is formed between the second barrier layer and the cathode electrode and extends into the second channel layer.

8. A chip, characterized in that, It includes at least one gallium nitride power device as described in any one of claims 1-6; or the chip includes at least one gallium nitride power device prepared by the preparation method described in claim 7.

Images