A display panel, a display device, and a method of manufacturing it.

Abstract

This invention discloses a display panel, a display device, and a manufacturing method. One embodiment of the display panel includes: a first substrate comprising a first region and a second region located on one side of the first region, and a second substrate disposed opposite to the first substrate; the first region includes a display area, and the second region includes: a cutting area, a plurality of test terminals, a plurality of grounding potentials, and a charge guiding structure; the second region further includes: a grounding wire connecting the plurality of grounding potentials, and a connecting wire connecting each test terminal and a driving circuit within the display area; wherein the orthographic projection of the cutting area onto the first substrate falls within the orthographic projection of the connecting wire onto the first substrate; the charge guiding structure includes a starting guiding portion whose orthographic projection onto the first substrate at least partially overlaps with the orthographic projection of the cutting area onto the first substrate; and a terminating guiding portion connected to any of the grounding potentials or to the grounding wire.

Description

Technical Field

[0001] This invention relates to the field of display technology. More specifically, it relates to a display panel, a display device, and a method of manufacturing it. Background Technology

[0002] Display panels typically have several detection terminals, called PADs or detection TEGs, on the thin-film transistor (TFT) array substrate surrounding the display area. These terminals are used to perform pre-production lamp testing to identify defects, a process known as CT testing (Cell Test PAD). After CT testing, the glass containing these PADs needs to be cut to sever the connection between the PADs and the display panel. When the color filter substrate is cut with a cutting tool, the display panel generates a large amount of electrostatic charge, which can damage the film layers on the array substrate, leading to defects such as poor wiring and abnormal display. Summary of the Invention

[0003] The purpose of this invention is to provide a display panel, a display device, and a manufacturing method to solve at least one of the problems existing in the prior art.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] The first aspect of the present invention provides a display panel, comprising:

[0006] A first substrate, the first substrate including a first region and a second region located on one side of the first region.

[0007] A second substrate disposed opposite to a first substrate, wherein the orthographic projection of the second substrate onto the first substrate is located in the first region;

[0008] The first area includes a display area.

[0009] The second area includes: a cutting area, multiple test terminals, multiple grounding potentials, and a charge drainage structure. The second area also includes: a grounding wire connecting the multiple grounding potentials, and a connecting wire connecting each test terminal and the drive circuitry within the display area.

[0010] The orthographic projection of the cut area onto the first substrate falls within the orthographic projection of the connecting line onto the first substrate.

[0011] The charge guiding structure includes:

[0012] A starting drainage portion, wherein the orthographic projection of the starting drainage portion onto the first substrate at least partially overlaps with the orthographic projection of the cutting area onto the first substrate; and

[0013] The drain section is terminated and connected to any of the aforementioned grounding potentials or to the grounding wire.

[0014] Furthermore, the first region includes a first boundary on the side furthest from the second region, and

[0015] The second boundary at the overlapping position of the first region and the second region, the second boundary being parallel to the first boundary.

[0016] The grounding potential includes:

[0017] A first electrode located near the first boundary, and along a first direction parallel to the first boundary; and

[0018] The second electrode is located near the second boundary and is arranged along the first direction.

[0019] The first electrode and the second electrode are connected to the same potential through the grounding wire.

[0020] Furthermore, the test terminal is located on the side closer to the first boundary.

[0021] The charge guiding structure further includes:

[0022] A first drainage line, close to the initial drainage portion; and

[0023] The second drainage line is located near the termination drainage section.

[0024] The first drainage line and the second drainage line are connected.

[0025] The orthographic projection of the first drain line onto the first substrate overlaps with the orthographic projection of the boundary of the cutting area on the side away from the test terminal area, while the orthographic projection of the second drain line onto the first substrate does not overlap with the orthographic projection of the cutting area onto the first substrate.

[0026] Furthermore, the distance between the starting drainage portion and the test terminal near the boundary of the color filter substrate is designed as a first distance, and the distance between the cutting area near the boundary of the color filter substrate and the test terminal near the boundary of the color filter substrate is designed as a second distance, the second distance being greater than the first distance.

[0027] Furthermore, the end of the first drainage line is the starting drainage portion, and there are multiple first drainage lines. In a second direction perpendicular to the first direction, each first drainage line is the orthogonal projection of the orthogonal projection covering the connecting line of the first substrate.

[0028] Furthermore, the end of the first drain line is the starting drain portion, and the orthographic projection of the first drain line on the first substrate is a patterned graphic that extends along the first direction, covering multiple connecting lines arranged along the first direction.

[0029] Furthermore, the dividing line is the extension line along the first direction where the connection point of the first drainage line and the second drainage line is located.

[0030] When the cutting area and the second guide line are located on the same side, the orthographic projection of the cutting area onto the first substrate is a patterned graphic, and the cutting length of the cutting area is less than the extension length of the trace area.

[0031] When the cutting area and the second drainage line are located on opposite sides, the cutting length of the cutting area is less than or equal to the extension length of the wiring area.

[0032] Furthermore, the test terminals include:

[0033] The first test metal layer is located on the substrate;

[0034] At least one first insulating layer located on the side of the first test metal layer away from the substrate; and

[0035] The second test metal layer is located on the side of the first insulating layer away from the first test metal layer.

[0036] The first insulating layer has a first via, and the first test metal layer and the second test metal layer are electrically connected through the first via.

[0037] Furthermore, the connecting line includes:

[0038] The first interconnect metal layer located on the substrate; and

[0039] A second connecting wire metal layer that is insulated from the first connecting wire metal layer;

[0040] The first insulating layer includes:

[0041] The first sub-insulating layer located on the side of the first interconnect metal layer away from the substrate; and

[0042] A second sub-insulating layer is located on the side of the second connecting line metal layer away from the substrate, and a second via is formed in the first sub-insulating layer;

[0043] The connecting line includes at least one of the first connecting line metal layer or the second connecting line metal layer, or the first connecting line metal layer and the second connecting line metal layer are electrically connected through the second via.

[0044] The first connecting line metal layer is connected to the first test metal layer or the second test metal layer, and / or the second connecting line metal layer is connected to the first test metal layer or the second test metal layer.

[0045] Furthermore, the grounding potential includes:

[0046] The first grounded metal layer is located on the substrate;

[0047] The second grounded metal layer is located on the side of the second sub-insulating layer away from the substrate.

[0048] A third via is formed in the first sub-insulating layer and the second sub-insulating layer.

[0049] The first grounding metal layer and the second grounding metal layer are electrically connected through the third via, and are connected to a grounding signal;

[0050] At the location where the ground potential and the connection line overlap in the orthographic projection of the first substrate, the metal layer of the connection line is insulated from the metal layer of the ground potential.

[0051] Furthermore, the charge-guiding structure includes a charge-guiding conductive layer located on the side of the metal layer of the connection line away from the substrate, and the charge-guiding conductive layer is insulated from the metal layer of the connection line.

[0052] The conductive layer corresponding to the starting drainage section and the metal layer of the test terminal have a first distance on the plane;

[0053] The conductive layer corresponding to the termination drainage section is connected to the first grounding metal layer or the second grounding metal layer.

[0054] Furthermore, the first test metal layer, the first connecting wire metal layer, and the first grounding metal layer are disposed in the same layer;

[0055] The second test metal layer, the second ground metal layer, and the current-guiding conductive layer are disposed in the same layer.

[0056] A second aspect of the present invention provides a method for manufacturing a display panel as described in any one of the first aspects of the present invention, comprising:

[0057] The first substrate is formed on the substrate, the first substrate including a first region and a second region located on one side of the first region, the first region including a display region;

[0058] The first substrate and the second substrate are aligned, wherein the orthographic projection of the second substrate onto the first substrate is located in the first region;

[0059] Forming the first substrate on the substrate includes:

[0060] Multiple test terminals, multiple grounding potentials, and charge drainage lines are formed in the second area;

[0061] A grounding wire connecting the plurality of grounding potentials is formed in the second region, as well as a connecting wire connecting each test terminal and the driving circuit in the display area, wherein the orthographic projection of the cut area onto the first substrate falls within the orthographic projection of the connecting wire onto the first substrate.

[0062] The charge-guiding structure is formed in the second region, the charge-guiding structure comprising: a starting guide portion, the orthographic projection of the starting guide portion on the first substrate at least partially overlapping the orthographic projection of the cut region on the first substrate; and a terminating guide portion, connected to any of the grounding potentials or to a grounding wire.

[0063] A third aspect of the present invention provides a display device comprising the display panel described in any of the claims of the first aspect of the present invention.

[0064] A fourth aspect of the present invention provides a method for manufacturing a display device according to the first aspect of the present invention, the method comprising:

[0065] The test signal is input to the display panel through the test terminal for electrical testing;

[0066] Using the cutting area as the cutting position, multiple display panels that match the detection results are cut. During the cutting process, the charge drainage structure forms a pathway.

[0067] The beneficial effects of this invention are as follows:

[0068] The display panel of this invention designs a second region on the outer side of the array substrate. A charge-draining structure connected to the ground potential or grounding line is provided on the second region. The charge-draining structure is set to overlap with the cutting area, so that a drainage path is formed when cutting with the cutting area as the cutting position. The current generated by the cutting process at the test terminal is introduced to the ground potential through the charge-draining structure, which improves the electrostatic discharge capability of the second region of the display panel and avoids circuit damage and display defects caused by external high voltage bombardment or charge accumulation at the test terminal. Attached Figure Description

[0069] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0070] Figure 1 This diagram illustrates the use of laser cutting to sever the connection line between the detection PAD and the display area.

[0071] Figure 2 A schematic diagram showing the film structure of the electrostatic damage test terminal during the cutting process;

[0072] Figure 3 A schematic diagram showing the film layer structure of the thin-film driving transistor on the array substrate affected by electrostatic damage during the dicing process;

[0073] Figures 4a-4e A plan view of different charge conduction structures of a display panel according to an embodiment of the present invention is shown;

[0074] Figure 5 It shows Figure 4b A schematic diagram of the test terminal at position A-A' in the mid-section;

[0075] Figure 6a It shows Figure 4b A structural schematic diagram of the connecting line at the mid-section D-D' position;

[0076] Figure 6b It shows Figure 4b Another structural schematic diagram of the connecting line at the mid-section D-D' position;

[0077] Figure 7 It shows Figure 4b The grounding potential at the C-C' position of the mid-section and the layer structure of the grounding wire at the E-E' position of the cross section;

[0078] Figure 8a and 8b It shows Figure 4b A schematic diagram showing the different structures of the grounding potential and the connecting line at the overlapping position of the grounding potential and the connecting line at the cross section F-F' position;

[0079] Figure 9a , 9b And 9c shows Figure 4b At section B-B', schematic diagrams of different structures of the connecting line and the charge guiding structure when they overlap;

[0080] Figure 10 A schematic diagram of the structure of the thin-film driving transistor in the display area according to an embodiment of the present invention is shown. Detailed Implementation

[0081] To more clearly illustrate the present invention, the following description, in conjunction with embodiments and accompanying drawings, further explains the invention. Similar components in the drawings are indicated by the same reference numerals. Those skilled in the art should understand that the specific description below is illustrative rather than restrictive and should not be construed as limiting the scope of protection of the present invention.

[0082] The array substrate contains driving circuitry and thin-film transistors. To detect defects in the display panel before module production, allowing for early repair or scrapping, multiple exposed test terminals 121 are typically located on one side of the array substrate. Figure 1Multiple test terminals (PADs) A, B, C, D, ... n are shown. Test terminals 121 are connected to the in-plane circuitry of the display area AA via connecting lines 131. By inputting test signals to the PADs, the in-plane circuitry of the display area AA on the array substrate can be used for illumination testing. After testing, these test terminals 121 can be completely removed along with the glass edge, or the connecting lines 131 between the test terminals 121 and the in-plane circuitry of the display area AA can be severed by laser etching on the inside of the test terminals 121, thus avoiding defects such as subsequent bonding connections or damage to the in-plane circuitry caused by corrosion of the PADs due to external conditions.

[0083] Figure 1 This diagram illustrates the laser cutting of the connection line 131 between the test terminal 121 and the display area AA at location 14 using laser cutting. In the laser process, when a large amount of charge accumulates on the PAD in a short time, such as... Figure 2 The damage shown could affect the film structure beneath the PAD, for example, by penetrating downwards and damaging the second sub-insulating layer 1232, the first sub-insulating layer 1232, and the connecting line 131. Figure 1 (AA-section); it can also damage the connecting line 131 that connects to the PAD, for example Figure 1 The connecting line at the "BB" position may also cross the cutting area 14 and damage the film layer and lines in the display area AA, causing damage to the metal lines on the TFT array substrate 10.

[0084] On the other hand, such as Figure 3 As shown, a liquid crystal layer 30 is disposed between the color filter substrate 20 and the array substrate 10. Static electricity is transferred to one side of the color filter substrate 20, which increases the voltage difference between the common electrode 21 on the color filter substrate 20 and the pixel electrode 176 on the corresponding TFT array substrate 10. The voltage then flows back to the active layer 173 through the drain 176D connected to the pixel electrode 176, causing damage to the thin film driving transistor 17 (i.e., SD Leak). On the other hand, when the PAD in-plane lead is connected to the COF (Chip on Film) bonding line (not shown in the figure), static electricity will also damage the bonding element, COF, or PCB components connected to the COF along the lead, ultimately resulting in various display defects.

[0085] Based on the above description, in order to solve the problem that electrostatic discharge during the disconnection of the connection line between the test terminal and the display area causes breakdown of the film layer and devices of the display panel, the present invention proposes a display panel, a display device, and a manufacturing method to solve the above problem.

[0086] The first embodiment of the present invention proposes a display panel, such as Figure 4a As shown, the display panel includes:

[0087] A first substrate 10, the first substrate 10 including a first region 10A and a second region 10B located on one side of the first region 10A.

[0088] A second substrate 20 is disposed opposite to the first substrate 10, wherein the orthographic projection of the second substrate 20 onto the first substrate 21 is located in the first region 10A;

[0089] The first area 10A includes the display area AA.

[0090] The second region 10B includes: a cutting area 14, multiple test terminals 121, multiple grounding potentials 151, and a charge drainage structure 16.

[0091] The second area 10B further includes: a grounding wire 152 connecting the plurality of grounding potentials 151, and a connecting wire 131 connecting each test terminal 141 and the drive circuitry within the display area AA, wherein,

[0092] The orthographic projection of the cutting area 14 onto the first substrate 10 overlaps with the orthographic projection of the connecting line 131 located in the second area onto the first substrate 10.

[0093] In a specific example, the first substrate is an array substrate 10, and the second substrate is a color filter substrate 20. The first region 10A is the overlapping area formed by the array substrate 10 and the color filter substrate 20. The first region 10A includes not only the display area AA, but also a trace area extending from the second region 10B to the first region 10A. The second region 10B is the outer region of the overlapping area formed by the array substrate 10 and the color filter substrate 20.

[0094] like Figure 4a As shown, the first region 10A includes:

[0095] The first boundary 10B1 on the side away from the second region 10B, the first boundary 10B1 is the end boundary of the array substrate 10 on the side away from the color filter substrate 20, and

[0096] The second boundary 10B2 at the overlapping position of the first region 10A and the second region 10B is the overlapping boundary of the array substrate 10 and the color filter substrate 20.

[0097] The second boundary 10B2 is parallel to the first boundary 10B1. Both the second boundary 10B2 and the first boundary 10B1 extend along the first direction D1 shown in the figure, and the second direction D2 shown in the figure is perpendicular to the first direction D1.

[0098] like Figure 4aAs shown, the positional relationship of the various structures in the second region 10B is as follows: multiple test terminals 121 are located in the test terminal area 12, which is located on the side of the second region 10B closer to the first boundary 10B1.

[0099] Connecting line 131 is located in connecting line area 13, which extends from second area 10B2 to first area 10B1. Each connecting line 131 connects the test terminal 121 and the driving circuit of the display area AA. By inputting a test signal to the test terminal 121, the test signal is input to the display area AA through connecting line 131 to perform line detection of display area AA.

[0100] The orthographic projection of the cutting area 14 onto the array substrate 10 falls on the orthographic projection of the connecting line 131 of the second area 10B onto the array substrate 10. In the cutting process, the connecting line 131 is cut at the location of the cutting area 14.

[0101] Multiple grounding potentials 151 and grounding wires 152 connecting the grounding potentials 151 form the grounding potential area 15, and any point of the grounding potentials 151 and the connecting wires 131 is connected to a grounding signal.

[0102] like Figure 4a As shown, the charge guiding structure 16 includes:

[0103] The starting drainage portion 161, the orthographic projection of the starting drainage portion 161 onto the array substrate 10 at least partially overlaps with the orthographic projection of the cutting area 14 onto the array substrate 10; and

[0104] The termination drain section 162 is connected to any of the grounding potentials 151 or to the grounding wire 152.

[0105] The display panel of this embodiment of the invention designs a second region 10B on the outer side of the array substrate 10. A charge-guiding structure 16 connected to the ground potential or grounding wire is provided on the second region 10B. The charge-guiding structure 16 is arranged to overlap with the cutting area 14, so that a guiding path is formed when cutting with the cutting area 14 as the cutting position. The current generated by the cutting process of the test terminal 121 is introduced to the ground potential through the charge-guiding structure 16, which improves the electrostatic discharge capability of the second region 10B of the display panel and avoids circuit damage and display defects caused by external high voltage bombardment or charge accumulation at the test terminal.

[0106] like Figure 4aAs shown, the orthographic projection area of ​​the array substrate 10 is larger than the orthographic projection area of ​​the color filter substrate 20. The array substrate 10 and the color filter substrate 20 form an overlapping area after being aligned, namely the first region 10A. The second region 10B of this embodiment includes both the overlapping boundary (second boundary 10B2) formed by the array substrate 10 and the color filter substrate 20 aligned, and the non-overlapping area of ​​the array substrate 10 located outside the orthographic projection of the color filter substrate 20. The second region 10B extends along the first direction D1.

[0107] In an optional embodiment, the orthographic projections of adjacent test terminals 121 on the array substrate 10 in the first direction D1 do not overlap; that is, each test terminal 121 is insulated to ensure a circuit connection with the display area AA. In a specific example, such as Figure 4b As shown, the boundary distance between adjacent test terminals 121 is the fifth distance d5. For example, the fifth distance is determined according to the deposition accuracy of the deposition process.

[0108] In an optional embodiment, such as Figure 4b As shown, the grounding potential 151 includes a first electrode 1511 and a second electrode 1512.

[0109] The first electrode 1511 (VM1, VM2) is located near the first boundary 10B1. The first electrode 1511 (VM1) and the first electrode 1511 (VM2) are connected by a grounding wire 152 to form a Vcom potential, i.e., a grounding potential.

[0110] In an optional embodiment, the first electrode 1511 is close to the first boundary 10B1, and the grounding line 152 connecting the adjacent first electrodes 1511 is at a fourth distance d4 with the first boundary 10B1. This arrangement avoids precision errors that could damage the first electrode 1511 and the grounding line 152 when the array substrate 10 is cut with the first boundary 10B1 as the cutting position.

[0111] In another optional embodiment, the minimum distance d3 between the first electrode 1511 and the test terminal 121 is greater than or equal to twice the fifth distance, i.e., d3 ≥ 2 * d5, to ensure insulation between the first electrode 1511 and the test terminal 121 and avoid signal crosstalk. Furthermore, the orthographic projections of the test terminal 121, the first electrode 1511, and the second electrode 1512 in the second region do not overlap, ensuring insulation between them and avoiding signal crosstalk.

[0112] like Figure 4bAs shown, the second electrodes 1512 (VM3, VM4, VM5) are located near the second boundary 10B1 and are arranged along an extension direction parallel to the first boundary 10B1. Adjacent second electrodes 1512 are connected by a grounding wire 152, and the first electrode 1511 and the second electrode 1512 are also connected by a grounding wire 152, so that the first electrode 1511 and the second electrode 1512 are connected to the same potential through the grounding wire 152.

[0113] The embodiments of the present invention do not limit the specific arrangement position, specific number, or distance between adjacent first electrodes 1511 on the side near the first boundary 10B1. Similarly, they do not limit the specific arrangement position, specific number, or distance between adjacent second electrodes 1512 on the side near the second boundary 10B2. Those skilled in the art can set these according to actual applications, and they will not be described in detail here.

[0114] In an optional embodiment, such as Figure 4b As shown, the orthogonal projection of test terminal 121 onto array substrate 10 is larger than the area of ​​the orthogonal projection of ground potential 151 onto array substrate 10. Considering the poor accuracy of external signal connection, this setting increases the area of ​​the detection PAD, thereby improving signal access accuracy.

[0115] In embodiments of the present invention, such as Figure 4c and Figure 4d As shown, the termination drainage section 162 is connected to at least one of the first electrode 1511 and / or the second electrode 1512 and / or the grounding wire 152.

[0116] In a specific example, such as Figure 4b As shown, the termination drain portion 162 corresponding to test terminals A1 and A2 is connected to the first electrode 1511 (VM1) located in the upper left corner, and the termination drain portion 162 corresponding to test terminal An is connected to the ground wire 152 located on the right side.

[0117] In a specific example, such as Figure 4c As shown, the termination drain section 162 corresponding to the test terminals B1, B2...Bn is connected to the second electrode 1512 (VM4 and VM5) located on one side of the second boundary 10B2, thereby realizing the solution of grounding the termination drain section 162.

[0118] In a specific example, such as Figure 4d As shown, the termination drain section 162 corresponding to the test terminals A1, A2...An is connected to the first electrode 1511 (VM1) located on one side of the first boundary 10B1, thereby realizing the solution of grounding the termination drain section 162.

[0119] Based on the above examples, the embodiments of the present invention do not limit which grounding potential 151 the termination drain 162 is specifically connected to, or which grounding wire 152 it is specifically connected to. Any scheme that can realize the grounding of the charge drain structure 16 based on the design of the second region 10B of the embodiments of the present invention is within the protection scope of the embodiments of the present invention.

[0120] In an optional embodiment, such as Figure 4b , 4c As shown in Figure 4d, the charge guiding structure 16 further includes:

[0121] The first drainage line 163 is located near the initial drainage portion 161; and

[0122] The second drainage line 164 is located near the termination drainage section 162.

[0123] The first drainage line 163 and the second drainage line 164 are connected.

[0124] The orthographic projection of the first drainage line 163 in the second region 10B overlaps with the orthographic projection of the boundary of the cutting area 14 on the side away from the test terminal 121 (e.g., Figure 4b (The boundary corresponding to the dashed line of the middle cutting area 14), the second drainage line 164 does not overlap with the orthographic projection of the cutting area 14 in the second area 10B.

[0125] In this embodiment, the starting drain portion 161 is the end of the first drain line 163 near the test terminal 121, and the ending drain portion 162 is the end of the second drain line 164 connected to the ground potential (first electrode 1511, second electrode 1512 or ground wire 152).

[0126] In this embodiment of the invention, the positional or connection relationship between the charge guiding structure 16 and the ground potential it is connected to, and between it and the test terminal 121, is as follows:

[0127] The starting current-draining portion 161 is located near the test terminal 121 but at a certain distance from it; that is, the starting current-draining portion 161 is insulated from the test terminal 121.

[0128] One end of the first drain line 163 is connected to the starting drain section 161, the other end of the first drain line 163 is connected to the second drain line 164, and the other end of the second drain line 164 is connected to the ground potential 151, such as the first electrode 1511, the second electrode 1512, or the ground line 152;

[0129] In this embodiment of the invention, the specific lengths and specific intersection positions of the first guide line 163 and the second guide line 164 are not limited. Instead, the design is based on whether the orthogonal projection of the first guide line 163 overlaps with the cutting area 14 to transmit the charge near the cutting area 14 through the starting guide part 161, and whether the second guide line 164 overlaps with the cutting area 14 to prevent the line connecting the charge guiding structure 16 to the ground potential from being cut off during the cutting process, thus preventing the formation of the charge guiding structure 16.

[0130] In a specific example, such as Figure 4b As shown, the starting drain sections 161 corresponding to test terminals A1 and A2 are connected to the first electrode 1511 through the same ending drain section 162. The drain circuits of the starting drain sections 161 corresponding to test terminals A1 and A2 are the same circuit on the side near the ending drain section 162. Figure 4b In this circuit, the same circuit is defined as the second lead 164, which has an "l" shaped structure. At this time, the intersection points X1 and X2 of the first lead 163 and the second lead 164 of the test terminal A1 are such that the first lead 163 has a "┘" shaped structure, and similarly, the first lead 163 near the test terminal A2 also has a "┘" shaped structure.

[0131] In another specific example, such as Figure 4d As shown, the starting drain section 161 corresponding to test terminal A1, test terminal A2 and An are all connected to the first electrode 1511 through the same ending drain section 162. The drain circuits of the starting drain sections 161 corresponding to test terminal A1 and test terminal A2 are the same circuit on the side near the ending drain section. However, in this embodiment, the "l"-shaped drain circuit is not defined as the second drain line.

[0132] like Figure 4d As shown, in this example, in the orthographic projection formed by the second region 10B, the boundary point is the intersection formed by the end of the drainage line covering the connecting line 131 and the end of the drainage line connecting the termination drainage section 162. The side closer to the starting drainage section 161 is the first drainage line 163, and the side closer to the termination drainage section 162 is the second drainage line 164. Figure 4d Points X3, X4, and X5 shown are the dividing points between the first drain line 163 and the second drain line 164 corresponding to different test terminals. In this structure, the second drain line 164 is always an "L" shaped structure, and the first drain line 163 corresponding to the starting drain portion 161 of different test terminals is an "l" shaped structure.

[0133] In another specific example, such as Figure 4cAs shown, the first drainage line 163 has a block-like structure, and the second drainage line 164 consists of multiple strip-shaped lines. In this example, the boundary line formed by the first drainage line 163 and the second drainage line 164 is used as the dividing point. For example... Figure 4c The line YY connecting the two Y points shown extends along the first direction D1.

[0134] Therefore, the embodiments of the present invention do not limit the specific intersection position of the first drain line 163 and the second drain line 164. The design principle is to ensure the integrity of the charge drain path by having the first drain line 163 overlap with the cutting area 14 and the second drain line 164 not overlap with the cutting area 14. This will not be elaborated further here.

[0135] It is also worth noting that although the embodiments of the present invention divide the various parts of the charge guiding structure 16, it does not mean that the above-mentioned starting guiding part 161, first guiding line 163, second guiding line 164 and ending guiding part 162 are independent structures. The embodiments of the present invention are only defined to clearly explain the structure of the charge guiding structure 16 in a planar state.

[0136] The first drainage line 163 in this embodiment of the invention has different design methods, such as Figure 4a and Figure 4d As shown, the first drainage line 163 has multiple strip-shaped structures, such as... Figure 4c As shown, the first drainage line 163 has a block-shaped structure.

[0137] Furthermore, the charge guiding structure 16 in this embodiment of the invention can be as follows: Figure 4c and Figure 4d The combination structure, such as Figure 4e As shown, the test terminal area 12 includes a plurality of test terminals 121 arranged along the first direction D1. The plurality of test terminals 121 constitute a test terminal group, and a charge-draining structure 16 is provided corresponding to each test terminal, forming multiple charge-draining structures arranged along the first direction D1. The display area AA is partitioned and tested using test terminal groups located at different positions, and the corresponding charge-draining structure 16 protects the film layer at the corresponding position to prevent electrostatic discharge.

[0138] For example, such as Figure 4d As shown, A1, A2...An form a test terminal group, capable of detecting the circuit to the left of the display area AA. The charge drainage structure 16 corresponding to this test terminal group is... Figure 4d The structure; B1, B2...Bn is another test terminal group, capable of detecting the line on the right side of the display area AA, and the charge drainage structure 16 corresponding to this test terminal group is... Figure 4cThis structure enables zone detection, improving detection accuracy. For example, for large-size, high-resolution products, where the number of signals connected to the display area AA is large, zone detection can be achieved through the above settings.

[0139] In an optional embodiment, such as Figure 4a and Figure 4d As shown, the number of first drainage lines 163 is the same as the number of connecting lines 131. That is, in the direction perpendicular to the first boundary 10B1 (i.e., the second direction D2), the first drainage lines 163 cover the orthogonal projection of the connecting lines 131 in the second region 10B. In this structure, there are multiple first drainage lines 163, that is, there are multiple starting drainage portions 161, or in other words, each starting drainage portion 161 corresponds to each test terminal 121.

[0140] Under this structure, such as Figure 4a As shown, the first guide line 163 is displayed as multiple strip structures in the orthographic projection of the second area 10B. The extension direction of each strip first guide line 163 is from the second area 10B to the display area AA, that is, the second direction D2. Each first guide line 163 covers a portion of the connecting line 131 in this direction. That is, each first guide line 163 is set at the position of the corresponding connecting line 131. The first guide line 163 protects the connecting line 131 at the covered position, avoiding the problem of a large amount of static electricity generated during the cutting process causing breakdown damage to the internal wiring of the display area AA through the connecting line 131.

[0141] In another alternative embodiment, unlike Figure 4b The first drainage line 163 shown is a strip-shaped structure, such as... Figure 4c As shown, in this embodiment, the first drainage line 163's orthographic projection in the second region 10B is a patterned graphic, i.e., a blocky structure covering multiple connecting lines 131. At this time, the initial drainage portion 161 extends along the first direction D1, and the first drainage line 163 covers the combined orthographic projection formed in the second region 10B by the connecting lines 131 arranged along the extension direction of the second region 10B. In this structure, the number of first drainage lines 163 is less than the number of connecting lines 131.

[0142] Under this structure, such as Figure 4c As shown, the first guide wire 163 is arranged along the entire surface of the second region 10B, and the second guide wire 164 consists of multiple guide wires connecting different grounding potentials 151. One first guide wire 163 corresponds to multiple second guide wires 164. In this embodiment, under this structure... Figure 4c Patterned structures are not limited to Figure 4cThe rectangle shown is designed with the first guide line 163 extending along the extension direction of the first boundary 10B1, covering multiple connecting lines in that direction. The patterned first guide line 163 is used to protect the connecting lines 131 at the covered position, avoiding the problem of a large amount of static electricity generated during the cutting process causing breakdown damage to the internal wiring of the display area AA through the connecting lines 131.

[0143] Furthermore, considering that if the position of the second drainage line 164 is not set properly when cutting at the position of the cutting area 14, the cutting area 14 may cut off the second drainage line 164, resulting in the inability to form a drainage path, this embodiment designs the relative position of the second drainage line 164 and the cutting area 14.

[0144] In an optional embodiment, the dividing line is the extension line of the first direction D1 where the connection position of the first drainage line 163 and the second drainage line 164 is located.

[0145] When the cutting area 14 and the second drain line 164 are located on the same side, the orthographic projection of the cutting area 14 on the first substrate 10 is a patterned graphic, and the cutting length of the cutting area 14 is less than the extension length of the second area 10B in the first direction D1.

[0146] When the cutting area 14 and the second drainage line 164 are on opposite sides, the cutting length of the cutting area 14 is less than or equal to the extension length of the second area 10B in the first direction D1.

[0147] Specifically, with Figure 4c and Figure 4d To illustrate,

[0148] In a specific example, such as Figure 4d As shown, a second drainage line 164 and multiple first drainage lines 163 form multiple boundary positions X3, X4 and X5. Therefore, the positional relationship between the cutting area 14 and the second drainage line 163 is determined by taking the extension line corresponding to the boundary position X3 closest to the cutting area 14 as the dividing line.

[0149] like Figure 4d As shown, the cutting area 14 and the second drainage line 164 are located on the same side of the dividing line, that is, the second drainage line 164 and the cutting area 14 are both located above the dividing line.

[0150] In this structure, to avoid damage to the second lead-in line 164 during the cutting process, which could lead to the destruction of the charge-guiding structure 16, in this embodiment, the orthographic projection of the cutting area 14 onto the second area 10B is designed as a patterned graphic. The cutting length of the cutting area 14 is less than the extension length of the second area 10B, meaning that the cutting area 14 will not cut the second lead-in line 164 on the same side. With this setting, this embodiment of the invention only performs laser processing on the connecting line 131 near the test terminal 121, cutting off the line connection from the test terminal 121 to the in-plane display area AA, without cutting the glass of the second area 10B, thus reducing cutting costs.

[0151] In another example, such as Figure 4c As shown, Figure 4c As shown, the first drainage line 163 is a single line, or a sheet-like region. One first drainage line 163 corresponds to multiple second drainage lines 164. The boundary position Y formed by the second drainage line 164 and the first drainage line 163 is a strip-shaped boundary line extending along the first direction D1, with this strip-shaped boundary line serving as the dividing line.

[0152] like Figure 4c As shown, with the boundary line where the intersection point Y is located as the dividing line, the cutting area 14 and the second drainage line 164 are located on opposite sides of the dividing line, that is, the cutting area 14 is above the dividing line, and the second drainage line is below the dividing line YY. In this structure, the cutting length of the cutting area 14 is less than or equal to the extension length of the second area 10B.

[0153] In this structure, the cutting area 14 of this embodiment of the invention adopts a method that can be used as follows: Figure 4d The partial cutting method of the structure, that is, only the connecting line 131 near the test terminal 121 is laser-processed to cut off the line connection from the test terminal 121 to the in-plane display area AA, without cutting off the glass of the second area 10B, can reduce the cutting cost; or the entire second area 10B above the cutting area 14 can be cut to reduce the bezel size.

[0154] In an optional embodiment, such as Figures 4b to 4d As shown, the distance between the starting current-draining portion 161 and the test terminal 121 near the first boundary 10B1 is designed as a first distance d1. In a specific example, the first distance d1 is greater than or equal to twice the fifth distance d5 between two adjacent test terminals 121, i.e., d1 ≥ 2 * d5. This ensures that even with metal layer deposition errors, insulation between the starting current-draining portion 161 and the test terminal 121 can be achieved, guaranteeing the normal conduction of the test circuit and the charge current-draining circuit. In a specific example, the minimum value of the first distance is 500 μm.

[0155] The distance between the cutting area 14 near the second boundary 10B2 (the lower edge of the cutting area 14) and the boundary of the test terminal 121 near the second boundary 10B2 (the lower edge of the test terminal) is designed as a second distance d2, which is greater than the first distance d1. With this setting, in a planar state, the cutting area 14 overlaps with the first guide line 163. During the cutting process, when a large amount of charge is generated at the cutting position, a path can be formed with the guide line at the overlapping position, achieving charge transfer.

[0156] In this embodiment of the invention, the design does not focus on whether the upper edge of the cutting area 14, i.e., the boundary near the test terminal 121, overlaps with the starting drain portion 161 in orthographic projection. Instead, the design focuses on the lower edge of the cutting area 14. At the extreme distance, the lower edge of the cutting area 14 and the starting drain portion 161 just overlap. This structure can also ensure the conduction of the charge drain circuit. However, considering the manufacturing process, this embodiment of the invention sets the second distance d2 between the lower edge and the test terminal 121 to be greater than the first distance d1 between the starting drain portion 161 and the test terminal 121, to ensure that the charge drain structure 16 and the cutting area 14 can form a path during the cutting process.

[0157] Those skilled in the art can select different design methods for the cutting area 14 according to the actual application, which will not be elaborated here.

[0158] In an optional embodiment, Figure 5 A schematic diagram of the test terminal structure at position A-A' is shown. The test terminal 121 includes:

[0159] The first test metal layer 122 is located on the substrate 11;

[0160] At least one first insulating layer 123 located on the side of the first test metal layer 122 away from the substrate 11; and

[0161] The second test metal layer 124 is located on the side of the first insulating layer 123 away from the first test metal layer 122.

[0162] The first insulating layer 123 has a first via 123A, and the first test metal layer 122 and the second test metal layer 124 are electrically connected through the first via 123A.

[0163] In this embodiment of the invention, the test terminal 121 has a double metal layer structure design, with the second test metal layer 124 located at the top, i.e., on the side away from the substrate 11. The test signal can be directly applied to the second test metal layer 124, and the second test metal layer 124 transmits the signal to the first test metal layer 122 below the second test metal layer 124 through the first via 123A, thereby realizing the access of the test signal. This setting can improve the corrosion resistance of the test terminal.

[0164] In this embodiment of the invention, the connecting line 131 of the connecting line area 13 extends from the second area 10B to the display area AA. It overlaps with the cutting area 14 and the ground potential area 15. Therefore, in the wiring design, the metal layer of the connecting line 131 at different positions needs to be designed or avoided to ensure the circuit layout.

[0165] In an optional embodiment, such as Figure 6a and 6b As shown, the connecting line 131 includes:

[0166] The first interconnect metal layer 132 located on the substrate 11; and

[0167] A second connecting line metal layer 133 is provided insulated from the first connecting line metal layer 132;

[0168] The first insulating layer 123 includes:

[0169] A first sub-insulating layer 1231 is located on the side of the first interconnect metal layer 132 away from the substrate 11, and a second via 1231A is formed in the first sub-insulating layer 1231; and

[0170] A second sub-insulating layer 1232 is located on the side of the second connecting line metal layer 133 away from the substrate 11;

[0171] At the non-overlapping locations of the connection line 131 with the cutting area 14 and with the connection line 131 on the array substrate 10, the connection line 131 includes at least one of the first connection line metal layer 132 or the second connection line metal layer 133, or the first connection line metal layer 132 and the second connection line metal layer 133 are electrically connected through the second via 1231A.

[0172] The first connecting line metal layer 132 is connected to the first test metal layer 122 or to the second test metal layer 124, and / or the second connecting line metal layer 133 is connected to the second connecting line metal layer 134.

[0173] At the position where the ground potential 15 and the connecting line 131 overlap in the orthographic projection of the array substrate 10, the metal layer of the connecting line 131 is insulated from the metal layer of the ground potential 151 and from the grounding line 152.

[0174] like Figure 5 As shown, the first via 123A penetrates the first sub-insulating layer 1231 and the second sub-insulating layer 1232, while the second via 1231A only penetrates the first sub-insulating layer 1231.

[0175] In a specific example, such as Figure 6a As shown, in the orthographic projection of the second region 10B, the connecting line 131 and the cutting region 14 are at a non-projection overlap position, i.e. Figure 4b As shown in the layer structure of the D-D' cross-section, a single metal layer can be used as the connection line 131 for both test terminal A1 and test terminal A2. For example... Figure 6a The connecting line 131 on the left side, which connects to the test terminal A1, is the first connecting line metal layer 132. Figure 6b The connecting wire 131 on the right side, which connects to test terminal A2, is the second connecting wire metal layer 133. In another specific example, such as... Figure 6b As shown, the connecting line 131 at the non-overlapping position can also be composed of the first connecting line metal layer 132 and the second connecting line metal layer 133, that is, the line replacement connection is realized through the second via 1231A opened in the first sub-insulating layer 1231.

[0176] In an optional embodiment, Figure 7 It shows Figure 4b The layered structure of the grounding potential 151 at the mid-section C-C' and the grounding wire 152 at the section E-E' is exemplary. The grounding potential 151 includes:

[0177] A first ground metal layer 153 is located on the substrate 11;

[0178] The second ground metal layer 154 is located on the side of the second sub-insulating layer 1232 away from the substrate 11.

[0179] A third via 1232A is formed in the first sub-insulating layer 1231 and the second sub-insulating layer 1232.

[0180] The first grounding metal layer 153 and the second grounding metal layer 154 are electrically connected through the third via 1232A to receive the grounding signal.

[0181] Based on the above structure, the first electrode 1511 and the second electrode 1512 are both formed by the first ground metal layer 153 and the second ground metal layer 154, forming a double metal layer structure. The second ground metal layer 154 is located at the top, that is, on the side away from the substrate 11. The grounding signal can be directly applied to the second ground metal layer 154. The second ground metal layer 154 transmits the signal to the first ground metal layer 153 below the second ground metal layer 154 through the third via 1232A, realizing the access of the grounding signal. By setting the double metal layer, the corrosion resistance of the grounding potential 151 can be improved.

[0182] like Figures 4b-4d As shown, adjacent first electrodes 1511, adjacent first electrodes 1511 and second electrodes 1512, and adjacent second electrodes 1512 are also connected by grounding wires 152. The metal layer forming the grounding wire 152 can be a first grounding metal layer 153, or a second grounding metal layer 154. Alternatively, the first grounding metal layer 153 and the second grounding metal layer 154 can be used to achieve wire switching grounding through a third via 1232A. The specific structure of the grounding wire 152 can be set by those skilled in the art according to the actual application.

[0183] Furthermore, in an optional embodiment, such as Figure 4b and Figure 4d As shown, at the cross-section F-F', the grounding potential 151 and the connecting line 131 overlap in the orthographic projection of the second region 10B. At this overlapping location, the metal layer of the connecting line 131 and the metal layer of the grounding potential 151 need to be insulated to ensure the wiring arrangement. For example, the layer structure at this location is as follows... Figure 8a and 8b As shown.

[0184] In a specific example, such as Figure 8a As shown, the layer structure design at the overlapping position F-F' of the orthogonal projection of the ground potential 151 and the connecting line 131 in the second region 10B is as follows: substrate 11, a first connecting line metal layer 132 on the substrate 11, a first sub-insulating layer 1231 on the first connecting line metal layer 132, a second sub-insulating layer 1232 on the first sub-insulating layer 1231, and a second ground metal layer 154 on the second sub-insulating layer 1232, thereby realizing a structural design where the metal layer of the connecting line 131 is below and the metal layer of the ground line 152 is above. That is to say, Figure 8a The structure shown is Figure 6a Based on the 131-layer structure of the connecting line shown on the left, a structure is formed that overlaps with the second ground metal layer 154.

[0185] Therefore, based on Figures 6a-6bThe structural design of the connecting wire metal layer in different embodiments is understood to mean that the structural design of the connecting wire 131 and the grounding wire 152 at the overlapping position can be based on... Figures 6a-6b The structure is formed, for example, a structure in which a second ground metal layer 154 is formed on the second sub-insulating layer 1232.

[0186] In another specific example, unlike Figure 8a The scheme adopts the second grounding metal layer 154 being located on top, such as... Figure 8b As shown, the overlapping area can also be designed using the first ground metal layer 153 located on the substrate 11. To achieve insulation, the connecting line 131 is designed using a second connecting metal layer, thereby realizing... Figure 8b As shown, the overlapping structure design of the first ground metal layer 153 on the substrate 11, the first sub-insulating layer 1231 on the first ground metal layer 153, the second connecting line metal layer 133 on the first sub-insulating layer 1231, and the second sub-insulating layer 1232 on the second connecting line metal layer 133 achieves a structure design with the connecting line metal layer on top and the ground metal layer on the bottom.

[0187] Those skilled in the art can select different wiring arrangements according to actual applications, thereby realizing the structural design at the overlapping positions of the present invention, so as to ensure the wiring design of the grounding wire 152 and the connecting wire 131.

[0188] Based on the layer structure design of the connecting line 131 and the structural design of the overlapping position of the ground potential 151 and the connecting line 131 in the foregoing embodiments, the layer structure of the charge guiding structure 16 of the present invention is further designed.

[0189] In an optional embodiment, such as Figures 9a-9c As shown, the charge guiding structure 16 includes a charge guiding conductive layer 165 located on the side of the metal layer of the connecting line 131 away from the substrate 11. The charge guiding conductive layer 165 is insulated from the metal layer of the connecting line 131. The first ground metal layer 153 or the second ground metal layer 154 corresponding to the termination portion 162 is connected to the charge guiding conductive layer 165.

[0190] exist Figure 4b and 4d At position B-B' as shown, as Figure 9a As shown, the connecting line 131 and the charge-guiding structure 16 overlap, therefore, the film layer at position B-B' includes the conductive layer 165 and the metal layer of the connecting line 131. Based on the foregoing discussion, as Figure 6a and Figure 6bAs shown, the metal layer of the connecting line 131 has different design schemes. Therefore, the layer structure at the overlapping position of the connecting line 131 and the charge guiding structure 16 also has different layer structure schemes, for example... Figure 9a and 9b As shown.

[0191] In a specific example Figure 9a Based on Figure 6a The structural design of the conductive layer 165 formed by the connecting wire metal layer is shown. Figure 9a The connecting line 131 on the left is composed of a first connecting line metal layer 132, and is insulated from the current-guiding conductive layer 165 through a first sub-insulating layer 1231 and a second sub-insulating layer 1232. Figure 9b The connecting line 131 on the right is composed of a second connecting line metal layer 133, which is insulated by a second sub-insulating layer 1232 and is insulated from the current-guiding conductive layer 165.

[0192] In a specific example Figure 9b Based on Figure 6b The structural design of the conductive layer 165 formed by the connecting wire metal layer shown is as follows: Figure 9b As shown, the connecting line metal layer is electrically connected by the first connecting line metal layer 132 and the second connecting line metal layer 133 through the second via 1231A, and is insulated from the current-guiding conductive layer 165 through the second sub-insulating layer 1232.

[0193] In another specific example, Figure 9c for Figure 4c The patterned conductive layer 165 shown on the right is in Figure 4c A schematic diagram of the layer structure at the G-G' section position, as shown below. Figure 4c As shown at position G-G' on the right, the first lead-in line 163 is a patterned sheet structure. At this time, the conductive layer 165 corresponding to the first lead-in line 163 is a continuous structure formed on the second sub-insulating layer 1232, i.e., as shown... Figure 9c As shown, the layer structure of this embodiment of the invention is as follows: substrate 11, a first interconnect metal layer 132 on substrate 11, a first sub-insulating layer 1231 on the first interconnect metal layer 132, a second sub-insulating layer 1232 on the first sub-insulating layer 1231, and a current-guiding conductive layer 165 on the second sub-insulating layer 1232, wherein the orthogonal projection of the current-guiding conductive layer 165 on substrate 11 covers at least one orthogonal projection of the first interconnect metal layer 132 on substrate 11.

[0194] Therefore, those skilled in the art can implement different design schemes to achieve the structural arrangement of charge guiding structure 16 and connecting line area 13 at the overlapping position, which will not be elaborated here.

[0195] In this embodiment of the invention, at the connection position between the termination drain section 162 and the first electrode 1511, the first grounding metal layer 153 or the second grounding metal layer 154 is connected to the draining conductive layer 165 to achieve grounding of the termination drain section 162, for example... Figure 4d The termination drain portion 162 is connected to the metal layer of the first electrode 1511 (VM1) to form a ground, for example. Figure 4c The termination drain portion 162 on the right side is connected to the metal layer of the second electrode 1512 (VM4) to form a ground.

[0196] In an optional embodiment, the first test metal layer 122, the first connecting wire metal layer 132, and the first grounding metal layer 153 are arranged in the same layer, and the second test metal layer 124, the second grounding metal layer 154, and the current-guiding conductive layer 165 are arranged in the same layer, so as to improve manufacturing efficiency while ensuring the circuit layout.

[0197] Furthermore, the metal layers of the second region 10B described in this embodiment of the invention can be fabricated using the same process as the thin-film driving transistor 17 of the display region AA, thereby further improving the fabrication efficiency.

[0198] In a specific example, the thin-film driving transistor 17 includes a gate metal layer 171 formed on a substrate 11, a gate insulating layer 172 located on the gate metal layer 171, an active layer 173 located on the gate insulating layer 172, and a source / drain electrode layer 174 located on the gate insulating layer 172. The source electrode 176S and the drain electrode 176D of the source / drain electrode layer 174 are respectively located on both sides of the active layer 173. A second insulating layer 175 covers the active layer 173 and the source / drain electrode layer 174. The second insulating layer 175 is provided with a fourth via 175A and exposes a portion of the source electrode 176S or the drain electrode 176D. A pixel electrode 176 is formed in the fourth via 175A and connected to the exposed portion of the source electrode or the drain electrode 176D.

[0199] Based on the structural design of the thin-film driving transistor 17, the first test metal layer 122, the first connecting line metal layer 132, and the first ground metal layer 153 can be disposed on the same layer as the gate metal layer 171. The first sub-insulating layer 1231 is disposed on the same layer as the gate insulating layer 172. The source / drain electrode layer 174 is disposed on the same layer as the second connecting line metal layer 133. The second sub-insulating layer 1232 is disposed on the same layer as the second insulating layer 175. The second test metal layer 124, the second ground metal layer 154, the current guiding conductive layer 165, and the pixel electrode 176 are disposed on the same layer. The second region 10B and the display region AA are formed in the same manufacturing process, thereby improving manufacturing efficiency.

[0200] The structure of the second zone 10B, grounding potential 151, connecting line 131, charge drainage structure 16, and display area AA will now be explained with specific examples:

[0201] First, a metal material is deposited on the array substrate 11, and a corresponding exposure and etching process is performed to pattern it, thereby forming a gate metal layer 171 located in the display area AA, a first test metal layer 122 located in the second area 10B, a first interconnect metal layer 132, and a first ground metal layer 153. In a specific example, the first interconnect metal layer 132 can serve as a ground line 152 connecting the two first electrodes 1511, the two second electrodes 1512, and the first and second electrodes 1511. It is worth noting that this step can also form other traces in the second area 10B, but this is irrelevant to the scheme of the embodiment of the present invention and will not be described in detail here.

[0202] Next, a first sub-insulating layer 1231 (gate insulating layer 172) is deposited on the aforementioned metal layer. A semiconductor active layer 173 is formed on the gate insulating layer 172 of the display area AA. The active layer 173 is then subjected to corresponding exposure and etching processes to form the pixel area and / or the TFT channel surrounding the array display panel. Openings are made in the first sub-insulating layer 1231, for example... Figure 6b The second via 1321A is formed as shown.

[0203] Then, a metal material is deposited and patterned to form the source / drain electrode layer 174 of the display area AA and the second interconnection metal layer 133 of the second area 10B. It is worth noting that this step can also form other traces for the second area 10B and the display area AA, but this is irrelevant to the embodiment of the present invention and will not be described further here.

[0204] After completing the above steps, the second sub-insulating layer 1232 (the second insulating layer 175 of the display area AA) of the second region 10B is deposited. Then, corresponding exposure and etching are performed to form the vias / holes required for the pixel area and the second region 10B. For example... Figure 5 The first via 123A shown is... Figure 7 The third via 1232A shown Figure 10 The fourth via 175A is shown. In a specific example, the depth of the first via 123A is greater than the depth of the fourth via 175A, and the depth of the third via 1232A is greater than the depth of the fourth via 175A. The via design allows external signals to be connected to a metal layer closer to the substrate 11 or to a metal layer farther away from the substrate 11, so as to provide panel driving signals.

[0205] For example, such as Figure 5 As shown, the test signal is transmitted through the first via 123A. For example, as shown... Figure 6b As shown, the test signal is transmitted to the in-plane trace through the second via 1231A. For example, as shown... Figure 7 As shown, the grounding signal is transmitted through the third via 1232A. For example, as shown... Figure 10 As shown, the source drive signal is output to the pixel electrode 176 through the fourth via 175A. In an optional embodiment, the number of test terminals 121 is the same as the number of first vias 123A, ensuring a dual-layer structure and independent transmission of test signals.

[0206] It is worth noting that the number of test terminals 121 is the same as the number of first vias 123A. The number and location of other vias, such as the second via 1231A or the third via 1232A, can be designed according to the actual application, for example, based on the wiring and routing design, the rewiring design of the connecting wire 131, or the rewiring design of the grounding wire 152. There are no special requirements for the distance between adjacent vias; preferably, adjacent vias are evenly distributed.

[0207] After completing the fabrication of the second sub-insulating layer 1232, metal material is deposited and patterned to form the second test metal layer 124, the second ground metal layer 154, and the current-guiding conductive layer 165 in the non-display area AA. The current-guiding conductive layer 165 corresponding to the starting current-guiding part 161 and the metal layer of the test terminal 121 have a first distance d1 on the plane, which is 500um for example, to avoid signal interference caused by the distance between the external signal and the conductive layer after the signal is connected to the PAD. The current-guiding conductive layer 165 corresponding to the ending current-guiding part 162 is connected to the first ground metal layer 153 or the second ground metal layer 154 through the third via 1232A to achieve grounding.

[0208] It is worth noting that there are no special requirements for the conductive layer pattern design; it can be a strip structure, for example... Figure 4b and Figure 4d The structure shown has multiple starting drain sections 161, or the number of starting drain sections 161 is less than the number of test terminals 121, for example. Figure 4c The conductive layer 165 shown is patterned, with the starting drain portion 161 being a strip along the first direction D1. Regardless of the pattern used, the design principle is that the starting drain portion 161 has a first distance from the test terminal 121, the ending drain portion 162 forms a connection with the ground potential 151, and the charge drain structure 16 is not connected to the pixel electrode 176 or other electrodes with non-Vcom signals. This will not be elaborated further here.

[0209] Through the above steps, a bimetallic test terminal 121, a first electrode 1511, a second electrode 1512, and a pixel electrode 176 for the display area AA are formed. It is worth noting that the test terminal 121 in this embodiment also includes a TFT test terminal for detecting the thin-film driving transistor 17, which can also be fabricated using the same process as the test terminal 12. Furthermore, the first electrode 1511, the second electrode 1512, and the test terminal 121 all have independent shapes, such as rectangular, convex, or cross-shaped, which will not be described in detail here.

[0210] Furthermore, such as Figure 3 As shown, the color filter substrate 20 includes a second substrate 11 and a common electrode 21 located on the side of the second substrate 11 facing the array substrate 10. Based on the charge-guiding structure 16 of the above embodiment of the present invention, when static electricity is conducted through the cutting area 14 to the in-plane lines of the display area AA, the charge-guiding structure 16 of the embodiment of the present invention, with the starting guide portion 161 located near the test terminal 121 and the ending guide portion 162 connected to the ground potential area 15, will preferentially conduct the static charge to the ground through the charge-guiding structure 16, thereby achieving static discharge. This greatly reduces the tendency of static electricity to be longitudinally transmitted in the film layer of the test terminal 121 and the film layer of the connecting line 131 connected to the test terminal 121, thereby avoiding damage to the lead metal layer and causing circuit damage, or static electricity backflow damaging the internal components of the display area AA, such as the timing controller, leading to display defects.

[0211] Another embodiment of the present invention provides a method for manufacturing the display panel of the above embodiments of the present invention, the method comprising:

[0212] The first substrate is formed on the substrate, the first substrate including a first region and a second region located on one side of the first region, the first region including a display region;

[0213] The first substrate and the second substrate are aligned, wherein the orthographic projection of the second substrate onto the first substrate is located in the first region;

[0214] Forming the first substrate on the substrate includes:

[0215] Multiple test terminals, multiple grounding potentials, and charge drainage lines are formed in the second area;

[0216] A grounding wire connecting the plurality of grounding potentials is formed in the second region, as well as a connecting wire connecting each test terminal and the driving circuit in the display area, wherein the orthographic projection of the cut area onto the first substrate falls within the orthographic projection of the connecting wire onto the first substrate.

[0217] The charge-guiding structure is formed in the second region, the charge-guiding structure comprising: a starting guide portion, the orthographic projection of the starting guide portion on the first substrate at least partially overlapping the orthographic projection of the cut region on the first substrate; and a terminating guide portion, connected to any of the grounding potentials or to a grounding wire.

[0218] It is worth noting that the process and principle of the manufacturing method can be referred to the aforementioned embodiments, and will not be repeated here.

[0219] Another embodiment of the present invention provides a display device, including the display panel of the above embodiments of the present invention. The display device can be any product or component with touch sensing function, such as electronic paper, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigator, vehicle display device, etc., and this embodiment does not limit it.

[0220] Another embodiment of the present invention provides a method for manufacturing a display device, the method comprising:

[0221] The test signal is input to the display panel through the test terminal 121 for electrical testing. The test signal is transmitted to the circuit of the display area AA through the test terminal 121 and the connecting line 131 to realize the electrical circuit testing of the display area AA.

[0222] Using the cutting area 14 as the cutting position, the display panel that meets the test results is cut. During the cutting process, the charge guiding structure 16 forms a path. Based on the display panel with the charge guiding structure 16, the electrostatic charge generated during the cutting process will preferentially be transferred through the starting guiding part 161, and then the charge will be transferred to the ground potential connected to the terminating guiding part 162 through the first guiding line 163 and the second guiding line 164 to achieve electrostatic discharge.

[0223] It is worth noting that the process and principle of the manufacturing method can be referred to the aforementioned embodiments, and will not be repeated here.

[0224] In the description of this invention, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0225] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. For those skilled in the art, other variations or modifications can be made based on the above description. It is impossible to exhaustively list all the implementation methods here. All obvious variations or modifications derived from the technical solutions of the present invention are still within the protection scope of the present invention.

Claims

1. A display panel, characterized by, The display panel includes: A first substrate, the first substrate including a first region and a second region located on one side of the first region. A second substrate disposed opposite to a first substrate, wherein the orthographic projection of the second substrate onto the first substrate is located in the first region; The first area includes a display area. The second area includes: a cutting area, multiple test terminals, multiple grounding potentials, and a charge drainage structure. The second area also includes: a grounding wire connecting the multiple grounding potentials, and a connecting wire connecting each test terminal and the drive circuitry within the display area. The orthographic projection of the cut area onto the first substrate falls within the orthographic projection of the connecting line onto the first substrate. The charge guiding structure includes: A starting drainage portion, wherein the orthographic projection of the starting drainage portion onto the first substrate at least partially overlaps with the orthographic projection of the cutting area onto the first substrate; and The drain section is terminated and connected to any of the aforementioned grounding potentials or to the grounding wire; The first region includes a first boundary on the side furthest from the second region, and The second boundary at the overlapping position of the first region and the second region, the second boundary being parallel to the first boundary. The grounding potential includes: A first electrode located near the first boundary and arranged along a first direction parallel to the first boundary; and The second electrode is located near the second boundary and is arranged along the first direction. The first electrode and the second electrode are connected to the same potential through the grounding wire.

2. The display panel according to claim 1, characterized in that, The test terminal is located on the side closer to the first boundary. The charge guiding structure further includes: A first drainage line, close to the initial drainage portion; and The second drainage line is located near the termination drainage section. The first drainage line and the second drainage line are connected. The orthographic projection of the first drain line onto the first substrate overlaps with the orthographic projection of the boundary of the cutting area on the side away from the test terminal area, while the orthographic projection of the second drain line onto the first substrate does not overlap with the orthographic projection of the cutting area onto the first substrate.

3. The display panel according to claim 1, characterized in that, The distance between the starting drainage section and the boundary of the test terminal near the color filter substrate is designed as a first distance, and the distance between the boundary of the cutting area near the color filter substrate and the boundary of the test terminal near the color filter substrate is designed as a second distance, the second distance being greater than the first distance.

4. The display panel according to claim 2, characterized in that, The end of the first drainage line is the starting drainage portion. There are multiple first drainage lines. In a second direction perpendicular to the first direction, each first drainage line is the orthogonal projection of the orthogonal projection of the connecting line of the orthogonal projection covering the first substrate.

5. The display panel according to claim 2, characterized in that, The end of the first drain line is the starting drain portion. The orthographic projection of the first drain line onto the first substrate is a patterned graphic and extends along the first direction, covering multiple connecting lines arranged along the first direction.

6. The display panel according to claim 2, characterized in that, The dividing line is the extension line along the first direction where the connection point of the first drainage line and the second drainage line is located. When the cutting area and the second guide line are located on the same side, the orthographic projection of the cutting area onto the first substrate is a patterned graphic, and the cutting length of the cutting area is less than the extension length of the trace area. When the cutting area and the second drainage line are located on opposite sides, the cutting length of the cutting area is less than or equal to the extension length of the wiring area.

7. The display panel of claim 1, wherein, The test terminals include: The first test metal layer is located on the substrate; At least one first insulating layer located on the side of the first test metal layer away from the substrate; and The second test metal layer is located on the side of the first insulating layer away from the first test metal layer. The first insulating layer has a first via, and the first test metal layer and the second test metal layer are electrically connected through the first via.

8. The display panel of claim 7, wherein, The connecting line includes: The first interconnect metal layer located on the substrate; and A second connecting wire metal layer that is insulated from the first connecting wire metal layer; The first insulating layer includes: The first sub-insulating layer located on the side of the first interconnect metal layer away from the substrate; and A second sub-insulating layer is located on the side of the second connecting line metal layer away from the substrate, and a second via is formed in the first sub-insulating layer; The connecting line includes at least one of the first connecting line metal layer or the second connecting line metal layer, or the first connecting line metal layer and the second connecting line metal layer are electrically connected through the second via. The first connecting line metal layer is connected to the first test metal layer or the second test metal layer, and / or the second connecting line metal layer is connected to the first test metal layer or the second test metal layer.

9. The display panel according to claim 8, characterized in that, The grounding potential includes: The first grounded metal layer is located on the substrate; The second grounded metal layer is located on the side of the second sub-insulating layer away from the substrate. A third via is formed in the first sub-insulating layer and the second sub-insulating layer. The first grounding metal layer and the second grounding metal layer are electrically connected through the third via, and are connected to a grounding signal; At the location where the ground potential and the connection line overlap in the orthographic projection of the first substrate, the metal layer of the connection line is insulated from the metal layer of the ground potential.

10. The display panel according to claim 9, characterized in that, The charge-guiding structure includes a charge-guiding conductive layer located on the side of the metal layer of the interconnect away from the substrate, and the charge-guiding conductive layer is insulated from the metal layer of the interconnect. The conductive layer corresponding to the starting drainage section and the metal layer of the test terminal have a first distance on the plane; The conductive layer corresponding to the termination drainage section is connected to the first grounding metal layer or the second grounding metal layer.

11. The display panel according to claim 10, characterized in that, The first test metal layer, the first connecting wire metal layer, and the first grounding metal layer are disposed on the same layer; The second test metal layer, the second ground metal layer, and the current-guiding conductive layer are disposed in the same layer.

12. A method for manufacturing a display panel according to any one of claims 1 to 11, characterized in that, The method includes: The first substrate is formed on a substrate, the first substrate including a first region and a second region located on one side of the first region, the first region including a display region; The first substrate and the second substrate are aligned, wherein the orthographic projection of the second substrate onto the first substrate is located in the first region; Forming the first substrate on the substrate includes: Multiple test terminals, multiple grounding potentials, and charge drainage lines are formed in the second area; A grounding wire connecting the plurality of grounding potentials is formed in the second region, as well as a connecting wire connecting each test terminal and the driving circuit in the display area, wherein the orthographic projection of the cut area onto the first substrate falls within the orthographic projection of the connecting wire onto the first substrate. The charge-guiding structure is formed in the second region, the charge-guiding structure comprising: a starting guide portion, the orthographic projection of the starting guide portion on the first substrate at least partially overlapping the orthographic projection of the cut region on the first substrate; and a terminating guide portion, connected to any of the grounding potentials or to a grounding wire; The first region includes a first boundary on the side furthest from the second region, and The second boundary at the overlapping position of the first region and the second region, the second boundary being parallel to the first boundary. The grounding potential includes: A first electrode located near the first boundary and arranged along a first direction parallel to the first boundary; and The second electrode is located near the second boundary and is arranged along the first direction. The first electrode and the second electrode are connected to the same potential through the grounding wire.

13. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 11.

14. A method for manufacturing a display device as described in claim 13, characterized in that, The method includes: The test signal is input to the display panel through the test terminal for electrical testing; Using the cutting area as the cutting position, the display panel that meets the detection results is cut. During the cutting process, the charge drainage structure forms a pathway.

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