Back contact cell and manufacturing method thereof, and photovoltaic module

Abstract

The present invention discloses a back-contact cell, a manufacturing method thereof, and a photovoltaic module, which relate to the field of solar cell technology, and improve the photoelectric conversion efficiency of the back-contact cell by providing a first hole structure on the surface of the second region. The back-contact cell comprises: a semiconductor substrate, a first doped semiconductor layer, and a second doped semiconductor layer. The semiconductor substrate has a first surface and a second surface relative to each other. Along a direction parallel to the second surface, the second surface has a first region and a second region alternately arranged. The surface structures of the first region and the second region are different, and the surface of the second region is provided with a first hole structure recessed into the semiconductor substrate. The first doped semiconductor layer is formed within or on the first region. The second doped semiconductor layer is formed within or on the second region. The conductivity type of the second doped semiconductor layer is opposite to the conductivity type of the first doped semiconductor layer. The manufacturing method of the back-contact cell is used to manufacture the back-contact cell.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and in particular to a back-contact cell and a manufacturing method thereof, and a photovoltaic module. Background Art

[0002] Back-contact cells are solar cells with both the emitter and metal contacts on the back of the cell, leaving the front unobstructed by metal electrodes. Compared to solar cells with obstructed fronts, back-contact cells offer higher short-circuit current and photoelectric conversion efficiency, and are currently one of the technological advancements in achieving high-efficiency crystalline silicon cells.

[0003] However, the semiconductor substrate included in the existing back-contact cell has a poor light absorption rate, which is not conducive to improving the photoelectric conversion efficiency of the back-contact cell. Summary of the Invention

[0004] The object of the present invention is to provide a back-contact cell and a manufacturing method thereof, and a photovoltaic module, so as to improve the photoelectric conversion efficiency of the back-contact cell by providing a first hole structure on the surface of the second region and recessed into the semiconductor substrate.

[0005] In order to achieve the above-mentioned objective, the present invention provides a back-contact battery, which includes: a semiconductor substrate, a first doped semiconductor layer and a second doped semiconductor layer.

[0006] The semiconductor substrate has a first surface and a second surface facing each other. The second surface has first and second regions arranged alternately in a direction parallel to the second surface. The first and second regions have different surface structures, and the surface of the second region is provided with a first hole structure recessed into the semiconductor substrate. The first doped semiconductor layer is formed within or on the first region. The second doped semiconductor layer is formed within or on the second region. The conductivity type of the second doped semiconductor layer is opposite to that of the first doped semiconductor layer.

[0007] When the above technical solution is adopted, the surface of the second region is provided with a first hole structure recessed into the semiconductor substrate. It can be understood that at least part of the inner surface of the holes distributed in the first hole structure is no longer parallel to the main surface of the second region (the main surface is the surface of the second region where the first hole structure is not provided). Based on this, in actual application, the incident angle of most light entering the semiconductor substrate from the first surface is less than 90°. In this case, part of the light after being transmitted to the inner surface of the second region can be reflected back into the semiconductor substrate at a corresponding angle through the inclined inner surface of the holes distributed in the first hole structure, which is beneficial for making this part of the light be reflected multiple times in the semiconductor substrate, thereby facilitating the increase of the transmission distance of the light in the semiconductor substrate, thereby increasing the absorption efficiency of the semiconductor substrate for this part of the light, and improving the photoelectric conversion efficiency of the back contact battery.

[0008] In addition, compared with the prior art in which the side of the second doped semiconductor layer opposite to the backlight side is a smooth polished surface, in the back-contact battery provided by the present invention, since the surface of the second region is provided with a first hole structure, the total surface area of the side of the second doped semiconductor layer opposite to the backlight side can be made equal to the sum of the hole surface area at the first hole structure and the main surface area of the second doped semiconductor layer where the first hole structure is not formed, thereby increasing the contact area between the second doped semiconductor layer and the surface passivation layer, and further improving the surface passivation effect of the surface passivation layer on the second doped semiconductor layer, thereby further improving the photoelectric conversion efficiency of the back-contact battery.

[0009] As a possible implementation manner, the cross-sectional area of the holes distributed in the first hole structure gradually increases in the direction from the first surface toward the second surface.

[0010] When the above technical solution is adopted, the bottom size of the holes distributed in the first hole structure is smaller than the opening size, which is conducive to the complete discharge of the etchant and reaction impurities used to etch and form the first hole structure from the holes with a larger opening after the first hole structure is formed, which is conducive to preventing the leakage and other problems caused by the above etchant and reaction impurities remaining in the first hole structure, thereby improving the electrical performance of the back contact battery. At the same time, it is also conducive to the subsequent film layer formed on the surface of the second region (for example, a second doped semiconductor layer or a surface passivation layer, etc.) to be completely filled into the holes included in the first hole structure, thereby improving the film formation quality of the film layer. In addition, the cross-sectional area of the holes distributed in the first hole structure gradually increases in the direction from the first surface to the second surface, and the angle between at least most of the inner surface of the above hole and the main surface of the second region is an obtuse angle, thereby increasing the probability that the light transmitted to the first hole structure can be reflected by the above hole and reflected multiple times in the semiconductor substrate, further improving the photoelectric conversion efficiency of the back contact battery.

[0011] As one possible implementation, the first hole structure includes a plurality of holes, wherein the holes distributed in the first hole structure are one or more of an inverted pyramid, an inverted hemispherical, or a terraced shape. In this case, the morphology of the holes distributed in the first hole structure has multiple possible implementation options, which helps reduce the difficulty of forming the first hole structure on the surface of the second region.

[0012] As a possible implementation, the holes distributed in the first hole structure are randomly positioned on the surface of the second region. In this case, it is not necessary to strictly control the accuracy of the mask pattern (e.g., hole pattern) provided on the mask layer (e.g., first tunneling material layer) used in the etching process to ensure that the holes distributed in the first hole structure are positioned at a fixed position on the surface of the second region, thereby reducing the manufacturing difficulty of the back-contact cell provided by the present invention.

[0013] As a possible implementation, the opening sizes of the holes distributed in the first hole structure are randomly set. The beneficial effects of this case can be analyzed with reference to the beneficial effects of randomly setting the positions of the holes distributed in the first hole structure described above, and will not be repeated here.

[0014] As a possible implementation, the number of holes distributed in the first hole structure is randomly set. The beneficial effects of this case can be referred to the beneficial effects of randomly setting the positions of holes distributed in the first hole structure described above, and will not be repeated here.

[0015] As a possible implementation, the second surface is a polished surface. The main surface of the first region is flush with the main surface of the second region. In this case, because polished surfaces have better reflective properties than velvet surfaces, when the second surface is a polished surface, the second surface can reflect at least part of the light reflected from the back of the semiconductor substrate back into the semiconductor substrate for reuse by the semiconductor substrate, further improving the photoelectric conversion efficiency of the back-contact cell. In addition, the second surface is a relatively flat polished surface, which can improve the density of the surface passivation layer formed on the first and second doped semiconductor layers, thereby improving the passivation effect of the surface passivation layer on the first and second doped semiconductor layers, further improving the photoelectric conversion efficiency of the back-contact cell. Furthermore, the flushness of the main surface of the first region with the main surface of the second region means that when the first hole structure is formed on the surface of the second region, the etchant will etch less of the portion of the semiconductor substrate located in the second region. This prevents the formation of the first hole structure from causing a significant reduction in the thickness of the semiconductor substrate in the second region, which can lead to insufficient light absorption depth, easy breakage, and hidden cracks, thereby improving the yield and photoelectric conversion efficiency of the back-contact cell.

[0016] As a possible implementation, when the first doped semiconductor layer is formed on the first region, the back contact cell further includes a first tunneling layer located on the first region. The first doped semiconductor layer is located on the first tunneling layer.

[0017] When adopting the above technical solution, the first tunneling layer allows majority carriers to tunnel into the first doped semiconductor layer while blocking minority carriers from passing through. As a result, majority carriers are transmitted through the first doped semiconductor layer and collected by corresponding electrodes, reducing the recombination rate of carriers of different conductivity types at the surface of the first region, achieving excellent selective collection of carriers, and further improving the photoelectric conversion efficiency of the back-contact battery.

[0018] As a possible implementation, when the second doped semiconductor layer is formed on the second region, the back-contact cell further includes a second tunneling layer located on the second region. The second doped semiconductor layer is located on the second tunneling layer. In this case, the beneficial effects of the second tunneling layer can be referenced to the beneficial effects of the first tunneling layer described above and will not be further elaborated here.

[0019] As a possible implementation, the second tunneling layer is doped with impurities, including one or more of carbon, phosphorus, boron, gallium, and nitrogen.

[0020] When using the above technical solution, carbon, as a Group IV element, can reduce dangling bonds in the second tunneling layer, ensuring that the second tunneling layer has a good passivation effect on the surface of the second region. Among the impurities mentioned above, phosphorus and nitrogen are Group V elements, and boron and gallium are Group III elements. Therefore, when the second tunneling layer is doped with phosphorus, boron, gallium, or nitrogen impurities, so that the conductivity type of the second tunneling layer is the same as that of the second doped semiconductor layer, it is beneficial for carriers to pass through the second tunneling layer and enter the second doped semiconductor layer, thereby reducing the tunneling resistance of the second tunneling layer.

[0021] As a possible implementation manner, the material of the second tunneling layer includes one or more of silicon oxide, silicon carbide, silicon nitride and aluminum oxide.

[0022] When the above technical solution is adopted, since silicon oxide, silicon carbide, silicon nitride and aluminum oxide not only have good tunneling passivation properties, but also have good hole filling properties, when the material of the second tunneling layer includes one or more of the above silicon oxide, silicon carbide, silicon nitride and aluminum oxide, the second tunneling layer can also be better filled in the holes distributed in the first hole structure, thereby making the second tunneling layer have good contact with the main surface of the second region and the first hole structure, thereby improving the passivation effect of the second tunneling layer on the second region.

[0023] As a possible implementation, the second tunneling layer is conformal to the surface structure of the second region. In this case, the conformal conformity of the second tunneling layer to the surface structure of the second region can prevent the presence of air gaps within the holes distributed in the first hole structure, which could affect the tunneling of carriers through the second tunneling layer, thereby improving the electrical performance of the back-contact battery. In addition, because the first hole structure is provided on the surface of the second region, the conformal conformity of the second tunneling layer to the surface structure of the second region can increase the contact area between the second tunneling layer and the second region, thereby increasing the conductive area of the second doped semiconductor layer formed on the second tunneling layer, thereby increasing the short-circuit current of the back-contact battery.

[0024] As a possible implementation manner, when the second tunneling layer is conformal to the surface structure of the second region, the second doped semiconductor layer is conformal to the second tunneling layer.

[0025] When using the above technical solution, because the first hole structure is provided on the surface of the second region, the contact area between the second doped semiconductor layer and the second region can be increased when the second tunneling layer conforms to the surface structure of the second region, and the second doped semiconductor layer conforms to the second tunneling layer. Because the interface resistance is inversely proportional to the contact area, increasing the contact area between the second doped semiconductor layer and the second region can reduce the interface resistance between the second region and the second doped semiconductor layer, thereby increasing the short-circuit current of the back-contact cell, which helps improve the photoelectric conversion efficiency of the back-contact cell provided by the present invention.

[0026] As a possible implementation, the diameter of the inscribed circle at the opening of the holes distributed in the first hole structure is 0.01 μm to 10 μm. In this case, while ensuring that the holes distributed in the first hole structure are microholes, the size range of the hole openings can be expanded, which helps to reduce the difficulty of forming the first hole structure on the surface of the second region.

[0027] As a possible implementation, the depth of the holes distributed in the first hole structure is 0.01 μm to 10 μm. In this case, while ensuring that the holes distributed in the first hole structure are microholes, the depth range of the holes can be expanded, which helps to reduce the difficulty of forming the first hole structure on the surface of the second region.

[0028] As a possible implementation, the second surface further comprises a third region between each first region and an adjacent second region, wherein a second hole structure recessed into the semiconductor substrate is provided on a surface of the third region.

[0029] In the case of the above technical solution, because the first doped semiconductor layer formed in or on the first region and the second doped semiconductor layer formed in or on the second region have opposite conductivity types, when the second surface further includes a third region between each of the first and second regions, the third region can laterally separate the adjacent first and second doped semiconductor layers, inhibiting recombination of carriers of different conductivity types at the lateral interface between the first and second doped semiconductor layers, thereby preventing leakage at the lateral interface. Furthermore, when a second hole structure recessed into the semiconductor substrate is provided on the surface of the third region, the air or a physical insulating material such as a surface passivation layer within the second hole structure can further inhibit recombination of carriers of different conductivity types at the lateral interface between the first and second doped semiconductor layers, further facilitating improved photoelectric conversion efficiency of the back-contact cell. Furthermore, the formation of the second hole structure on the third region indicates that, after patterning the first doped semiconductor material layer used to form the first doped semiconductor layer, the portion of the first doped semiconductor material layer located on the third region has been completely removed, preventing impurities remaining in the third region from causing leakage through the first and second doped semiconductor layers. Furthermore, the holes distributed within the second hole structure are also microholes. Consequently, when the second hole structure is formed on the surface of the third region, the etchant etches less of the portion of the semiconductor substrate located in the third region. This prevents the formation of the second hole structure from significantly thinning the semiconductor substrate in the third region, which could lead to insufficient light absorption depth, breakage, and hidden cracks. This improves the yield and photoelectric conversion efficiency of back-contact cells.

[0030] As a possible implementation, the average size of the holes distributed in the second hole structure is larger than the average size of the holes distributed in the first hole structure. In this case, the filling range of a physical insulating material such as air or a surface passivation layer within the second hole structure within the third region will also increase as the size of the holes distributed in the second hole structure increases. This will further help prevent recombination of carriers of different conductivity types in the third region, further reducing the risk of leakage at the lateral interface between the first and second doped semiconductor layers, and improving the photoelectric conversion efficiency of the back-contact cell.

[0031] As a possible implementation, the above-mentioned back-contact battery further includes a surface passivation layer, and the surface passivation layer at least covers the first doped semiconductor layer and the second doped semiconductor layer.

[0032] When the above-mentioned technical solution is adopted, the surface passivation layer can passivate at least the side of the first doped semiconductor layer and the second doped semiconductor layer facing away from the semiconductor substrate, thereby reducing the carrier recombination rate on the side of the first doped semiconductor layer and the second doped semiconductor layer facing away from the semiconductor substrate, and further improving the photoelectric conversion efficiency of the back contact battery.

[0033] As a possible implementation, when the second doped semiconductor layer is formed in the second region, the back-contact cell further includes a first electrode in ohmic contact with the second doped semiconductor layer. The first electrode is a doping source for the second doped semiconductor layer, and the material of the first electrode includes the doping element in the second doped semiconductor layer.

[0034] When using the above technical solution, because the material of the first electrode includes the doping element doped into the second doped semiconductor layer, during the actual manufacturing process of the back-contact battery provided by the present invention, the first electrode can be used as a doping source to form the second doped semiconductor layer only within a certain range where the second region contacts the first electrode, thereby preventing leakage caused by contact between the second doped semiconductor layer and the first doped semiconductor layer. Furthermore, the step of forming a mask layer to form the second doped semiconductor layer only in the second region can be omitted, simplifying the manufacturing process of the back-contact battery.

[0035] In a second aspect, the present invention further provides a method for manufacturing a back-contact battery, the method comprising:

[0036] A semiconductor substrate is provided, wherein the semiconductor substrate has a first surface and a second surface opposite to each other. Along a direction parallel to the second surface, the second surface has first regions and second regions alternately arranged.

[0037] A first tunneling material layer is formed at least on the second region, and a first doped semiconductor layer is formed in or on the first region.

[0038] At least the portion of the first tunneling material layer located on the second region is wet chemically treated to remove at least the portion of the first tunneling material layer located on the second region, so that the surface structures of the first region and the second region of the semiconductor substrate are different, and a first hole structure recessed into the semiconductor substrate is formed on the surface of the second region.

[0039] A second doped semiconductor layer is formed in or on the second region. The conductivity type of the second doped semiconductor layer is opposite to the conductivity type of the first doped semiconductor layer.

[0040] With the above-described technical solution, after forming the first tunneling material layer and the first doped semiconductor layer, the remaining portion of the first tunneling material layer, except for that located in the first region, is exposed. Furthermore, the exposed portion of the first tunneling material layer is not removed before the wet chemical treatment. Therefore, during the wet chemical treatment, the solution used in the wet chemical treatment can corrode the exposed portion of the first tunneling material layer, randomly forming holes within the exposed portion of the first tunneling material layer. In this case, the exposed portion of the first tunneling material layer can act like a mask, allowing the solution used in the wet chemical treatment to pass through the holes and etch the portion of the semiconductor substrate located in the second region, forming the first hole structure. The first tunneling material layer is compatible with conventional back-contact cell manufacturing processes, thereby reducing the difficulty of forming the first hole structure. Furthermore, there is no need to form a hole mask pattern within the first tunneling material layer through additional methods such as photolithography or laser etching, thus eliminating the need for mask pattern formation and simplifying the back-contact cell manufacturing process. In addition, the first tunneling material layer is thin and easy to remove, which is beneficial for the subsequent formation of the second doped semiconductor layer in or on the second region. In addition, the beneficial effects of the first hole structure formed on the surface of the second region can be referred to above and will not be repeated here.

[0041] As a possible implementation method, after forming a first tunneling material layer at least on the second area, and before performing wet chemical treatment on at least the portion of the first tunneling material layer located on the second area, the manufacturing method of the back contact battery also includes: performing heat treatment on at least the first tunneling material layer to form holes in the first tunneling material layer.

[0042] When the above technical solution is adopted, holes are formed in the first tunnel material layer by heat treatment before the wet chemical treatment. Based on this, during the wet chemical treatment, the exposed portion of the first tunnel material layer not only has holes formed therein by the solution of the wet chemical treatment, but also has holes formed by the heat treatment, so that the exposed portion of the first tunnel material layer can have a larger number of holes and / or a larger cross-sectional area, which is beneficial for increasing the number of holes distributed in the first hole structure formed under the masking effect of the exposed portion of the first tunnel material layer and / or increasing the cross-sectional area. Accordingly, the passivation effect of the surface passivation layer on the second region mentioned above can be further improved, and the interface resistance between the second region and the second doped semiconductor layer mentioned above can be further reduced, thereby further improving the photoelectric conversion efficiency of the back contact battery.

[0043] As a possible implementation manner, when the first doped semiconductor layer is formed on the first region, the forming of the first tunneling material layer at least on the second region and the forming of the first doped semiconductor layer on the first region include:

[0044] A first tunneling material layer and a first doped semiconductor material layer covering the second surface of the semiconductor substrate are formed in sequence.

[0045] The first doped semiconductor material layer is patterned to retain only a portion of the first doped semiconductor material layer located above the first region, thereby obtaining a first doped semiconductor layer.

[0046] After at least the portion of the first tunneling material layer located on the second region is removed, the first tunneling material layer forms a first tunneling layer.

[0047] As a possible implementation manner, the temperature of the wet chemical treatment is 50°C to 80°C.

[0048] When the above technical solution is adopted, the temperature of the wet chemical treatment affects the rate of the wet chemical treatment. Specifically, the higher the temperature of the wet chemical treatment, the greater the rate of the wet chemical treatment. On the contrary, the lower the temperature of the wet chemical treatment, the smaller the rate of the wet chemical treatment. Based on this, when the temperature of the wet chemical treatment is 50°C to 80°C, the temperature of the wet chemical treatment is moderate, which can prevent the first pore structure that meets the requirements of the preset scheme from being formed on the surface of the second area within a certain treatment time due to the low temperature of the wet chemical treatment. At the same time, it can also prevent the generation of excessive bubbles in the second area due to the high temperature of the wet chemical treatment causing the rate of the wet chemical treatment to accelerate and affect the effect of the wet chemical treatment, thereby ensuring that the morphology of the first pore structure formed on the surface of the second area after the wet chemical treatment meets the requirements of the preset scheme.

[0049] As a possible implementation, the cleaning solution for wet chemical treatment of at least the second region includes an acidic cleaning solution or an alkaline cleaning solution. The acidic cleaning solution includes one or more of HF solution, HNO3 solution, and H2SO4 solution. The alkaline cleaning solution includes one or more of KOH solution, NaOH solution, and tetramethylammonium hydroxide solution.

[0050] As a possible implementation, the cleaning solution for performing the wet chemical treatment on at least the second region further includes a polishing additive, wherein the volume ratio of the polishing additive is 1% to 3%.

[0051] As one possible implementation, the polishing additive includes a degassing agent, an oxidizing agent, and water. The degassing agent includes polysorbate. The oxidizing agent includes cetyltrimethylammonium oxide. In this case, the degassing agent can destabilize microbubbles generated in the cleaning solution during the wet chemical treatment process, preventing excessive bubbles from affecting the wet chemical treatment. The oxidizing agent can also increase the wet chemical treatment rate to a certain extent, which is beneficial for improving the mass production of back-contact cells.

[0052] As a possible implementation method, when the second doped semiconductor layer is formed on the second region, after the above-mentioned removal of at least the portion of the first tunneling material layer located on the second region, and before forming the second doped semiconductor layer on the second region, the manufacturing method of the back contact battery also includes: forming a second tunneling material layer covering at least the second region and the first doped semiconductor layer.

[0053] As a possible implementation, a second tunneling material layer is formed on the second region to conform to the surface structure of the second region. The beneficial effects of this case can be referred to the analysis of the beneficial effects of the second tunneling layer conforming to the surface structure of the second region above, and will not be repeated here.

[0054] As a possible implementation, the second doped semiconductor layer and the second tunneling material layer are conformally formed on the second region. The beneficial effects of this case can be referred to the analysis of the beneficial effects of the second doped semiconductor layer and the second tunneling layer conformally above, and will not be repeated here.

[0055] As a possible implementation method, after forming a second doped semiconductor layer on the second region, the manufacturing method of the back contact battery also includes: removing at least the portion of the second tunneling material layer covering the first doped semiconductor layer, and retaining only the portion of the second tunneling material layer located on the second region to form a second tunneling layer.

[0056] As a possible implementation manner, after forming the second doped semiconductor layer in or on the second region, the method for manufacturing a back contact battery further includes: forming a surface passivation layer covering at least the first doped semiconductor layer and the second doped semiconductor layer.

[0057] As a possible implementation manner, when the second doped semiconductor layer is formed in the second region,

[0058] After removing at least the portion of the first tunneling material layer located on the second region and before forming the second doped semiconductor layer in the second region, the method for manufacturing a back contact cell further includes:

[0059] A surface passivation layer is formed to cover at least the first doped semiconductor layer and the second region.

[0060] A first electrode is formed penetrating the surface passivation layer, wherein the bottom of the first electrode contacts the second region.

[0061] The second doped semiconductor layer is formed in the second region by using the first electrode as a doping source to form the second doped semiconductor layer in the second region.

[0062] In a third aspect, the present invention further provides a photovoltaic module, which includes the back-contact cell provided by the first aspect and various implementations thereof.

[0063] The beneficial effects of the third aspect of the present invention and its various implementations can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0065] Figure 1 is a schematic longitudinal cross-sectional view of a first structure of a semiconductor substrate before forming a first tunneling material layer in an embodiment of the present invention;

[0066] Figure 2 is a schematic longitudinal cross-sectional view of a second structure of a semiconductor substrate before forming a first tunneling material layer in an embodiment of the present invention;

[0067] Figure 3 Parts (1) and (2) are schematic diagrams of the distribution of various regions on the second surface of the semiconductor substrate before forming the first tunneling material layer in an embodiment of the present invention;

[0068] Figure 4 It is a schematic longitudinal cross-sectional view of the structure after forming a first tunneling material layer and a first doped semiconductor material layer covering the second surface in an embodiment of the present invention;

[0069] Figure 5 is a schematic longitudinal cross-sectional view of the structure after the first doped semiconductor layer is formed in an embodiment of the present invention;

[0070] Figure 6 is a schematic longitudinal cross-sectional view of the structure after the first hole structure is formed in an embodiment of the present invention;

[0071] Figure 7 This is an enlarged schematic diagram of the first structure in the second area after the first hole structure is formed in an embodiment of the present invention;

[0072] Figure 8 This is an enlarged schematic diagram of a second structure at the second region after the first hole structure is formed in an embodiment of the present invention;

[0073] Figure 9 This is an enlarged schematic diagram of a third structure at the second region after the first hole structure is formed in an embodiment of the present invention;

[0074] Figure 10 An enlarged schematic diagram of a fourth structure at the second region after the first hole structure is formed in an embodiment of the present invention;

[0075] Figure 11is a schematic longitudinal cross-sectional view of the structure after the first tunneling layer is formed in an embodiment of the present invention;

[0076] Figure 12 It is a schematic longitudinal cross-sectional view of the structure after the second tunneling material layer and the second doped semiconductor layer are sequentially formed in an embodiment of the present invention;

[0077] Figure 13 This is an enlarged schematic diagram of the structure in the second region after the second doped semiconductor layer is formed, in a case where the opening size and depth of the bottom of the holes distributed in the first hole structure are large in an embodiment of the present invention;

[0078] Figure 14 is a schematic longitudinal cross-sectional view of the first structure after forming the second doped semiconductor layer in an embodiment of the present invention;

[0079] Figure 15 is an enlarged schematic diagram of the structure in the third region after a second hole structure is formed on the surface of the third region in an embodiment of the present invention;

[0080] Figure 16 is a schematic longitudinal cross-sectional view of the structure after the second tunneling layer is formed in an embodiment of the present invention;

[0081] Figure 17 is a schematic longitudinal cross-sectional view of a first structure after forming a surface passivation layer in an embodiment of the present invention;

[0082] Figure 18 It is a longitudinal cross-sectional schematic diagram of a first structure after forming the first electrode and the second electrode in an embodiment of the present invention;

[0083] Figure 19 is a schematic longitudinal cross-sectional view of a second structure after forming a second doped semiconductor layer in an embodiment of the present invention;

[0084] Figure 20 is a schematic longitudinal cross-sectional view of a second structure after forming a surface passivation layer in an embodiment of the present invention;

[0085] Figure 21 It is a longitudinal cross-sectional schematic diagram of a second structure after forming the first electrode and the second electrode in an embodiment of the present invention;

[0086] Figure 22 is a schematic longitudinal cross-sectional view of a third structure after forming a surface passivation layer in an embodiment of the present invention;

[0087] Figure 23 is a schematic longitudinal cross-sectional view of a third structure after forming the first electrode and the second electrode in an embodiment of the present invention;

[0088] Figure 24 This is a schematic longitudinal cross-sectional view of a third structure after the second doped semiconductor layer in an embodiment of the present invention;

[0089] Figure 25 A flow chart of a method for manufacturing a back-contact battery provided in an embodiment of the present invention.

[0090] Figure numerals: 11 is a semiconductor substrate, 111 is a first surface, 112 is a second surface, 12 is a first region, 13 is a second region, 14 is a third region, 15 is a first hole structure, 16 is a first doped semiconductor material layer, 161 is a first doped semiconductor layer, 17 is a second doped semiconductor material layer, 171 is a second doped semiconductor layer, 18 is a first tunneling material layer, 181 is a first tunneling layer, 19 is a second tunneling material layer, 191 is a second tunneling layer, 20 is a hole, 21 is a second hole structure, 22 is a surface passivation layer, 23 is a first electrode, and 24 is a second electrode. DETAILED DESCRIPTION

[0091] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely illustrative and are not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.

[0092] The accompanying drawings illustrate various schematic diagrams of structures according to embodiments of the present disclosure. These figures are not drawn to scale, and for the purpose of clarity, certain details are exaggerated and certain details may be omitted. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Those skilled in the art may design regions / layers with different shapes, sizes, and relative positions as needed.

[0093] In the context of this disclosure, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intervening layer / element between them. Furthermore, if a layer / element is "on" another layer / element in one orientation, it may be "below" the other layer / element when the orientation is reversed. To further clarify the technical problems, technical solutions, and beneficial effects to be solved by the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are intended solely to explain the present invention and are not intended to limit the present invention.

[0094] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined. "Several" means one or more, unless otherwise specifically defined.

[0095] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed, detachable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediate medium; and may encompass internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0096] Solar cells are increasingly being used as a new energy alternative. Photovoltaic solar cells are devices that convert sunlight into electricity. Specifically, they use the principle of photovoltaics to generate charge carriers, which are then extracted using electrodes, facilitating efficient use of the electrical energy.

[0097] When the positive and negative electrodes included in the solar cell are both located on the back of the solar cell, the solar cell is a back contact cell. Existing back contact cells include metal wrap through (MWT) cells and interdigitated back contact (IBC) cells. Among them, the biggest feature of the IBC cell is that the emitter and metal contact are both on the back of the cell, and there is no metal electrode blocking the front, so it has a higher short-circuit current Isc. At the same time, the back of the IBC cell can allow wider metal grid lines to reduce the series resistance Rs, thereby improving the fill factor FF. Moreover, this type of cell with no obstruction on the front not only has a high conversion efficiency, but also looks more beautiful. At the same time, full back electrode components are easier to assemble, so IBC cells are one of the current technical directions for achieving high-efficiency crystalline silicon cells.

[0098] Specifically, the above-mentioned IBC cell typically includes a semiconductor substrate, a first doped semiconductor layer, and a second doped semiconductor layer. The first doped semiconductor layer and the second doped semiconductor layer are alternately formed on the same side of the semiconductor substrate along a direction parallel to the surface of the semiconductor substrate. Furthermore, the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. In this case, to increase the semiconductor substrate's light absorptivity, the side of the semiconductor substrate in existing IBC cells on which the first doped semiconductor layer and the second doped semiconductor layer are formed is typically a flat, polished surface without any surface microstructures. This smooth polished surface reflects at least some of the light reaching the back of the semiconductor substrate back into the semiconductor substrate, thereby achieving light recycling.

[0099] However, on the one hand, the light reflected back into the semiconductor substrate by the back surface of the semiconductor substrate has a transmission distance within the semiconductor substrate that is only approximately twice the thickness of the semiconductor substrate. In other words, the transmission distance of light within the semiconductor substrate is short, resulting in low light absorption efficiency of the semiconductor substrate, which is not conducive to improving the photoelectric conversion efficiency of the back-contact cell. On the other hand, in order to reduce the carrier recombination rate on the backlight side of the IBC cell, a surface passivation layer is usually formed covering the first doped semiconductor layer and the second doped semiconductor layer. Based on this, when the side of the semiconductor substrate on which the first doped semiconductor layer and the second doped semiconductor layer are formed is the smooth polished surface, the surface of the first doped semiconductor layer and the second doped semiconductor layer facing away from the semiconductor substrate is also a smooth polished surface, thereby making the contact area between the surface passivation layer and the first doped semiconductor layer or the second doped semiconductor layer, respectively, only equal to the cross-sectional area of the doped semiconductor layer, resulting in a small surface area after the surface passivation treatment, which is not conducive to improving the photoelectric conversion efficiency of the IBC cell.

[0100] like Figure 18 、 Figure 21 and Figure 24 As shown, an embodiment of the present invention provides a back-contact battery, which includes: a semiconductor substrate 11 , a first doped semiconductor layer 161 and a second doped semiconductor layer 171 .

[0101] like Figure 18 、 Figure 21 and Figure 24As shown, the semiconductor substrate 11 has a first surface and a second surface that oppose each other. Along a direction parallel to the second surface, the second surface has alternating first regions 12 and second regions 13. The surface structures of the first regions 12 and the second regions 13 are different, and the surface of the second region 13 is provided with a first hole structure 15 that is recessed into the semiconductor substrate. The first doped semiconductor layer 161 is formed within or on the first region 12. The second doped semiconductor layer 171 is formed within or on the second region 13. The conductivity type of the second doped semiconductor layer 171 is opposite to that of the first doped semiconductor layer 161.

[0102] Specifically, in terms of material, the semiconductor substrate can be a substrate made of semiconductor materials such as a silicon substrate, a germanium silicon substrate or a germanium substrate. In terms of conductivity type, the semiconductor substrate can be an N-type semiconductor substrate or a P-type semiconductor substrate. In addition, the first surface of the semiconductor substrate corresponds to the light-receiving surface of the back-contact battery. The second surface of the semiconductor substrate corresponds to the backlight surface of the back-contact battery. Based on this, in terms of structure, the first surface of the semiconductor substrate can be a polished surface, that is, a relatively flat surface. Or, as Figure 18 、 Figure 21 and Figure 24 As shown, the first surface of the semiconductor substrate 11 may also have a textured structure with a morphology such as a regular pyramid. In this case, the textured structure has a light-trapping effect. Therefore, when the first surface of the semiconductor substrate 11 has a textured structure, more light can be refracted into the semiconductor substrate 11, thereby improving the photoelectric conversion efficiency of the back-contact cell.

[0103] As for the second surface of the semiconductor substrate, it can be the surface of an untreated semiconductor substrate. Alternatively, it can be a polished surface that has been polished. Among them, because the polished surface has better reflective properties than the velvet surface, when the second surface is a polished surface, the second surface can reflect at least part of the light reflected to the back of the semiconductor substrate back into the semiconductor substrate, so that it can be reused by the semiconductor substrate, further improving the photoelectric conversion efficiency of the back contact battery. In addition, the second surface is a relatively flat polished surface, which can improve the density of the surface passivation layer formed on the first doped semiconductor layer and the second doped semiconductor layer, thereby improving the passivation effect of the surface passivation layer on the first doped semiconductor layer and the second doped semiconductor layer, further improving the photoelectric conversion efficiency of the back contact battery.

[0104] In addition, if Figure 21 and Figure 24As shown, the second surface of the semiconductor substrate 11 may only have alternating first regions 12 and second regions 13. It should be understood that the boundary between the first region 12 and the second region 13 is a virtual boundary. In addition, since the first doped semiconductor layer 161 is formed in or on the first region 12, the position, quantity, and specifications of the first region 12 on the semiconductor substrate 11 affect the position, quantity, and specifications of the first doped semiconductor layer 161 formed subsequently. Correspondingly, since the second doped semiconductor layer 171 is formed in or on the second region 13, the position, quantity, and specifications of the second region 13 on the semiconductor substrate 11 affect the position, quantity, and specifications of the second doped semiconductor layer 171 formed subsequently. Based on this, the specific position, quantity, and specifications of the first region 12 and the second region 13 on the semiconductor substrate 11 can be set according to the requirements of the position and other information of the first doped semiconductor layer 161 and the second doped semiconductor layer 171 in the actual application scenario, and are not specifically limited here.

[0105] For the first hole structure that is set on the surface of the second region and is recessed into the semiconductor substrate, the number of holes distributed in the first hole structure can be set according to actual needs. Figures 7 to 10 As shown, a plurality of holes may be distributed in the first hole structure 15. In practical applications, as shown in FIG. Figure 18 、 Figure 21 and Figure 24 As shown, the number of holes distributed in the above-mentioned first hole structure 15 can be randomly set, so that there is no need to strictly control the number of holes included in the hole pattern set on the first tunneling material layer used in the etching process in order to ensure that a fixed number of holes are formed on the surface of the second area 13, thereby reducing the manufacturing difficulty of the back contact battery provided by the embodiment of the present invention.

[0106] In addition, in actual application scenarios, the etching liquid that etches to form the first hole structure has a higher etching rate or a longer etching time on the surface of the second area, which is beneficial to increasing the size of the holes distributed in the first hole structure. On the contrary, if the etching rate of the above-mentioned etching liquid on the surface of the second area is lower or the etching time is shorter, it is beneficial to reduce the size of the holes distributed in the first hole structure. Based on this, the specific size of each hole distributed in the first hole structure can be determined according to the etching rate and etching time of the etching liquid on the surface of the second area in actual application scenarios, as long as the hole is a micro-hole located on the surface of the second area. In particular, when there are multiple holes distributed in the first hole structure, the sizes of different holes may be equal or unequal. In actual applications, such as Figure 18 、 Figure 21 and Figure 24As shown, the opening sizes of the holes distributed in the above-mentioned first hole structure 15 can be randomly set, so there is no need to strictly control the processing conditions to ensure that holes with fixed opening sizes are formed on the surface of the second area 13, thereby reducing the manufacturing difficulty of the back contact battery provided by the embodiment of the present invention.

[0107] Furthermore, the specific position of each hole distributed in the first hole structure on the surface of the second region can also be set according to the actual application scenario. In some cases, the holes distributed in the first hole structure are randomly positioned on the surface of the second region. In this case, it is not necessary to strictly control the accuracy of the hole pattern set in the first tunneling material layer during the etching process to ensure that the holes distributed in the first hole structure are positioned at a fixed position on the surface of the second region, thereby reducing the manufacturing difficulty of the back-contact battery provided by the embodiments of the present invention.

[0108] like Figure 18 、 Figure 21 and Figure 24 As shown, the difference in surface structure between the first region 12 and the second region 13 on the second surface means that the first region 12 lacks the first pore structure 15. Specifically, the surface of the first region 12 may be a velvet surface with a regular pyramidal velvet structure or a flat polished surface. The surface topography of the first region 12 can be customized based on practical needs, as long as it can be applied to the back-contact battery provided in the embodiments of the present invention.

[0109] In some cases, such as Figure 18 As shown, the second surface may further include a third region 14 between each first region 12 and the second region 13. In this case, because the first doped semiconductor layer 161 formed in or on the first region 12 and the second doped semiconductor layer 171 formed in or on the second region 13 have opposite conductivity types, when the second surface 112 further includes the third region 14 between each first region 12 and the second region 13, the third region 14 may separate the adjacent first doped semiconductor layers 161 and the second doped semiconductor layers 171, thereby suppressing the recombination of carriers of different conductivity types at the lateral interface between the first doped semiconductor layer 161 and the second doped semiconductor layer 171, thereby preventing leakage at the lateral interface between the two, and further improving the photoelectric conversion efficiency of the back contact cell.

[0110] The surface morphology of the third region can be configured based on the actual application scenario, as long as it can be applied to the back-contact battery provided by the embodiments of the present invention. Furthermore, when leakage does not occur at the lateral interface between the first and second doped semiconductor layers, or when leakage requirements between the first and second doped semiconductor layers are low in actual applications, the second surface may not include the third region.

[0111] For the first doped semiconductor layer and the second doped semiconductor layer, their specific formation positions, conductivity types and doping concentrations can be set according to actual needs, as long as they can be applied to the back contact battery provided by the embodiment of the present invention. Figure 18 As shown, the first doped semiconductor layer 161 may be formed on the first region 12, and the second doped semiconductor layer 171 may be formed on the second region 13. Alternatively, as shown in FIG. Figure 21 and Figure 24 As shown, the first doped semiconductor layer 161 can be formed on the first region 12, and the second doped semiconductor layer 171 can be formed in the second region 13. Alternatively, the first doped semiconductor layer can be formed in the first region, and the second doped semiconductor layer can be formed on the second region. Alternatively, the first doped semiconductor layer can be formed in the first region, and the second doped semiconductor layer can be formed in the second region.

[0112] Regarding the conductivity types of the first doped semiconductor layer and the second doped semiconductor layer, the first doped semiconductor layer can be an N-type semiconductor layer doped with N-type conductive particles such as phosphorus. In this case, the second doped semiconductor layer can be a P-type semiconductor layer doped with P-type conductive particles such as boron. Alternatively, the first doped semiconductor layer can be a P-type semiconductor layer. In this case, the second doped semiconductor layer can be an N-type semiconductor layer.

[0113] As for the doping concentrations of the first doped semiconductor layer and the second doped semiconductor layer, the doping concentrations of the two layers may be the same. Alternatively, the doping concentration of the first doped semiconductor layer may be less than the doping concentration of the second doped semiconductor layer. Alternatively, the doping concentration of the first doped semiconductor layer may be greater than the doping concentration of the second doped semiconductor layer.

[0114] Furthermore, when the first doped semiconductor layer is formed on the first region, the first doped semiconductor layer can be amorphous, microcrystalline, single crystal, polycrystalline, nanocrystalline, or the like in terms of its internal arrangement. In terms of the material, the first doped semiconductor layer can be made of semiconductor materials such as silicon, silicon germanium, germanium, doped silicon carbide, and gallium arsenide. In terms of passivation, the first doped semiconductor layer can be a hydrogenated doped layer. When the semiconductor substrate has only the first region and the second region, and the first doped semiconductor layer and the second doped semiconductor layer are formed on the first region and the second region, respectively, the first doped semiconductor layer and the second doped semiconductor layer intersect laterally. Therefore, the first doped semiconductor layer is preferably made of a semiconductor material with zero lateral conductivity, such as amorphous silicon. Alternatively, a material such as single crystal silicon or polycrystalline silicon can be used, and the lateral conductivity of the first doped semiconductor layer can be reduced by setting the thickness of the first doped semiconductor layer within an appropriate range, thereby suppressing carrier recombination at the lateral interface between the first doped semiconductor layer and the second doped semiconductor layer.

[0115] Furthermore, the thickness of the first doped semiconductor layer can be set according to the actual application scenario and is not specifically limited here. For example, the thickness of the first doped semiconductor layer can be 30 nm to 300 nm.

[0116] When the second doped semiconductor layer is formed on the second region, the material and thickness of the second doped semiconductor layer may refer to the material and thickness of the first doped semiconductor layer described above, and will not be repeated here.

[0117] Furthermore, the thicknesses of the first doped semiconductor layer and the second doped semiconductor layer can be set according to actual application scenarios and are not specifically limited here.

[0118] When the above technical solution is adopted, Figure 18 、 Figure 21 and Figure 24 As shown, the surface of the second region 13 is provided with a first hole structure 15 recessed into the semiconductor substrate. It is understandable that at least part of the inner surface of the holes distributed in the first hole structure 15 is no longer parallel to the main surface of the second region 13 (the main surface is the surface of the second region 13 that is not provided with the first hole structure 15). Based on this, in actual application, the incident angle of most light entering the semiconductor substrate 11 from the first surface is less than 90°. In this case, part of the light transmitted to the inner surface of the second region 13 can be reflected back into the semiconductor substrate 11 at a corresponding angle through the inclined inner surface of the holes distributed in the first hole structure 15, which is conducive to making this part of the light be reflected multiple times in the semiconductor substrate 11, thereby facilitating the increase of the transmission distance of the light in the semiconductor substrate 11, thereby increasing the absorption efficiency of the semiconductor substrate 11 for this part of the light, and improving the photoelectric conversion efficiency of the back contact cell.

[0119] In addition, if Figure 18 、 Figure 21 and Figure 24 As shown, compared with the prior art in which the side of the second doped semiconductor layer opposite to the backlight side is a smooth polished surface, in the back contact cell provided by the embodiment of the present invention, since the surface of the second region 13 is provided with a first hole structure 15, the total surface area of the side of the second doped semiconductor layer 171 opposite to the backlight side can be made equal to the sum of the hole surface area at the first hole structure 15 and the main surface area of the second doped semiconductor layer 171 where the first hole structure 15 is not formed, thereby increasing the contact area between the second doped semiconductor layer 171 and the surface passivation layer 22, and further improving the surface passivation effect of the surface passivation layer 22 on the second doped semiconductor layer 171, thereby further improving the photoelectric conversion efficiency of the back contact cell.

[0120] As a possible implementation, Figures 7 to 10As shown, the cross-sectional area of the holes distributed in the first hole structure 15 may gradually increase in the direction from the first surface to the second surface.

[0121] It should be understood that in this case, the cross-sectional area of the holes distributed in the first hole structure may gradually increase linearly, exponentially, logarithmically, etc. Specifically, along the direction from the first surface to the second surface, when the cross-sectional area of the holes distributed in the first hole structure gradually increases, the morphology of the holes distributed in the first hole structure may be determined based on the bottom morphology of the holes and the gradual growth method.

[0122] For example: Figure 7 As shown, when the bottoms of the holes distributed in the first hole structure 15 are point-shaped and gradually increase in a linear manner, the holes distributed in the first hole structure 15 may be inverted pyramid-shaped holes.

[0123] Another example: Figure 8 As shown, when the bottoms of the holes distributed in the first hole structure 15 are point-shaped and gradually increase in a parabolic manner, the holes distributed in the first hole structure 15 may be inverted hemispherical holes.

[0124] Another example: Figure 9 As shown, when the bottoms of the holes distributed in the first hole structure 15 are planar and gradually increase in a linear manner, the holes distributed in the first hole structure 15 may be terraced holes.

[0125] When the above technical solution is adopted, Figures 7 to 10 As shown, the bottom size of the holes distributed in the first hole structure 15 is smaller than the opening size. This facilitates the complete discharge of the etchant and reaction impurities used to etch and form the first hole structure 15 from the holes with larger openings after the first hole structure 15 is formed. This helps prevent leakage problems caused by the etchant and reaction impurities remaining in the first hole structure 15, thereby improving the electrical performance of the back-contact battery. At the same time, it also facilitates the subsequent film layer formed on the surface of the second region 13 (for example, the second doped semiconductor layer 171 or the surface passivation layer 22, etc.) to be completely filled into the holes included in the first hole structure 15, thereby improving the film formation quality of the film layer. In addition, the cross-sectional area of the holes distributed in the first hole structure 15 gradually increases in the direction from the first surface to the second surface. This can also make the angle between at least most of the inner surface of the holes and the main surface of the second region 13 an obtuse angle, thereby increasing the probability that light transmitted to the first hole structure 15 can be reflected by the holes and reflected multiple times in the semiconductor substrate 11, further improving the photoelectric conversion efficiency of the back-contact battery.

[0126] It should be noted that if Figures 7 to 10As shown, in the case where the first hole structure 15 includes a plurality of holes, the holes distributed in the first hole structure 15 can be one or more of an inverted pyramid hole, an inverted hemispherical hole, and a terraced hole. Figures 7 to 9 As shown, when a plurality of holes are distributed in the first hole structure 15, the holes distributed in the first hole structure 15 can all be inverted pyramid holes, inverted hemispherical holes or terraced holes. Figure 10 As shown, when multiple holes are distributed in the first hole structure 15, the holes distributed in the first hole structure 15 can be at least two of the following types: inverted pyramid holes, inverted hemispherical holes, and terraced holes. Thus, the morphology of the holes distributed in the first hole structure 15 can be realized in a variety of possible ways, which helps to reduce the difficulty of forming the first hole structure 15 on the surface of the second region 13.

[0127] As a possible implementation, Figure 18 、 Figure 21 and Figure 24 As shown, the second surface is a polished surface. The main surface of the first region 12 is flush with the main surface of the second region 13. The main surface of the first region 12 is the surface of the first region 12 facing away from the semiconductor substrate 11. The main surface of the second region 13 is the surface of the second region 13 facing away from the semiconductor substrate 11 and is where the first hole structure 15 is set. In this case, the main surface of the first region 12 is flush with the main surface of the second region 13, which means that when the first hole structure 15 is formed on the surface of the second region 13, the etchant etches less on the portion of the semiconductor substrate 11 located in the second region 13, thereby preventing the problem of insufficient light absorption depth, easy breakage and hidden cracks caused by a large reduction in the thickness of the semiconductor substrate 11 in the second region 13 due to the formation of the first hole structure 15, thereby improving the yield and photoelectric conversion efficiency of the back contact battery.

[0128] As a possible implementation, Figure 18 、 Figure 21 and Figure 24 As shown, when the first doped semiconductor layer 161 is formed on the first region 12, the back-contact cell further includes a first tunneling layer 181 located on the first region 12. The first doped semiconductor layer 161 is located on the first tunneling layer 181. In this case, the first tunneling layer 181 allows majority carriers to tunnel into the first doped semiconductor layer 161 while blocking minority carriers from passing through. As a result, majority carriers are transmitted through the first doped semiconductor layer 161 and collected by the corresponding electrodes, reducing the recombination rate of carriers of different conductivity types at the surface of the first region 12, achieving excellent selective carrier collection, and further improving the photoelectric conversion efficiency of the back-contact cell.

[0129] Specifically, the material and thickness of the first tunneling layer can be set according to actual needs and are not specifically limited here. For example, the material of the first tunneling layer can be silicon oxide, aluminum oxide, titanium oxide, hafnium dioxide, gallium oxide, tantalum pentoxide, niobium pentoxide, silicon nitride, silicon carbonitride, aluminum nitride, titanium nitride, titanium carbonitride, etc. The thickness of the first tunneling layer can be 0.5 nm to 5 nm.

[0130] As a possible implementation, Figure 18 As shown, when the second doped semiconductor layer 171 is formed on the second region 13, the back-contact cell further includes a second tunneling layer 191 located on the second region 13. The second doped semiconductor layer 171 is located on the second tunneling layer 191. In this case, the beneficial effects of the second tunneling layer 191 can be analyzed with reference to the beneficial effects of the first tunneling layer 181 described above and will not be repeated here.

[0131] Specifically, the material of the second tunneling layer can be set according to actual needs. Exemplarily, the material of the second tunneling layer may include one or more of silicon oxide, silicon carbide, silicon nitride and aluminum oxide. In this case, because the silicon oxide, silicon carbide, silicon nitride and aluminum oxide not only have good tunneling passivation properties, but also have good hole filling properties, when the material of the second tunneling layer includes one or more of the silicon oxide, silicon carbide, silicon nitride and aluminum oxide, the second tunneling layer can be better filled in the holes distributed in the first hole structure, thereby making the second tunneling layer have good contact with the main surface of the second region and the first hole structure, thereby improving the passivation effect of the second tunneling layer on the second region.

[0132] The thickness of the second tunneling layer can be set according to actual needs. For example, the thickness of the second tunneling layer can be 0.5 nm to 5 nm.

[0133] In one example, the second tunneling layer may be doped with impurities, including one or more of carbon, phosphorus, boron, gallium, and nitrogen.

[0134] Specifically, the doping concentration of the impurities in the second tunneling layer can be set according to actual needs and is not specifically limited here. For example, the doping concentration of the impurities in the second tunneling layer can be: 1E17 cm -3 to 1E21 cm -3 .

[0135] Among them, carbon, as a Group IV element, can reduce dangling bonds in the second tunneling layer, ensuring that the second tunneling layer has a good passivation effect on the surface of the second region. In addition to the carbon doping impurity, the conductivity type of the doping impurity in the second tunneling layer can be set according to the conductivity type of the second doped semiconductor layer. Among the above impurities, phosphorus and nitrogen are Group V elements, and boron and gallium are Group III elements. Therefore, when the second tunneling layer is doped with phosphorus, boron, gallium, or nitrogen impurities so that the conductivity type of the second tunneling layer is the same as that of the second doped semiconductor layer, it is beneficial for carriers to pass through the second tunneling layer and enter the second doped semiconductor layer, that is, the tunneling resistance of the second tunneling layer can be reduced.

[0136] It should be noted that when the second tunneling layer and the second doped semiconductor layer have the same conductivity type, the impurities doped in the second tunneling layer may only be impurities of the same conductivity type as the second doped semiconductor layer. For example, when the second doped semiconductor layer is an N-type semiconductor layer, the second tunneling layer may be doped with at least one of nitrogen and phosphorus. Alternatively, the second tunneling layer may also be doped with impurities of the opposite conductivity type to that of the second doped semiconductor layer. However, the doping concentration of the impurities of the opposite conductivity type is lower. For example, when the second doped semiconductor layer is a P-type semiconductor layer, the second tunneling layer is doped with at least one of boron or gallium, and is also doped with at least one of phosphorus or nitrogen, but the doping concentration of the P-type impurities in the second tunneling layer is greater than the doping concentration of the N-type impurities.

[0137] In one example, Figure 16 As shown, the second tunneling layer 191 conforms to the surface structure of the second region 13. In this case, the second tunneling layer 191 conforms to the surface structure of the second region 13. At this time, the second tunneling layer 191 fluctuates with the surface morphology of the second region 13, which can prevent the presence of air gaps within the holes distributed in the first hole structure 15, which would affect the passage of carriers through the second tunneling layer 191 via the tunneling effect, thereby improving the electrical performance of the back-contact battery. In addition, because the first hole structure 15 is provided on the surface of the second region 13, the contact area between the second tunneling layer 191 and the second region 13 can be increased when the second tunneling layer 191 conforms to the surface structure of the second region 13, which is beneficial for increasing the conductive area of the second doped semiconductor layer 171 formed on the second tunneling layer 191, thereby facilitating an increase in the short-circuit current of the back-contact battery.

[0138] As a possible implementation, Figure 18 As shown, when the second tunneling layer 191 is conformal to the surface structure of the second region 13 , the second doped semiconductor layer 171 is conformal to the second tunneling layer 191 .

[0139] When the above technical solution is adopted, Figure 18As shown, because the first hole structure 15 is provided on the surface of the second region 13, the contact area between the second doped semiconductor layer 171 and the second region 13 can be increased when the second tunneling layer 191 conforms to the surface structure of the second region 13, and the second doped semiconductor layer 171 conforms to the second tunneling layer 191. Since the interface resistance is inversely proportional to the contact area, when the contact area between the second doped semiconductor layer 171 and the second region 13 is increased, the interface resistance between the second region 13 and the second doped semiconductor layer 171 can be reduced, thereby increasing the short-circuit current of the back-contact cell and further improving the photoelectric conversion efficiency of the back-contact cell provided by the embodiment of the present invention.

[0140] As one possible implementation, the holes distributed in the first hole structure have openings flush with the back surface of the second region, the inscribed circle diameter of the openings is 0.01 μm to 10 μm, and the hole depth can be 0.01 μm to 10 μm. In this case, while ensuring that the holes distributed in the first hole structure are microholes, the size range of the holes can be expanded, which helps reduce the difficulty of forming the first hole structure on the surface of the second region.

[0141] Of course, the size of the holes distributed in the first hole structure can also be set to other appropriate values according to different actual application scenarios, and no specific limitation is made here.

[0142] As a possible implementation, Figure 18 As shown, in the case where the second surface 112 further includes a third region 14 between each first region 12 and the adjacent second region 13, the surface of the third region 14 may be provided with a second hole structure 21 recessed into the semiconductor substrate. In this case, as shown in FIG. Figure 18As shown, when the surface of the third region 14 is provided with a second hole structure 21 recessed into the semiconductor substrate, the air or physical insulating material such as the surface passivation layer 22 located within the second hole structure 21 can further inhibit the recombination of carriers of different conductivity types at the lateral interface between the first doped semiconductor layer 161 and the second doped semiconductor layer 171, thereby further improving the photoelectric conversion efficiency of the back-contact cell. Furthermore, the formation of the second hole structure 21 on the third region 14 indicates that, after patterning the first doped semiconductor material layer used to manufacture the first doped semiconductor layer 161, the portion of the first doped semiconductor material layer located on the third region 14 has been completely removed, preventing impurities from remaining in the third region 14 and causing leakage of electricity from the first doped semiconductor layer 161 and the second doped semiconductor layer 171 through the impurities. Furthermore, the holes distributed in the second hole structure 21 are also microholes. Based on this, when the second hole structure 21 is formed on the surface of the third region 14, the etchant etches less on the portion of the semiconductor substrate 11 located in the third region 14, thereby preventing the formation of the second hole structure 21 from causing the thickness of the semiconductor substrate 11 located in the third region 14 to be significantly thinned, resulting in insufficient light absorption depth, easy breakage and hidden cracks, and improving the yield and photoelectric conversion efficiency of the back contact battery.

[0143] The specific size, number, and position of each hole in the second hole structure on the surface of the third region can be set according to actual needs, as long as they can be applied to the back-contact battery provided by the embodiments of the present invention. For example, the size, number, and position of each hole in the second hole structure on the third region can be randomly set.

[0144] In one example, Figure 15 and Figure 18 As shown, the average size of the holes distributed in the second hole structure 21 can be larger than the average size of the holes distributed in the first hole structure 15. Specifically, the difference in the average sizes of the two can be set according to the actual application scenario and is not specifically limited here.

[0145] When the above technical solution is adopted, the filling range of physical insulating materials such as air or surface passivation layer located in the second hole structure in the third region will also increase as the average size of the holes distributed in the second hole structure increases, which is more conducive to preventing the recombination of carriers of different conductive types in the third region, further reducing the risk of leakage at the lateral interface between the first doped semiconductor layer and the second doped semiconductor layer, and improving the photoelectric conversion efficiency of the back contact battery.

[0146] As a possible implementation, Figure 18 、 Figure 21 and Figure 24As shown, the above-mentioned back-contact cell further includes a surface passivation layer 22, which covers at least the first doped semiconductor layer 161 and the second doped semiconductor layer 171. In this case, the surface passivation layer 22 can passivate at least the side of the first doped semiconductor layer 161 and the second doped semiconductor layer 171 facing away from the semiconductor substrate 11, thereby reducing the carrier recombination rate on the side of the first doped semiconductor layer 161 and the second doped semiconductor layer 171 facing away from the semiconductor substrate 11, further improving the photoelectric conversion efficiency of the back-contact cell.

[0147] Specifically, the material and thickness of the surface passivation layer can be set according to actual needs and are not specifically limited here. For example, the material of the surface passivation layer can be a passivation material such as aluminum oxide, silicon carbide, phosphorus oxide, etc. In addition, the surface passivation layer can also be a hydrogenated surface passivation layer to further enhance the passivation effect of the surface passivation layer. The thickness of the surface passivation layer can be 40nm to 100nm.

[0148] As a possible implementation, Figure 24 As shown, when the second doped semiconductor layer 171 is formed in the second region 13, the back contact cell further includes a first electrode 23 in ohmic contact with the second doped semiconductor layer 171. The first electrode 23 is a doping source for the second doped semiconductor layer 171, and the material of the first electrode 23 includes the doping element in the second doped semiconductor layer 171.

[0149] For example, if the doping element in the second doped semiconductor layer is antimony, the material of the first electrode includes antimony. For another example, if the doping element in the second doped semiconductor layer is aluminum, the material of the first electrode includes aluminum. For another example, if the doping element in the second doped semiconductor layer is gallium, the material of the first electrode includes gallium.

[0150] When using the above technical solution, because the material of the first electrode includes the doping element doped in the second doped semiconductor layer, during the actual manufacturing process of the back-contact battery provided by the embodiments of the present invention, the first electrode can be used as a doping source to form the second doped semiconductor layer only within a certain range where the second region contacts the first electrode, thereby preventing leakage caused by contact between the second doped semiconductor layer and the first doped semiconductor layer. Furthermore, the step of forming a mask layer to form the second doped semiconductor layer only in the second region can be omitted, simplifying the manufacturing process of the back-contact battery.

[0151] As another possible implementation, Figure 18 and Figure 21As shown, in addition to the case where the first electrode 23 is the doping source for the second doped semiconductor layer 171 as described above, the back-contact cell further includes a second electrode 24 and a first electrode 23 that are in ohmic contact with the first doped semiconductor layer 161 and the second doped semiconductor layer 171, respectively. The first electrode 23 and the second electrode 24 can be made of a conductive material such as silver, aluminum, copper, or nickel.

[0152] like Figure 25 As shown, the embodiment of the present invention also provides a method for manufacturing a back contact battery. Figures 1 to 24 The manufacturing process is described in detail with reference to the cross-sectional view of the operation shown. Specifically, the manufacturing method of the back contact battery includes:

[0153] First, if Figure 1 and Figure 2 As shown, a semiconductor substrate 11 is provided, and the semiconductor substrate 11 has a first surface 111 and a second surface 112 opposite to each other. Along a direction parallel to the second surface 112, the second surface 112 has first regions 12 and second regions 13 arranged alternately.

[0154] Specifically, information such as the surface morphology of the first surface and the second surface of the semiconductor substrate, and the surface morphology of the first region of the second surface of the semiconductor substrate can be referred to above, and will not be repeated here.

[0155] like Figure 5 As shown, a first tunneling material layer 18 is formed at least on the second region 13 , and a first doped semiconductor layer 161 is formed in or on the first region 12 .

[0156] Specifically, the formation range of the first tunneling material layer on the second surface can be set based on the region included in the second surface, the formation position of the first doped semiconductor layer in the first region, and the specific structure of the back-contact battery. The material and thickness of the first tunneling material layer can be set with reference to the material and thickness of the first tunneling layer described above, and will not be repeated here.

[0157] For example, when the second surface includes only the first region and the second region, and the first doped semiconductor layer is formed in the first region, the first tunneling material layer may be formed only on the second region.

[0158] For another example: when the second surface includes only a first region and a second region, a first doped semiconductor layer is formed on the first region, and the manufactured back contact battery has a tunneling passivation contact structure on the first region, a first tunneling material layer can be formed on the first region and the second region.

[0159] Another example: Figure 4As shown, when the second surface includes a first region 12, a second region 13 and a third region 14, a first doped semiconductor layer 161 is formed on the first region 12, and the manufactured back contact battery has a tunneling passivation contact structure on the first region 12, a first tunneling material layer 18 can be formed on the first region 12, the second region 13 and the third region 14.

[0160] Wherein, as a possible implementation manner, in the case where the first doped semiconductor layer is formed on the first region, the above-mentioned forming of the first tunneling material layer at least on the second region and forming the first doped semiconductor layer on the first region may include the following steps: Figure 4 As shown, a first tunneling material layer 18 and a first doped semiconductor material layer 16 are sequentially formed covering the second surface of the semiconductor substrate 11. Figure 5 As shown, the first doped semiconductor material layer is patterned, and only the portion of the first doped semiconductor material layer located above the first region 12 is retained to obtain a first doped semiconductor layer 161. Figure 11 As shown, after at least the portion of the first tunneling material layer located on the second region 13 is removed, the remaining portion of the first tunneling material layer forms the first tunneling layer 181 .

[0161] In actual application, Figure 4 As shown, a first tunneling material layer 18 entirely covering the second surface can be formed by thermal oxidation or chemical oxidation. Then, a first doped semiconductor layer 161 entirely covering the first tunneling material layer 18 can be formed by low pressure chemical vapor deposition or plasma chemical vapor deposition. Figure 5 As shown, the first doped semiconductor material layer can be patterned using laser etching, etching slurry, or wet chemical treatment under the masking action of the corresponding mask layer, leaving only the portion of the first doped semiconductor material layer located above the first region 12. The mask layer can be a photoresist mask layer, a silicon nitride mask layer, or a silicon oxide mask layer. The first doped semiconductor material layer is heat-treated to achieve crystallization of the first doped semiconductor material layer, while simultaneously forming pores in the first tunneling material layer 18. The pores have a structure similar to a sponge structure, which is randomly distributed microchannels that are connected or disconnected.

[0162] like Figure 11 As shown, wet chemical treatment or the like can be used to remove at least the portion of the first tunneling material layer located on the second region 13 (when the second surface also has a third region 14, the portion of the first tunneling material layer located on the third region 14 also needs to be removed), and then the first tunneling material layer forms a first tunneling layer 181, thereby forming a tunneling passivation contact structure on the first region 12.

[0163] It should be noted that when a tunneling passivation contact structure is formed on the first region, a wet chemical treatment method can be used to pattern the first doped semiconductor material layer and remove at least the portion of the first tunneling material layer located on the second region. In this way, part of the treatment liquid will follow the holes inside the first tunneling material layer to reach the surface of the semiconductor substrate for point etching, thereby forming a first hole structure in the second region of the semiconductor substrate. In this case, the same wet chemical treatment solution can be used to achieve the above-mentioned patterning treatment, the formation of the first hole structure, and the formation of the first tunneling layer. There is no need to transfer the back contact battery between different devices to perform the above three operations. While improving the manufacturing efficiency of the back contact battery, it can also prevent bumps and other phenomena during the transfer process, thereby improving the yield of the back contact battery.

[0164] Furthermore, when the first tunneling material layer is not formed on the first region, a first tunneling material layer can be formed entirely covering the second surface using a process such as chemical vapor deposition after forming the first doped semiconductor layer in the first region, or before forming the first doped semiconductor layer. The first tunneling material layer is then patterned to remove the portion of the first tunneling material layer formed on the first region, thereby obtaining the first tunneling layer.

[0165] like Figure 11 As shown, at least the portion of the first tunneling material layer located on the second region 13 is wet chemically treated to remove at least the portion of the first tunneling material layer located on the second region 13, and to make the surface structures of the first region 12 and the second region 13 of the semiconductor substrate 11 different, and a first hole structure 15 recessed into the semiconductor substrate is formed on the surface of the second region 13.

[0166] Specifically, the temperature, reaction time, and type of solution for the wet chemical treatment can be set according to actual application scenarios and are not specifically limited here.

[0167] Exemplarily, the temperature of the wet chemical treatment can be 50°C to 80°C. In this case, the temperature of the wet chemical treatment affects the rate of the wet chemical treatment. Specifically, the higher the temperature of the wet chemical treatment, the greater the rate of the wet chemical treatment. Conversely, the lower the temperature of the wet chemical treatment, the smaller the rate of the wet chemical treatment. Based on this, when the temperature of the wet chemical treatment is 50°C to 80°C, the temperature of the wet chemical treatment is moderate, which can prevent the first pore structure that meets the requirements of the preset scheme from being formed on the surface of the second area within a certain treatment time due to the low temperature of the wet chemical treatment. At the same time, it can also prevent the generation of excessive bubbles in the second area due to the high temperature of the wet chemical treatment, which accelerates the rate of the wet chemical treatment and affects the effect of the wet chemical treatment, thereby ensuring that the morphology of the first pore structure formed on the surface of the second area after the wet chemical treatment meets the requirements of the preset scheme.

[0168] For example, the cleaning solution for wet chemical treatment of at least the second region may be an acidic cleaning solution or an alkaline cleaning solution.

[0169] The acidic cleaning solution may include one or more of HF solution, HNO3 solution, and H2SO4 solution. For example, the acidic cleaning solution may be only HF solution, HNO3 solution, or H2SO4 solution. For another example, the acidic cleaning solution may be a mixture of any two of HF solution, HNO3 solution, and H2SO4 solution. For another example, the acidic cleaning solution may include a mixture of HF solution, HNO3 solution, and H2SO4 solution. Of course, the acidic cleaning solution may also include acidic cleaning solutions such as hydrobromic acid and hydroiodic acid.

[0170] The alkaline cleaning solution includes one or more of KOH solution, NaOH solution, and tetramethylammonium hydroxide solution. For example, the alkaline cleaning solution may be only KOH solution, NaOH solution, or tetramethylammonium hydroxide solution. For another example, the alkaline cleaning solution may be a mixture of any two of KOH solution, NaOH solution, and tetramethylammonium hydroxide solution. For another example, the alkaline cleaning solution may be a mixture of KOH solution, NaOH solution, and tetramethylammonium hydroxide solution. Of course, the acidic cleaning solution may also include alkaline cleaning solutions such as calcium hydroxide and barium hydroxide.

[0171] In addition, the concentration of the acidic cleaning solution or alkaline cleaning solution can be set according to the actual application scenario and is not specifically limited here. For example, when the solution used for wet chemical treatment is an alkaline cleaning solution, the concentration of the alkaline cleaning solution can be 1 wt % to 5 wt %.

[0172] In one example, the cleaning solution for wet chemical treatment of at least the second area may further include a polishing additive. The volume ratio of the polishing additive is 1% to 3%. The polishing additive may be composed of a degassing agent, an oxidizing agent, and water. The degassing agent may destabilize the microbubbles generated in the cleaning solution during the wet chemical treatment process, thereby preventing excessive bubbles from affecting the effect of the wet chemical treatment. The oxidizing agent may increase the wet chemical treatment rate to a certain extent. Specifically, the volume ratio and composition of the degassing agent and the oxidizing agent may be set according to actual needs and are not specifically limited here. For example, the degassing agent may be polysorbate, and the volume ratio of the degassing agent is 0.1% to 1%. The oxidizing agent may be hexadecyltrimethylammonium oxide, and the volume ratio of the oxidizing agent is 0.05% to 0.1%. The volume ratio of water is 98.9% to 99.85%.

[0173] For example, Table 1 takes the case where the holes distributed in the first hole structure are inverted pyramid holes and a 2.0 wt% alkaline cleaning solution is used for wet chemical treatment as an example. The relationship between the reaction time of the wet chemical treatment and the inverted pyramid area ratio is as follows:

[0174] Table 1 Relationship between reaction time of wet chemical treatment and inverted pyramid area ratio

[0175] Reaction time Inverted pyramid area ratio 50s 0.1％ 100s 5.0％ 150s 10.0％ 200s 20.0％ 250s 30.0％

[0176] It can be seen from the data shown in Table 1 that the reaction time of the wet chemical treatment is proportional to the area ratio of the inverted pyramid, so the reaction time of the above-mentioned wet chemical treatment can be set to 50s to 250s. In this case, the reaction time of the wet chemical treatment is moderate, which can prevent the first hole structure that meets the requirements of the preset scheme from being formed on the surface of the second area due to the short reaction time of the wet chemical treatment. The inverted pyramid is a regular quadrangular pyramid structure, and the diameter of the inscribed circle of its opening is 0.01μm to 10μm, and the depth of the hole can be 0.01μm to 10μm. At the same time, it can also prevent the formation of a regular pyramid velvet surface due to the long reaction time of the wet chemical treatment, and ensure that the morphology of the first hole structure formed on the surface of the second area after the wet chemical treatment meets the requirements of the preset scheme. Of course, the reaction time can be set to other suitable values according to the needs of different application scenarios.

[0177] As a possible implementation method, after the first tunneling material layer is formed at least on the second area, and before the wet chemical treatment is performed on at least the portion of the first tunneling material layer located on the second area, the manufacturing method of the back contact battery may further include the step of: performing heat treatment on at least the first tunneling material layer to form holes in the first tunneling material layer.

[0178] Specifically, it may be possible to use laser irradiation or other methods to heat-treat only the first tunneling material layer after forming the first tunneling material layer and before forming the first doped semiconductor layer, so as to form holes in the first tunneling layer. Alternatively, it may be possible to heat-treat the first tunneling material layer while crystallizing the first doped semiconductor layer after forming the first doped semiconductor layer and before performing wet chemical treatment. Alternatively, it may be possible to heat-treat the first tunneling material layer while crystallizing the first doped semiconductor layer after forming the first doped semiconductor layer and before performing wet chemical treatment. Compared with the first heat treatment situation, the second and third situations can utilize the heat of the crystallization treatment to heat-treat the first tunneling material layer at the same time, so as to improve the utilization rate of heat in the crystallization treatment and reduce the manufacturing cost of the back contact battery.

[0179] The temperature and time of the heat treatment can be set according to the actual application scenario and are not specifically limited here. After the heat treatment, the size, number and position of the holes formed in the first tunneling material layer are randomly set.

[0180] When the above technical solution is adopted, holes are formed in the first tunnel material layer by heat treatment before the wet chemical treatment. Based on this, during the wet chemical treatment, the exposed portion of the first tunnel material layer not only has holes formed therein by the solution of the wet chemical treatment, but also has holes formed by the heat treatment, so that the exposed portion of the first tunnel material layer can have a larger number of holes and / or a larger cross-sectional area, which is beneficial for increasing the number of holes distributed in the first hole structure formed under the masking effect of the exposed portion of the first tunnel material layer and / or increasing the cross-sectional area. Accordingly, the passivation effect of the surface passivation layer on the second region mentioned above can be further improved, and the interface resistance between the second region and the second doped semiconductor layer mentioned above can be further reduced, thereby further improving the photoelectric conversion efficiency of the back contact battery.

[0181] like Figure 18 、 Figure 21 and Figure 24 As shown, a second doped semiconductor layer 171 is formed in or on the second region 13. The conductivity type of the second doped semiconductor layer 171 is opposite to that of the first doped semiconductor layer 161.

[0182] In actual applications, the formation process of the second doped semiconductor layer varies depending on the formation location of the second doped semiconductor layer in the second region and the specific structure of the back contact battery. Specifically, the formation process of the second doped semiconductor layer can be divided into at least the following three types:

[0183] Method 1: When the second doped semiconductor layer is formed on the second region and no tunneling passivation contact structure is formed on the second region, a process such as low-pressure chemical vapor deposition or plasma chemical vapor deposition can be used to form a second doped semiconductor material layer covering at least the second region and the first doped semiconductor layer. The second doped semiconductor material layer is then patterned using a process such as laser etching or slurry etching, leaving only the second doped semiconductor material layer, thereby obtaining a second doped semiconductor layer.

[0184] The second type: when the second doped semiconductor layer is formed on the second region and a tunnel passivation contact structure is formed on the second region, such as Figure 12As shown, after at least the portion of the first tunneling material layer located on the second region 13 is removed, a process such as chemical vapor deposition can be used to form a second tunneling material layer 19 that covers at least the second region 13 and the first doped semiconductor layer 161. Then, the above process can be used to form a second doped semiconductor material layer 17 that covers the entire second tunneling material layer 19. The second doped semiconductor material layer 17 is patterned to form a second doped semiconductor layer 171 only on the portion of the second tunneling material layer 19 corresponding to the second region 13. Finally, as shown in FIG. Figure 16 As shown, wet chemical treatment or the like can be used to remove at least the portion of the second tunneling material layer 19 covering the first doped semiconductor layer 161 , leaving only the portion of the second tunneling material layer 19 located on the second region 13 to form a second tunneling layer 191 .

[0185] Generally speaking, if Figure 12 As shown, the size of the holes distributed in the first hole structure 15 is much larger than the thickness of the second tunneling material layer 19. Therefore, the second tunneling material layer 19 is conformally formed on the surface of the second region 13. That is, the second tunneling material layer 19 follows the surface morphology of the second region 13. The second tunneling material layer 19 does not fill the holes distributed in the first hole structure 15, but is conformally formed by adhering to the sidewalls of the holes. Figure 13 Furthermore, the second doped semiconductor material layer 17 is conformally formed on the second tunneling material layer 19. However, those skilled in the art should understand that when the hole size of the first hole structure 15 is small (for example, a depth of 10 nm and an inscribed circle diameter of 10 nm at the opening), the exposed surface of the second doped semiconductor material layer 17 (for example, a thickness of 30 nm) does not conform to the surface morphology of the second tunneling material layer 19, but rather fills the hole.

[0186] It should be noted that if Figure 12 As shown in FIG. 1 , in the case where the second surface further has a third region 14, the second tunneling material layer 19 can also be formed on the third region 14. Figure 14 and Figure 15As shown, after removing the portion of the second doped semiconductor material layer 17 located above the third region 14 and the first region 12, during the wet chemical treatment of the portion of the second tunneling material layer 19 located above the third region 14, the wet chemical treatment solution may also etch into holes 20 within the portion of the second tunneling material layer 19 located above the third region 14, thereby forming a second hole structure 21 on the surface of the third region 14. It can be understood that the holes 20 provided on the surface of the third region 14 are the result of two wet chemical treatments on the first tunneling material layer 18 and the second tunneling material layer 19, respectively. Therefore, in this case, the size and / or number of holes distributed in the second hole structure 21 provided on the surface of the third region 14 are respectively greater than the size and / or number of holes distributed in the first hole structure 15 provided on the surface of the second region 13.

[0187] The third type: when the second doped semiconductor layer is formed in the second region, such as Figure 19 As shown, the second region 13 can be doped with conductive ions by ion implantation or diffusion under the mask of the corresponding mask layer to form a second doped semiconductor layer 171 in the second region 13. Alternatively, after at least removing the portion of the first tunneling material layer located on the second region 13, as shown in FIG. Figure 22 As shown, a process such as chemical vapor deposition can be used to form a surface passivation layer 22 covering at least the first doped semiconductor layer 161 and the second region 13. The material and thickness of the surface passivation layer 22 can be referred to above. Figure 23 As shown, a first electrode 23 is formed that penetrates the surface passivation layer 22, and the bottom of the first electrode 23 contacts the second region 13. For example, an electrode window can be first opened at the contact point between the surface passivation layer and the second region by laser etching, slurry etching, etc., and then the first electrode is formed in the electrode window by screen printing or other processes. Alternatively, a process such as screen printing can be used to first form an electrode material on the portion of the surface passivation layer above the second region, and then the electrode material is burned through the surface passivation layer by sintering or other methods to obtain the first electrode. Figure 24 As shown, the second doped semiconductor layer 171 can be formed in the second region 13 by sintering or the like, using the first electrode 23 as a doping source.

[0188] As another possible implementation, Figure 18 and Figure 21As shown, if after forming the first doped semiconductor layer 161 and the second doped semiconductor layer 171, electrodes respectively contacting the first doped semiconductor layer 161 and the second doped semiconductor layer 171 are not formed, after forming the second doped semiconductor layer 171, a second electrode 24 and a first electrode 23 respectively contacting the first doped semiconductor layer 161 and the second doped semiconductor layer 171 can be formed by screen printing or other processes.

[0189] As a possible implementation, if a surface passivation layer is not formed before forming the second doped semiconductor layer, then after forming the second doped semiconductor layer in or on the second region, the method for manufacturing a back contact battery may further include the following steps: Figure 18 and Figure 21 As shown, a surface passivation layer 22 is formed to cover at least the first doped semiconductor layer 161 and the second doped semiconductor layer 171. The formation method, material and thickness of the surface passivation layer 22 can be referred to above.

[0190] As can be seen from the above, after forming the first tunneling material layer and the first doped semiconductor layer, the remaining portion of the first tunneling material layer, except for that located in the first region, is exposed. Furthermore, the exposed portion of the first tunneling material layer is not removed before the wet chemical treatment. Therefore, during the wet chemical treatment, the solution used in the wet chemical treatment can corrode the exposed portion of the first tunneling material layer, randomly forming holes within the exposed portion of the first tunneling material layer. In this case, the exposed portion of the first tunneling material layer can act like a mask, allowing the solution used in the wet chemical treatment to pass through the holes and etch the portion of the semiconductor substrate located in the second region, forming the first hole structure. The first tunneling material layer is compatible with conventional back-contact cell manufacturing processes, thereby reducing the difficulty of forming the first hole structure. Furthermore, there is no need to form a hole mask pattern within the first tunneling material layer through additional methods such as photolithography or laser etching, thus eliminating the need for mask pattern formation and simplifying the back-contact cell manufacturing process. In addition, the first tunneling material layer is thin and easy to remove, which is beneficial for the subsequent formation of the second doped semiconductor layer in or on the second region. In addition, the beneficial effects of the first hole structure formed on the surface of the second region can be referred to above and will not be repeated here.

[0191] An embodiment of the present invention further provides a photovoltaic module, which includes the back-contact cell provided by the above embodiment.

[0192] The beneficial effects of the photovoltaic module provided by the embodiment of the present invention can be analyzed with reference to the beneficial effects of the back-contact battery provided by the above embodiment, and will not be repeated here.

[0193] While the above description does not provide detailed technical details regarding patterning and etching of each layer, those skilled in the art will appreciate that various technical means can be employed to form layers, regions, and the like in desired shapes. Furthermore, those skilled in the art may devise methods that differ from those described above to form the same structure. Furthermore, while each embodiment has been described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.

[0194] The above describes the embodiments of the present disclosure. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make various substitutions and modifications, which are intended to fall within the scope of the present disclosure.

Claims

1. A back contact battery, characterized in that: include: a semiconductor substrate having a first side and a second side opposite to each other; Along a direction parallel to the second surface, the second surface has first areas and second areas alternately arranged; The surface structures of the first region and the second region are different, and the surface of the second region is provided with a first hole structure recessed into the semiconductor substrate, while the surface of the first region is not provided with the first hole structure; the second surface is a polished surface; a first doped semiconductor layer formed on the first region; and a second doped semiconductor layer formed in or on the second region; the conductivity type of the second doped semiconductor layer is opposite to the conductivity type of the first doped semiconductor layer; Wherein, the holes distributed in the first hole structure are randomly arranged on the surface of the second region; And / or, the opening sizes of the holes distributed in the first hole structure are randomly set; and / or, the number of the holes distributed in the first hole structure is randomly set; The back-contact cell further includes a first tunneling layer located on the first region; and the first doped semiconductor layer is located on the first tunneling layer.

2. The back contact battery according to claim 1, characterized in that In a direction from the first surface toward the second surface, the cross-sectional area of the holes distributed in the first hole structure gradually increases.

3. The back contact battery according to claim 2, characterized in that The first hole structure includes a plurality of holes, and the holes distributed in the first hole structure are one or more of inverted pyramid holes, inverted hemispherical holes, and terraced holes.

4. The back contact battery according to claim 1, characterized in that The main surface of the first region is flush with the main surface of the second region.

5. The back contact battery according to claim 1, characterized in that In the case where the second doped semiconductor layer is formed on the second region, the back contact cell further includes a second tunneling layer located on the second region; and the second doped semiconductor layer is located on the second tunneling layer.

6. The back contact battery according to claim 5, characterized in that The second tunneling layer is doped with impurities, wherein the impurities include one or more of carbon, phosphorus, boron, gallium and nitrogen; and / or, The material of the second tunneling layer includes one or more of silicon oxide, silicon carbide, silicon nitride and aluminum oxide.

7. The back contact battery according to claim 5, characterized in that The second tunneling layer is conformal to the surface structure of the second region.

8. The back contact battery according to claim 7, characterized in that The second doped semiconductor layer is conformal to the second tunneling layer.

9. The back contact battery according to claim 1, characterized in that The diameter of the inscribed circle at the opening of the holes distributed in the first hole structure is 0.01 μm to 10 μm.

10. The back contact battery according to claim 9, characterized in that The depth of the holes distributed in the first hole structure is 0.01 μm to 10 μm.

11. The back contact battery according to any one of claims 1 to 10, characterized in that: The second surface further has a third region between each first region and the adjacent second region; a second hole structure recessed into the semiconductor substrate is provided on a surface of the third region.

12. The back contact battery according to claim 11, characterized in that The average size of the holes distributed in the second hole structure is greater than the average size of the holes distributed in the first hole structure.

13. The back contact battery according to any one of claims 1 to 10, characterized in that The back-contact cell further includes a surface passivation layer, which covers at least the first doped semiconductor layer and the second doped semiconductor layer.

14. The back contact battery according to any one of claims 1 to 10, characterized in that In the case where the second doped semiconductor layer is formed in the second region, The back contact cell further includes a first electrode in ohmic contact with the second doped semiconductor layer; the first electrode is a doping source for the second doped semiconductor layer, and a material of the first electrode includes a doping element in the second doped semiconductor layer.

15. A method for manufacturing a back contact battery, characterized in that: include: Providing a semiconductor substrate having a first surface and a second surface opposite to each other; Along a direction parallel to the second surface, the second surface has first areas and second areas alternately arranged; the second surface is a polished surface; forming a first tunneling material layer at least on the first region and the second region, and forming a first doped semiconductor layer on the first tunneling material layer located in the first region; Performing a wet chemical treatment on at least the portion of the first tunneling material layer located on the second region to randomly form holes in the exposed portion of the first tunneling material layer, and using the exposed portion of the first tunneling material layer as a mask, so that the surface structures of the first region and the second region of the semiconductor substrate are different, and a first hole structure recessed into the semiconductor substrate is formed on the surface of the second region, while the first region does not have the first hole structure formed on the surface; then, removing at least the portion of the first tunneling material layer located on the second region; wherein the holes distributed in the first hole structure are randomly positioned on the surface of the second region, and / or the opening sizes of the holes distributed in the first hole structure are randomly set, and / or the number of holes distributed in the first hole structure is randomly set; A second doped semiconductor layer is formed in or on the second region; the conductivity type of the second doped semiconductor layer is opposite to the conductivity type of the first doped semiconductor layer.

16. The method for manufacturing a back contact battery according to claim 15, characterized in that: After forming the first tunneling material layer at least on the first region and the second region, and before performing a wet chemical treatment on at least the portion of the first tunneling material layer located on the second region, the method for manufacturing a back-contact battery further includes: At least the first tunneling material layer is heat-treated to form a hole in the first tunneling material layer.

17. The method for manufacturing a back contact battery according to claim 15 or 16, characterized in that: In the case where the first doped semiconductor layer is formed on the first region, The forming of the first tunneling material layer at least on the second region and the forming of the first doped semiconductor layer on the first region comprises: sequentially forming a first tunneling material layer and a first doped semiconductor material layer covering the second surface of the semiconductor substrate; performing patterning on the first doped semiconductor material layer, retaining only a portion of the first doped semiconductor material layer located above the first region, to obtain the first doped semiconductor layer; After at least the portion of the first tunneling material layer located on the second region is removed, the remaining portion of the first tunneling material layer forms a first tunneling layer.

18. The method for manufacturing a back contact battery according to claim 15 or 16, characterized in that: The temperature of the wet chemical treatment is 50°C to 80°C.

19. The method for manufacturing a back contact battery according to claim 15 or 16, characterized in that: The cleaning solution for performing the wet chemical treatment on at least the second area is an acidic cleaning solution or an alkaline cleaning solution; the acidic cleaning solution includes one or more of HF solution, HNO3 solution, and H2SO4 solution; the alkaline cleaning solution includes one or more of KOH solution, NaOH solution, and tetramethylammonium hydroxide solution.

20. The method for manufacturing a back contact battery according to claim 19, wherein: The cleaning solution for performing the wet chemical treatment on at least the second region further comprises a polishing additive; the polishing additive has a volume ratio of 1% to 3%.

21. The method for manufacturing a back contact battery according to claim 20, wherein: The polishing additive includes a defoaming agent, an oxidizing agent and water; the defoaming agent includes polysorbate, and the oxidizing agent includes hexadecyltrimethylammonium oxide.

22. The method for manufacturing a back contact battery according to claim 15 or 16, characterized in that: In the case where the second doped semiconductor layer is formed on the second region, After removing at least the portion of the first tunneling material layer located on the second region and before forming the second doped semiconductor layer on the second region, the method for manufacturing the back contact battery further includes: forming a second tunneling material layer covering at least the second region and the first doped semiconductor layer.

23. The method for manufacturing a back contact battery according to claim 22, wherein: The second tunneling material layer is formed on the second region conformally to the surface structure of the second region.

24. The method for manufacturing a back contact battery according to claim 22, wherein: The second doped semiconductor layer and the second tunneling material layer are conformally formed on the second region.

25. The method for manufacturing a back contact battery according to claim 22, wherein: After forming the second doped semiconductor layer on the second region, the manufacturing method of the back contact battery further includes: removing at least the portion of the second tunneling material layer covering the first doped semiconductor layer, retaining only the portion of the second tunneling material layer located on the second region, to form a second tunneling layer.

26. The method for manufacturing a back contact battery according to claim 15 or 16, characterized in that: After forming the second doped semiconductor layer in or on the second region, the method for manufacturing the back contact cell further includes: A surface passivation layer is formed covering at least the first doped semiconductor layer and the second doped semiconductor layer.

27. The method for manufacturing a back contact battery according to claim 15 or 16, characterized in that: In the case where the second doped semiconductor layer is formed in the second region, After removing at least a portion of the first tunneling material layer located on the second region and before forming the second doped semiconductor layer in the second region, the method for manufacturing the back contact cell further includes: forming a surface passivation layer covering at least the first doped semiconductor layer and the second region; forming a first electrode penetrating the surface passivation layer; wherein the bottom of the first electrode contacts the second region; The forming of the second doped semiconductor layer in the second region includes forming the second doped semiconductor layer in the second region by using the first electrode as a doping source.

28. A photovoltaic module, characterized in that: The invention comprises a back contact cell according to any one of claims 1 to 14.

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