High-precision time synchronization method, device, system and medium of data acquisition system

Abstract

The embodiment of the application provides a high-precision time synchronization method, device, system and medium of a data acquisition system, and relates to the technical field of communication. The method comprises the following steps: receiving a Sync message at each synchronization time point; obtaining a receiving time according to the time drift of the slave device's crystal oscillator clock after receiving the Sync message; and obtaining a sending time from the Sync message. The target crystal oscillator time error between the synchronization time points is determined according to the receiving time and the sending time corresponding to different synchronization time points. The target correction amount of each correction is determined according to the target crystal oscillator time error and the preset total correction number between the synchronization time points. Finally, the device time between the synchronization time points of the slave device is corrected according to the target correction amount, so that the device time of the master device and the slave device is synchronized between adjacent synchronization time points. The embodiment can improve the time synchronization precision of the slave device and the master device.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a high-precision time synchronization method, device, system and medium for a data acquisition system. Background Art

[0002] Currently, IEEE 1588 defines a time synchronization protocol and algorithm, typically performing synchronization every 1 to 2 seconds. However, in the period between two synchronization points, the master and slave clocks run independently. Due to differences in the crystal oscillator frequencies of the master and slave devices, the time between these periods may not be synchronized. Therefore, the crystal oscillator frequency of the slave device must be corrected to ensure that the time increment rate is consistent with that of the master.

[0003] The crystal oscillator frequency correction method in the related art has the problem of low time synchronization accuracy. For example, adjusting the crystal oscillator frequency by controlling the crystal oscillator voltage results in low time synchronization accuracy. Summary of the Invention

[0004] The main purpose of the embodiments of the present application is to provide a high-precision time synchronization method, device, system and medium for a data acquisition system, which can improve the time synchronization accuracy.

[0005] To achieve the above objectives, a first aspect of an embodiment of the present application provides a high-precision time synchronization method for a data acquisition system, which is applied to a slave device of the data acquisition system. The data acquisition system includes a master device and a slave device. The master device and the slave device interact using the PTP protocol at each synchronization time point. The method includes:

[0006] Obtaining a sending time of a Sync message sent by the master device; wherein the Sync message includes at least a first Sync message and a second Sync message, and the sending time includes a sending time of the first Sync message and a sending time of the second Sync message; wherein the Sync message is a time synchronization message of the PTP protocol;

[0007] Obtaining a reception time of the Sync message received by the slave device; the reception time includes a reception time of the first Sync message and a reception time of the second Sync message; the reception time is used to represent the crystal oscillator clock timing of the slave device receiving the Sync message;

[0008] Calculate the target crystal oscillator time error between synchronization time points according to the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message;

[0009] Determining a target correction amount for the current number of corrections based on the target crystal oscillator time error, the current number of corrections, and a preset total number of corrections between synchronization time points;

[0010] The device time between the synchronization time points of the slave devices is corrected according to the target correction amount.

[0011] In some embodiments, the first Sync message and the second Sync message are adjacent messages;

[0012] The calculating, according to the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message, a target crystal oscillator time error between synchronization time points includes:

[0013] Calculate a first difference based on the sending time of the first Sync message and the sending time of the second Sync message;

[0014] Calculate a second difference based on the reception time of the first Sync message and the reception time of the second Sync message;

[0015] The target crystal oscillator time error is calculated based on the first difference and the second difference.

[0016] In some embodiments, the first Sync message and the second Sync message are messages separated by N synchronization time points, where N is a positive integer greater than or equal to 2;

[0017] The calculating, according to the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message, a target crystal oscillator time error between synchronization time points includes:

[0018] Calculate a first difference based on the sending time of the first Sync message and the sending time of the second Sync message;

[0019] Calculate a second difference based on the reception time of the first Sync message and the reception time of the second Sync message;

[0020] The target crystal oscillator time error is calculated based on N, the first difference, and the second difference.

[0021] In some embodiments, the first Sync message is the (i-1)th Sync message sent by the master device, and the second Sync message is the (i)th Sync message sent by the master device, where i is a positive integer greater than or equal to 2. Correcting the device time between the synchronization time points of the slave device according to the target correction amount includes:

[0022] The time between the i-th synchronization time point and the (i+1)-th synchronization time point of the slave device is corrected according to the target correction amount.

[0023] In some embodiments, determining a target correction amount for the current number of corrections based on the target crystal oscillator time error, the current number of corrections, and a preset total number of corrections between synchronization time points includes:

[0024] A single correction amount is obtained according to a ratio of the target crystal oscillator time error to a preset total correction number; a current correction number is obtained by a preset unit counter; and a target correction amount for the current correction number is obtained according to a product of the single correction amount and the current correction number;

[0025] or,

[0026] Obtaining the current number of corrections through a preset unit counter; obtaining an initial correction amount based on the product of the target crystal oscillator time error and the current number of corrections; and obtaining a target correction amount based on the ratio of the initial correction amount to the total number of corrections;

[0027] or,

[0028] The current number of corrections is obtained through a preset unit counter; an initial correction amount is obtained based on the product of the target crystal oscillator time error, a preset amplification factor and the current number of corrections; and a target correction amount is obtained based on the ratio of the initial correction amount to the product of the total number of corrections and the preset amplification factor.

[0029] In some embodiments, correcting the device time between synchronization time points of the slave device according to the target correction amount includes:

[0030] If the target correction amount is a positive value, correcting the time between the synchronization time points of the slave devices according to the correction amount;

[0031] If the target correction amount is a negative value, the crystal oscillator clock of the slave device is controlled to pause and maintain at least a pause duration corresponding to the target correction amount or a preset pause duration.

[0032] In some embodiments, the slave device includes an FPGA processor, and the method is implemented by the FPGA processor; the FPGA processor includes: a GTX high-speed communication module, a PTP slave module; wherein the method further includes:

[0033] The GTX high-speed communication module obtains the Sync message from the master device;

[0034] The PTP slave module receives the Sync message from the high-speed communication module and executes:

[0035] The obtaining of the sending time of the Sync message sent by the master device; wherein the Sync message includes at least a first Sync message and a second Sync message, and the sending time includes the sending time of the first Sync message and the sending time of the second Sync message; wherein the Sync message is a time synchronization message of the PTP protocol;

[0036] The obtaining of the receiving time of the Sync message by the slave device; the receiving time includes the receiving time of the first Sync message and the receiving time of the second Sync message; the receiving time is used to represent the crystal oscillator clock timing of the slave device receiving the Sync message;

[0037] The target crystal oscillator time error is calculated according to the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message;

[0038] The target correction amount of the current correction number is determined according to the target crystal oscillator time error, the current correction number and the preset total correction number between the synchronization time points; wherein the total correction number is 1000-100000;

[0039] The device time between synchronization time points of the slave devices is corrected according to the target correction amount.

[0040] To achieve the above-mentioned purpose, the second aspect of an embodiment of the present application proposes an electronic device, which includes a memory and a processor, and the memory stores a computer program. When the processor executes the computer program, the method described in the first aspect is implemented.

[0041] To achieve the above-mentioned purpose, a third aspect of an embodiment of the present application proposes a data acquisition system, comprising a main device and at least one electronic device as described in the second aspect, wherein the main device is communicatively connected to the electronic device.

[0042] To achieve the above-mentioned purpose, a fourth aspect of an embodiment of the present application proposes a storage medium, wherein the storage medium stores a computer program, and when the computer program is executed by a processor, the method described in the first aspect is implemented.

[0043] The present application proposes a high-precision time synchronization method, device, system, and medium for a data acquisition system. At each synchronization time point, after receiving a Sync message, the slave device obtains the receiving time based on the crystal oscillator clock of the slave device, and can obtain the sending time from the Sync message. The target crystal oscillator time error between synchronization time points is determined based on the receiving time and sending time corresponding to different synchronization time points. The target correction amount for each correction is then determined based on the target crystal oscillator time error and the preset total number of corrections between the synchronization time points. Finally, the device time between the synchronization time points of the slave device is corrected based on the target correction amount, thereby achieving synchronization of the device time of the master device and the slave device between adjacent synchronization time points. This embodiment can improve the time synchronization accuracy between the slave device and the master device. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 This is a schematic diagram of a system architecture for executing a high-precision time synchronization method for a data acquisition system provided by one embodiment of the present application;

[0045] Figure 2 is a schematic diagram of a system architecture for executing a high-precision time synchronization method for a data acquisition system provided by another embodiment of the present application;

[0046] Figure 3 This is a schematic diagram of optical fiber time synchronization message interaction provided by an embodiment of the present application;

[0047] Figure 4 This is a flow chart of a high-precision time synchronization method for a data acquisition system provided by one embodiment of the present application;

[0048] Figure 5 yes Figure 1 Flowchart of step S103 in FIG.

[0049] Figure 6 yes Figure 1 Flowchart of step S103 in FIG.

[0050] Figure 7 yes Figure 1 Flowchart of step S104 in FIG.

[0051] Figure 8 yes Figure 1 Flowchart of step S104 in FIG.

[0052] Figure 9 yes Figure 1Flowchart of step S104 in FIG.

[0053] Figure 10 yes Figure 1 Flowchart of step S105 in FIG.

[0054] Figure 11 This is an application example diagram provided by this application;

[0055] Figure 12 This is a schematic diagram of the module structure of a slave device provided by an embodiment of the present application;

[0056] Figure 13 This is a schematic diagram of the hardware structure of an electronic device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0057] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0058] It should be noted that although the device schematics illustrate functional module divisions and the flowcharts illustrate logical sequences, in certain circumstances, the steps shown or described may be performed in a sequence that differs from the module divisions in the device or the sequence in the flowcharts. The terms "first," "second," and so on, in the specification, claims, and drawings, are used to distinguish similar items and are not necessarily used to describe a specific sequence or precedence.

[0059] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein are for the purpose of describing the embodiments of this application only and are not intended to limit this application.

[0060] First of all, it should be noted that the data acquisition system includes a master device and a slave device, and the master device is communicatively connected to the slave device. Generally, the device time of the master device is different from the device time of the slave device. In order to improve communication performance, such as improving the real-time nature of communication, it is necessary to perform time correction on the device time of the slave device according to the device time of the master device to achieve time synchronization. Generally, the master device and the slave device interact periodically through the PTP protocol at each synchronization time point. The slave device obtains the device time of the master device by parsing the time synchronization message of the PTP protocol, and adjusts the device time of the slave device according to the device time of the master device. However, between adjacent synchronization time points, since the crystal oscillator clock of the slave device is different from that of the master device, the device time of the slave device is different from that of the master device between adjacent synchronization time points. Therefore, time synchronization is required between adjacent synchronization time points.

[0061] Secondly, it's important to note that the PTP protocol includes multiple message types. Specifically, the PTP protocol defines four types of multicast messages and management messages: synchronization messages (Sync messages), follow-up messages (Follow_up messages), delay request messages (DelayRequest messages), delay response messages (DelayResponce messages), and management messages. Sync messages are PTP synchronization messages, also known as PTP time synchronization messages.

[0062] It should also be noted that the master device and the slave device periodically interact via the PTP protocol. It is understood that the period can be 1 second, 2 seconds, etc., and this application does not specifically limit this. If the period is 1 second, then every 1 second corresponds to a synchronization time point. If the period is 2 seconds, then every 2 seconds corresponds to a synchronization time point.

[0063] An embodiment of the present application provides a high-precision time synchronization method, device, system and medium for a data acquisition system, wherein the data acquisition system includes a master device and a slave device, and the master device and the slave device interact through the PTP protocol at each synchronization time point. At each synchronization time point, the slave device receives a Sync message sent by the master device. After receiving the Sync message, the slave device obtains the receiving time based on the crystal oscillator clock of the slave device, and can obtain the sending time from the Sync message. The target crystal oscillator time error between the synchronization time points is determined based on the receiving time and sending time corresponding to different synchronization time points. The target correction amount for each correction is then determined based on the target crystal oscillator time error and the preset total number of corrections between the synchronization time points. Finally, the device time between the synchronization time points of the slave device is corrected based on the target correction amount, so that the device time of the master device and the slave device is synchronized between adjacent synchronization time points.

[0064] The embodiments of the present application are further described below with reference to the accompanying drawings.

[0065] like Figure 1 As shown, Figure 1 This is a schematic diagram of a system architecture for executing a high-precision time synchronization method for a data acquisition system provided by an embodiment of the present application. Figure 1 In the example, the system architecture includes a DC power supply device 1, a DC power supply device 2, a wired aggregation node (1-20), and a node collector (1-20).

[0066] The time synchronization process of this system architecture can be divided into three levels. The first level time synchronization includes DC power supply device 1 (master device) and DC power supply device 2 (slave device). The second level time synchronization includes DC power supply device 1 (master device) and wired aggregation nodes 1-10 (slave devices), or the second level time synchronization includes DC power supply device 2 (master device) and wired aggregation nodes 11-20 (slave devices). The third level time synchronization includes wired aggregation node 1 (master device) and node collectors 1-10 (slave devices), or the third level time synchronization includes wired aggregation node 11 (master device) and node collectors 11-20 (slave devices).

[0067] In one embodiment, referring to Figure 2 , Figure 2 This is a schematic diagram of a system architecture for executing a high-precision time synchronization method for a data acquisition system provided by another embodiment of the present application. Figure 2 In the example, the wired aggregation device of the system architecture is the master device, and the node collector 1 is the slave device. Taking a period of 1 second as an example, every 1 second corresponds to a synchronization time point. The wired aggregation device sends a Sync message to the slave device every 1 second. After the node collector 1 receives the Sync message, it obtains the reception time of the Sync message based on the crystal oscillator clock of the node collector 1 at this time. The node collector 1 can obtain the sending time of the Sync message from the Sync message. Among them, the Sync messages obtained by the node collector 1 at different time points are different. For example, the node collector 1 obtains the first Sync message at the first synchronization time point and the second Sync message at the second synchronization time point. Then the node collector 1 can determine the sending time of the first Sync message and the receiving time of the first Sync message at the first synchronization time point. Then the node collector 1 can determine the sending time of the second Sync message and the receiving time of the second Sync message at the second synchronization time point. The target crystal oscillator time error between synchronization time points is then calculated based on the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message. The target correction amount for each correction is then determined based on the target crystal oscillator time error and the preset total number of corrections between synchronization time points. Finally, the device time between the synchronization time points of node collector 1 is corrected based on the target correction amount, achieving time synchronization between the device time of the wired aggregation device and node collector 1 between adjacent synchronization time points.

[0068] It should be noted that the first synchronization time point and the second synchronization time point may be adjacent or not. More specifically, after receiving the Sync message, the node collector 1 can parse the Sync message to obtain the sequence number of the Sync message. Therefore, it is possible to determine whether the first Sync message and the second Sync message are adjacent based on the sequence number. In this way, it is known whether the first synchronization time point and the second synchronization time point are adjacent. The number of synchronization time points between the first Sync message and the second Sync message can be obtained based on the sequence number of the first Sync message and the sequence number of the second Sync message.

[0069] The system architecture and application scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those skilled in the art will appreciate that with the evolution of the system architecture and the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are equally applicable to similar technical problems.

[0070] It will be understood by those skilled in the art that Figure 1 and Figure 2 The system architecture shown in the figure does not constitute a limitation on the embodiments of the present application, and may include more or fewer components than shown in the figure, or a combination of certain components, or a different arrangement of components.

[0071] exist Figure 1 In the system architecture shown, each slave device that uses the PTP protocol for time synchronization can respectively call its stored time synchronization program to execute the high-precision time synchronization method of the data acquisition system.

[0072] Based on the above system architecture, various embodiments of the high-precision time synchronization method of the data acquisition system of the embodiment of the present application are proposed.

[0073] It should be noted that the optical fiber time synchronization of the embodiment of the present application refers to the IEEE-1588PTP precision time protocol. The data acquisition system includes a master device and a slave device, and the master device and the slave device interact through the PTP protocol at each synchronization time point. Among them, at each synchronization time point, the slave device receives the Sync message sent by the master device. The slave device (node ​​collector) and the master device (wired aggregation node) periodically (taking 1 second as an example) exchange messages with time information to measure the link delay (Delay) and calculate the master-slave time deviation (Offset), thereby compensating for the link delay, correcting the time deviation, and achieving time synchronization.

[0074] Reference Figure 3 , Figure 3 This is a schematic diagram of the interaction of optical fiber time synchronization messages. Figure 3As shown in Figure 1, there are three types of message exchanges between the master and slave devices. During the message exchange, four send or receive time values ​​are generated. These four time values ​​are used to calculate the link delay (Delay) and time offset (Offset). At each time synchronization point, the communication steps include:

[0075] 1) The master device initiates a synchronization message (Sync message) to start a time synchronization. The Sync message carries the master device's current time value t1. t1 is marked at the moment the first byte of the message arrives at the master device's send port and is then filled in the message and sent to the slave device.

[0076] 2) When the slave device receives the Sync message, it marks the current time value t2 of the slave device. t2 is marked when the first byte of the Sync message is received;

[0077] 3) The slave device initiates a delay request message (DelayRequest message) and records the local time t3 when sending (marked when the first byte is sent);

[0078] 4) When the master device receives the delay request message (DelayRequest message), it marks the master device time t4 (marked when the first byte is received);

[0079] 5) The master device sends a delayed response message (DelayResponce message) to inform the slave device of t4;

[0080] 6) After receiving t4, the slave device calculates the link delay (Delay) and time offset (Offset).

[0081] Calculation formula: After a communication cycle (three messages) completes, the slave device begins calculating Delay and Offset: Offset + Delay = t2 - t1; Delay - Offset = t4 - t3. The calculation results are: Delay = (t4 - t3 + t2 - t1) / 2; Offset = (t2 - t1 - t4 + t3) / 2, which is equivalent to Offset = t2 - t1 - Delay. Finally, the slave device's device time is adjusted based on the Offset.

[0082] Through the above process, at each time synchronization point, the slave device synchronizes with the master device. However, due to the difference in crystal oscillator frequency between the master and slave devices, synchronization cannot be guaranteed at every intermediate time of each second. Therefore, the crystal oscillator frequency of the slave device must be corrected to ensure that the slave device's time self-acceleration rate is consistent with that of the master device. Therefore, the embodiments of the present application propose that the crystal oscillator time error of the slave device's device time must be corrected between synchronization time points to further improve the accuracy of time synchronization.

[0083] like Figure 4 As shown, Figure 4 This is a flow chart of a high-precision time synchronization method for a data acquisition system provided by an embodiment of the present application. The high-precision time synchronization method for a data acquisition system is applied to a slave device of the data acquisition system, for example, Figure 2 The node collector 1 in the embodiment shown. The data acquisition system also includes a main device, such as Figure 2 In the wired convergence device of the embodiment shown, the master device and the slave device interact via the PTP protocol at each synchronization time point, and the high-precision time synchronization method of the data acquisition system includes but is not limited to step S101 and step S105.

[0084] Step S101, obtaining the sending time of the Sync message sent by the master device; wherein the Sync message includes at least the first Sync message and the second Sync message, and the sending time includes the sending time of the first Sync message and the sending time of the second Sync message; wherein the Sync message is a time synchronization message of the PTP protocol.

[0085] Specifically, the slave device receives a Sync message sent by the master device at each synchronization time point. The Sync messages obtained by the slave device at different time points are different. For example, the slave device obtains the first Sync message at the first synchronization time point, and the slave device obtains the second Sync message at the second synchronization time point. The first synchronization time point is before the second synchronization time point, but the first synchronization time point and the second synchronization time point may be adjacent or not. It is understandable that after the slave device obtains the first Sync message and the second Sync message, the slave device can obtain the sending time of the first Sync message based on the first Sync message, and obtain the sending time of the second Sync message based on the second Sync message.

[0086] It should be noted that the time a master sends a Sync message can represent both the master's device time and the master's crystal oscillator clock time. However, the time a slave receives a Sync message does not refer to the slave's device time, but rather the slave's crystal oscillator clock time.

[0087] Step S102, obtaining the reception time of the Sync message received by the slave device; the reception time includes the reception time of the first Sync message and the reception time of the second Sync message; the reception time is used to represent the crystal oscillator clock timing of the slave device receiving the Sync message.

[0088] Specifically, after receiving the first Sync message, the slave device obtains the reception time of the first Sync message according to the crystal oscillator clock of the slave device. After receiving the second Sync message, the slave device obtains the reception time of the second Sync message according to the crystal oscillator clock of the slave device.

[0089] It should be noted that in steps S101 and S102, after receiving the first Sync message, the slave device may obtain the sending time and receiving time of the first Sync message. Then, after receiving the second Sync message, the slave device may obtain the sending time and receiving time of the second Sync message. Alternatively, after receiving the first Sync message, the slave device may obtain the receiving time of the first Sync message. After receiving the second Sync message, the slave device may obtain the receiving time of the second Sync message. Then, the slave device parses the first Sync message and the second Sync message to obtain the sending time of the first Sync message and the sending time of the second Sync message.

[0090] It is understood that after receiving the first Sync message and the second Sync message, the slave device can obtain the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message. The specific order of obtaining each time is not specifically limited in the embodiments of the present application.

[0091] Step S103 : Calculate the target crystal oscillator time error between synchronization time points according to the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message.

[0092] Specifically, the first difference between the sending time of the first Sync message and the sending time of the second Sync message can represent the crystal oscillator clock time of the master device between the first synchronization time point and the second synchronization time point. The second difference between the receiving time of the first Sync message and the receiving time of the second Sync message can represent the crystal oscillator clock time of the slave device between the first synchronization time point and the second synchronization time point. Therefore, based on these four times, the target crystal oscillator time error between the synchronization time points can be calculated. It should be noted that these four times are in the same unit, for example, all in nanoseconds or all in seconds.

[0093] Step S104 , determining a target correction amount for the current number of corrections according to the target crystal oscillator time error, the current number of corrections, and a preset total number of corrections between synchronization time points.

[0094] Specifically, time synchronization is required between synchronization time points. In order to improve the accuracy of time synchronization, the total number of corrections needs to be preset between synchronization time points. It is understandable that the greater the total number of corrections between synchronization time points, the more corrections are made to the device time of the slave device. In one example, taking a period of 1 second as an example, the total number of corrections between synchronization time points is 10,000 times. That is, the device time of the slave device needs to be corrected 10,000 times within 1 second, which is equivalent to correcting the device time of the slave device once every 100 microseconds. For each correction, the target correction amount is determined based on the target crystal oscillator time error, the current number of corrections, and the total number of corrections. The specific calculation method is not explained here, please refer to the subsequent instructions.

[0095] Step S105 , correcting the device time between the synchronization time points of the slave devices according to the target correction amount.

[0096] Specifically, the slave device's device time is corrected based on the target correction amount. For example, the target correction amount is directly added to the slave device's device time to update the slave device's device time, synchronizing the slave device's device time with the master device's time. This improves the accuracy of time synchronization.

[0097] IEEE 1588 defines a time synchronization protocol and algorithm, typically performing synchronization every 1 to 2 seconds. However, during the interval between synchronizations, the master and slave clocks run independently. Due to differences in the crystal oscillator frequencies of the master and slave devices, the time between these intervals may not be synchronized. Therefore, the crystal oscillator frequency of the slave device must be calibrated to ensure that the time increment rate is consistent with that of the master device.

[0098] Existing crystal oscillator frequency correction methods: 1) No crystal oscillator frequency correction is performed, resulting in the lowest synchronization accuracy; 2) Using a voltage-controlled crystal oscillator to adjust the crystal oscillator frequency by controlling the crystal oscillator voltage, resulting in low time synchronization accuracy.

[0099] To address the technical issues existing in the aforementioned related art, this embodiment employs a method including steps S101 and S105, namely, a logic algorithm based on crystal oscillator time error and the number of corrections to correct (fine-tune) the slave device's time (clock), ensuring that the slave device's clock increment rate matches that of the master device. This achieves the effect of analog frequency correction without hardware overhead. Furthermore, the correction accuracy is controllable in real time, thereby improving the accuracy of time synchronization.

[0100] In addition, in one embodiment, referring to Figure 5 The first Sync message and the second Sync message are adjacent messages. Step S103 may include but is not limited to the following steps:

[0101] Step S201: Calculate a first difference based on the sending time of the first Sync message and the sending time of the second Sync message;

[0102] Step S202: Calculate a second difference based on the reception time of the first Sync message and the reception time of the second Sync message;

[0103] Step S203: Calculate the target crystal oscillator time error according to the first difference and the second difference.

[0104] Specifically, the first difference can represent the crystal oscillator clock time of the master device between the first synchronization time point and the second synchronization time point. The second difference can represent the crystal oscillator clock time of the slave device between the first synchronization time point and the second synchronization time point. If the first message and the second message are adjacent messages, it means that the first synchronization time point and the second synchronization time point are adjacent synchronization time points. The target difference is calculated based on the first difference and the second difference, and the target difference is the target crystal oscillator time error. More specifically, the sending time of the first Sync message is t11, the sending time of the second Sync message is t21, the receiving time of the first Sync message is t12, and the receiving time of the second Sync message is t22. Then: Deltt1 = (t21-t11)-(t22-t12), and Deltt1 represents the target crystal oscillator time error.

[0105] In addition, in one embodiment, referring to Figure 6 The first Sync message and the second Sync message are messages separated by N synchronization time points, where N is a positive integer greater than or equal to 2; step S103 may include but is not limited to the following steps:

[0106] Step S301: Calculate a first difference based on the sending time of the first Sync message and the sending time of the second Sync message;

[0107] Step S302: Calculate a second difference based on the reception time of the first Sync message and the reception time of the second Sync message;

[0108] Step S303 : Calculate the target crystal oscillator time error according to N, the first difference, and the second difference.

[0109] Specifically, the first difference may represent the crystal oscillator clock time of the master device between the first synchronization time point and the second synchronization time point. The second difference may represent the crystal oscillator clock time of the slave device between the first synchronization time point and the second synchronization time point. If the first message and the second message are not adjacent messages, that is, the first Sync message and the second Sync message are messages separated by N synchronization time points, it means that the first synchronization time point and the second synchronization time point are not adjacent synchronization time points. In order to calculate the target crystal oscillator time error between adjacent synchronization time points, the size of N must be considered.

[0110] In one example, a preliminary difference is calculated based on the first and second differences. A target difference is then calculated based on the ratio of the preliminary difference to N. This target difference is the target crystal oscillator time error. More specifically, the first Sync message is sent at time t11, the second Sync message is sent at time t21, the first Sync message is received at time t12, and the second Sync message is received at time t22. Therefore, Deltt2 = ((t21 - t11) - (t22 - t12)) / N, where Deltt2 represents the target crystal oscillator time error.

[0111] In another example, a first ratio is obtained by the ratio of the first difference to N, a second ratio is obtained by the ratio of the second difference to N, and a target difference is calculated based on the first and second ratios. This target difference is the target crystal oscillator time error. More specifically, the first Sync message is sent at time t11, the second Sync message is sent at time t21, the first Sync message is received at time t12, and the second Sync message is received at time t22. Therefore, Deltt3 = (t21 - t11) / N - (t22 - t12) / N, where Deltt3 represents the target crystal oscillator time error.

[0112] It should be noted that between adjacent synchronization time points, the unit counter starts counting from zero. Each time a correction is made, the current number of the unit counter is increased by 1 until it returns to zero at the next synchronization time point. It should be noted that although the total number of corrections is preset in advance, the counting process of the unit counter is unrelated to the total number of corrections. More specifically, the unit counter starts counting from zero at the current synchronization time point, and each time a correction is made, the number of the unit counter is increased by 1. When the next synchronization time point is reached, it returns to zero and starts counting again, and will not be affected by the current number of the unit counter. In other words, even if the unit counter is wrong, or the current number of the unit counter does not reach the total number of corrections, as long as the next synchronization time point is reached, the unit counter will be returned to zero and count again.

[0113] Therefore, the current number of corrections can be obtained using the unit counter. Furthermore, the target crystal oscillator time error is the total correction amount between adjacent synchronization time points. Therefore, the target correction amount for each correction must be determined based on the total number of corrections and the current number of corrections. The specific calculation process is described in the following three examples.

[0114] In one embodiment, referring to Figure 7 Step S104 may include but is not limited to the following steps:

[0115] Step S401, obtaining a single correction amount according to a ratio of a target crystal oscillator time error and a preset total number of corrections;

[0116] Step S402, obtaining the current number of calibrations through a preset unit counter;

[0117] Step S403: obtaining a target correction amount for the current number of corrections according to the product of the single correction amount and the current number of corrections.

[0118] Specifically, a single correction amount is first obtained based on the ratio of the target crystal oscillator time error and the total number of corrections. If it is the first correction, the device time of the slave device is corrected based on the single correction amount. If it is the second correction, the single correction amount is multiplied by 2 to obtain the target correction amount. The calculation of subsequent target correction amounts is analogous. In one example, calculation formula 1 is Rectify(M) = (Deltt / P)*M; where M represents the current number of corrections, Rectify(M) represents the target correction amount for the Mth time, and P represents the total number of corrections. Deltt can be Deltt1, Deltt2, or Deltt3.

[0119] It should be noted that the target crystal oscillator time error is relatively small, typically within 1 second. Therefore, the above calculation method loses some floating-point numbers when calculating the single correction value. This results in correction errors during the first calibration. Furthermore, since the target correction value is subsequently determined based on the product of the single correction value and the current number of corrections, correction errors accumulate during subsequent calibrations. This impacts the accuracy of the slave device's time correction, and thus the synchronization accuracy between the slave and master devices. Based on this, the following improved algorithm is proposed.

[0120] In one embodiment, referring to Figure 8 Step S104 may include but is not limited to the following steps:

[0121] Step S501, obtaining the current number of calibration times through a preset unit counter;

[0122] Step S502, obtaining an initial correction amount according to the product of the target crystal oscillator time error and the current number of corrections;

[0123] Step S503: Obtain a target correction amount according to a ratio of the initial correction amount to the total number of corrections.

[0124] Specifically, with Figure 7 The calculation process is different from that of the previous embodiment. In this embodiment, the initial correction amount is first obtained by multiplying the target crystal oscillator time error by the current number of corrections. In this way, the target crystal oscillator time error can be amplified according to the current number of corrections, which can reduce the floating point numbers generated in subsequent calculations. Then, the target correction amount corresponding to the current number of corrections is obtained based on the ratio of the initial correction amount to the total number of corrections. It can be understood that the target correction amount of this embodiment is the same as the target correction amount of the first correction. Figure 7 The single correction amount is the same as Figure 7 Compared with the correction error generated by the calculation method of FIG, this embodiment can reduce the correction error in the correction process and further improve the accuracy of time synchronization.

[0125] In one example, calculation formula 2 is Rectify(M)=Deltt*M / P, where M represents the current number of corrections, Rectify(M) represents the target correction amount for the Mth time, and P represents the total number of corrections. Deltt can be Deltt1, Deltt2, or Deltt3.

[0126] In one embodiment, referring to Figure 9 Step S104 may include but is not limited to the following steps:

[0127] Step S601, obtaining the current number of calibration times through a preset unit counter;

[0128] Step S602, obtaining an initial correction value according to the product of the target crystal oscillator time error, the preset amplification factor and the current number of corrections;

[0129] Step S603 : obtaining a target correction amount according to the ratio of the initial correction amount to the product of the total number of corrections and the preset amplification factor.

[0130] Specifically, with Figure 8The calculation method is similar. In this embodiment, a preset amplification factor is introduced to amplify the target crystal oscillator time error according to the current number of corrections and the preset amplification factor, which can reduce the floating-point numbers generated by subsequent calculations. The correction error in the correction process is further reduced, and the accuracy of time synchronization is further improved. In one example, calculation formula 3 is Rectify(M) = (Deltt*L*M) / (P*L); wherein M represents the current number of corrections, Rectify(M) represents the target correction amount for the Mth time, L represents the preset amplification factor, and P represents the total number of corrections. Deltt can be Deltt1, Deltt2, or Deltt3. It should be noted that calculation formula 3 of this embodiment has the characteristic of high linearity, so that the target correction amount of the entire synchronization time point is evenly distributed, ensuring that the time synchronization of each correction is the highest.

[0131] In one embodiment, the first Sync message is the (i-1)th Sync message sent by the master device, and the second Sync message is the (i)th Sync message sent by the master device, where i is a positive integer greater than or equal to 2. Step S105 may include but is not limited to the following steps:

[0132] The device time between the i-th synchronization time point and the i+1-th synchronization time point of the slave device is corrected according to the target correction amount.

[0133] Specifically, considering that the device time of the master device and the device time of the slave device need to be synchronized with high precision, it is best to determine the target correction amount through similar time synchronization messages to further improve the accuracy of time synchronization. In one example, the slave device receives the i-1th Sync message at the i-1th synchronization time point, and receives the i-th Sync message at the i-th synchronization time point. The sending time of the i-1th Sync message, the receiving time of the i-1th Sync message, the sending time of the i-th Sync message, and the receiving time of the i-th Sync message are calculated to obtain the target crystal oscillator time error. Then according to Figure 8 The calculation method of the embodiment calculates the target crystal oscillator time error to obtain a target correction amount. The device time between the i-th synchronization time point and the i+1-th synchronization time point of the slave device is then corrected based on the target correction amount. This embodiment further improves the accuracy of time synchronization.

[0134] In one embodiment, referring to Figure 10 Step S105 may include but is not limited to the following steps:

[0135] Step S701: If the target correction amount is a positive value, the device time between the synchronization time points of the slave device is corrected according to the target correction amount;

[0136] Step S702 : If the target correction amount is a negative value, the crystal oscillator clock of the slave device is controlled to pause and maintain at least a pause duration corresponding to the target correction amount or a preset pause duration.

[0137] Specifically, the target correction amount can be positive or negative, indicating that the target crystal oscillator time error can also be positive or negative. If the target crystal oscillator time error is positive, it indicates that the master device's crystal oscillator clock is running faster than the slave device's crystal oscillator clock. If the target crystal oscillator time error is negative, it indicates that the master device's crystal oscillator clock is running slower than the slave device's crystal oscillator clock. In this embodiment, if the target correction amount is positive, the slave device's device time is normally corrected based on the target correction amount to ensure that the slave device time is consistent with the master device time. If the target correction amount is negative, the slave device's device time is not corrected. Instead, the slave device's crystal oscillator clock is controlled to pause, slowing down the slave device's crystal oscillator clock. The specific duration of the pause can be preset. For example, each time the crystal oscillator clock needs to pause, it must pause for a preset pause duration. Alternatively, each time the crystal oscillator clock needs to pause, a corresponding pause duration is calculated based on the target correction amount, and the slave device's crystal oscillator clock must pause for that corresponding pause duration. It should be noted that if the target correction amount is a negative value, the smaller the target correction amount is, the longer the corresponding pause duration is calculated.

[0138] Reference Figure 11 , this embodiment provides a specific application example. The master device and the slave device perform time synchronization through the PTP protocol with a period of 1 second, and the interval between adjacent synchronization time points is 1 second. At each synchronization time point, the device time of the slave device is adjusted by the device time deviation. Between the synchronization time points, the preset total number of corrections is 10,000 times, that is, 10,000 corrections per second, which is equivalent to a correction every 100 microseconds. Each time a correction is made, the unit counter is incremented by one. At the synchronization time point, the unit counter is reset to zero, and after each correction, it is incremented by one. Between the synchronization time points, the crystal oscillator clock of the slave device runs freely. However, at the synchronization time point, the crystal oscillator clock is reset to zero. The target correction amount corresponding to the current number of corrections is determined by the crystal oscillator time error and the total number of corrections. The device time of the slave device is corrected according to the obtained target correction amount every 100 microseconds to achieve high-precision time synchronization.

[0139] For example, if the interval between adjacent synchronization time points is 1 second, the total number of corrections is 10,000, meaning 10,000 corrections per second, or one correction every 100 microseconds. When i = 2, the i-1th synchronization time point corresponds to the first synchronization time point, the ith synchronization time point corresponds to the second synchronization time point, and the i+1th synchronization time point corresponds to the third synchronization time point. Based on the Sync messages from the first and second synchronization time points, Deltt, the crystal oscillator time error, can be determined. Between the second and third synchronization time points, the target correction amount for each correction is calculated using Formula 3: Rectify(M) = (Deltt*L*M) / (P*L). M = 1 indicates the first correction, meaning correction is performed at the 100th microsecond. M = 2 indicates the second correction, meaning correction is performed at the 200th microsecond. Similarly, M=9999 indicates the 9999th correction, i.e., correction is performed at the 9999*100 microsecond mark. L represents the preset amplification factor, for example, 16. P represents the total number of corrections, i.e., 10000. Deltt is the crystal oscillator time error. If M=1, the target correction amount Rectify(1)=(Deltt*L*M) / (P*L)=(Deltt*16*1) / (10000*16). If M=2, the target correction amount Rectify(2)=(Deltt*L*M) / (P*L)=(Deltt*16*2) / (10000*16). Similarly, if M=9999, the target correction amount Rectify(9999)=(Deltt*L*M) / (P*L)=(Deltt*16*9999) / (10000*16). The device time of the slave device between the second and third synchronization points is corrected every 100 microseconds based on the target correction amount, achieving high-precision time synchronization. Furthermore, the device time of the slave device between subsequent adjacent synchronization points is corrected every 100 microseconds based on the target correction amount, achieving high-precision time synchronization.

[0140] In one embodiment, the slave device includes an FPGA processor, and the high-precision time synchronization method of the data acquisition system is implemented by the FPGA processor; the FPGA processor includes: a GTX high-speed communication module and a PTP slave module. Figure 12 As shown, Figure 12 This is a schematic diagram of the module structure of a method for executing a high-precision time synchronization method for a data acquisition system provided by an embodiment of the present application. Figure 12In the example, the module structure of the slave device includes a GTX high-speed communication module and a PTP slave module. The GTX high-speed communication module obtains the Sync message from the master device; the PTP slave module receives the Sync message from the high-speed communication module and executes any one of the high-precision time synchronization methods for a data acquisition system as described in the above method embodiments. More specifically, the PTP slave module includes a message processing module (PTP_rtx), a crystal oscillator time error calculation module (Calc_osc), a device time deviation calculation module (Calc_ptp), and a time output module (Ptp_time). Each module corresponds to the steps of the high-precision time synchronization method for a data acquisition system as described above.

[0141] At each synchronization point, the device time deviation is calculated using the device time deviation calculation module. The slave device's device time is adjusted based on this device time deviation. This ensures that the slave device's device time is synchronized with the master device's device time at the synchronization point. Between adjacent synchronization points, the crystal oscillator time error is calculated using the crystal oscillator time error calculation module. The slave device's device time is corrected based on this crystal oscillator time error. This further synchronizes the slave device's device time with the master device's device time between adjacent synchronization points, improving time synchronization accuracy.

[0142] Furthermore, implementing the high-precision time synchronization method for the data acquisition system of the present embodiment using an FPGA processor can improve processing speed and accuracy, contributing to further improving the accuracy of time synchronization. The time synchronization accuracy of the present embodiment can reach within 40ns. The crystal oscillator clock frequency of the slave device in the present embodiment is 125MHz, a common frequency in FPGA processor designs. This achieves optimal synchronization accuracy through a logic algorithm without increasing the crystal oscillator clock frequency. This facilitates portability and offers high reliability. It also avoids increasing chip power consumption, reducing hardware costs.

[0143] It should be noted that the specific implementation of the PTP slave module is basically the same as the specific embodiment of the high-precision time synchronization method of the above-mentioned data acquisition system, and will not be repeated here. Figure 4 Steps S101 to S105 of the method, Figure 5 Steps S210 to S220 of the method, Figure 6 Steps S301 to S303 of the method, Figure 7 Steps S401 to S403 of the method, Figure 8 Steps S501 to S503 of the method, Figure 9 Steps S601 to S603 of the method, Figure 10 Method steps S701 to S702 in .

[0144] It should also be noted that to ensure time synchronization accuracy, the preset total number of corrections between adjacent synchronization time points is 1,000-100,000. More specifically, if the interval between synchronization time points is 1 second, the total number of corrections is 10,000. If the interval between synchronization time points is 2 seconds, the total number of corrections is 20,000. Generally, 10,000 corrections per second between synchronization time points is sufficient.

[0145] The present application also provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory. When the processor executes the computer program, a high-precision time synchronization method for a data acquisition system as described in any of the above method embodiments is implemented. The electronic device can be Figure 1 The node collector shown in , or a slave device that performs time synchronization through the PTP protocol.

[0146] See also Figure 13 , Figure 13 The hardware structure of an electronic device according to another embodiment is shown. The electronic device includes:

[0147] The processor 801 can be implemented as a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present application.

[0148] The memory 802 can be implemented in the form of a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 802 can store an operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented by software or firmware, the relevant program codes are stored in the memory 802, and the processor 801 calls and executes the high-precision time synchronization method of the data acquisition system of the embodiment of the present application; for example, the above-described Figure 4 Steps S101 to S105 of the method, Figure 5 Steps S210 to S220 of the method, Figure 6 Steps S301 to S303 of the method, Figure 7 Steps S401 to S403 of the method, Figure 8 Steps S501 to S503 of the method, Figure 9 Steps S601 to S603 of the method, Figure 10 Method steps S701 to S702 in .

[0149] Input / output interface 803, used to implement information input and output;

[0150] Communication interface 804, used to implement communication interaction between this device and other devices, which can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WiFi, Bluetooth, etc.);

[0151] Bus 805 , which transmits information between various components of the device (e.g., processor 801 , memory 802 , input / output interface 803 , and communication interface 804 );

[0152] The processor 801 , the memory 802 , the input / output interface 803 and the communication interface 804 are connected to each other in communication within the device via a bus 805 .

[0153] A data acquisition system includes a master device and at least one electronic device, wherein the master device is communicatively connected to the electronic device. The master device and the slave device interact via the PTP protocol at each synchronization time point to achieve time synchronization.

[0154] The present application also provides a storage medium that stores a computer program. When the computer program is executed by a processor, the high-precision time synchronization method of any data acquisition system in the above embodiments is implemented. Figure 4 Steps S101 to S105 of the method, Figure 5 Steps S210 to S220 of the method, Figure 6 Steps S301 to S303 of the method, Figure 7 Steps S401 to S403 of the method, Figure 8 Steps S501 to S503 of the method, Figure 9 Steps S601 to S603 of the method, Figure 10 Method steps S701 to S702 in .

[0155] The memory, as a non-transient computer-readable storage medium, can be used to store non-transient software programs and non-transient computer executable programs. In addition, the memory may include a high-speed random access memory and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0156] It should be noted that the electronic device, data acquisition system and storage medium in the embodiments of the present application can execute the high-precision time synchronization method of the data acquisition system of any one of the above embodiments. Therefore, these embodiments have the same implementation principles and technical effects as the above method embodiments and will not be described in detail here.

[0157] The embodiments described in the embodiments of this application are intended to more clearly illustrate the technical solutions of the embodiments of this application and do not constitute a limitation on the technical solutions provided by the embodiments of this application. Those skilled in the art will appreciate that with the evolution of technology and the emergence of new application scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0158] It will be understood by those skilled in the art that Figure 4-10 The technical solutions shown in the figures do not constitute a limitation on the embodiments of the present application, and may include more or fewer steps than those shown in the figures, or a combination of certain steps, or different steps.

[0159] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, i.e., they may be located in one place or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of this embodiment.

[0160] Those skilled in the art will appreciate that all or some of the steps in the methods, systems, and functional modules / units in the devices disclosed above may be implemented as software, firmware, hardware, or appropriate combinations thereof.

[0161] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0162] It should be understood that in this application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0163] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0164] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0165] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0166] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes multiple instructions for enabling an electronic device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store programs, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0167] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but are not intended to limit the scope of the present invention. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and essence of the present invention should be within the scope of the present invention.

Claims

1. A high-precision time synchronization method for a data acquisition system, characterized in that: A slave device applied to a data acquisition system, the data acquisition system comprising a master device and a slave device, the master device and the slave device interacting via the PTP protocol at each synchronization time point, the method comprising: Obtaining a sending time of a Sync message sent by the master device; wherein the Sync message includes at least a first Sync message and a second Sync message, and the sending time includes a sending time of the first Sync message and a sending time of the second Sync message; wherein the Sync message is a time synchronization message of the PTP protocol; Obtaining a reception time of the Sync message received by the slave device; the reception time includes the reception time of the first Sync message and the reception time of the second Sync message; the reception time is used to represent the crystal oscillator clock timing of the slave device receiving the Sync message; wherein, at the synchronization time point, the crystal oscillator clock timing of the slave device is reset to zero, and between the synchronization time points, the crystal oscillator clock of the slave device runs freely; Calculate the target crystal oscillator time error between synchronization time points according to the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message; Determining a target correction amount for the current number of corrections based on the target crystal oscillator time error, the current number of corrections, and a preset total number of corrections between synchronization time points; The device time between the synchronization time points of the slave devices is corrected according to the target correction amount.

2. The method according to claim 1, characterized in that The first Sync message and the second Sync message are adjacent messages; The calculating, according to the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message, a target crystal oscillator time error between synchronization time points includes: Calculate a first difference based on the sending time of the first Sync message and the sending time of the second Sync message; Calculate a second difference based on the reception time of the first Sync message and the reception time of the second Sync message; The target crystal oscillator time error is calculated based on the first difference and the second difference.

3. The method according to claim 1, characterized in that The first Sync message and the second Sync message are messages separated by N synchronization time points, where N is a positive integer greater than or equal to 2; The calculating, according to the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message, a target crystal oscillator time error between synchronization time points includes: Calculate a first difference based on the sending time of the first Sync message and the sending time of the second Sync message; Calculate a second difference based on the reception time of the first Sync message and the reception time of the second Sync message; The target crystal oscillator time error is calculated based on N, the first difference, and the second difference.

4. The method according to any one of claims 1 to 3, characterized in that The first Sync message is the i-1th Sync message sent by the master device, and the second Sync message is the i-th Sync message sent by the master device, where i is a positive integer greater than or equal to 2; Correcting the device time between the synchronization time points of the slave devices according to the target correction amount includes: The time between the i-th synchronization time point and the (i+1)-th synchronization time point of the slave device is corrected according to the target correction amount.

5. The method according to any one of claims 1 to 3, characterized in that The determining a target correction amount of the current number of corrections according to the target crystal oscillator time error, the current number of corrections, and a preset total number of corrections between synchronization time points includes: A single correction amount is obtained according to a ratio of the target crystal oscillator time error to a preset total correction number; a current correction number is obtained by a preset unit counter; and a target correction amount for the current correction number is obtained according to a product of the single correction amount and the current correction number; or, Obtaining the current number of corrections through a preset unit counter; obtaining an initial correction amount based on the product of the target crystal oscillator time error and the current number of corrections; and obtaining a target correction amount based on the ratio of the initial correction amount to the total number of corrections; or, The current number of corrections is obtained through a preset unit counter; an initial correction amount is obtained based on the product of the target crystal oscillator time error, a preset amplification factor and the current number of corrections; and a target correction amount is obtained based on the ratio of the initial correction amount to the product of the total number of corrections and the preset amplification factor.

6. The method according to any one of claims 1 to 3, characterized in that Correcting the device time between the synchronization time points of the slave devices according to the target correction amount includes: If the target correction amount is a positive value, correcting the time between the synchronization time points of the slave devices according to the correction amount; If the target correction amount is a negative value, the crystal oscillator clock of the slave device is controlled to pause and maintain at least a pause duration corresponding to the target correction amount or a preset pause duration.

7. The method according to any one of claims 1 to 3, characterized in that The slave device includes an FPGA processor, and the method is implemented by the FPGA processor; The FPGA processor includes: a GTX high-speed communication module and a PTP slave module; The method further comprises: The GTX high-speed communication module obtains the Sync message from the master device; The PTP slave module receives the Sync message from the high-speed communication module and executes: The obtaining of the sending time of the Sync message sent by the master device; wherein the Sync message includes at least a first Sync message and a second Sync message, and the sending time includes the sending time of the first Sync message and the sending time of the second Sync message; wherein the Sync message is a time synchronization message of the PTP protocol; The obtaining of the receiving time of the Sync message by the slave device; the receiving time includes the receiving time of the first Sync message and the receiving time of the second Sync message; the receiving time is used to represent the crystal oscillator clock timing of the slave device receiving the Sync message; The target crystal oscillator time error is calculated according to the sending time of the first Sync message, the sending time of the second Sync message, the receiving time of the first Sync message, and the receiving time of the second Sync message; The target correction amount of the current correction number is determined according to the target crystal oscillator time error, the current correction number and the preset total correction number between the synchronization time points; wherein the total correction number is 1000-100000; The device time between synchronization time points of the slave devices is corrected according to the target correction amount.

8. An electronic device, characterized in that: The electronic device includes a memory and a processor, the memory stores a computer program, and the processor implements the method according to any one of claims 1 to 7 when executing the computer program.

9. A data acquisition system, characterized in that: The device comprises a main device and at least one electronic device according to claim 8, wherein the main device is communicatively connected with the electronic device.

10. A storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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