A GPU power consumption control method for SLAM

Abstract

A GPU power consumption control strategy for SLAM (Simulated Local Area Mapping) relates to the field of computer architecture and is designed to reduce the energy consumption of SLAM-based GPUs. This method includes establishing a GPU performance and power consumption model, selecting key configuration parameters to conduct design space exploration on a GPU running SLAM, obtaining the energy consumption and runtime of each SLAM core under each corresponding configuration, comparing the runtime of all configurations explored in the design space with the runtime of a baseline configuration, and selecting the configuration with the lowest energy consumption as the final running configuration among all configurations whose runtime difference is less than a set threshold. Additional configurations are then shut down using power gating technology, and DVFS is used to neutralize the runtime increase caused by the application of power gating. This can simultaneously reduce the time and power consumption of GPUs running SLAM.

Description

Technical Field

[0001] The present invention relates to the field of computer architecture, and in particular to a GPU power consumption control strategy for SLAM. Background Art

[0002] Simultaneous localization and mapping (SLAM) is a core component in many embedded applications, such as robotics and augmented and virtual reality. Due to the high computational requirements of SLAM, general-purpose graphics processing units (GPGPUs) are often used as processing engines. Furthermore, embedded systems often have strict power constraints. Therefore, providing the performance required for SLAM while still meeting power constraints presents a significant challenge for GPGPU designers.

[0003] Because the GPU running SLAM often uses incomplete configurations, that is, certain parts of certain configurations will be idle for a relatively long time during the operation of the SLAM kernel, and the idle parts will also generate corresponding power consumption during operation. At this stage, there is no relevant technology that can effectively solve this corresponding power consumption. Therefore, power gating is applied to this. That is, when certain configurations do not need to be reduced and have little impact on performance, power gating is used to turn off certain parts to significantly reduce energy consumption. At the same time, because power gating can cause a slight decrease in performance, dynamic voltage frequency scaling (DVFS) is also applied to neutralize the performance decrease. Summary of the Invention

[0004] The present invention provides a SLAM-oriented GPU power consumption control method to reduce the energy consumption of the SLAM-oriented GPU.

[0005] A GPU power consumption control method for SLAM is implemented by the following steps:

[0006] Step 1: Design space exploration: Building a GPU power consumption performance model on the simulator based on the space exploration, and selecting parameters and DVFS frequencies of key devices in the design space exploration using the model;

[0007] Step 2: Setting power gating on the key device of the design space exploration described in step 1, and setting a power gating manager in the simulator to control the state of the power gating;

[0008] Step 3: Perform space design space exploration on the simulator according to the parameters of the key space exploration equipment selected in step 1, and obtain the running time and power consumption of SLAM under all configurations;

[0009] Step 4: Select the design space exploration benchmark and use the optimal configuration search algorithm to search for the optimal configuration and optimal frequency;

[0010] Step 5: Use the optimal configuration and optimal frequency obtained in step 4 to adjust the power gating state and DVFS.

[0011] The control method described herein utilizes power gating to significantly reduce energy consumption by shutting down certain components when high energy consumption is not required. Furthermore, since power gating can lead to a slight performance degradation, dynamic voltage and frequency scaling (DVFS) is employed to mitigate this performance degradation. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a flowchart of a GPU power consumption control method for SLAM according to the present invention;

[0013] Figure 2 This is a flowchart of an optimal configuration search algorithm in a GPU power consumption control method for SLAM according to the present invention;

[0014] Figure 3 The figure is a block diagram of the power gating manager in the GPU. DETAILED DESCRIPTION

[0015] Combine Figures 1 to 3 This embodiment describes a method for controlling GPU power consumption for SLAM, which is implemented by the following steps:

[0016] Step 1: Design space exploration. Based on this design space exploration, a model of the Nvidia Jetson Xavier NX, an AR / VR-oriented GPU, is built on a GPU simulator. Design space exploration is then performed to obtain the corresponding power consumption and performance model.

[0017] In this implementation, key device parameters such as the number of streaming multiprocessor computing units (SMs) and the number of streaming processors (SPs) of a GPU are selected as configurations for design space exploration;

[0018] Step 2: Add power gating to the key devices and select the GPU's main frequency. Using the intermediate frequency as the base and a fixed frequency difference as the gear, select a frequency centered on the base frequency with a fixed gear difference as the frequency DVFS parameter.

[0019] In this implementation, power gating requires architecture-level support, so a hardware unit of a power gating manager is set up, that is, the power gating manager controls the opening and closing of power gating of key devices described in step 1. Figure 3. The power gating manager is used to control the opening and closing operations of SM, SP, register file, first-level instruction cache, first-level data cache and second-level cache. Since GPUs usually have only a small number of SMs, power gating can be used to control each SM, that is, each SM uses a sleep transistor; GPUs have many SPs, so the control of SM is controlled at a group granularity, for example, 16 SPs are controlled by one sleep transistor; similarly, the register file is also controlled in this way, for example, 16K registers are connected to the same sleep transistor, and one transistor is used to control the opening and closing of 16K registers; for the cache, only the number of channels is changed, which means that each channel is controlled by a sleep transistor.

[0020] Step 3: Based on the parameters of the key devices selected in Step 1, perform design space exploration on the established simulator and record the running time and power consumption of all kernels;

[0021] Step 4: Use all GPUs with the highest configuration as the baseline configuration for design space exploration. Compare the optimal configuration search algorithm established based on the running time and power consumption of each SLAM kernel under the baseline configuration with the running time and power consumption of each kernel corresponding to all configurations in the design space exploration to search for the optimal configuration, that is: based on the running time corresponding to the baseline configuration and the set threshold, select the configuration corresponding to the minimum power consumption with a running time less than the threshold in the design space exploration as the optimal configuration. Then, the DVFS adjustment frequency is obtained according to the optimal configuration search algorithm, and two DVFS parameters near the DVFS adjustment frequency are selected as quasi-optimal frequencies. Based on the optimal configuration of the GPU, the GPU frequency is adjusted to the quasi-optimal frequency through GPU on-chip adjustment, and the frequency with the smallest power consumption × running time is selected as the optimal frequency. The specific process is as follows: Figure 2 As shown;

[0022] Step A: Set the benchmark running time t1, power consumption and detection configuration into the simulator, set the minimum power consumption W1 as the benchmark power consumption, and the optimal configuration as the benchmark configuration;

[0023] Step B: Design space exploration running time t2, power consumption W2, and the detected configuration are passed into the simulator;

[0024] Step C: Determine whether the difference between t2 and t1 is less than a threshold; if so, proceed to step D; otherwise, proceed to step G;

[0025] Step D: Determine whether W2 is less than W1. If so, go to step E; otherwise, go to step G.

[0026] Step E: Replace W1 with W2, and replace the optimal configuration with the design space exploration configuration; proceed to step F;

[0027] Step F: Determine whether all the design space exploration configurations have been traversed. If so, proceed to step H; otherwise, proceed to step B.

[0028] Step G: Select the next design space exploration information and execute step F;

[0029] Step H: Use the optimal configuration to guide the opening and closing of the power gate, and multiply the ratio μ based on the reference frequency. c / μ m To obtain the DVFS adjustment frequency, two frequencies in the DVFS parameters that are close to the DVFS adjustment frequency are selected as quasi-optimal frequencies;

[0030] Step I: Perform DVFS on the optimally configured GPU to adjust its frequency to a quasi-optimal frequency through on-chip adjustment, and select the optimal frequency with the minimum power consumption × running time among the quasi-optimal frequencies.

[0031] In this implementation, the maximum configuration explored in the design space is selected as the baseline configuration. Excessively long runtimes are unacceptable, so a corresponding threshold is set based on the runtime of the baseline configuration, such as a tolerable runtime increase of less than 5%. Based on this threshold, the configuration with the lowest energy consumption is selected as the optimal configuration.

[0032] Then, the optimal frequency of each kernel is searched through the optimal configuration search algorithm. That is, the middle configuration of the design space exploration is selected as the benchmark hardware configuration H, and its corresponding running time is L H Keeping other configurations unchanged, we select five design space exploration configurations with SM, SP, L1 instruction cache, L1 data cache, and L2 cache that are one level higher than the baseline device as the guidance configurations for DVFS. The running time L corresponding to these five configurations is calculated. H+ΔH , that is, the running time of the GPU under the DVFS guidance hardware configuration, calculates the impact of these additional units on performance, and the formula is This method can be used to obtain the impact of SM, SP, first-level instruction cache, first-level data cache, and second-level cache on performance. SM 、k SP 、k L1I 、k L1D 、k L2 .k SM is the impact of the number of SMs on performance, k SP is the impact of the number of SPs on performance, k L1I is the impact of the L1 instruction cache size on performance, k L1D is the impact of the first-level data cache size on performance, k L2 The effect of the secondary cache size on performance. At the same time, two symbols μ are introduced c and μ mIndicates computational and memory constraints. c is the computational limit of the GPU, μ m is the memory limit of GPU; μ c Determined as k SM and k SP The maximum value of μ m Determined as k L1I 、k L1D and k L2 The maximum value of the ratio μ c / μ m Determine the optimal frequency after DVFS.

[0033] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0034] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.

Claims

1. A GPU power consumption control method for SLAM, characterized by: The method is implemented by the following steps: Step 1: Design space exploration: Building a GPU power consumption performance model on the simulator based on the space exploration, and selecting parameters and DVFS frequencies of key devices in the design space exploration using the model; Step 2: Setting power gating on the key device of the design space exploration described in step 1, and setting a power gating manager in the simulator to control the state of the power gating; Step 3: Perform design space exploration on the simulator based on the parameters of the key space exploration devices selected in step 1 to obtain the running time and power consumption of SLAM under all configurations; Step 4: Select the design space exploration benchmark and use the optimal configuration search algorithm to search for the optimal configuration and optimal frequency; Step 5: Use the optimal configuration and optimal frequency obtained in step 4 to adjust the power gating state and DVFS.

2. The method for controlling GPU power consumption for SLAM according to claim 1, wherein: In step 1, the design space exploration specifically involves selecting the number of streaming multiprocessor computing units and the number of streaming processors of the GPU as parameters of key devices; At the same time, the main frequency of the GPU is selected, with the middle frequency as the benchmark and the fixed frequency difference as the gear. The frequency centered on the benchmark frequency and with the fixed gear difference is selected as the DVFS parameter of the frequency.

3. The method for controlling GPU power consumption for SLAM according to claim 1, wherein: In step 4, the GPU with the highest configuration is selected as the benchmark for design space exploration. The optimal configuration search algorithm is established based on the running time and power consumption of SLAM under the benchmark configuration to search for the optimal configuration and frequency.

4. The method for controlling GPU power consumption for SLAM according to claim 3, wherein: The specific process of the optimal configuration search algorithm is as follows: A threshold is set based on the runtime of the benchmark configuration, and the runtime of each configuration in the design space exploration is determined to be less than the threshold. Among the configurations whose runtime is less than the threshold, the configuration with the lowest energy consumption is selected as the optimal configuration. Based on the optimal configuration, the GPU frequency is adjusted by DVFS, and the frequency corresponding to power consumption × minimum running time is searched as the optimal frequency of the GPU operation.

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