Limiting current control circuit and operational amplifier

Abstract

The application provides a static current control circuit of an operational amplifier and the operational amplifier. The control circuit comprises a first limit control module and a second limit control module. The first limit control module collects a current source output voltage output by a current source driving module. When the current source output voltage is less than a first reference voltage, the current source driving current of the current source driving module is shunted, and the current source driving module reduces the output first limit current according to the reduced current source driving current. The second limit control module collects a current sink output voltage output by a current driving module. When the current sink output voltage is greater than a second reference voltage, the current sink driving current is shunted, and the current sink driving module reduces the output second limit current according to the reduced current sink driving current, so that the control of the first limit current and the second limit current is realized respectively.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuit technology, and particularly relates to a limit current control circuit and an operational amplifier. BACKGROUND

[0002] The operational amplifier is widely used in integrated circuits, and the limit current is an important index of the power operational amplifier. The output limit current refers to the maximum current that the operational amplifier can output. The maximum current outputted by the power operational amplifier in the positive direction is the output limit current of the current source, and the maximum current outputted by the power operational amplifier in the negative direction is the output limit current of the current sink.

[0003] In the prior art, the NPN transistor is usually directly used to control the limit current of the current source, and the PNP transistor is used to control the output limit current of the current sink. Then, the output limit current value is related to the process parameters of the NPN and PNP, and there is a certain error between the absolute parameters and the actual value. When the base-emitter voltage of the NPN and the PNP is not equal, the output limit current values of the current source and the current sink are not equal, which will make the limit current of the operational amplifier cannot be accurately adjusted. SUMMARY

[0004] In view of the problems in the prior art, the present application provides a limit current control circuit and an operational amplifier, which solves the problem that the limit current of the operational amplifier cannot be accurately adjusted in the prior art.

[0005] In a first aspect, the present application provides a limit current control circuit applied to an operational amplifier, wherein the operational amplifier comprises a current source driving module and a current sink driving module, and the control circuit comprises a first limit control module and a second limit control module; the first limit control module is connected with the current source driving module, and is used to shunt the current source driving current of the current source driving module when the current source output voltage outputted by the current source driving module is less than a first reference voltage; the current source driving module is used to reduce the output of the first limit current according to the reduced current source driving current; the second limit control module is connected with the current sink driving module, and is used to shunt the current sink driving current of the current sink driving module when the current sink output voltage outputted by the current sink driving module is greater than a third reference voltage; and the current sink driving module is used to reduce the output of the second limit current according to the reduced current sink driving current.

[0006] Optionally, the first limit control module comprises a third amplifier and a thirteenth NPN transistor; the non-inverting input terminal of the third amplifier is connected with the current source driving module, the inverting input terminal of the third amplifier is used for receiving a first reference voltage, and the output terminal of the third amplifier is connected with the base of the thirteenth NPN transistor; the collector of the thirteenth NPN transistor is connected with the current source driving module, and the emitter of the thirteenth NPN transistor is connected with the current source driving module.

[0007] Optionally, the control circuit further comprises a first reference source module connected with the first limit control module and used for providing the first limit control module with a first reference voltage; the first reference source module comprises a fifth current source and an eighth resistor; the first terminal of the fifth current source is connected with the first terminal of an external power supply, the second terminal of the fifth current source is connected with the inverting input terminal of the third amplifier and the first terminal of the eighth resistor respectively; and the second terminal of the eighth resistor is connected with the emitter of the thirteenth NPN transistor and the current source driving module.

[0008] Optionally, the second limit control module comprises a fourth amplifier and a twelfth NPN transistor; the non-inverting input terminal of the fourth amplifier is connected with the current sink driving module, the inverting input terminal of the fourth amplifier is used for receiving a second reference voltage, and the output terminal of the fourth amplifier is connected with the base of the twelfth NPN transistor; the collector of the twelfth NPN transistor is connected with the current sink driving module, and the emitter of the twelfth NPN transistor is connected with the current sink driving module.

[0009] Optionally, the control circuit comprises a second reference source module connected with the second limit control module and used for providing the second limit control module with a second reference voltage; the second reference source module comprises a sixth current source and a ninth resistor; the first terminal of the sixth current source is connected with the first terminal of an external power supply, the second terminal of the sixth current source is connected with the inverting input terminal of the fourth amplifier and the first terminal of the ninth resistor respectively; and the second terminal of the ninth resistor is connected with the emitter of the twelfth NPN transistor and the current sink driving module respectively.

[0010] Optionally, the first limit control module comprises a thirteenth NPN transistor, a twelfth PNP transistor, a tenth PNP transistor, an eleventh PNP transistor, a twenty-fifth NPN transistor, a twenty-sixth NPN transistor, a ninth PNP transistor and a thirteenth PNP transistor; the base of the thirteenth NPN transistor is connected with the collector of the tenth PNP transistor and the collector of the twenty-fifth NPN transistor respectively, the collector of the thirteenth NPN transistor is connected with the current source driving module, and the emitter of the thirteenth NPN transistor is connected with the collector of the twelfth PNP transistor; the base of the twelfth PNP transistor is used for receiving a first reference voltage, the emitter of the twelfth PNP transistor is connected with the base of the tenth PNP transistor; the base of the ninth PNP transistor is used for receiving a reference current, the emitter of the ninth PNP transistor is connected with the first end of an external power supply, and the collector of the ninth PNP transistor is connected with the emitter of the tenth PNP transistor and the emitter of the eleventh PNP transistor respectively; the base of the eleventh PNP transistor is connected with the emitter of the thirteenth PNP transistor, and the collector of the eleventh PNP transistor is connected with the collector of the twenty-sixth NPN transistor; the base of the twenty-fifth NPN transistor is connected with the base of the twenty-sixth NPN transistor, the emitter of the twenty-fifth NPN transistor is connected with the collector of the twelfth PNP transistor; the base of the twenty-sixth NPN transistor is connected with the collector, and the emitter of the twenty-sixth NPN transistor is connected with the emitter of the twenty-fifth NPN transistor; the base of the thirteenth PNP transistor is connected with the current source driving module, and the collector of the thirteenth PNP transistor is connected with the emitter of the twenty-sixth NPN transistor and the current source driving module respectively.

[0011] Optionally, the first reference source module comprises: a seventh current source, a fourteenth NPN transistor, a fifteenth NPN transistor, a second PNP transistor, an eighth PNP transistor and an eighth resistor; a first end of the seventh current source is connected with a first end of an external power supply, a second end of the seventh current source is connected with a collector of the fourteenth NPN transistor; a base of the fourteenth NPN transistor is connected with a base of the fifteenth NPN transistor, a collector of the fourteenth NPN transistor is connected with a base of the fourteenth NPN transistor, an emitter of the fourteenth NPN transistor is connected with a second end of the external power supply; a collector of the fifteenth NPN transistor is connected with a collector of the second PNP transistor, an emitter of the fifteenth NPN transistor is connected with a second end of the external power supply; a base of the second PNP transistor is connected with a base of the eighth PNP transistor, an emitter of the second PNP transistor is connected with a first end of the external power supply; a collector of the eighth PNP transistor is connected with a base of the twelfth PNP transistor and a first end of the eighth resistor respectively, an emitter of the eighth PNP transistor is connected with the first end of the external power supply; a second end of the eighth resistor is connected with the current source driving module.

[0012] Optionally, the second limit control module comprises: a seventh PNP transistor, a twelfth NPN transistor, a sixteenth PNP transistor, a fourteenth PNP transistor, a fifteenth PNP transistor, a twenty-third NPN transistor, a twenty-fourth NPN transistor and a seventeenth PNP transistor; a base of the twelfth NPN transistor is connected with a collector of the fourteenth PNP transistor and a collector of the twenty-third NPN transistor respectively, a collector of the twelfth NPN transistor is connected with the current sink driving module, an emitter of the twelfth NPN transistor is connected with the current sink driving module; a base of the sixteenth PNP transistor is used for receiving a second reference voltage, an emitter of the sixteenth PNP transistor is connected with a base of the fourteenth PNP transistor, a collector of the sixteenth PNP transistor is connected with the current sink driving module; a base of the seventh PNP transistor is used for receiving a reference current, an emitter of the seventh PNP transistor is connected with a first end of an external power supply, a collector of the seventh PNP transistor is connected with an emitter of the fourteenth PNP transistor and an emitter of the fifteenth PNP transistor respectively; a base of the fifteenth PNP transistor is connected with an emitter of the seventeenth PNP transistor, a collector of the fifteenth PNP transistor is connected with a collector of the twenty-fourth NPN transistor; a base of the twenty-third NPN transistor is connected with a base of the twenty-fourth NPN transistor, an emitter of the twenty-third NPN transistor is connected with an emitter of the twenty-fourth NPN transistor; a base of the twenty-fourth NPN transistor is connected with a collector of the twenty-fourth NPN transistor; a base of the seventeenth PNP transistor is connected with the current sink driving module, a collector of the seventeenth PNP transistor is connected with the current sink driving module.

[0013] Optionally, the second reference source module comprises: a seventh current source, a fourteenth NPN transistor, a fifteenth NPN transistor, a second PNP transistor, a sixth PNP transistor and a ninth resistor; the first end of the seventh current source is connected with the first end of the external power supply, and the second end of the seventh current source is connected with the collector of the fourteenth NPN transistor; the base of the fourteenth NPN transistor is connected with the base of the fifteenth NPN transistor, the collector of the fourteenth NPN transistor is connected with the base, and the emitter of the fourteenth NPN transistor is connected with the second end of the external power supply; the collector of the fifteenth NPN transistor is connected with the collector of the second PNP transistor, and the emitter of the fifteenth NPN transistor is connected with the second end of the external power supply; the base of the second PNP transistor is connected with the base of the sixth PNP transistor, and the emitter of the second PNP transistor is connected with the first end of the external power supply; the emitter of the sixth PNP transistor is connected with the first end of the external power supply, the collector of the sixth PNP transistor is connected with the first end of the ninth resistor and the first end of the sixteenth PNP transistor; and the second end of the ninth resistor is connected with the current sink driving module.

[0014] In a second aspect, the present application provides an operational amplifier, comprising: an input stage module and a gain module; the input stage module is connected with the gain module, used for receiving an input voltage and outputting the input voltage to the gain module; the gain module is connected with the current source driving module and the current sink driving module respectively, used for amplifying the input voltage and outputting a current source driving voltage to the current source driving module, so that the current source driving module outputs a current source output voltage according to the current source driving voltage; and also used for amplifying the input voltage and outputting a current sink driving voltage to the current sink driving module, so that the current sink driving module outputs a current sink output voltage according to the current sink driving voltage; the input stage module comprises a first amplifier; the non-inverting input terminal of the first amplifier is connected with the output terminal of the current sink driving module, and the output terminal of the first amplifier is connected with the gain module; the gain module comprises a first N-type transistor, a first current source and a second current source; the base of the first N-type transistor is connected with the output terminal of the input stage module, the collector of the first N-type transistor is connected with the second end of the second current source, the current source driving module and the current sink driving module respectively, and the emitter of the first N-type transistor is connected with the first end of the first current source; the first end of the second current source is connected with the first end of an external power source, the second end of the first current source is connected with the second end of the external power source; the current source driving module comprises a second N-type transistor, a third N-type transistor, a second resistor and a third resistor; the base of the second N-type transistor is connected with the gain module, the collector of the second N-type transistor is connected with the first end of an external power source, and the emitter of the second N-type transistor is connected with the first end of the second resistor; the base of the third N-type transistor is connected with the emitter of the second N-type transistor, the collector of the third N-type transistor is connected with the first end of the external power source, and the emitter of the third N-type transistor is connected with the first end of the third resistor; the second end of the third resistor is connected with the first end of the second resistor; the current sink driving module comprises a fourth N-type transistor, a fifth N-type transistor, a fourth resistor and a fifth resistor; the base of the fourth N-type transistor is connected with the gain module, the collector of the fourth N-type transistor is connected with the first end of an external power source, and the emitter of the fourth N-type transistor is connected with the first end of the fourth resistor; the second end of the fourth resistor is connected with the second end of the external power source; the base of the fifth N-type transistor is connected with the emitter of the fourth N-type transistor, the collector of the fifth N-type transistor is connected with the second end of the second resistor and the input stage module, and the emitter of the fifth N-type transistor is connected with the first end of the fifth resistor; the second end of the fifth resistor is also connected with the second end of the fourth resistor.

[0015] Compared with the prior art, the present application has the following beneficial effects:

[0016] The second reference voltage and the current source output voltage are compared by the first limit control module, when the current source output voltage is less than the first reference voltage, the current source driving current of the current source driving module is shunted, the first limit current output by the current source driving module is reduced according to the reduced current source driving current, the control of the first limit current is realized; the second reference voltage and the current source output voltage are collected by the second limit control module, when the current source output voltage is greater than the second reference voltage, the current sink driving current of the current sink driving module is shunted, the second limit current output by the current sink driving module is reduced according to the reduced current source driving current, the control of the second limit current is realized, and then the control of the first limit current and the second limit current is realized respectively, the problem that the base-emitter voltage is not equal due to different types of NPN triode and PNP triode in the prior art is avoided, so that the limit current cannot be accurately regulated. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 A structure diagram of a limit current control circuit provided for the embodiment of the present application is provided;

[0018] Figure 2 A structure diagram of an operational amplifier provided for the embodiment of the present application is provided;

[0019] Figure 3 A principle diagram of a limit current control circuit provided for the embodiment of the present application is provided;

[0020] Figure 4 A circuit diagram of another limit current control circuit provided for the embodiment of the present application is provided;

[0021] Figure 5 A circuit diagram of another limit current control circuit provided for the embodiment of the present application is provided;

[0022] Figure 6 A circuit diagram of another limit current control circuit provided for the embodiment of the present application is provided. DETAILED DESCRIPTION

[0023] The technical solutions in the present application are further described below in combination with the drawings and embodiments.

[0024] NX represents an NPN transistor.

[0025] IX represents a current source, and the following number represents the serial number of the resistor; X The following number represents the serial number of the current source.

[0026] RX represents resistance, and the numbers following it indicate the resistor's serial number; R X This indicates the resistance value of the resistor with the same serial number, and the number following it indicates the serial number of the resistor.

[0027] I PXX This indicates the current at a certain port of a PNP device, where I represents the current symbol, P represents the symbol of a PNP bipolar transistor in the subscript PXX, the first X represents the device number, which is Arabic numerals such as 1, 2, 3, etc.; the second X represents the port of the device, which is C (collector), B (base) and E (emitter).

[0028] I NXX This indicates the current at a certain port of an NPN device, where I represents the current symbol, NXX represents the NPN bipolar transistor symbol, the first X represents the device number (e.g., 1, 2, 3, etc.), and the second X represents the port of the device (C (collector), B (base), and E (emitter).

[0029] V PXX This indicates the voltage at a certain port of a PNP device, where V represents the voltage symbol, P represents the symbol for a PNP bipolar transistor in the subscript PXX, the first X represents the device number, which is Arabic numerals such as 1, 2, 3, etc.; the second X represents the port of the device, which is C (collector), B (base) and E (emitter).

[0030] V NXX This indicates the voltage at a certain port of an NPN device, where V represents the voltage symbol, NXX represents the NPN bipolar transistor symbol, the first X represents the device number (e.g., 1, 2, 3, etc.), and the second X represents the port of the device (C (collector), B (base), and E (emitter).

[0031] V BEPX This indicates the BE junction voltage of a PNP device, where V represents the voltage symbol, the subscript BEPXX indicates BE junction, P indicates PNP bipolar transistor symbol, and X indicates the device number, which is an Arabic numeral such as 1, 2, 3, etc.

[0032] V BENX This indicates the BE junction voltage of a certain NPN device, where V represents the voltage symbol, the subscript BENXX indicates BE junction, N represents the NPN bipolar transistor symbol, and X represents the device number, which is an Arabic numeral such as 1, 2, 3, etc.

[0033] I SPXrepresents the saturation current of a certain PNP device, where I represents the current symbol, S in the subscript SPX represents saturation, P represents the PNP bipolar transistor symbol, and X represents the device number, which is the Arabic numeral 1, 2, 3, and so on.

[0034] I SNX represents the saturation current of a certain NPN device, where I represents the current symbol, S in the subscript SNX represents saturation, N represents the NPN bipolar transistor symbol, and X represents the device number, which is the Arabic numeral 1, 2, 3, and so on.

[0035] K XXXX represents the ratio of the emitter areas of two bipolar transistor devices, where the first and third X represent the device type, which is P or N, respectively; and the second and fourth X represent the device number, which is the Arabic numeral 1, 2, 3, and so on.

[0036] V RX represents the voltage across a certain resistance element, where V represents the voltage symbol, R represents the resistance symbol, and X represents the element number, which is the Arabic numeral 1, 2, 3, and so on.

[0037] I RX represents the current flowing through a certain resistance element, where I represents the current symbol, R represents the resistance symbol, and X represents the element number, which is the Arabic numeral 1, 2, 3, and so on.

[0038] K RXRX represents the ratio of the resistances of two resistors, where the two R in the subscript represent the resistance symbol, and the two X represent the element number, which is the Arabic numeral 1, 2, 3, and so on.

[0039] Figure 1 A structure diagram of a limit current control circuit provided by an embodiment of the application is shown in FIG. 1. Figure 1 The limit current control circuit is applied to an operational amplifier, and the operational amplifier includes a current source driving module 300 and a current sink driving module 400. The control circuit includes a first limit control module 100 and a second limit control module 200.

[0040] The first limit control module 100 is connected to the current source driving module 300, and is configured to shunt the current source driving current of the current source driving module 300 when the current source output voltage output by the current source driving module 300 collected is less than a first reference voltage VCH.

[0041] The current source driving module 300 is configured to reduce the output first limit current according to the reduced current source driving current.

[0042] The second limit control module 200 is connected with the current sink driving module 400, and is used for shunting the current sink driving current of the current sink driving module 400 when the current sink output voltage output by the current sink driving module 400 is greater than a third reference voltage.

[0043] The current sink driving module 400 is used for reducing the output second limit current according to the reduced current source driving current.

[0044] In the embodiment, the first limit control module 100 collects the current source output voltage output by the current source driving module 300, shunts the current source driving current of the current source driving module 300 when the current source output voltage is less than a first reference voltage VCH, and the current source driving module 300 reduces the output first limit current according to the reduced current source driving current; the second limit control module 200 collects the current sink output voltage output by the current driving module, shunts the current sink driving current when the current sink output voltage is greater than a second reference voltage VCL, and the current sink driving module 400 reduces the output second limit current according to the reduced current sink driving current, so as to realize the control of the first limit current and the second limit current respectively.

[0045] Figure 2 A structure diagram of an operational amplifier provided by the embodiment is shown in the figure, Figure 2 The operational amplifier further comprises an input stage module 500 and a gain module 600; the input stage module 500 is connected with the gain module 600, and is used for receiving an input voltage and outputting the input voltage to the gain module 600; the gain module 600 is connected with the current source driving module 300 and the current sink driving module 400 respectively, and is used for amplifying the input voltage and outputting a current source driving voltage to the current source driving module 300, so that the current source driving module 300 outputs a current source output voltage according to the current source driving voltage; and is further used for amplifying the input voltage and outputting a current sink driving voltage to the current sink driving module 400, so that the current sink driving module 400 outputs a current sink output voltage according to the current sink driving voltage.

[0046] In the embodiment, the input stage module 500 receives an input voltage, the gain module 600 amplifies the received input voltage, and outputs a current source driving voltage to the current source driving module 300 after amplifying the input voltage, so that the current source driving module 300 outputs a current source driving voltage; and also outputs a current sink driving voltage to the current sink driving module 400 after amplifying the input voltage, so that the current sink driving module 400 outputs a current sink driving voltage.

[0047] Figure 3A schematic diagram of an extreme current control circuit according to an embodiment of the present application is shown in FIG. 1. The input stage module 500 includes a first amplifier A1. The non-inverting input of the first amplifier A1 is connected to the output of the current sink drive module 400. The output of the first amplifier A1 is connected to the gain module 600. Figure 3

[0048] The gain module 600 includes a first NPN transistor N1, a first current source I1 and a second current source I1. The base of the first NPN transistor N1 is connected to the output of the input stage module 500. The collector of the first NPN transistor N1 is connected to the second terminal of the second current source I1, the current source drive module 300 and the current sink drive module 400. The emitter of the first NPN transistor N1 is connected to the first terminal of the first current source I1. The first terminal of the second current source I1 is connected to the first terminal of an external power source. The second terminal of the first current source I1 is connected to the second terminal of the external power source.

[0049] The current source drive module 300 includes a second NPN transistor N2, a third NPN transistor N3, a second resistor R2 and a third resistor R3. The base of the second NPN transistor N2 is connected to the gain module 600. The collector of the second NPN transistor N2 is connected to the first terminal of an external power source. The emitter of the second NPN transistor N2 is connected to the first terminal of the second resistor R2. The base of the third NPN transistor N3 is connected to the emitter of the second NPN transistor N2. The collector of the third NPN transistor N3 is connected to the first terminal of the external power source. The emitter of the third NPN transistor N3 is connected to the first terminal of the third resistor R3. The second terminal of the third resistor R3 is connected to the first terminal of the second resistor R2.

[0050] The current sink drive module 400 includes a fourth NPN transistor N4, a fifth NPN transistor N5, a fourth resistor R4 and a fifth resistor R5. The base of the fourth NPN transistor N4 is connected to the gain module 600. The collector of the fourth NPN transistor N4 is connected to the first terminal of an external power source. The emitter of the fourth NPN transistor N4 is connected to the first terminal of the fourth resistor R4. The second terminal of the fourth resistor R4 is connected to the second terminal of the external power source. The base of the fifth NPN transistor N5 is connected to the emitter of the fourth NPN transistor N4. The collector of the fifth NPN transistor N5 is connected to the second terminal of the second resistor R2 and the input stage module 500. The emitter of the fifth NPN transistor N5 is connected to the first terminal of the fifth resistor R5. The second terminal of the fifth resistor R5 is also connected to the second terminal of the fourth resistor R4. ​

[0051] In the embodiment of the present application, the inverting input terminal of the first limiting control module 100 is connected with the emitter of the third NPN transistor N3, for collecting the output voltage of the current source, i.e. the emitter voltage of the third NPN transistor N3, and has

[0052]

[0053] wherein is the output voltage value of the main operational amplifier; the non-inverting input terminal of the first limiting control module 100 is connected with the first reference voltage VCH , and has

[0054]

[0055] wherein is a fixed voltage value, so that it can be used as the reference voltage for controlling the output current, when

[0056]

[0057] At this time, the first limiting control module 100 will limit the base current of the second NPN transistor N2, thereby reducing the current at the emitter of the third NPN transistor N3, so as to achieve the purpose of controlling the output first limiting current.

[0058] The inverting input terminal of the second limiting control module 200 is connected with the emitter of the fifth NPN transistor N5, and has

[0059]

[0060] The non-inverting input terminal of the second limiting control module 200 is connected with the second reference voltage VCL , when

[0061]

[0062] The second limiting control module 200 will limit the base current of the fourth NPN transistor N4, so as to achieve the purpose of controlling the output current.

[0063] The are matched, so that the output limiting current values of the current source and the current sink are equal; in order not to affect the normal operation of the main operational amplifier, when , the first limiting control module 100 needs not to output current; when , the second limiting control module 200 needs not to output current.

[0064] It should be noted that the first limiting control module 100 and the second limiting control module 200 are amplifiers, and in Figure 3The first limit control module 100 is represented by U1, and the second limit control module 200 is represented by U2.

[0065] Figure 4 The circuit diagram of the first limit current control circuit provided by the embodiment of the application is shown in the figure. Figure 4 The first limit control module 100 comprises a third amplifier A3 and a thirteenth NPN transistor N13. The non-inverting input terminal of the third amplifier A3 is connected with the current source driving module 300. The inverting input terminal of the third amplifier A3 is used for receiving a first reference voltage VCH. The output terminal of the third amplifier A3 is connected with the base of the thirteenth NPN transistor N13. The collector of the thirteenth NPN transistor N13 is connected with the current source driving module 300. The emitter of the thirteenth NPN transistor N13 is connected with the current source driving module 300.

[0066] The control circuit further comprises a first reference source module connected with the first limit control module 100, and used for providing the first limit control module 100 with a first reference voltage VCH. The first reference source module comprises a fifth current source I5 and an eighth resistance R8. The first end of the fifth current source I5 is connected with the first end of an external power supply. The second end of the fifth current source I5 is connected with the inverting input terminal of the third amplifier A3 and the first end of the eighth resistance R8 respectively. The second end of the eighth resistance R8 is connected with the emitter of the thirteenth NPN transistor N13 and the current source driving module 300.

[0067] In the embodiment, the thirteenth NPN transistor N13 is a pull-down NPN device. The first limit current output by the current source is mainly determined by the emitter current of the third NPN transistor N3. When the first limit current reaches the output limit current value, the collector current of the thirteenth NPN transistor N13 shunts the current output by the second current source I2, so as to control the output of the first limit current. At this time,

[0068]

[0069] When designing, the third resistance R3 and the eighth resistance R8 are the same type of resistance. The first limit current output by the current source is completely determined by the value of the fifth current source I5 and the ratio between the eighth resistance R8 and the third resistance R3, so as to control the output of the first limit current.

[0070] It should be noted that, if ​, then N13 is in the cutoff region, and does not affect the normal operation of the main operational amplifier, and the structure of the third amplifier A3 and the thirteenth N-type transistor N13 is only a schematic, as long as the voltage comparison at both ends of the third amplifier A3 can be realized, and the function of the thirteenth N-type transistor N13 that can only pull down current and cannot pull up current is realized, then they should all be considered as the current source direction output limit current accurate control circuit described in the application.

[0071] As shown in Figure 4 , the second limit control module includes a fourth amplifier A4 and a twelfth N-type transistor N12, the non-inverting input end of the fourth amplifier A4 is connected with the current sink driving module 400, the inverting input end of the fourth amplifier A4 is used for receiving a second reference voltage VCL, and the output end of the fourth amplifier A4 is connected with the base of the twelfth N-type transistor N12; the collector of the twelfth N-type transistor N12 is connected with the current sink driving module 400, and the emitter of the twelfth N-type transistor N12 is connected with the current sink driving module 400.

[0072] The control circuit includes a second reference source module connected with the second limit control module, used for providing a second reference voltage VCL for the second limit control module; the second reference source module includes a sixth current source I6 and a ninth resistor R9; the first end of the sixth current source I6 is connected with the first end of an external power supply, the second end of the sixth current source I6 is connected with the inverting input end of the fourth amplifier A4 and the first end of the ninth resistor R9 respectively; and the second end of the ninth resistor R9 is connected with the emitter of the twelfth N-type transistor N12 and the current sink driving module 400 respectively.

[0073] In the embodiment, the twelfth transistor N12 is a pull-down NPN device, and the second limit current value output in the current sink direction is mainly determined by the collector current of the fifth transistor N5; when the second limit current value is reached, the collector current of the twelfth transistor N12 is shunted by the output current of the second transistor A2, so that the purpose of controlling the output current is achieved.

[0074]

[0075] When designing, the fifth resistor R5 and the ninth resistor R9 adopt the same type of resistor, and then the output limit current value in the current sink direction is completely determined by the value of the sixth current source I6 and the ratio between the ninth resistor R9 and the fifth resistor R5 , so that the purpose of accurately controlling the output limit current in the current sink direction is achieved.

[0076] It should be noted that if If the twelfth diode N12 is in the cut-off region, it does not affect the normal operation of the main operational amplifier, and the structure of the fourth amplifier A4 and the twelfth diode N12 is only a schematic, as long as the comparison of the voltages at the two input terminals of the fourth amplifier A4 can be realized, and the function of the tenth diode that can only pull down current but cannot pull up current is realized, it should be considered that the current sinking direction output limiting current accurate control circuit is the current sinking direction output limiting current accurate control circuit.

[0077] Figure 5 Another limiting current control circuit provided by the embodiment of the present application is shown in the circuit diagram as shown in the figure. Figure 5 The first limiting control module comprises a thirteenth N-type transistor N13, a twelfth P-type transistor P12, a tenth P-type transistor P10, an eleventh P-type transistor P11, a twenty-fifth N-type transistor N25, a twenty-sixth N-type transistor N26, a ninth P-type transistor P9 and a thirteenth P-type transistor P13. The base of the thirteenth N-type transistor N13 is connected with the collector of the tenth P-type transistor P10 and the collector of the twenty-fifth N-type transistor N25, respectively. The collector of the thirteenth N-type transistor N13 is connected with the current source driving module. The emitter of the thirteenth N-type transistor N13 is connected with the collector of the twelfth P-type transistor P12. The base of the twelfth P-type transistor P12 is used for receiving a first reference voltage VCH. The emitter of the twelfth P-type transistor P12 is connected with the base of the tenth P-type transistor P10. The base of the ninth P-type transistor P9 is used for receiving a reference current. The emitter of the ninth P-type transistor P9 is connected with the first terminal of an external power supply. The collector of the ninth P-type transistor P9 is connected with the emitter of the tenth P-type transistor P10 and the emitter of the eleventh P-type transistor P11, respectively. The base of the eleventh P-type transistor P11 is connected with the emitter of the thirteenth P-type transistor P13. The collector of the eleventh P-type transistor P11 is connected with the collector of the twenty-sixth N-type transistor N26. The base of the twenty-fifth N-type transistor N25 is connected with the base of the twenty-sixth N-type transistor N26. The emitter of the twenty-fifth N-type transistor N25 is connected with the collector of the twelfth P-type transistor P12. The base of the twenty-sixth N-type transistor N26 is connected with the collector. The emitter of the twenty-sixth N-type transistor N26 is connected with the emitter of the twenty-fifth N-type transistor N25. The base of the thirteenth P-type transistor P13 is connected with the current source driving module. The collector of the thirteenth P-type transistor P13 is connected with the emitter of the twenty-sixth N-type transistor N26 and the current source driving module, respectively.

[0078] The first reference source module comprises a seventh current source I7, a fourteenth NPN transistor N14, a fifteenth NPN transistor N15, a second PNP transistor P2, an eighth PNP transistor P8 and an eighth resistor R8; a first end of the seventh current source I7 is connected with a first end of an external power supply, and a second end of the seventh current source I7 is connected with a collector of the fourteenth NPN transistor N14; a base of the fourteenth NPN transistor N14 is connected with a base of the fifteenth NPN transistor N15, a collector of the fourteenth NPN transistor N14 is connected with the base, and an emitter of the fourteenth NPN transistor N14 is connected with a second end of the external power supply; a collector of the fifteenth NPN transistor N15 is connected with a collector of the second PNP transistor P2, and an emitter of the fifteenth NPN transistor N15 is connected with the second end of the external power supply; a base of the second PNP transistor P2 is connected with a base of the eighth PNP transistor P8, and an emitter of the second PNP transistor P2 is connected with the first end of the external power supply; a collector of the eighth PNP transistor P8 is connected with a base of the twelfth PNP transistor P12 and a first end of the eighth resistor R8 respectively, and an emitter of the eighth PNP transistor P8 is connected with the first end of the external power supply; and a second end of the eighth resistor R8 is connected with a current source driving module.

[0079] In the embodiment, N1 is a main body operational amplifier gain stage input tube, N1, N9, N16 and P3 constitute a gain stage.

[0080] P8, P9, P10, P11, P12, P13, N13, N25, N26 and R8 constitute a current source direction output limit current accurate control circuit.

[0081] P8 and R8 constitute a dynamic reference circuit.

[0082] P9, P10, P11, P12, P13, N13, N25 and N26 constitute a comparator, and N13 is a pull-down NPN device.

[0083] The output limit current value of the current source direction is mainly determined by the emitter current of N3.

[0084] When the output current reaches the output limit current value , the collector current of N13 shunts the collector current of P3, so as to control the output current.

[0085]

[0086] When the same type of resistors R3 and R8 are used in the design, the final output limit current value of the current source direction is completely determined by I5 and , , Decide to achieve the purpose of accurately controlling the output limit current of the current source direction;

[0087] If , N13 is in the cutoff region, and does not affect the normal operation of the main operational amplifier.

[0088] As Figure 5 shown, the second limit control module includes a seventh P-type transistor P7, a twelfth N-type transistor N12, a sixteenth P-type transistor P16, a fourteenth P-type transistor P14, a fifteenth P-type transistor P15, a twenty-third N-type transistor N23, a twenty-fourth N-type transistor N24, and a seventeenth P-type transistor P17; the base of the twelfth N-type transistor N12 is connected to the collector of the fourteenth P-type transistor P14 and the collector of the twenty-third N-type transistor N23, respectively, the collector of the twelfth N-type transistor N12 is connected to the current sink driving module, and the emitter of the twelfth N-type transistor N12 is connected to the current sink driving module; the base of the sixteenth P-type transistor P16 is used for receiving a second reference voltage, the emitter of the sixteenth P-type transistor P16 is connected to the base of the fourteenth P-type transistor P14, and the collector of the sixteenth P-type transistor P16 is connected to the current sink driving module; the base of the seventh P-type transistor P7 is used for receiving a reference current, the emitter of the seventh P-type transistor P7 is connected to the first end of an external power supply, and the collector of the seventh P-type transistor P7 is connected to the emitter of the fourteenth P-type transistor P14 and the emitter of the fifteenth P-type transistor P15, respectively; the base of the fifteenth P-type transistor P15 is connected to the emitter of the seventeenth P-type transistor P17, and the collector of the fifteenth P-type transistor P15 is connected to the collector of the twenty-fourth N-type transistor N24; the base of the twenty-third N-type transistor N23 is connected to the base of the twenty-fourth N-type transistor N24, and the emitter of the twenty-third N-type transistor N23 is connected to the emitter of the twenty-fourth N-type transistor N24; the base of the twenty-fourth N-type transistor N24 is connected to the collector; the base of the seventeenth P-type transistor P17 is connected to the current sink driving module, and the collector of the seventeenth P-type transistor P17 is connected to the current sink driving module.

[0089] The second reference source module comprises a seventh current source I7, a fourteenth NPN transistor N14, a fifteenth NPN transistor N15, a second PNP transistor P2, a sixth PNP transistor P6 and a ninth resistor R9; the first end of the seventh current source I7 is connected with the first end of an external power source, and the second end of the seventh current source I7 is connected with the collector of the fourteenth NPN transistor N14; the base of the fourteenth NPN transistor N14 is connected with the base of the fifteenth NPN transistor N15, the collector of the fourteenth NPN transistor N14 is connected with the base, and the emitter of the fourteenth NPN transistor N14 is connected with the second end of the external power source; the collector of the fifteenth NPN transistor N15 is connected with the collector of the second PNP transistor P2, and the emitter of the fifteenth NPN transistor N15 is connected with the second end of the external power source; the base of the second PNP transistor P2 is connected with the base of the sixth PNP transistor, and the emitter of the second PNP transistor P2 is connected with the first end of the external power source; the emitter of the sixth PNP transistor P6 is connected with the first end of the external power source, the collector of the sixth PNP transistor P6 is connected with the first end of the ninth resistor R9 and the first end of the sixteenth PNP transistor P16; and the second end of the ninth resistor R9 is connected with a current sink driving module.

[0090] In the embodiment, P6, P7, P14, P15, P16, P17, N23, N24, N12 and R9 constitute an output limit current accurate control circuit in the current sink direction.

[0091] P6 and R9 constitute a reference circuit.

[0092] P7, P14, P15, P16, P17, N23 and N24 constitute a comparator, and N12 is a pull-down NPN device.

[0093] The output limit current value in the current sink direction is mainly determined by the collector current of N5.

[0094] When the output current reaches the output limit current value , the collector current of N12 shunts the collector current of P5, so as to control the output current.

[0095]

[0096] When designing, the same type of resistance is used for R5 and R9, so that the output limit current value in the current sink direction is completely determined by I6 and , , , so as to accurately control the output limit current in the current sink direction.

[0097] If If I5 , N13 is in the cutoff region, and does not affect the normal operation of the main operational amplifier.

[0098] Figure 6 The circuit diagram of another limit current control circuit provided by the embodiment of the application is shown in Figure 6 , P8, N13, N27, N29, and R8 constitute the output limit current accurate control circuit of the current source direction.

[0099] P8 and R8 constitute the dynamic reference circuit.

[0100] The output limit current accurate control circuit of the current source direction does not include a typical comparator circuit structure, but can realize the comparison between I5 and I3 , and N13 is a pull-down NPN device.

[0101] The output limit current value of the current source direction is mainly determined by the emitter current of N3.

[0102] When the output current reaches the output limit current value Ilim , the collector current of N13 shunts the collector current of P3, so as to control the output current, at this time

[0103]

[0104] When the resistors R3 and R8 are designed to be the same type, the output limit current value of the current source direction is completely determined by I5 and I3 , , , so as to accurately control the output limit current of the current source direction.

[0105] If I5 , N13 is in the cutoff region, and does not affect the normal operation of the main operational amplifier.

[0106] P6, P7, P16, P17, N12, N28, and R9 constitute the output limit current accurate control circuit of the current sink direction.

[0107] P6 and R9 constitute the reference circuit.

[0108] The output limit current accurate control circuit of the current source direction does not include a typical comparator circuit structure, but can realize the comparison between I5 and I3 ; N12 is a pull-down NPN device.

[0109] The output limit current value of the current sink direction is mainly determined by the collector current of N5.

[0110] When the output current reaches the output limit current value Ilim At this time, the N12 collector current shunts the collector current of P5, achieving the purpose of controlling the output current.

[0111]

[0112] When designing, R5 and R9 are the same type of resistance, and the final current sinking direction output limit current value is completely determined by I6 and 、 、 I7, achieving the purpose of accurately controlling the current sinking direction output limit current.

[0113] If , then N12 is in the cutoff region, and does not affect the normal operation of the main operational amplifier.

[0114] It should be noted that in this paper, relational terms such as "first" and "second" are merely used to distinguish one entity or operation from another, and do not necessarily require or imply that there is any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0115] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and are not limiting. Although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced by equivalents without departing from the purpose and scope of the present application, and all should be covered in the scope of the claims of the present application.

Claims

1. A limit current control circuit for an operational amplifier, the operational amplifier comprising: The current source driving module and the current sink driving module are characterized in that the control circuit comprises a first limit control module and a second limit control module; The first limit control module is connected with the current source driving module, and is configured to shunt the current source driving current of the current source driving module when the current source output voltage output by the current source driving module is less than a first reference voltage; The current source driving module is configured to reduce the output first limit current according to the reduced current source driving current; The second limit control module is connected with the current sink driving module, and is configured to shunt the current sink driving current of the current sink driving module when the current sink output voltage output by the current sink driving module is greater than a third reference voltage; The current sink driving module is configured to reduce the output second limit current according to the reduced current sink driving current.

2. A foldback current control circuit as claimed in claim 1, wherein The first limit control module comprises a third amplifier and a thirteenth NPN transistor; The non-inverting input terminal of the third amplifier is connected with the current source driving module, the inverting input terminal of the third amplifier is configured to receive the first reference voltage, and the output terminal of the third amplifier is connected with the base of the thirteenth NPN transistor; The collector of the thirteenth NPN transistor is connected with the current source driving module, and the emitter of the thirteenth NPN transistor is connected with the current source driving module.

3. A foldback current control circuit as claimed in claim 2, wherein the foldback current control circuit is configured to fold back the current to the load to a predetermined level when the voltage across the load is less than the predetermined voltage level. The control circuit further comprises a first reference source module connected with the first limit control module, and configured to provide the first reference voltage for the first limit control module; The first reference source module comprises a fifth current source and an eighth resistor; The first end of the fifth current source is connected with the first end of an external power supply, and the second end of the fifth current source is connected with the inverting input terminal of the third amplifier and the first end of the eighth resistor respectively; The second end of the eighth resistor is connected with the emitter of the thirteenth NPN transistor and the current source driving module.

4. A foldback current control circuit as claimed in claim 1, wherein, The second limit control module comprises a fourth amplifier and a twelfth NPN transistor; The non-inverting input terminal of the fourth amplifier is connected with the current sink driving module, the inverting input terminal of the fourth amplifier is configured to receive the second reference voltage, and the output terminal of the fourth amplifier is connected with the base of the twelfth NPN transistor; The collector of the twelfth NPN transistor is connected with the current sink driving module, and the emitter of the twelfth NPN transistor is connected with the current sink driving module.

5. A foldback current control circuit as claimed in claim 4, wherein the foldback current control circuit is configured to fold back the current to the load to a predetermined level when the voltage across the load is less than the predetermined voltage level. The control circuit comprises a second reference source module connected with the second limit control module, and configured to provide the second reference voltage for the second limit control module; The second reference source module comprises a sixth current source and a ninth resistor; The first end of the sixth current source is connected with the first end of an external power supply, and the second end of the sixth current source is connected with the inverting input terminal of the fourth amplifier and the first end of the ninth resistor respectively; The second end of the ninth resistor is connected with the emitter of the twelfth NPN transistor and the current sink driving module respectively.

6. A foldback circuit as claimed in claim 3, wherein the foldback circuit is configured to fold back the current to the load to a predetermined level when the current to the load exceeds the predetermined level. The first limit control module comprises a thirteenth N-type transistor, a twelfth P-type transistor, a tenth P-type transistor, an eleventh P-type transistor, a twenty-fifth N-type transistor, a twenty-sixth N-type transistor, a ninth P-type transistor and a thirteenth P-type transistor; The base of the thirteenth N-type transistor is connected with the collector of the tenth P-type transistor and the collector of the twenty-fifth N-type transistor respectively, the collector of the thirteenth N-type transistor is connected with the current source driving module, and the emitter of the thirteenth N-type transistor is connected with the collector of the twelfth P-type transistor; The base of the twelfth P-type transistor is used for receiving a first reference voltage, and the emitter of the twelfth P-type transistor is connected with the base of the tenth P-type transistor; The base of the ninth P-type transistor is used for receiving a reference current, the emitter of the ninth P-type transistor is connected with the first end of an external power supply, and the collector of the ninth P-type transistor is connected with the emitter of the tenth P-type transistor and the emitter of the eleventh P-type transistor respectively; The base of the eleventh P-type transistor is connected with the emitter of the thirteenth P-type transistor, and the collector of the eleventh P-type transistor is connected with the collector of the twenty-sixth N-type transistor; The base of the twenty-fifth N-type transistor is connected with the base of the twenty-sixth N-type transistor, and the emitter of the twenty-fifth N-type transistor is connected with the collector of the twelfth P-type transistor; The base of the twenty-sixth N-type transistor is connected with the collector, and the emitter of the twenty-sixth N-type transistor is connected with the emitter of the twenty-fifth N-type transistor; The base of the thirteenth P-type transistor is connected with the current source driving module, and the collector of the thirteenth P-type transistor is connected with the emitter of the twenty-sixth N-type transistor and the current source driving module respectively.

7. A foldback current control circuit as claimed in claim 6, wherein the foldback current control circuit is configured to fold back the current to the load to a predetermined level when the voltage across the load is less than the predetermined voltage level. The first reference source module comprises a seventh current source, a fourteenth N-type transistor, a fifteenth N-type transistor, a second P-type transistor, an eighth P-type transistor and an eighth resistor; The first end of the seventh current source is connected with the first end of an external power supply, and the second end of the seventh current source is connected with the collector of the fourteenth N-type transistor; The base of the fourteenth N-type transistor is connected with the base of the fifteenth N-type transistor, the collector of the fourteenth N-type transistor is connected with the base, and the emitter of the fourteenth N-type transistor is connected with the second end of an external power supply; The collector of the fifteenth N-type transistor is connected with the collector of the second P-type transistor, and the emitter of the fifteenth N-type transistor is connected with the second end of an external power supply; The base of the second P-type transistor is connected with the base of the eighth P-type transistor, and the emitter of the second P-type transistor is connected with the first end of an external power supply; The collector of the eighth P-type transistor is connected with the base of the twelfth P-type transistor and the first end of the eighth resistor respectively, and the emitter of the eighth P-type transistor is connected with the first end of an external power supply; The second end of the eighth resistor is connected with the current source driving module.

8. A foldback circuit as claimed in claim 5, wherein the foldback circuit is configured to fold back the current to the load to a predetermined level when the current to the load exceeds the predetermined level. 5 The second limit control module comprises a seventh P-type transistor, a twelfth N-type transistor, a sixteenth P-type transistor, a fourteenth P-type transistor, a fifteenth P-type transistor, a twenty-third N-type transistor, a twenty-fourth N-type transistor and a seventeenth P-type transistor; The base of the twelfth N-type transistor is connected with the collector of the fourteenth P-type transistor and the collector of the twenty-third N-type transistor respectively, the collector of the twelfth N-type transistor is connected with the current sink driving module, and the emitter of the twelfth N-type transistor is connected with the current sink driving module; The base of the sixteenth P-type transistor is used for receiving a second reference voltage, the emitter of the sixteenth P-type transistor is connected with the base of the fourteenth P-type transistor, and the collector of the sixteenth P-type transistor is connected with the current sink driving module; The base of the seventh P-type transistor is used for receiving a reference current, the emitter of the seventh P-type transistor is connected with the first end of an external power supply, and the collector of the seventh P-type transistor is connected with the emitter of the fourteenth P-type transistor and the emitter of the fifteenth P-type transistor respectively; The base of the fifteenth P-type transistor is connected with the emitter of the seventeenth P-type transistor, and the collector of the fifteenth P-type transistor is connected with the collector of the twenty-fourth N-type transistor; The base of the twenty-third N-type transistor is connected with the base of the twenty-fourth N-type transistor, and the emitter of the twenty-third N-type transistor is connected with the emitter of the twenty-fourth N-type transistor; The base of the twenty-fourth N-type transistor is connected with the collector of the twenty-fourth N-type transistor; The base of the seventeenth P-type transistor is connected with the current sink driving module, and the collector of the seventeenth P-type transistor is connected with the current sink driving module.

9. A foldback current control circuit as claimed in claim 8, wherein the foldback current control circuit is configured to fold back the current to the load to a predetermined level when the voltage across the load is less than the predetermined voltage level. The second reference source module comprises a seventh current source, a fourteenth N-type transistor, a fifteenth N-type transistor, a second P-type transistor, a sixth P-type transistor and a ninth resistor; The first end of the seventh current source is connected with the first end of an external power supply, and the second end of the seventh current source is connected with the collector of the fourteenth N-type transistor; The base of the fourteenth N-type transistor is connected with the base of the fifteenth N-type transistor, the collector of the fourteenth N-type transistor is connected with the base of the fourteenth N-type transistor, and the emitter of the fourteenth N-type transistor is connected with the second end of an external power supply; The collector of the fifteenth N-type transistor is connected with the collector of the second P-type transistor, and the emitter of the fifteenth N-type transistor is connected with the second end of an external power supply; The base of the second P-type transistor is connected with the base of the sixth P-type transistor, and the emitter of the second P-type transistor is connected with the first end of an external power supply; The emitter of the sixth P-type transistor is connected with the first end of an external power supply, and the collector of the sixth P-type transistor is connected with the first end of the ninth resistor and the first end of the sixteenth P-type transistor; The second end of the ninth resistor is connected with the current sink driving module.

10. An operational amplifier characterized by comprising: The limit current control circuit comprises the operational amplifier, the input stage module and the gain module. The input stage module and the gain module The input stage module is connected with the gain module, and is used for receiving an input voltage and outputting the input voltage to the gain module; The gain module is connected with the current source driving module and the current sink driving module respectively, and is used for outputting a current source driving voltage to the current source driving module after amplifying the input voltage, so that the current source driving module outputs a current source output voltage according to the current source driving voltage; and is also used for outputting a current sink driving voltage to the current sink driving module after amplifying the input voltage, so that the current sink driving module outputs a current sink output voltage according to the current sink driving voltage; The input stage module comprises a first amplifier; The non-inverting input terminal of the first amplifier is connected with the output terminal of the current sink driving module, and the output terminal of the first amplifier is connected with the gain module; The gain module comprises a first N-type transistor, a first current source and a second current source; The base of the first N-type transistor is connected with the output terminal of the input stage module, the collector of the first N-type transistor is connected with the second end of the second current source, the current source driving module and the current sink driving module respectively, and the emitter of the first N-type transistor is connected with the first end of the first current source; The first end of the second current source is connected with the first end of an external power supply; The second end of the first current source is connected with the second end of the external power supply; The current source driving module comprises a second N-type transistor, a third N-type transistor, a second resistor and a third resistor; The base of the second N-type transistor is connected with the gain module, the collector of the second N-type transistor is connected with the first end of an external power supply, and the emitter of the second N-type transistor is connected with the first end of the second resistor; The base of the third N-type transistor is connected with the emitter of the second N-type transistor, the collector of the third N-type transistor is connected with the first end of the external power supply, and the emitter of the third N-type transistor is connected with the first end of the third resistor; The second end of the third resistor is connected with the first end of the second resistor; The current sink driving module comprises a fourth N-type transistor, a fifth N-type transistor, a fourth resistor and a fifth resistor; The base of the fourth N-type transistor is connected with the gain module, the collector of the fourth N-type transistor is connected with the first end of an external power supply, and the emitter of the fourth N-type transistor is connected with the first end of the fourth resistor; The second end of the fourth resistor is connected with the second end of the external power supply; The base of the fifth N-type transistor is connected with the emitter of the fourth N-type transistor, the collector of the fifth N-type transistor is connected with the second end of the second resistor, the collector of the fifth N-type transistor is also connected with the input stage module, and the emitter of the fifth N-type transistor is connected with the first end of the fifth resistor; The second end of the fifth resistor is also connected with the second end of the fourth resistor.

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