Semiconductor RF single-pole double-throw switch utilizing port loading effect

Abstract

The present invention discloses a semiconductor radio frequency single-pole double-throw (SPDT) switch utilizing a port loading effect, belonging to the technical field of basic electronic circuits. The semiconductor radio frequency single-pole double-throw (SPDT) switch comprises a first radio frequency port, a second radio frequency port, a third radio frequency port, a first switch arm, and a second switch arm. Instead of using a transmission line with a length of λ / 4 to prevent mutual influence between the two switch arms, the switching switch utilizes the loading effect of disconnecting the switch arm and an added short-circuit capacitor to form a resonant circuit. By adding a resonant unit formed by a transistor and a compensation inductor to each switch arm and connecting the resonant units via an interstage coupling inductor, the switch arm's return loss in the on state is improved, increasing the return loss to over 20dB. By increasing the number of transistors, a transmission pole is added within the transmission passband, achieving broadband high isolation characteristics.

Description

Technical Field

[0001] The present invention relates to a semiconductor radio frequency single-pole double-throw switch, and in particular discloses a semiconductor radio frequency single-pole double-throw switch utilizing a port loading effect. The invention relates to radio frequency integrated circuit design technology, and belongs to the technical field of basic electronic circuits. Background Art

[0002] A radio frequency single-pole double-throw (SPDT) switch is a control circuit widely used in communications, radar, and detection. It is typically a three-port circuit, with one end connected to the antenna, one end to the transmit link, and the other end to the receive link. Field-effect transistor-based RF SPDT switches have the advantage of low power consumption due to their low gate current. The key technical specifications describing SPDT switches include operating bandwidth, on-branch loss, off-branch isolation, chip size, in-band impedance matching, and power capacity. However, due to design process limitations, the transmit and off-branch branches of RF SPDT switches often interact, making it difficult to simultaneously achieve low insertion loss and high isolation.

[0003] Existing RF single-pole double-throw (SPDT) switches can be categorized into three types based on their circuit design principles. The first involves adding a compensation circuit between the switch arms, thereby changing the input impedance of the switch group to achieve impedance matching with the input transmission line. In actual circuit design, this compensation circuit can improve port impedance matching by approximately 5 dB, resulting in a return loss generally below 15 dB. However, since it does not address the impact of the off-state switch arm on the port impedance matching of the on-state switch arm, the return loss cannot exceed 20 dB. The second method involves adding a λ / 4 transmission line between the antenna port and the circuit port connected to the transmit link, and between the antenna port and the circuit port connected to the receive link, respectively, to prevent mutual interference between the two switch arms. However, the use of λ / 4 transmission lines generally results in larger SPDT switches. The third method involves adding a common open-circuit microstrip line between the two switch arms to compensate for the port loading effect between the switch arms. This results in two less pronounced transmission poles in the on-state response. While this can extend the operating bandwidth, the poor in-band return loss affects the conduction loss of the RF SPDT switch.

[0004] In summary, the existing RF SPDT switches need to be improved in the following two aspects: (1) how to abandon the use of a transmission line with a length of λ / 4 wavelength to avoid mutual influence between the two switch arms; (2) how to effectively solve the port loading effect between different switch arms to improve the port impedance matching, thereby effectively improving the return loss of the RF SPDT switch.

[0005] The present invention aims to propose a semiconductor radio frequency single-pole double-throw switch utilizing a port loading effect to overcome the above-mentioned defects. Summary of the Invention

[0006] The object of the present invention is to address the deficiencies of the above-mentioned background technology, provide a semiconductor radio frequency single-pole double-throw switch utilizing the port loading effect, abandon the use of a transmission line with a length of λ / 4 to avoid mutual influence between the two switch arms, and form a new resonant circuit for improving port impedance matching by adding a short-circuit capacitor connected to the input matching circuit at the input port of the switch arm. By adding a resonant unit in the switch arm, the return loss is effectively improved, and the technical problems that the port impedance matching method of the existing radio frequency single-pole double-throw switch cannot effectively improve the return loss of the radio frequency single-pole double-throw switch and the mutual influence between the two switch arms needs to be avoided at the cost of increasing the circuit area are solved. The invention purpose of improving port impedance matching and improving the return loss of the radio frequency single-pole double-throw switch while maintaining chip miniaturization is achieved.

[0007] The present invention adopts the following technical solutions to achieve the above-mentioned purpose:

[0008] A semiconductor radio frequency single-pole double-throw switch utilizing a port loading effect comprises a first radio frequency port, a second radio frequency port, a third radio frequency port, first to Nth DC ports, N+1th to N+Mth DC ports, a short-circuit capacitor, an input matching circuit, a first switch arm, and a second switch arm;

[0009] The first RF port is connected to one end of the input matching circuit, the other end of the input matching circuit is connected to one electrode of the short-circuit capacitor, and the other electrode of the short-circuit capacitor is grounded;

[0010] The first switching arm includes a first coupled input inductor, N resonant units, first to N-1th inter-stage coupled inductors, and a first output matching circuit. One end of the first coupled input inductor is connected to the connection point of the input matching circuit and the short-circuit capacitor as the input end of the first switching arm. The i-th resonant unit includes an i-th transistor, a first compensation inductor of the i-th resonant unit, and a second compensation inductor of the i-th resonant unit. The i-th resonant unit includes an i-th resonant unit inductor formed by connecting the i-th transistor and at least one compensation inductor in series. The drain of the i-th transistor is grounded, the source of the i-th transistor is electrically connected to one end of the i-th resonant unit inductor, the other end of the i-th resonant unit inductor is grounded, and the gate of the i-th transistor is connected to the ground. connected to the i-th DC port, one end of the i-th inter-stage matching inductor is connected to the connection point between the source of the i-th transistor and the i-th resonant unit inductor, or the connection point of adjacent compensation inductors in the i-th resonant unit inductor, the other end of the i-th inter-stage matching inductor is connected to the connection point between the source of the i+1-th transistor and the i+1-th resonant unit inductor, or the connection point of adjacent compensation inductors in the i+1-th resonant unit inductor, the other end of the first coupled input inductor is connected to the source of the first transistor, one end of the first output matching circuit is electrically connected to the connection point between the source of the N-th transistor and the N-th resonant unit inductor, or the connection point of adjacent compensation inductors in the N-th resonant unit inductor, the other end of the first output matching circuit is the output end of the first switching arm, the 1st to N-th DC ports are connected to a high level or a low level, 1≤i≤N, where N is an integer greater than 1;

[0011] The second switching arm includes a second coupled input inductor, the N+1th to N+Mth resonant units, the Nth to N+M-1th interstage coupled inductors, and a second output matching circuit. One end of the second coupled input inductor is connected to the connection point of the input matching circuit and the short-circuit capacitor as the input end of the second switching arm. The circuit structure of the jth resonant unit is the same as that of the i-th resonant unit. The gate of the jth transistor in the j-th resonant unit is connected to the j-th DC port. One end of the j-th interstage matching inductor is connected to the connection point of the j-th transistor source and the j-th resonant unit inductor or the connection point of the adjacent compensation inductor in the j-th resonant unit inductor. The other end of the j-th interstage matching inductor is connected to the j+ The source of the first transistor is connected to the connection point of the j+1th resonant unit inductor or the connection point of the adjacent compensation inductor in the j+1th resonant unit inductor, the other end of the second coupled input inductor is connected to the source of the (N+1)th transistor, one end of the second output matching circuit is electrically connected to the connection point of the source of the (N+M)th transistor and the connection point of the (N+M)th resonant unit inductor or the connection point of the compensation inductor in the (N+M)th resonant unit inductor, the other end of the second output matching circuit is the output end of the second switching arm, the logic level connected to the (N+1)th to (N+M)th DC ports is opposite to the logic level connected to the (1)th to (N)th DC ports, N+1≤j≤N+M, and M is an integer greater than 1;

[0012] The second radio frequency port is connected to the output end of the first switch arm;

[0013] The third radio frequency port is connected to the output end of the second switch arm.

[0014] Furthermore, in a semiconductor radio frequency single-pole double-throw switch utilizing a port loading effect, the compensation inductor, the inductor in the input matching circuit, the N-1 interstage coupling inductors in the first switch arm, the first input coupling inductor, the M-1 interstage coupling inductors in the second switch arm, and the second input coupling inductor may be microstrip line inductors, stripline inductors, or spiral inductors; the N+M transistors each include a gate, a source, and a drain, and employ a field-effect transistor, a high electron mobility transistor, an mHEMT, or a pHEMT transistor; and the short-circuit capacitor may be a microstrip line capacitor, a metal-insulator-metal capacitor, a metal-oxide-metal capacitor, a flat plate capacitor, or an interdigitated capacitor.

[0015] Furthermore, in a semiconductor RF single-pole double-throw switch utilizing the port loading effect, the drain of the transistor is grounded, the other end of the inductor of the i-th resonant unit is grounded, and the other end of the short-circuit capacitor is grounded, which is actually a terminated metallized ground via and contains weak parasitic effects.

[0016] Furthermore, in a semiconductor RF single-pole double-throw switch utilizing the port loading effect, an input DC blocking capacitor is electrically connected between the first RF port and the input matching circuit, a first output DC blocking capacitor is electrically connected between the second RF port and the first output matching circuit, and a second output DC blocking capacitor is electrically connected between the third RF port and the second output matching circuit.

[0017] Furthermore, a semiconductor radio frequency single-pole double-throw switch using a port loading effect is used. When N=1, when the first switch arm of the semiconductor radio frequency single-pole double-throw switch is turned on, there are two transmission poles in the transmission passband.

[0018] Furthermore, a semiconductor radio frequency single-pole double-throw switch using the port loading effect is used. When N=2, when the second switch arm of the semiconductor radio frequency single-pole double-throw switch is turned on, there are three transmission poles in the transmission passband.

[0019] The present invention adopts the above technical solution and has the following beneficial effects:

[0020] (1) The present invention utilizes the port loading effect of the disconnected switch arm. By adding a short-circuit capacitor connected to the input matching circuit at the input port of the switch arm, the equivalent inductance of the disconnected switch arm and the short-circuit capacitor form a new parallel resonant circuit to avoid the influence of the port loading effect. By adding a resonant unit formed by a transistor and a compensation inductor in series in the switch arm, and adding an inter-stage coupling inductor between different resonant units, the return loss in the working passband of the switch arm in the on state is improved. By increasing the number of resonant units in the switch arm, the transmission pole is increased in the transmission passband of the switch arm in the on state, and the return loss is increased to more than 20dB. The improvement effect on the return loss is much higher than that of the disclosed semiconductor radio frequency single-pole double-throw switch.

[0021] (2) The radio frequency single-pole double-throw switch disclosed in the present invention has low loss characteristics. The insertion loss of the switch arm in the on state is generally less than 1.5dB within the working bandwidth. The effect of reducing the conduction loss is better than most of the disclosed semiconductor radio frequency single-pole double-throw switches.

[0022] (3) The present invention abandons the use of a transmission line with a length of λ / 4 to avoid mutual influence between the two switch arms, so the chip area is very small. The chip size of the single-pole double-throw switch with a center frequency of 28 GHz is less than 1.5 square millimeters. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a structural diagram of a semiconductor radio frequency single-pole double-throw switch utilizing a port loading effect provided in Example 1 of the present invention.

[0024] Figure 2 This is a simulation curve diagram of the relationship between the scattering parameters and frequency in Example 1 of the present invention.

[0025] Figure 3 This is a structural diagram of a semiconductor radio frequency single-pole double-throw switch utilizing a port loading effect provided in Example 2 of the present invention.

[0026] Figure 4 This is a simulation curve diagram of the relationship between the scattering parameters and frequency in Example 2 of the present invention.

[0027] Figure 5 This is a circuit diagram of a semiconductor radio frequency single-pole double-throw switch after N-stage expansion of the first switch arm and M-stage expansion of the second switch arm using the port loading effect of the present invention.

[0028] Explanation of the numbers in the figure: P1 is the first RF port, P2 is the second RF port, P3 is the third RF port, K 11 ,K 12 ,…,K 1N For the 1st to Nth DC ports, K 21 ,K 22,…,K 2M The N+1th to N+Mth DC ports, C1 is a short-circuit capacitor, X in is the input matching circuit, X 1out 、X 2out For the first and second output matching circuits, L x1 、L y1 are the first and second coupled input inductors, L N1 ,L N2 ,…,L NN-1 L is the coupling inductance between the 1st to N-1th stages, M1 ,L M2 ,…,L MM-1 is the coupling inductance between the Nth to N+M-1th stages, M1, M2, ..., M N For the 1st to Nth transistors, M N+1 ,M N+2 ,…,M N+M For the N+1th to N+Mth transistors, L A11 、L A12 are the first and second compensation inductors of the first resonant unit, L A21 、L A22 The first and second compensation inductors of the second resonant unit, L A31 、L A32 、L A33 are the first, second and third compensation inductors of the second resonant unit, L AN1 、L AN2 The first and second compensation inductors of the Nth resonant unit, L B11 、L B12 、L B13 L is the first, second and third compensation inductance of the N+1 resonance unit, B21 、L B22 、L B23 L is the first, second and third compensation inductance of the N+2 resonance unit. B31 、L B32 The first and second compensation inductors of the N+3 resonance unit, L BM1 、L BM2 、L BM3 are the first, second, and third compensation inductors of the N+M resonance unit, L0 is the input matching inductor, and L x2 、L y2 Matching inductors for the first and second outputs. DETAILED DESCRIPTION

[0029] The technical solution of the invention is described in detail below with reference to the accompanying drawings.

[0030] The general topology of the semiconductor radio frequency single-pole double-throw switch using the port loading effect proposed by the present invention is as follows: Figure 5 As shown, it includes: a first RF port P1, a second RF port P2, a third RF port P3, and first to Nth DC ports K 11 ,K 12 ,…,K 1N , N+1th to N+Mth DC ports K 21 ,K 22 ,…,K 2M , short-circuit capacitor C1, input matching circuit X in , first output matching circuit X 1out , the second output matching circuit X 2out , a first switch arm, and a second switch arm.

[0031] Input matching circuit X in The input end is connected to the first RF port P1, one electrode of the short-circuit capacitor C1 is connected to the input matching circuit X in The output end of the short-circuit capacitor C1 is connected to the ground.

[0032] The first switch arm includes: a first coupled input inductor L x1 , N resonant units, coupling inductors L between the 1st to the N-1th stages N1 ,L N2 ,…,L NN-1 , first output matching circuit X 1out ; First coupled input inductor L x1 One end of the first switching arm is the input end of the first coupling input inductor L x1 One end of the input matching circuit X in Connected to the connection point of the short-circuit capacitor C1; each resonant unit is composed of a transistor and several compensation inductors connected in series, and the i-th (1≤i≤N) resonant unit includes: the i-th transistor M i , an i-th resonant unit inductor formed by connecting at least one compensation inductor in series, the drain of the i-th transistor is grounded, the source of the i-th transistor is electrically connected to one end of the i-th resonant unit inductor, the other end of the i-th resonant unit inductor is grounded, and the gate of the i-th transistor is connected to the i-th DC port; one end of the i-th inter-stage matching inductor is connected to the connection point of the i-th transistor source and the i-th resonant unit inductor or the connection point of the adjacent compensation inductor in the i-th resonant unit inductor, and the other end of the i-th inter-stage matching inductor is connected to the connection point of the i+1-th transistor source and the i+1-th resonant unit inductor or the connection point of the adjacent compensation inductor in the i+1-th resonant unit inductor. For example, the first resonant unit is composed of the first transistor M1, the first compensation inductor L of the first resonant unit, and the second compensation inductor L of the first resonant unit. A11 The second resonant unit is formed by the second transistor M2, the first compensation inductor L of the second resonant unit A21 , the second compensation inductor L of the second resonant unit A22The third resonant unit is formed by the third transistor M3, the first compensation inductor L of the third resonant unit A31 , the second compensation inductor L of the third resonant unit A32 , the third compensation inductor L of the third resonant unit A33 The Nth resonant unit is formed by the Nth transistor M N , the first compensation inductor L of the Nth resonance unit AN1 , the second compensation inductor L of the Nth resonance unit AN2 The first stage coupling inductor L is formed in series N1 Connected between the source of the first transistor M1 and the source of the second transistor M2, the second inter-stage coupling inductor L N2 The first compensation inductor L connected to the second resonant unit A21 and the second compensation inductor L of the second resonant unit A22 The connection point of the first compensation inductor L of the third resonant unit A31 and the second compensation inductor L of the third resonant unit A32 Between the connection points; the first coupling input inductor L x1 The other end of the first transistor M1 is connected to the source of the first output matching circuit X 1out One end of the Nth transistor M N The source of the first output matching circuit is electrically connected to 1out The other end is the output end of the first switch arm, and the output end of the first switch arm is connected to the second RF port P2, the 1st to the Nth DC port K 11 ,K 12 ,…,K 1N Connect to low level or high level.

[0033] The second switch arm includes: a second coupled input inductor L y1 , N+1th to N+Mth resonant units, Nth to N+M-1th inter-stage coupling inductors L M1 ,L M2 ,…,L MM-1 , the second output matching circuit X 2out ; Second coupled input inductor L y1 One end of the second switching arm is the input end of the second coupling input inductor L y1 One end of the input matching circuit X in and the connection point of the short-circuit capacitor C1; each resonant unit is composed of a transistor and several compensation inductors electrically connected, and the circuit structure of each resonant unit and the connection method of the inter-stage coupling inductor are the same as those of the first switch arm; the second coupling input inductor L y1 The other end is connected to the N+1th transistor M N+1 The source of the second output matching circuit X 2outOne end of the N+M resonance unit is connected to the second compensation inductor L BM2 and the third compensation inductor L of the N+M resonance unit BM2 The connection point is connected to the second output matching circuit X 2out The other end is the output end of the second switch arm, and the output end of the second switch arm is connected to the third RF port P3, the N+1th to the N+Mth DC ports K 21 ,K 22 ,…,K 2M A high level or a low level is connected to turn off the first switch arm and turn on the second switch arm, or turn on the first switch arm and turn off the second switch arm.

[0034] Specific embodiment 1: semiconductor radio frequency single-pole double-throw switch with double transmission poles using port loading effect

[0035] The semiconductor radio frequency single-pole double-throw switch using the port loading effect comprises: a first radio frequency port P1, a second radio frequency port P2, a third radio frequency port P3, a first DC port K 11 , the second DC port K 21 , short-circuit capacitor C1, input matching circuit, first switch arm, second switch arm; wherein, the input matching circuit is input matching inductor L0, one end of input matching inductor L0 is connected to the first RF port P1, one electrode of short-circuit capacitor C1 is connected to the other end of input matching inductor L0, and the other electrode of short-circuit capacitor C1 is grounded; the first switch arm includes: a first resonant unit, a first coupled input inductor L x1 , the first output matching circuit, the first output matching circuit is the first output matching inductor L x2 The first resonant unit includes: a first transistor M1, a first compensation inductor L of the first resonant unit A11 , the second compensation inductor L of the first resonant unit A12 , the first coupled input inductor L x1 One end of the first switching arm is connected to the connection point of the input matching inductor L0 and the short-circuit capacitor C1 as the input end of the first switching arm, the drain of the first transistor M1 is grounded, and the source of the first transistor M1 is connected to the first compensation inductor L of the first resonant unit. A11 One end of the first coupling input inductor L x1 The other end is electrically connected to the first compensation inductor L of the first resonant unit. A11 The other end is connected to the second compensation inductor L of the first resonant unit A12 One end of the first output matching inductor L x2 One end of the first resonant unit is electrically connected to the second compensation inductor L A12 The other end of the first transistor M1 is grounded, and the gate of the first transistor M1 is connected to the ground through the first gate resistor R g1 With the first DC port K 11 Connect the first output matching inductor Lx2 The other end is the output end of the first switch arm, and the output end of the first switch arm is connected to the second RF port P2; the second switch arm includes: a second resonant unit, a second coupled input inductor L y1 , the second output matching circuit, the second output matching circuit is the second output matching inductor L y2 The second resonant unit includes: a second transistor M2, a first compensation inductor L of the second resonant unit B11 , the second compensation inductor L of the second resonant unit B12 , the second coupled input inductor L y1 One end of the second switching arm is connected to the connection point of the input matching inductor L0 and the short-circuit capacitor C1 as the input end of the second switching arm, the drain of the second transistor M2 is grounded, and the source of the second transistor M2 is connected to the first compensation inductor L of the second resonant unit. B11 One end of the second coupling input inductor L y1 The other end is electrically connected to the first compensation inductor L of the second resonant unit. B11 The other end is connected to the second compensation inductor L of the second resonant unit B12 One end of the second output matching inductor L y2 One end of the second resonant unit is electrically connected to the second compensation inductor L B12 The other end of the second transistor M2 is grounded, and the gate of the second transistor M2 is connected to the ground through the second gate resistor R g2 With the second DC port K 21 Connect the second output matching inductor L y2 The other end is the output end of the second switch arm, and the output end of the second switch arm is connected to the third RF port P3.

[0036] The capacitance value of the short-circuit capacitor C1 is 133fF; the input matching inductor L0 is realized by a microstrip line with a width of 20um and a length of 20um; the first coupled input inductor L x1 This is achieved through a microstrip line with a width of 20um and a length of 403um; the first output matching inductor L x2 It is realized by a microstrip line with a width of 20um and a length of 400um; the first compensation inductor L of the first resonant unit A11 It is realized by a microstrip line with a width of 20um and a length of 440um; the second compensation inductor L of the first resonant unit A12 This is achieved through a microstrip line with a width of 20 μm and a length of 40 μm. The first transistor M1 is a HEMT with a gate width of 100 μm and a transistor gate index of 4. The first gate resistor R g1 The resistance value is 20000Ω, the first DC port K 11 is low level; the second coupling input inductor L y1 This is achieved through a microstrip line with a width of 20um and a length of 403um; the second output matching inductor Ly2 It is realized by a microstrip line with a width of 20um and a length of 400um; the first compensation inductor L of the second resonant unit B11 It is realized by a microstrip line with a width of 20um and a length of 440um; the second compensation inductor L of the second resonant unit B12 The second transistor M2 is a HEMT with a gate width of 100um and a transistor gate index of 4. The resistance of the second gate resistor is 20000Ω. The second DC port K 21 is high level.

[0037] The core circuit size of this single-pole double-throw switch is 1mm×1mm, which has a very obvious miniaturization advantage compared with the existing quarter-wavelength transmission line switch that can avoid mutual influence between switch arms.

[0038] Figure 2 : is a simulation curve diagram of the relationship between the scattering parameter and frequency of the single-pole double-throw switch in this embodiment. Figure 2 As shown, the center frequency of the SPDT switch disclosed in Example 1 of the present invention is 28 GHz, the two transmission poles are at 22.5 GHz and 31 GHz, the insertion loss is less than 1 dB, and the return loss is greater than 20 dB. Compared with the prior art, the SPDT switch provided in Example 1 of the present invention has significantly improved return loss, significantly reduced insertion loss, and significantly improved performance.

[0039] Specific embodiment 2: a semiconductor radio frequency single-pole double-throw switch with three transmission poles using the port loading effect

[0040] The structural diagram of the single-pole double-throw switch disclosed in Example 2 of the present invention is as follows: Figure 3 As shown, this embodiment adds a resonant unit to each of the two switches of the single-pole double-throw switch in embodiment 1. The first switch arm includes: a first coupled input inductor L x1 , a first resonant unit, a second resonant unit, a first inter-stage coupling inductor, and a first output matching circuit. The circuit structures of the first resonant unit and the second resonant unit are the same as those in Example 1. The first inter-stage coupling inductor is connected between the compensation inductor connection point of the first resonant unit and the compensation inductor connection point of the second resonant unit. The circuit structure of the second switch arm is the same as that of the first switch arm and will not be repeated here.

[0041] The capacitance value of the short-circuit capacitor C1 is 110fF; the input matching inductor L0 is realized by a microstrip line with a width of 20um and a length of 40um; the first coupled input inductor L x1 It is realized by a microstrip line with a width of 20um and a length of 500um; the first output matching inductor L x2It is realized by a microstrip line with a width of 20um and a length of 220um; the second coupled input inductor L y1 , the second output matching inductor L y2 With the first coupling input inductor L x1 , the first output matching inductor L x2 Same; the first compensation inductor L of the first resonant unit A11 The second compensation inductor L of the first resonant unit is realized by a microstrip line with a width of 20um and a length of 70um. A12 It is realized by a microstrip line with a width of 20um and a length of 700um; the first compensation inductor L of the second resonant unit A21 The second compensation inductor L of the second resonant unit is realized by a microstrip line with a width of 20um and a length of 70um. A22 It is realized by a microstrip line with a width of 20um and a length of 250um; the values ​​and implementation methods of the compensation inductors of the two resonant units in the second switch arm are the same as those of the corresponding compensation inductors in the first switch arm.

[0042] The first to fourth transistors M1, M2, M3, and M4 are all HEMTs with a gate width of 100 μm; the transistor gate index is 4; the first to fourth gate resistors R g1 、R g2 、R g3 、R g4 The resistance value of the first DC port K is 20000Ω; 11 , the second DC port K 12 The third DC port K is low. 21 , the fourth DC port K 22 is high level.

[0043] Figure 4 : is a simulation curve diagram of the relationship between the scattering parameter and frequency of the single-pole double-throw switch in embodiment 2 of the present invention. Figure 4 As shown, the center frequency of the single-pole double-throw switch disclosed in Example 2 of the present invention is 37 GHz, the three transmission poles are at 27 GHz, 37 GHz and 45 GHz respectively, the insertion loss is less than 1.5 dB, and the return loss is greater than 25 dB.

[0044] It can be seen that the single-pole double-throw switch in Example 2 adds a resonant unit in each of the two switch arms. Therefore, an additional transmission pole is introduced into the passband of the conductive switch arm, and the bandwidth and isolation are also increased accordingly.

[0045] The above embodiments are merely exemplary descriptions of the present invention and do not limit its scope of protection. Those skilled in the art may also make partial changes thereto. For example, several resonant units may be added to the switch arm to effectively increase the bandwidth and isolation of the RF single-pole double-throw switch. Any form of equivalent replacement that is consistent with the spirit of the invention falls within the scope of protection of the present invention.

Claims

1. A semiconductor radio frequency single-pole double-throw switch utilizing a port loading effect, characterized in that: include: The first RF port is connected to one end of the input matching circuit, the other end of the input matching circuit is connected to one electrode of the short-circuit capacitor, and the other electrode of the short-circuit capacitor is grounded; The first switch arm includes a first coupled input inductor, N resonant units, 1st to N-1th interstage coupled inductors, and a first output matching circuit. One end of the first coupled input inductor is connected to the connection point of the input matching circuit and the short-circuit capacitor as the input end of the first switch arm. The i-th resonant unit includes an i-th resonant unit inductor formed by connecting an i-th transistor and at least one compensation inductor in series. The drain of the i-th transistor is grounded, the source of the i-th transistor is electrically connected to one end of the i-th resonant unit inductor, the other end of the i-th resonant unit inductor is grounded, the gate of the i-th transistor is connected to the i-th DC port, and one end of the i-th interstage matching inductor is connected to the connection point of the i-th transistor source and the i-th resonant unit inductor. The first output matching circuit is connected to a connection point of the i+1th transistor source and the i+1th resonant unit inductor or a connection point of adjacent compensation inductors in the i+1th resonant unit inductor, the other end of the i-th inter-stage matching inductor is connected to a connection point of the i+1th transistor source and the i+1th resonant unit inductor or a connection point of adjacent compensation inductors in the i+1th resonant unit inductor, the other end of the first coupled input inductor is connected to the source of the first transistor, one end of the first output matching circuit is connected to a connection point of the Nth transistor source and the Nth resonant unit inductor or a connection point of adjacent compensation inductors in the Nth resonant unit inductor, the other end of the first output matching circuit is the output end of the first switching arm, the 1st to Nth DC ports are connected to a high level or a low level, 1≤i≤N, and N is an integer greater than 1; The second switching arm includes a second coupled input inductor, the N+1th to N+Mth resonant units, the Nth to N+M-1th interstage coupled inductors, and a second output matching circuit. One end of the second coupled input inductor is connected to the connection point of the input matching circuit and the short-circuit capacitor as the input end of the second switching arm. The circuit structure of the jth resonant unit is the same as that of the i-th resonant unit. The gate of the jth transistor in the j-th resonant unit is connected to the j-th DC port. One end of the j-th interstage matching inductor is connected to the connection point of the j-th transistor source and the j-th resonant unit inductor or the connection point of the adjacent compensation inductor in the j-th resonant unit inductor. The other end of the j-th interstage matching inductor is connected to the j+ The source of the first transistor is connected to the connection point of the j+1th resonant unit inductor or the connection point of the adjacent compensation inductor in the j+1th resonant unit inductor, the other end of the second coupled input inductor is connected to the source of the (N+1)th transistor, one end of the second output matching circuit is electrically connected to the connection point of the source of the (N+M)th transistor and the connection point of the (N+M)th resonant unit inductor or the connection point of the compensation inductor in the (N+M)th resonant unit inductor, the other end of the second output matching circuit is the output end of the second switching arm, the logic level connected to the (N+1)th to (N+M)th DC ports is opposite to the logic level connected to the (1)th to (N)th DC ports, N+1≤j≤N+M, and M is an integer greater than 1; a second radio frequency port connected to the output end of the first switch arm; and, The third RF port is connected to the output end of the second switch arm.

2. The semiconductor radio frequency single-pole double-throw switch utilizing the port loading effect according to claim 1, characterized in that: The input matching circuit, the first output matching circuit, and the second output matching circuit are matching circuits composed of pure inductance, pure capacitance, or capacitance and inductance.

3. The semiconductor radio frequency single-pole double-throw switch utilizing the port loading effect according to claim 1, characterized in that: The DC port is connected to a DC bias voltage via a gate resistor.

4. The semiconductor radio frequency single-pole double-throw switch utilizing the port loading effect according to claim 2, characterized in that: The 1st to N-1th inter-stage coupling inductors, the first coupled input inductor, the Nth to N+M-1th inter-stage coupling inductors, the second coupled input inductor, the inductor in the input matching circuit, the inductor in the first output matching circuit, and the inductor in the second output matching circuit are microstrip line inductors, stripline inductors, or spiral inductors.

5. The semiconductor radio frequency single-pole double-throw switch utilizing the port loading effect according to claim 1, characterized in that: The transistor is a field effect transistor, a high electron mobility transistor, an mHEMT, or a pHEMT transistor.

6. The semiconductor radio frequency single-pole double-throw switch utilizing the port loading effect according to claim 2, characterized in that: The short-circuit capacitor, the capacitor in the input matching circuit, the capacitor in the first output matching circuit, and the capacitor in the second output matching circuit are metal-insulator-metal capacitors, metal-oxide-metal capacitors, flat plate capacitors, or interdigital capacitors.

7. The semiconductor radio frequency single-pole double-throw switch utilizing the port loading effect according to claim 1, characterized in that: An input DC blocking capacitor is electrically connected between the first RF port and the input matching circuit, a first output DC blocking capacitor is electrically connected between the second RF port and the output end of the first switch arm, and a second output DC blocking capacitor is electrically connected between the third RF port and the output end of the second switch arm.

8. The semiconductor radio frequency single-pole double-throw switch utilizing the port loading effect according to any one of claims 1 to 7, characterized in that: When N=1, when the first switch arm of the semiconductor radio frequency single-pole double-throw switch is turned on, there are two transmission poles in the transmission passband.

9. The semiconductor radio frequency single-pole double-throw switch utilizing the port loading effect according to any one of claims 1 to 7, characterized in that: When M=2, when the second switch arm of the semiconductor radio frequency single-pole double-throw switch is turned on, there are three transmission poles in the transmission passband.

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